Alessandro Angelino / target-mcu-k64f

Fork of target-mcu-k64f by Morpheus

Embed: (wiki syntax)

« Back to documentation index

MCM_Type Struct Reference

MCM_Type Struct Reference
[MCM Peripheral Access Layer]

MCM - Register Layout Typedef. More...

#include <MK64F12.h>

Data Fields

__I uint16_t PLASC
 Crossbar Switch (AXBS) Slave Configuration, offset: 0x8.
__I uint16_t PLAMC
 Crossbar Switch (AXBS) Master Configuration, offset: 0xA.
__IO uint32_t CR
 Control Register, offset: 0xC.
__IO uint32_t ISCR
 Interrupt Status Register, offset: 0x10.
__IO uint32_t ETBCC
 ETB Counter Control register, offset: 0x14.
__IO uint32_t ETBRL
 ETB Reload register, offset: 0x18.
__I uint32_t ETBCNT
 ETB Counter Value register, offset: 0x1C.
__IO uint32_t PID
 Process ID register, offset: 0x30.

Detailed Description

MCM - Register Layout Typedef.

Definition at line 8778 of file cmsis/MK64F12.h.


Field Documentation

__IO uint32_t CR

Control Register, offset: 0xC.

Definition at line 8782 of file cmsis/MK64F12.h.

__IO uint32_t ETBCC

ETB Counter Control register, offset: 0x14.

Definition at line 8784 of file cmsis/MK64F12.h.

__I uint32_t ETBCNT

ETB Counter Value register, offset: 0x1C.

Definition at line 8786 of file cmsis/MK64F12.h.

__IO uint32_t ETBRL

ETB Reload register, offset: 0x18.

Definition at line 8785 of file cmsis/MK64F12.h.

__IO uint32_t ISCR

Interrupt Status Register, offset: 0x10.

Definition at line 8783 of file cmsis/MK64F12.h.

__IO uint32_t PID

Process ID register, offset: 0x30.

Definition at line 8788 of file cmsis/MK64F12.h.

__I uint16_t PLAMC

Crossbar Switch (AXBS) Master Configuration, offset: 0xA.

Definition at line 8781 of file cmsis/MK64F12.h.

__I uint16_t PLASC

Crossbar Switch (AXBS) Slave Configuration, offset: 0x8.

Definition at line 8780 of file cmsis/MK64F12.h.