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LPTMR_Type Struct Reference
[LPTMR Peripheral Access Layer]
LPTMR - Register Layout Typedef. More...
#include <MK64F12.h>
Data Fields | |
__IO uint32_t | CSR |
Low Power Timer Control Status Register, offset: 0x0. | |
__IO uint32_t | PSR |
Low Power Timer Prescale Register, offset: 0x4. | |
__IO uint32_t | CMR |
Low Power Timer Compare Register, offset: 0x8. | |
__IO uint32_t | CNR |
Low Power Timer Counter Register, offset: 0xC. |
Detailed Description
LPTMR - Register Layout Typedef.
Definition at line 8422 of file cmsis/MK64F12.h.
Field Documentation
__IO uint32_t CMR |
Low Power Timer Compare Register, offset: 0x8.
Definition at line 8425 of file cmsis/MK64F12.h.
__IO uint32_t CNR |
Low Power Timer Counter Register, offset: 0xC.
Definition at line 8426 of file cmsis/MK64F12.h.
__IO uint32_t CSR |
Low Power Timer Control Status Register, offset: 0x0.
Definition at line 8423 of file cmsis/MK64F12.h.
__IO uint32_t PSR |
Low Power Timer Prescale Register, offset: 0x4.
Definition at line 8424 of file cmsis/MK64F12.h.
Generated on Sat Aug 27 2022 17:09:03 by
