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LLWU_Type Struct Reference
[LLWU Peripheral Access Layer]
LLWU - Register Layout Typedef. More...
#include <MK64F12.h>
Data Fields | |
| __IO uint8_t | PE1 |
| LLWU Pin Enable 1 register, offset: 0x0. | |
| __IO uint8_t | PE2 |
| LLWU Pin Enable 2 register, offset: 0x1. | |
| __IO uint8_t | PE3 |
| LLWU Pin Enable 3 register, offset: 0x2. | |
| __IO uint8_t | PE4 |
| LLWU Pin Enable 4 register, offset: 0x3. | |
| __IO uint8_t | ME |
| LLWU Module Enable register, offset: 0x4. | |
| __IO uint8_t | F1 |
| LLWU Flag 1 register, offset: 0x5. | |
| __IO uint8_t | F2 |
| LLWU Flag 2 register, offset: 0x6. | |
| __I uint8_t | F3 |
| LLWU Flag 3 register, offset: 0x7. | |
| __IO uint8_t | FILT1 |
| LLWU Pin Filter 1 register, offset: 0x8. | |
| __IO uint8_t | FILT2 |
| LLWU Pin Filter 2 register, offset: 0x9. | |
| __IO uint8_t | RST |
| LLWU Reset Enable register, offset: 0xA. | |
Detailed Description
LLWU - Register Layout Typedef.
Definition at line 8165 of file cmsis/MK64F12.h.
Field Documentation
| __IO uint8_t F1 |
LLWU Flag 1 register, offset: 0x5.
Definition at line 8171 of file cmsis/MK64F12.h.
| __IO uint8_t F2 |
LLWU Flag 2 register, offset: 0x6.
Definition at line 8172 of file cmsis/MK64F12.h.
| __I uint8_t F3 |
LLWU Flag 3 register, offset: 0x7.
Definition at line 8173 of file cmsis/MK64F12.h.
| __IO uint8_t FILT1 |
LLWU Pin Filter 1 register, offset: 0x8.
Definition at line 8174 of file cmsis/MK64F12.h.
| __IO uint8_t FILT2 |
LLWU Pin Filter 2 register, offset: 0x9.
Definition at line 8175 of file cmsis/MK64F12.h.
| __IO uint8_t ME |
LLWU Module Enable register, offset: 0x4.
Definition at line 8170 of file cmsis/MK64F12.h.
| __IO uint8_t PE1 |
LLWU Pin Enable 1 register, offset: 0x0.
Definition at line 8166 of file cmsis/MK64F12.h.
| __IO uint8_t PE2 |
LLWU Pin Enable 2 register, offset: 0x1.
Definition at line 8167 of file cmsis/MK64F12.h.
| __IO uint8_t PE3 |
LLWU Pin Enable 3 register, offset: 0x2.
Definition at line 8168 of file cmsis/MK64F12.h.
| __IO uint8_t PE4 |
LLWU Pin Enable 4 register, offset: 0x3.
Definition at line 8169 of file cmsis/MK64F12.h.
| __IO uint8_t RST |
LLWU Reset Enable register, offset: 0xA.
Definition at line 8176 of file cmsis/MK64F12.h.
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