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Morpheus
I2C_Type Struct Reference
[I2C Peripheral Access Layer]
I2C - Register Layout Typedef. More...
#include <MK64F12.h>
Data Fields | |
| __IO uint8_t | A1 |
| I2C Address Register 1, offset: 0x0. | |
| __IO uint8_t | F |
| I2C Frequency Divider register, offset: 0x1. | |
| __IO uint8_t | C1 |
| I2C Control Register 1, offset: 0x2. | |
| __IO uint8_t | S |
| I2C Status register, offset: 0x3. | |
| __IO uint8_t | D |
| I2C Data I/O register, offset: 0x4. | |
| __IO uint8_t | C2 |
| I2C Control Register 2, offset: 0x5. | |
| __IO uint8_t | FLT |
| I2C Programmable Input Glitch Filter register, offset: 0x6. | |
| __IO uint8_t | RA |
| I2C Range Address register, offset: 0x7. | |
| __IO uint8_t | SMB |
| I2C SMBus Control and Status register, offset: 0x8. | |
| __IO uint8_t | A2 |
| I2C Address Register 2, offset: 0x9. | |
| __IO uint8_t | SLTH |
| I2C SCL Low Timeout Register High, offset: 0xA. | |
| __IO uint8_t | SLTL |
| I2C SCL Low Timeout Register Low, offset: 0xB. | |
Detailed Description
I2C - Register Layout Typedef.
Definition at line 7517 of file cmsis/MK64F12.h.
Field Documentation
| __IO uint8_t A1 |
I2C Address Register 1, offset: 0x0.
Definition at line 7518 of file cmsis/MK64F12.h.
| __IO uint8_t A2 |
I2C Address Register 2, offset: 0x9.
Definition at line 7527 of file cmsis/MK64F12.h.
| __IO uint8_t C1 |
I2C Control Register 1, offset: 0x2.
Definition at line 7520 of file cmsis/MK64F12.h.
| __IO uint8_t C2 |
I2C Control Register 2, offset: 0x5.
Definition at line 7523 of file cmsis/MK64F12.h.
| __IO uint8_t D |
I2C Data I/O register, offset: 0x4.
Definition at line 7522 of file cmsis/MK64F12.h.
| __IO uint8_t F |
I2C Frequency Divider register, offset: 0x1.
Definition at line 7519 of file cmsis/MK64F12.h.
| __IO uint8_t FLT |
I2C Programmable Input Glitch Filter register, offset: 0x6.
Definition at line 7524 of file cmsis/MK64F12.h.
| __IO uint8_t RA |
I2C Range Address register, offset: 0x7.
Definition at line 7525 of file cmsis/MK64F12.h.
| __IO uint8_t S |
I2C Status register, offset: 0x3.
Definition at line 7521 of file cmsis/MK64F12.h.
| __IO uint8_t SLTH |
I2C SCL Low Timeout Register High, offset: 0xA.
Definition at line 7528 of file cmsis/MK64F12.h.
| __IO uint8_t SLTL |
I2C SCL Low Timeout Register Low, offset: 0xB.
Definition at line 7529 of file cmsis/MK64F12.h.
| __IO uint8_t SMB |
I2C SMBus Control and Status register, offset: 0x8.
Definition at line 7526 of file cmsis/MK64F12.h.
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