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Morpheus
FMC_Type Struct Reference
[FMC Peripheral Access Layer]
FMC - Register Layout Typedef. More...
#include <MK64F12.h>
Data Fields | |
| __IO uint32_t | PFAPR |
| Flash Access Protection Register, offset: 0x0. | |
| __IO uint32_t | PFB0CR |
| Flash Bank 0 Control Register, offset: 0x4. | |
| __IO uint32_t | PFB1CR |
| Flash Bank 1 Control Register, offset: 0x8. | |
| __IO uint32_t | TAGVDW0S [4] |
| Cache Tag Storage, array offset: 0x100, array step: 0x4. | |
| __IO uint32_t | TAGVDW1S [4] |
| Cache Tag Storage, array offset: 0x110, array step: 0x4. | |
| __IO uint32_t | TAGVDW2S [4] |
| Cache Tag Storage, array offset: 0x120, array step: 0x4. | |
| __IO uint32_t | TAGVDW3S [4] |
| Cache Tag Storage, array offset: 0x130, array step: 0x4. | |
| __IO uint32_t | DATA_U |
| Cache Data Storage (upper word), array offset: 0x200, array step: index*0x20, index2*0x8. | |
| __IO uint32_t | DATA_L |
| Cache Data Storage (lower word), array offset: 0x204, array step: index*0x20, index2*0x8. | |
Detailed Description
FMC - Register Layout Typedef.
Definition at line 6108 of file cmsis/MK64F12.h.
Field Documentation
| __IO uint32_t DATA_L |
Cache Data Storage (lower word), array offset: 0x204, array step: index*0x20, index2*0x8.
Definition at line 6120 of file cmsis/MK64F12.h.
| __IO uint32_t DATA_U |
Cache Data Storage (upper word), array offset: 0x200, array step: index*0x20, index2*0x8.
Definition at line 6119 of file cmsis/MK64F12.h.
| __IO uint32_t PFAPR |
Flash Access Protection Register, offset: 0x0.
Definition at line 6109 of file cmsis/MK64F12.h.
| __IO uint32_t PFB0CR |
Flash Bank 0 Control Register, offset: 0x4.
Definition at line 6110 of file cmsis/MK64F12.h.
| __IO uint32_t PFB1CR |
Flash Bank 1 Control Register, offset: 0x8.
Definition at line 6111 of file cmsis/MK64F12.h.
| __IO uint32_t TAGVDW0S |
Cache Tag Storage, array offset: 0x100, array step: 0x4.
Definition at line 6113 of file cmsis/MK64F12.h.
| __IO uint32_t TAGVDW1S |
Cache Tag Storage, array offset: 0x110, array step: 0x4.
Definition at line 6114 of file cmsis/MK64F12.h.
| __IO uint32_t TAGVDW2S |
Cache Tag Storage, array offset: 0x120, array step: 0x4.
Definition at line 6115 of file cmsis/MK64F12.h.
| __IO uint32_t TAGVDW3S |
Cache Tag Storage, array offset: 0x130, array step: 0x4.
Definition at line 6116 of file cmsis/MK64F12.h.
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