Alessandro Angelino / target-freescale-ksdk

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i2c_api.c@0:e4d670b91a9a, 2016-03-23 (annotated)

Committer:
screamer
Date:
Wed Mar 23 21:26:50 2016 +0000
Revision:
0:e4d670b91a9a
Initial revision

Who changed what in which revision?

UserRevisionLine numberNew contents of line
screamer 0:e4d670b91a9a 1 /* mbed Microcontroller Library
screamer 0:e4d670b91a9a 2 * Copyright (c) 2006-2013 ARM Limited
screamer 0:e4d670b91a9a 3 *
screamer 0:e4d670b91a9a 4 * Licensed under the Apache License, Version 2.0 (the "License");
screamer 0:e4d670b91a9a 5 * you may not use this file except in compliance with the License.
screamer 0:e4d670b91a9a 6 * You may obtain a copy of the License at
screamer 0:e4d670b91a9a 7 *
screamer 0:e4d670b91a9a 8 * http://www.apache.org/licenses/LICENSE-2.0
screamer 0:e4d670b91a9a 9 *
screamer 0:e4d670b91a9a 10 * Unless required by applicable law or agreed to in writing, software
screamer 0:e4d670b91a9a 11 * distributed under the License is distributed on an "AS IS" BASIS,
screamer 0:e4d670b91a9a 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
screamer 0:e4d670b91a9a 13 * See the License for the specific language governing permissions and
screamer 0:e4d670b91a9a 14 * limitations under the License.
screamer 0:e4d670b91a9a 15 */
screamer 0:e4d670b91a9a 16 #include "mbed_assert.h"
screamer 0:e4d670b91a9a 17 #include "i2c_api.h"
screamer 0:e4d670b91a9a 18
screamer 0:e4d670b91a9a 19 #if DEVICE_I2C
screamer 0:e4d670b91a9a 20
screamer 0:e4d670b91a9a 21 #include "cmsis.h"
screamer 0:e4d670b91a9a 22 #include "pinmap.h"
screamer 0:e4d670b91a9a 23 #include "fsl_clock_manager.h"
screamer 0:e4d670b91a9a 24 #include "fsl_i2c_hal.h"
screamer 0:e4d670b91a9a 25 #include "fsl_port_hal.h"
screamer 0:e4d670b91a9a 26 #include "fsl_sim_hal.h"
screamer 0:e4d670b91a9a 27 #include "PeripheralPins.h"
screamer 0:e4d670b91a9a 28
screamer 0:e4d670b91a9a 29 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
screamer 0:e4d670b91a9a 30 uint32_t i2c_sda = pinmap_peripheral(sda, PinMap_I2C_SDA);
screamer 0:e4d670b91a9a 31 uint32_t i2c_scl = pinmap_peripheral(scl, PinMap_I2C_SCL);
screamer 0:e4d670b91a9a 32 obj->instance = pinmap_merge(i2c_sda, i2c_scl);
screamer 0:e4d670b91a9a 33 MBED_ASSERT((int)obj->instance != NC);
screamer 0:e4d670b91a9a 34
screamer 0:e4d670b91a9a 35 CLOCK_SYS_EnableI2cClock(obj->instance);
screamer 0:e4d670b91a9a 36 uint32_t i2c_addrs[] = I2C_BASE_ADDRS;
screamer 0:e4d670b91a9a 37 I2C_HAL_Init(i2c_addrs[obj->instance]);
screamer 0:e4d670b91a9a 38 I2C_HAL_Enable(i2c_addrs[obj->instance]);
screamer 0:e4d670b91a9a 39 I2C_HAL_SetIntCmd(i2c_addrs[obj->instance], true);
screamer 0:e4d670b91a9a 40 i2c_frequency(obj, 100000);
screamer 0:e4d670b91a9a 41
screamer 0:e4d670b91a9a 42 pinmap_pinout(sda, PinMap_I2C_SDA);
screamer 0:e4d670b91a9a 43 pinmap_pinout(scl, PinMap_I2C_SCL);
screamer 0:e4d670b91a9a 44
screamer 0:e4d670b91a9a 45 uint32_t port_addrs[] = PORT_BASE_ADDRS;
screamer 0:e4d670b91a9a 46 PORT_HAL_SetOpenDrainCmd(port_addrs[sda >> GPIO_PORT_SHIFT], sda & 0xFF, true);
screamer 0:e4d670b91a9a 47 PORT_HAL_SetOpenDrainCmd(port_addrs[scl >> GPIO_PORT_SHIFT], scl & 0xFF, true);
screamer 0:e4d670b91a9a 48 }
screamer 0:e4d670b91a9a 49
screamer 0:e4d670b91a9a 50 int i2c_start(i2c_t *obj) {
screamer 0:e4d670b91a9a 51 uint32_t i2c_addrs[] = I2C_BASE_ADDRS;
screamer 0:e4d670b91a9a 52 I2C_HAL_SendStart(i2c_addrs[obj->instance]);
screamer 0:e4d670b91a9a 53 return 0;
screamer 0:e4d670b91a9a 54 }
screamer 0:e4d670b91a9a 55
screamer 0:e4d670b91a9a 56 int i2c_stop(i2c_t *obj) {
screamer 0:e4d670b91a9a 57 volatile uint32_t n = 0;
screamer 0:e4d670b91a9a 58 uint32_t i2c_addrs[] = I2C_BASE_ADDRS;
screamer 0:e4d670b91a9a 59 if (I2C_HAL_IsMaster(i2c_addrs[obj->instance]))
screamer 0:e4d670b91a9a 60 I2C_HAL_SendStop(i2c_addrs[obj->instance]);
screamer 0:e4d670b91a9a 61
screamer 0:e4d670b91a9a 62 // It seems that there are timing problems
screamer 0:e4d670b91a9a 63 // when there is no waiting time after a STOP.
screamer 0:e4d670b91a9a 64 // This wait is also included on the samples
screamer 0:e4d670b91a9a 65 // code provided with the freedom board
screamer 0:e4d670b91a9a 66 for (n = 0; n < 200; n++) __NOP();
screamer 0:e4d670b91a9a 67 return 0;
screamer 0:e4d670b91a9a 68 }
screamer 0:e4d670b91a9a 69
screamer 0:e4d670b91a9a 70 static int timeout_status_poll(i2c_t *obj, i2c_status_flag_t flag) {
screamer 0:e4d670b91a9a 71 uint32_t i, timeout = 100000;
screamer 0:e4d670b91a9a 72 uint32_t i2c_addrs[] = I2C_BASE_ADDRS;
screamer 0:e4d670b91a9a 73
screamer 0:e4d670b91a9a 74 for (i = 0; i < timeout; i++) {
screamer 0:e4d670b91a9a 75 if (I2C_HAL_GetStatusFlag(i2c_addrs[obj->instance], flag))
screamer 0:e4d670b91a9a 76 return 0;
screamer 0:e4d670b91a9a 77 }
screamer 0:e4d670b91a9a 78 return 1;
screamer 0:e4d670b91a9a 79 }
screamer 0:e4d670b91a9a 80
screamer 0:e4d670b91a9a 81 // this function waits the end of a tx transfer and return the status of the transaction:
screamer 0:e4d670b91a9a 82 // 0: OK ack received
screamer 0:e4d670b91a9a 83 // 1: OK ack not received
screamer 0:e4d670b91a9a 84 // 2: failure
screamer 0:e4d670b91a9a 85 static int i2c_wait_end_tx_transfer(i2c_t *obj) {
screamer 0:e4d670b91a9a 86 // wait for the interrupt flag
screamer 0:e4d670b91a9a 87 uint32_t i2c_addrs[] = I2C_BASE_ADDRS;
screamer 0:e4d670b91a9a 88
screamer 0:e4d670b91a9a 89 if (timeout_status_poll(obj, kI2CInterruptPending)) {
screamer 0:e4d670b91a9a 90 return 2;
screamer 0:e4d670b91a9a 91 }
screamer 0:e4d670b91a9a 92 I2C_HAL_ClearInt(i2c_addrs[obj->instance]);
screamer 0:e4d670b91a9a 93
screamer 0:e4d670b91a9a 94 // wait transfer complete
screamer 0:e4d670b91a9a 95 if (timeout_status_poll(obj, kI2CTransferComplete)) {
screamer 0:e4d670b91a9a 96 return 2;
screamer 0:e4d670b91a9a 97 }
screamer 0:e4d670b91a9a 98
screamer 0:e4d670b91a9a 99 // check if we received the ACK or not
screamer 0:e4d670b91a9a 100 return I2C_HAL_GetStatusFlag(i2c_addrs[obj->instance], kI2CReceivedNak) ? 1 : 0;
screamer 0:e4d670b91a9a 101 }
screamer 0:e4d670b91a9a 102
screamer 0:e4d670b91a9a 103 // this function waits the end of a rx transfer and return the status of the transaction:
screamer 0:e4d670b91a9a 104 // 0: OK
screamer 0:e4d670b91a9a 105 // 1: failure
screamer 0:e4d670b91a9a 106 static int i2c_wait_end_rx_transfer(i2c_t *obj) {
screamer 0:e4d670b91a9a 107 // wait for the end of the rx transfer
screamer 0:e4d670b91a9a 108 if (timeout_status_poll(obj, kI2CInterruptPending)) {
screamer 0:e4d670b91a9a 109 return 1;
screamer 0:e4d670b91a9a 110 }
screamer 0:e4d670b91a9a 111 uint32_t i2c_addrs[] = I2C_BASE_ADDRS;
screamer 0:e4d670b91a9a 112 I2C_HAL_ClearInt(i2c_addrs[obj->instance]);
screamer 0:e4d670b91a9a 113
screamer 0:e4d670b91a9a 114 return 0;
screamer 0:e4d670b91a9a 115 }
screamer 0:e4d670b91a9a 116
screamer 0:e4d670b91a9a 117 static int i2c_do_write(i2c_t *obj, int value) {
screamer 0:e4d670b91a9a 118 uint32_t i2c_addrs[] = I2C_BASE_ADDRS;
screamer 0:e4d670b91a9a 119 I2C_HAL_WriteByte(i2c_addrs[obj->instance], value);
screamer 0:e4d670b91a9a 120
screamer 0:e4d670b91a9a 121 // init and wait the end of the transfer
screamer 0:e4d670b91a9a 122 return i2c_wait_end_tx_transfer(obj);
screamer 0:e4d670b91a9a 123 }
screamer 0:e4d670b91a9a 124
screamer 0:e4d670b91a9a 125 static int i2c_do_read(i2c_t *obj, char * data, int last) {
screamer 0:e4d670b91a9a 126 uint32_t i2c_addrs[] = I2C_BASE_ADDRS;
screamer 0:e4d670b91a9a 127 if (last) {
screamer 0:e4d670b91a9a 128 I2C_HAL_SendNak(i2c_addrs[obj->instance]);
screamer 0:e4d670b91a9a 129 } else {
screamer 0:e4d670b91a9a 130 I2C_HAL_SendAck(i2c_addrs[obj->instance]);
screamer 0:e4d670b91a9a 131 }
screamer 0:e4d670b91a9a 132
screamer 0:e4d670b91a9a 133 *data = (I2C_HAL_ReadByte(i2c_addrs[obj->instance]) & 0xFF);
screamer 0:e4d670b91a9a 134
screamer 0:e4d670b91a9a 135 // start rx transfer and wait the end of the transfer
screamer 0:e4d670b91a9a 136 return i2c_wait_end_rx_transfer(obj);
screamer 0:e4d670b91a9a 137 }
screamer 0:e4d670b91a9a 138
screamer 0:e4d670b91a9a 139 void i2c_frequency(i2c_t *obj, int hz) {
screamer 0:e4d670b91a9a 140 uint32_t busClock;
screamer 0:e4d670b91a9a 141 uint32_t i2c_addrs[] = I2C_BASE_ADDRS;
screamer 0:e4d670b91a9a 142 clock_manager_error_code_t error = CLOCK_SYS_GetFreq(kBusClock, &busClock);
screamer 0:e4d670b91a9a 143 if (error == kClockManagerSuccess) {
screamer 0:e4d670b91a9a 144 I2C_HAL_SetBaudRate(i2c_addrs[obj->instance], busClock, hz / 1000, NULL);
screamer 0:e4d670b91a9a 145 }
screamer 0:e4d670b91a9a 146 }
screamer 0:e4d670b91a9a 147
screamer 0:e4d670b91a9a 148 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
screamer 0:e4d670b91a9a 149 int count;
screamer 0:e4d670b91a9a 150 char dummy_read, *ptr;
screamer 0:e4d670b91a9a 151
screamer 0:e4d670b91a9a 152 if (i2c_start(obj)) {
screamer 0:e4d670b91a9a 153 i2c_stop(obj);
screamer 0:e4d670b91a9a 154 return I2C_ERROR_BUS_BUSY;
screamer 0:e4d670b91a9a 155 }
screamer 0:e4d670b91a9a 156
screamer 0:e4d670b91a9a 157 if (i2c_do_write(obj, (address | 0x01))) {
screamer 0:e4d670b91a9a 158 i2c_stop(obj);
screamer 0:e4d670b91a9a 159 return I2C_ERROR_NO_SLAVE;
screamer 0:e4d670b91a9a 160 }
screamer 0:e4d670b91a9a 161
screamer 0:e4d670b91a9a 162 // set rx mode
screamer 0:e4d670b91a9a 163 uint32_t i2c_addrs[] = I2C_BASE_ADDRS;
screamer 0:e4d670b91a9a 164 I2C_HAL_SetDirMode(i2c_addrs[obj->instance], kI2CReceive);
screamer 0:e4d670b91a9a 165
screamer 0:e4d670b91a9a 166 // Read in bytes
screamer 0:e4d670b91a9a 167 for (count = 0; count < (length); count++) {
screamer 0:e4d670b91a9a 168 ptr = (count == 0) ? &dummy_read : &data[count - 1];
screamer 0:e4d670b91a9a 169 uint8_t stop_ = (count == (length - 1)) ? 1 : 0;
screamer 0:e4d670b91a9a 170 if (i2c_do_read(obj, ptr, stop_)) {
screamer 0:e4d670b91a9a 171 i2c_stop(obj);
screamer 0:e4d670b91a9a 172 return count;
screamer 0:e4d670b91a9a 173 }
screamer 0:e4d670b91a9a 174 }
screamer 0:e4d670b91a9a 175
screamer 0:e4d670b91a9a 176 // If not repeated start, send stop.
screamer 0:e4d670b91a9a 177 if (stop)
screamer 0:e4d670b91a9a 178 i2c_stop(obj);
screamer 0:e4d670b91a9a 179
screamer 0:e4d670b91a9a 180 // last read
screamer 0:e4d670b91a9a 181 data[count-1] = I2C_HAL_ReadByte(i2c_addrs[obj->instance]);
screamer 0:e4d670b91a9a 182
screamer 0:e4d670b91a9a 183 return length;
screamer 0:e4d670b91a9a 184 }
screamer 0:e4d670b91a9a 185
screamer 0:e4d670b91a9a 186 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
screamer 0:e4d670b91a9a 187 int i;
screamer 0:e4d670b91a9a 188
screamer 0:e4d670b91a9a 189 if (i2c_start(obj)) {
screamer 0:e4d670b91a9a 190 i2c_stop(obj);
screamer 0:e4d670b91a9a 191 return I2C_ERROR_BUS_BUSY;
screamer 0:e4d670b91a9a 192 }
screamer 0:e4d670b91a9a 193
screamer 0:e4d670b91a9a 194 if (i2c_do_write(obj, (address & 0xFE))) {
screamer 0:e4d670b91a9a 195 i2c_stop(obj);
screamer 0:e4d670b91a9a 196 return I2C_ERROR_NO_SLAVE;
screamer 0:e4d670b91a9a 197 }
screamer 0:e4d670b91a9a 198
screamer 0:e4d670b91a9a 199 for (i = 0; i < length; i++) {
screamer 0:e4d670b91a9a 200 if(i2c_do_write(obj, data[i])) {
screamer 0:e4d670b91a9a 201 i2c_stop(obj);
screamer 0:e4d670b91a9a 202 return i;
screamer 0:e4d670b91a9a 203 }
screamer 0:e4d670b91a9a 204 }
screamer 0:e4d670b91a9a 205
screamer 0:e4d670b91a9a 206 if (stop)
screamer 0:e4d670b91a9a 207 i2c_stop(obj);
screamer 0:e4d670b91a9a 208
screamer 0:e4d670b91a9a 209 return length;
screamer 0:e4d670b91a9a 210 }
screamer 0:e4d670b91a9a 211
screamer 0:e4d670b91a9a 212 void i2c_reset(i2c_t *obj) {
screamer 0:e4d670b91a9a 213 i2c_stop(obj);
screamer 0:e4d670b91a9a 214 }
screamer 0:e4d670b91a9a 215
screamer 0:e4d670b91a9a 216 int i2c_byte_read(i2c_t *obj, int last) {
screamer 0:e4d670b91a9a 217 char data;
screamer 0:e4d670b91a9a 218 uint32_t i2c_addrs[] = I2C_BASE_ADDRS;
screamer 0:e4d670b91a9a 219 // set rx mode
screamer 0:e4d670b91a9a 220 I2C_HAL_SetDirMode(i2c_addrs[obj->instance], kI2CReceive);
screamer 0:e4d670b91a9a 221
screamer 0:e4d670b91a9a 222 // Setup read
screamer 0:e4d670b91a9a 223 i2c_do_read(obj, &data, last);
screamer 0:e4d670b91a9a 224
screamer 0:e4d670b91a9a 225 // set tx mode
screamer 0:e4d670b91a9a 226 I2C_HAL_SetDirMode(i2c_addrs[obj->instance], kI2CSend);
screamer 0:e4d670b91a9a 227 return I2C_HAL_ReadByte(i2c_addrs[obj->instance]);
screamer 0:e4d670b91a9a 228 }
screamer 0:e4d670b91a9a 229
screamer 0:e4d670b91a9a 230 int i2c_byte_write(i2c_t *obj, int data) {
screamer 0:e4d670b91a9a 231 uint32_t i2c_addrs[] = I2C_BASE_ADDRS;
screamer 0:e4d670b91a9a 232 // set tx mode
screamer 0:e4d670b91a9a 233 I2C_HAL_SetDirMode(i2c_addrs[obj->instance], kI2CSend);
screamer 0:e4d670b91a9a 234
screamer 0:e4d670b91a9a 235 return !i2c_do_write(obj, (data & 0xFF));
screamer 0:e4d670b91a9a 236 }
screamer 0:e4d670b91a9a 237
screamer 0:e4d670b91a9a 238
screamer 0:e4d670b91a9a 239 #if DEVICE_I2CSLAVE
screamer 0:e4d670b91a9a 240 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
screamer 0:e4d670b91a9a 241 uint32_t i2c_addrs[] = I2C_BASE_ADDRS;
screamer 0:e4d670b91a9a 242 if (enable_slave) {
screamer 0:e4d670b91a9a 243 // set slave mode
screamer 0:e4d670b91a9a 244 BW_I2C_C1_MST(i2c_addrs[obj->instance], 0);
screamer 0:e4d670b91a9a 245 I2C_HAL_SetIntCmd(i2c_addrs[obj->instance], true);
screamer 0:e4d670b91a9a 246 } else {
screamer 0:e4d670b91a9a 247 // set master mode
screamer 0:e4d670b91a9a 248 BW_I2C_C1_MST(i2c_addrs[obj->instance], 1);
screamer 0:e4d670b91a9a 249 }
screamer 0:e4d670b91a9a 250 }
screamer 0:e4d670b91a9a 251
screamer 0:e4d670b91a9a 252 int i2c_slave_receive(i2c_t *obj) {
screamer 0:e4d670b91a9a 253 uint32_t i2c_addrs[] = I2C_BASE_ADDRS;
screamer 0:e4d670b91a9a 254 switch(HW_I2C_S_RD(i2c_addrs[obj->instance])) {
screamer 0:e4d670b91a9a 255 // read addressed
screamer 0:e4d670b91a9a 256 case 0xE6:
screamer 0:e4d670b91a9a 257 return 1;
screamer 0:e4d670b91a9a 258 // write addressed
screamer 0:e4d670b91a9a 259 case 0xE2:
screamer 0:e4d670b91a9a 260 return 3;
screamer 0:e4d670b91a9a 261 default:
screamer 0:e4d670b91a9a 262 return 0;
screamer 0:e4d670b91a9a 263 }
screamer 0:e4d670b91a9a 264 }
screamer 0:e4d670b91a9a 265
screamer 0:e4d670b91a9a 266 int i2c_slave_read(i2c_t *obj, char *data, int length) {
screamer 0:e4d670b91a9a 267 uint8_t dummy_read;
screamer 0:e4d670b91a9a 268 uint8_t *ptr;
screamer 0:e4d670b91a9a 269 int count;
screamer 0:e4d670b91a9a 270 uint32_t i2c_addrs[] = I2C_BASE_ADDRS;
screamer 0:e4d670b91a9a 271 // set rx mode
screamer 0:e4d670b91a9a 272 I2C_HAL_SetDirMode(i2c_addrs[obj->instance], kI2CSend);
screamer 0:e4d670b91a9a 273
screamer 0:e4d670b91a9a 274 // first dummy read
screamer 0:e4d670b91a9a 275 dummy_read = I2C_HAL_ReadByte(i2c_addrs[obj->instance]);
screamer 0:e4d670b91a9a 276 if (i2c_wait_end_rx_transfer(obj))
screamer 0:e4d670b91a9a 277 return 0;
screamer 0:e4d670b91a9a 278
screamer 0:e4d670b91a9a 279 // read address
screamer 0:e4d670b91a9a 280 dummy_read = I2C_HAL_ReadByte(i2c_addrs[obj->instance]);
screamer 0:e4d670b91a9a 281 if (i2c_wait_end_rx_transfer(obj))
screamer 0:e4d670b91a9a 282 return 0;
screamer 0:e4d670b91a9a 283
screamer 0:e4d670b91a9a 284 // read (length - 1) bytes
screamer 0:e4d670b91a9a 285 for (count = 0; count < (length - 1); count++) {
screamer 0:e4d670b91a9a 286 data[count] = I2C_HAL_ReadByte(i2c_addrs[obj->instance]);
screamer 0:e4d670b91a9a 287 if (i2c_wait_end_rx_transfer(obj))
screamer 0:e4d670b91a9a 288 return count;
screamer 0:e4d670b91a9a 289 }
screamer 0:e4d670b91a9a 290
screamer 0:e4d670b91a9a 291 // read last byte
screamer 0:e4d670b91a9a 292 ptr = (length == 0) ? &dummy_read : (uint8_t *)&data[count];
screamer 0:e4d670b91a9a 293 *ptr = I2C_HAL_ReadByte(i2c_addrs[obj->instance]);
screamer 0:e4d670b91a9a 294
screamer 0:e4d670b91a9a 295 return (length) ? (count + 1) : 0;
screamer 0:e4d670b91a9a 296 }
screamer 0:e4d670b91a9a 297
screamer 0:e4d670b91a9a 298 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
screamer 0:e4d670b91a9a 299 int i, count = 0;
screamer 0:e4d670b91a9a 300 uint32_t i2c_addrs[] = I2C_BASE_ADDRS;
screamer 0:e4d670b91a9a 301
screamer 0:e4d670b91a9a 302 // set tx mode
screamer 0:e4d670b91a9a 303 I2C_HAL_SetDirMode(i2c_addrs[obj->instance], kI2CSend);
screamer 0:e4d670b91a9a 304
screamer 0:e4d670b91a9a 305 for (i = 0; i < length; i++) {
screamer 0:e4d670b91a9a 306 if (i2c_do_write(obj, data[count++]) == 2)
screamer 0:e4d670b91a9a 307 return i;
screamer 0:e4d670b91a9a 308 }
screamer 0:e4d670b91a9a 309
screamer 0:e4d670b91a9a 310 // set rx mode
screamer 0:e4d670b91a9a 311 I2C_HAL_SetDirMode(i2c_addrs[obj->instance], kI2CReceive);
screamer 0:e4d670b91a9a 312
screamer 0:e4d670b91a9a 313 // dummy rx transfer needed
screamer 0:e4d670b91a9a 314 // otherwise the master cannot generate a stop bit
screamer 0:e4d670b91a9a 315 I2C_HAL_ReadByte(i2c_addrs[obj->instance]);
screamer 0:e4d670b91a9a 316 if (i2c_wait_end_rx_transfer(obj) == 2)
screamer 0:e4d670b91a9a 317 return count;
screamer 0:e4d670b91a9a 318
screamer 0:e4d670b91a9a 319 return count;
screamer 0:e4d670b91a9a 320 }
screamer 0:e4d670b91a9a 321
screamer 0:e4d670b91a9a 322 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
screamer 0:e4d670b91a9a 323 uint32_t i2c_addrs[] = I2C_BASE_ADDRS;
screamer 0:e4d670b91a9a 324 I2C_HAL_SetUpperAddress7bit(i2c_addrs[obj->instance], address & 0xfe);
screamer 0:e4d670b91a9a 325 }
screamer 0:e4d670b91a9a 326 #endif
screamer 0:e4d670b91a9a 327
screamer 0:e4d670b91a9a 328 #endif