Simple to use macros to manipulate GPIOs quickly.
Dependents: revcounter FastStepDriver
Diff: IOMacros.h
- Revision:
- 1:cb1f38aaae0a
- Parent:
- 0:a3a04e1ce9c2
--- a/IOMacros.h Fri Oct 29 23:31:21 2010 +0000 +++ b/IOMacros.h Thu May 26 08:36:56 2011 +0000 @@ -43,18 +43,20 @@ #define p5_IS_SET (bool)(LPC_GPIO0->FIOPIN & p5_SET_MASK) #define p5_IS_CLR !(p5_IS_SET) #define p5_MODE(x) LPC_PINCON->PINMODE0&=p5_SEL_MASK;LPC_PINCON->PINMODE0|=((x&0x3)<<18) +#define p5_TOGGLE p5_IS_SET?p5_CLR:p5_SET /* p6 is P0.8 */ #define p6_SEL_MASK ~(3UL << 16) #define p6_SET_MASK (1UL << 8) #define p6_CLR_MASK ~(p6_SET_MASK) -#define p6_AS_OUTPUT LPC_PINCON->PINSEL0&=p6_SEL_MASK;LPC_GPIO0->FIODIR|=p6-SET_MASK +#define p6_AS_OUTPUT LPC_PINCON->PINSEL0&=p6_SEL_MASK;LPC_GPIO0->FIODIR|=p6_SET_MASK #define p6_AS_INPUT LPC_GPIO0->FIOMASK &= p6_CLR_MASK; #define p6_SET LPC_GPIO0->FIOSET = p6_SET_MASK #define p6_CLR LPC_GPIO0->FIOCLR = p6_SET_MASK #define p6_IS_SET (bool)(LPC_GPIO0->FIOPIN & p6_SET_MASK) #define p6_IS_CLR !(p6_IS_SET) #define p6_MODE(x) LPC_PINCON->PINMODE0&=p6_SEL_MASK;LPC_PINCON->PINMODE0|=((x&0x3)<<16) +#define p6_TOGGLE p6_IS_SET?p6_CLR:p6_SET /* p7 is P0.7 */ #define p7_SEL_MASK ~(3UL << 14) @@ -66,7 +68,8 @@ #define p7_CLR LPC_GPIO0->FIOCLR = p7_SET_MASK #define p7_IS_SET (bool)(LPC_GPIO0->FIOPIN & p7_SET_MASK) #define p7_IS_CLR !(p7_IS_SET) -#define p7_MODE(x) LPC_PINCON->PINMODE0&=p7_SEL_MASK;LPC_PINCON->PINMODE0|=((x&0x3)<<14) +#define p7_MODE(x) LPC_PINCON->PINMODE0&=p7_SEL_MASK;LPC_PINCON->PINMODE0|=((x&0x3)<<14) +#define p7_TOGGLE p7_IS_SET?p7_CLR:p7_SET /* p8 is P0.6 */ #define p8_SEL_MASK ~(3UL << 12) @@ -78,6 +81,7 @@ #define p8_IS_SET (bool)(LPC_GPIO0->FIOPIN & p8_SET_MASK) #define p8_IS_CLR !(p8_IS_SET) #define p8_MODE(x) LPC_PINCON->PINMODE0&=p8_SEL_MASK;LPC_PINCON->PINMODE0|=((x&0x3)<<12) +#define p8_TOGGLE p8_IS_SET?p8_CLR:p8_SET /* p9 is P0.0 */ #define p9_SEL_MASK ~(3UL << 0) @@ -90,6 +94,7 @@ #define p9_IS_SET (bool)(LPC_GPIO0->FIOPIN & p9_SET_MASK) #define p9_IS_CLR !(p9_IS_SET) #define p9_MODE(x) LPC_PINCON->PINMODE0&=p9_SEL_MASK;LPC_PINCON->PINMODE0|=((x&0x3)<<0) +#define p9_TOGGLE p9_IS_SET?p9_CLR:p9_SET /* p10 is P0.1 */ #define p10_SEL_MASK ~(3UL << 2) @@ -102,6 +107,7 @@ #define p10_IS_SET (bool)(LPC_GPIO0->FIOPIN & p10_SET_MASK) #define p10_IS_CLR !(p10_IS_SET) #define p10_MODE(x) LPC_PINCON->PINMODE0&=p10_SEL_MASK;LPC_PINCON->PINMODE0|=((x&0x3)<<2) +#define p10_TOGGLE p10_IS_SET?p10_CLR:p10_SET /* p11 is P0.18 */ #define p11_SEL_MASK ~(3UL << 4) @@ -114,6 +120,7 @@ #define p11_IS_SET (bool)(LPC_GPIO0->FIOPIN & p11_SET_MASK) #define p11_IS_CLR !(p11_IS_SET) #define p11_MODE(x) LPC_PINCON->PINMODE1&=p11_SEL_MASK;LPC_PINCON->PINMODE1|=((x&0x3)<<4) +#define p11_TOGGLE p11_IS_SET?p11_CLR:p11_SET /* p12 is P0.17 */ #define p12_SEL_MASK ~(3UL << 2) @@ -126,6 +133,7 @@ #define p12_IS_SET (bool)(LPC_GPIO0->FIOPIN & p12_SET_MASK) #define p12_IS_CLR !(p12_IS_SET) #define p12_MODE(x) LPC_PINCON->PINMODE1&=p12_SEL_MASK;LPC_PINCON->PINMODE1|=((x&0x3)<<2) +#define p12_TOGGLE p12_IS_SET?p12_CLR:p12_SET /* p13 is P0.15 */ #define p13_SEL_MASK ~(3UL << 30) @@ -138,6 +146,7 @@ #define p13_IS_SET (bool)(LPC_GPIO0->FIOPIN & p13_SET_MASK) #define p13_IS_CLR !(p13_IS_SET) #define p13_MODE(x) LPC_PINCON->PINMODE0&=p13_SEL_MASK;LPC_PINCON->PINMODE0|=((x&0x3)<<30) +#define p13_TOGGLE p13_IS_SET?p13_CLR:p13_SET /* p14 is P0.16 */ #define p14_SEL_MASK ~(3UL << 0) @@ -150,6 +159,7 @@ #define p14_IS_SET (bool)(LPC_GPIO0->FIOPIN & p14_SET_MASK) #define p14_IS_CLR !(p14_IS_SET) #define p14_MODE(x) LPC_PINCON->PINMODE1&=p14_SEL_MASK;LPC_PINCON->PINMODE1|=((x&0x3)<<0) +#define p14_TOGGLE p14_IS_SET?p14_CLR:p14_SET /* p15 is P0.23 */ #define p15_SEL_MASK ~(3UL << 14) @@ -162,6 +172,7 @@ #define p15_IS_SET (bool)(LPC_GPIO0->FIOPIN & p15_SET_MASK) #define p15_IS_CLR !(p15_IS_SET) #define p15_MODE(x) LPC_PINCON->PINMODE1&=p15_SEL_MASK;LPC_PINCON->PINMODE1|=((x&0x3)<<14) +#define p15_TOGGLE p15_IS_SET?p15_CLR:p15_SET /* p16 is P0.24 */ #define p16_SEL_MASK ~(3UL << 16) @@ -174,6 +185,7 @@ #define p16_IS_SET (bool)(LPC_GPIO0->FIOPIN & p16_SET_MASK) #define p16_IS_CLR !(p16_IS_SET) #define p16_MODE(x) LPC_PINCON->PINMODE1&=p16_SEL_MASK;LPC_PINCON->PINMODE1|=((x&0x3)<<16) +#define p16_TOGGLE p16_IS_SET?p16_CLR:p16_SET /* p17 is P0.25 */ #define p17_SEL_MASK ~(3UL << 18) @@ -186,6 +198,7 @@ #define p17_IS_SET (bool)(LPC_GPIO0->FIOPIN & p17_SET_MASK) #define p17_IS_CLR !(p17_IS_SET) #define p17_MODE(x) LPC_PINCON->PINMODE1&=p17_SEL_MASK;LPC_PINCON->PINMODE1|=((x&0x3)<<18) +#define p17_TOGGLE p17_IS_SET?p17_CLR:p17_SET /* p18 is P0.26 */ #define p18_SEL_MASK ~(3UL << 20) @@ -198,6 +211,7 @@ #define p18_IS_SET (bool)(LPC_GPIO0->FIOPIN & p18_SET_MASK) #define p18_IS_CLR !(p18_IS_SET) #define p18_MODE(x) LPC_PINCON->PINMODE1&=p18_SEL_MASK;LPC_PINCON->PINMODE1|=((x&0x3)<<20) +#define p18_TOGGLE p18_IS_SET?p18_CLR:p18_SET /* p19 is P1.30 */ #define p19_SEL_MASK ~(3UL << 28) @@ -209,6 +223,7 @@ #define p19_IS_SET (bool)(LPC_GPIO1->FIOPIN & p19_SET_MASK) #define p19_IS_CLR !(p19_IS_SET) #define p19_MODE(x) LPC_PINCON->PINMODE3&=p19_SEL_MASK;LPC_PINCON->PINMODE3|=((x&0x3)<<28) +#define p19_TOGGLE p19_IS_SET?p19_CLR:p19_SET /* p20 is P1.31 */ #define p20_SEL_MASK ~(3UL << 30) @@ -221,6 +236,7 @@ #define p20_IS_SET (bool)(LPC_GPIO1->FIOPIN & p20_SET_MASK) #define p20_IS_CLR !(p20_IS_SET) #define p20_MODE(x) LPC_PINCON->PINMODE3&=p20_SEL_MASK;LPC_PINCON->PINMODE3|=((x&0x3)<<30) +#define p20_TOGGLE p20_IS_SET?p20_CLR:p20_SET /* p21 is P2.5 */ #define p21_SEL_MASK ~(3UL << 10) @@ -233,6 +249,7 @@ #define p21_IS_SET (bool)(LPC_GPIO2->FIOPIN & p21_SET_MASK) #define p21_IS_CLR !(p21_IS_SET) #define p21_MODE(x) LPC_PINCON->PINMODE4&=p21_SEL_MASK;LPC_PINCON->PINMODE4|=((x&0x3)<<10) +#define p22_TOGGLE p22_IS_SET?p22_CLR:p22_SET /* p22 is P2.4 */ #define p22_SEL_MASK ~(3UL << 8) @@ -245,6 +262,7 @@ #define p22_IS_SET (bool)(LPC_GPIO2->FIOPIN & p22_SET_MASK) #define p22_IS_CLR !(p22_IS_SET) #define p22_MODE(x) LPC_PINCON->PINMODE4&=p22_SEL_MASK;LPC_PINCON->PINMODE4|=((x&0x3)<<8) +#define p22_TOGGLE p22_IS_SET?p22_CLR:p22_SET /* p23 is P2.3 */ #define p23_SEL_MASK ~(3UL << 6) @@ -257,6 +275,7 @@ #define p23_IS_SET (bool)(LPC_GPIO2->FIOPIN & p23_SET_MASK) #define p23_IS_CLR !(p23_IS_SET) #define p23_MODE(x) LPC_PINCON->PINMODE4&=p23_SEL_MASK;LPC_PINCON->PINMODE4|=((x&0x3)<<6) +#define p23_TOGGLE p23_IS_SET?p23_CLR:p23_SET /* p24 is P2.2 */ #define p24_SEL_MASK ~(3UL << 4) @@ -269,6 +288,7 @@ #define p24_IS_SET (bool)(LPC_GPIO2->FIOPIN & p24_SET_MASK) #define p24_IS_CLR !(p24_IS_SET) #define p24_MODE(x) LPC_PINCON->PINMODE4&=p24_SEL_MASK;LPC_PINCON->PINMODE4|=((x&0x3)<<4) +#define p24_TOGGLE p24_IS_SET?p24_CLR:p24_SET /* p25 is P2.1 */ #define p25_SEL_MASK ~(3UL << 2) @@ -281,6 +301,7 @@ #define p25_IS_SET (bool)(LPC_GPIO2->FIOPIN & p25_SET_MASK) #define p25_IS_CLR !(p25_IS_SET) #define p25_MODE(x) LPC_PINCON->PINMODE4&=p25_SEL_MASK;LPC_PINCON->PINMODE4|=((x&0x3)<<2) +#define p25_TOGGLE p25_IS_SET?p25_CLR:p25_SET /* p26 is P2.0 */ #define p26_SEL_MASK ~(3UL << 0) @@ -293,6 +314,7 @@ #define p26_IS_SET (bool)(LPC_GPIO2->FIOPIN & p26_SET_MASK) #define p26_IS_CLR !(p26_IS_SET) #define p26_MODE(x) LPC_PINCON->PINMODE4&=p26_SEL_MASK;LPC_PINCON->PINMODE4|=((x&0x3)<<0) +#define p26_TOGGLE p26_IS_SET?p26_CLR:p26_SET /* p27 is P0.11 */ #define p27_SEL_MASK ~(3UL << 22) @@ -305,6 +327,7 @@ #define p27_IS_SET (bool)(LPC_GPIO0->FIOPIN & p27_SET_MASK) #define p27_IS_CLR !(p27_IS_SET) #define p27_MODE(x) LPC_PINCON->PINMODE0&=p27_SEL_MASK;LPC_PINCON->PINMODE0|=((x&0x3)<<22) +#define p27_TOGGLE p27_IS_SET?p27_CLR:p27_SET /* p28 is P0.10 */ #define p28_SEL_MASK ~(3UL << 20) @@ -317,6 +340,7 @@ #define p28_IS_SET (bool)(LPC_GPIO0->FIOPIN & p28_SET_MASK) #define p28_IS_CLR !(p28_IS_SET) #define p28_MODE(x) LPC_PINCON->PINMODE0&=p28_SEL_MASK;LPC_PINCON->PINMODE0|=((x&0x3)<<20) +#define p28_TOGGLE p28_IS_SET?p28_CLR:p28_SET /* p29 is P0.5 */ #define p29_SEL_MASK ~(3UL << 10) @@ -329,6 +353,7 @@ #define p29_IS_SET (bool)(LPC_GPIO0->FIOPIN & p29_SET_MASK) #define p29_IS_CLR !(p29_IS_SET) #define p29_MODE(x) LPC_PINCON->PINMODE0&=p29_SEL_MASK;LPC_PINCON->PINMODE0|=((x&0x3)<<10) +#define p29_TOGGLE p29_IS_SET?p29_CLR:p29_SET /* p30 is P0.4 */ #define p30_SEL_MASK ~(3UL << 8) @@ -341,6 +366,7 @@ #define p30_IS_SET (bool)(LPC_GPIO0->FIOPIN & p30_SET_MASK) #define p30_IS_CLR !(p30_IS_SET) #define p30_MODE(x) LPC_PINCON->PINMODE0&=p30_SEL_MASK;LPC_PINCON->PINMODE0|=((x&0x3)<<8) +#define p30_TOGGLE p30_IS_SET?p30_CLR:p30_SET /* The following definitions are for the four Mbed LEDs. LED1 = P1.18