Attempt to read the AD9951 DSP serial output via SSP and \"IRQ driven bit-reading\".

Committer:
AjK
Date:
Tue Jan 18 01:27:57 2011 +0000
Revision:
0:e45bbd4486df
0.1 A test failure case!

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AjK 0:e45bbd4486df 1
AjK 0:e45bbd4486df 2 #include "mbed.h"
AjK 0:e45bbd4486df 3 #include "iomacros.h"
AjK 0:e45bbd4486df 4
AjK 0:e45bbd4486df 5 // Works with 10 (ie CLK cycle time 20us)
AjK 0:e45bbd4486df 6 // but fails with 5 (10us). No where even
AjK 0:e45bbd4486df 7 // close to 6.5MHz !!
AjK 0:e45bbd4486df 8 #define DELAY 10
AjK 0:e45bbd4486df 9
AjK 0:e45bbd4486df 10 #define SYNC_1 p23_SET
AjK 0:e45bbd4486df 11 #define SYNC_0 p23_CLR
AjK 0:e45bbd4486df 12 #define CLK_1 p22_SET
AjK 0:e45bbd4486df 13 #define CLK_0 p22_CLR
AjK 0:e45bbd4486df 14 #define DATA_1 p21_SET
AjK 0:e45bbd4486df 15 #define DATA_0 p21_CLR
AjK 0:e45bbd4486df 16
AjK 0:e45bbd4486df 17 void tx(Serial *pc, DigitalOut *led1) {
AjK 0:e45bbd4486df 18 uint16_t counter = 0xAAAA, mask;
AjK 0:e45bbd4486df 19
AjK 0:e45bbd4486df 20 pc->printf("Starting MBED as the sender...\n");
AjK 0:e45bbd4486df 21
AjK 0:e45bbd4486df 22 p21_AS_OUTPUT; // SERDATA
AjK 0:e45bbd4486df 23 p22_AS_OUTPUT; // CLK
AjK 0:e45bbd4486df 24 p23_AS_OUTPUT; // SYNC
AjK 0:e45bbd4486df 25
AjK 0:e45bbd4486df 26 p21_CLR;
AjK 0:e45bbd4486df 27 p22_CLR;
AjK 0:e45bbd4486df 28 p23_SET;
AjK 0:e45bbd4486df 29
AjK 0:e45bbd4486df 30 while(1) {
AjK 0:e45bbd4486df 31 mask = 0x8000;
AjK 0:e45bbd4486df 32 for (int i = 0; i < 16; i++) {
AjK 0:e45bbd4486df 33
AjK 0:e45bbd4486df 34 if (i == 0) {
AjK 0:e45bbd4486df 35 SYNC_1;
AjK 0:e45bbd4486df 36 }
AjK 0:e45bbd4486df 37 else {
AjK 0:e45bbd4486df 38 SYNC_0;
AjK 0:e45bbd4486df 39 }
AjK 0:e45bbd4486df 40
AjK 0:e45bbd4486df 41 if ((counter & mask) != 0) DATA_1;
AjK 0:e45bbd4486df 42 else DATA_0;
AjK 0:e45bbd4486df 43
AjK 0:e45bbd4486df 44 CLK_1;
AjK 0:e45bbd4486df 45 wait_us(DELAY);
AjK 0:e45bbd4486df 46
AjK 0:e45bbd4486df 47 CLK_0;
AjK 0:e45bbd4486df 48 wait_us(DELAY);
AjK 0:e45bbd4486df 49
AjK 0:e45bbd4486df 50 mask = mask >> 1;
AjK 0:e45bbd4486df 51 }
AjK 0:e45bbd4486df 52
AjK 0:e45bbd4486df 53 // The above loop recreates Michele's waveform as shown on
AjK 0:e45bbd4486df 54 // http://mbed.org/forum/helloworld/topic/1674
AjK 0:e45bbd4486df 55
AjK 0:e45bbd4486df 56 // However, to coax the receiving SSP on the other Mbed
AjK 0:e45bbd4486df 57 // the following extra clk is needed. Even then the 16bit
AjK 0:e45bbd4486df 58 // value read isn't 0xAAAA but 0x5554 as the first bit is sent
AjK 0:e45bbd4486df 59 // while SYNC is asserted. Thus the "other end" doesn't see bit0
AjK 0:e45bbd4486df 60 // and misses the last bit.
AjK 0:e45bbd4486df 61
AjK 0:e45bbd4486df 62 //CLK_1; wait_us(DELAY); CLK_0; wait_us(DELAY);
AjK 0:e45bbd4486df 63
AjK 0:e45bbd4486df 64 //counter++;
AjK 0:e45bbd4486df 65 }
AjK 0:e45bbd4486df 66 }