Tomo Yamanaka / mbed-dev

mbed library sources. Supersedes mbed-src. GR-PEACH runs on RAM.

Fork of mbed-dev by mbed official

targets/hal/TARGET_STM/TARGET_STM32F3XX/pinmap.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 *******************************************************************************
bogdanm 0:9b334a45a8ff 3 * Copyright (c) 2014, STMicroelectronics
bogdanm 0:9b334a45a8ff 4 * All rights reserved.
bogdanm 0:9b334a45a8ff 5 *
bogdanm 0:9b334a45a8ff 6 * Redistribution and use in source and binary forms, with or without
bogdanm 0:9b334a45a8ff 7 * modification, are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 8 *
bogdanm 0:9b334a45a8ff 9 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 10 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 12 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 13 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 15 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 16 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 17 *
bogdanm 0:9b334a45a8ff 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 28 *******************************************************************************
bogdanm 0:9b334a45a8ff 29 */
bogdanm 0:9b334a45a8ff 30 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 31 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 32 #include "PortNames.h"
bogdanm 0:9b334a45a8ff 33 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 34
bogdanm 0:9b334a45a8ff 35 // Enable GPIO clock and return GPIO base address
bogdanm 0:9b334a45a8ff 36 uint32_t Set_GPIO_Clock(uint32_t port_idx) {
bogdanm 0:9b334a45a8ff 37 uint32_t gpio_add;
bogdanm 0:9b334a45a8ff 38 switch (port_idx) {
bogdanm 0:9b334a45a8ff 39 case PortA:
bogdanm 0:9b334a45a8ff 40 gpio_add = GPIOA_BASE;
bogdanm 0:9b334a45a8ff 41 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
bogdanm 0:9b334a45a8ff 42 break;
bogdanm 0:9b334a45a8ff 43 case PortB:
bogdanm 0:9b334a45a8ff 44 gpio_add = GPIOB_BASE;
bogdanm 0:9b334a45a8ff 45 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
bogdanm 0:9b334a45a8ff 46 break;
bogdanm 0:9b334a45a8ff 47 case PortC:
bogdanm 0:9b334a45a8ff 48 gpio_add = GPIOC_BASE;
bogdanm 0:9b334a45a8ff 49 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOC, ENABLE);
bogdanm 0:9b334a45a8ff 50 break;
bogdanm 0:9b334a45a8ff 51 case PortD:
bogdanm 0:9b334a45a8ff 52 gpio_add = GPIOD_BASE;
bogdanm 0:9b334a45a8ff 53 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOD, ENABLE);
bogdanm 0:9b334a45a8ff 54 break;
bogdanm 0:9b334a45a8ff 55 case PortE:
bogdanm 0:9b334a45a8ff 56 gpio_add = GPIOE_BASE;
bogdanm 0:9b334a45a8ff 57 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOE, ENABLE);
bogdanm 0:9b334a45a8ff 58 break;
bogdanm 0:9b334a45a8ff 59 case PortF:
bogdanm 0:9b334a45a8ff 60 gpio_add = GPIOF_BASE;
bogdanm 0:9b334a45a8ff 61 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOF, ENABLE);
bogdanm 0:9b334a45a8ff 62 break;
bogdanm 0:9b334a45a8ff 63 default:
bogdanm 0:9b334a45a8ff 64 gpio_add = 0;
bogdanm 0:9b334a45a8ff 65 error("Port number is not correct.");
bogdanm 0:9b334a45a8ff 66 break;
bogdanm 0:9b334a45a8ff 67 }
bogdanm 0:9b334a45a8ff 68 return gpio_add;
bogdanm 0:9b334a45a8ff 69 }
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71 /**
bogdanm 0:9b334a45a8ff 72 * Configure pin (mode, speed, output type and pull-up/pull-down)
bogdanm 0:9b334a45a8ff 73 */
bogdanm 0:9b334a45a8ff 74 void pin_function(PinName pin, int data) {
bogdanm 0:9b334a45a8ff 75 MBED_ASSERT(pin != (PinName)NC);
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 // Get the pin informations
bogdanm 0:9b334a45a8ff 78 uint32_t mode = STM_PIN_MODE(data);
bogdanm 0:9b334a45a8ff 79 uint32_t otype = STM_PIN_OTYPE(data);
bogdanm 0:9b334a45a8ff 80 uint32_t pupd = STM_PIN_PUPD(data);
bogdanm 0:9b334a45a8ff 81 uint32_t afnum = STM_PIN_AFNUM(data);
bogdanm 0:9b334a45a8ff 82
bogdanm 0:9b334a45a8ff 83 uint32_t port_index = STM_PORT(pin);
bogdanm 0:9b334a45a8ff 84 uint32_t pin_index = STM_PIN(pin);
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 // Enable GPIO clock
bogdanm 0:9b334a45a8ff 87 uint32_t gpio_add = Set_GPIO_Clock(port_index);
bogdanm 0:9b334a45a8ff 88 GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
bogdanm 0:9b334a45a8ff 89
bogdanm 0:9b334a45a8ff 90 // Configure Alternate Function
bogdanm 0:9b334a45a8ff 91 // Warning: Must be done before the GPIO is initialized
bogdanm 0:9b334a45a8ff 92 if (afnum != 0xFF) {
bogdanm 0:9b334a45a8ff 93 GPIO_PinAFConfig(gpio, (uint16_t)pin_index, afnum);
bogdanm 0:9b334a45a8ff 94 }
bogdanm 0:9b334a45a8ff 95
bogdanm 0:9b334a45a8ff 96 // Configure GPIO
bogdanm 0:9b334a45a8ff 97 GPIO_InitTypeDef GPIO_InitStructure;
bogdanm 0:9b334a45a8ff 98 GPIO_InitStructure.GPIO_Pin = (uint16_t)(1 << pin_index);
bogdanm 0:9b334a45a8ff 99 GPIO_InitStructure.GPIO_Mode = (GPIOMode_TypeDef)mode;
bogdanm 0:9b334a45a8ff 100 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_Level_3;
bogdanm 0:9b334a45a8ff 101 GPIO_InitStructure.GPIO_OType = (GPIOOType_TypeDef)otype;
bogdanm 0:9b334a45a8ff 102 GPIO_InitStructure.GPIO_PuPd = (GPIOPuPd_TypeDef)pupd;
bogdanm 0:9b334a45a8ff 103 GPIO_Init(gpio, &GPIO_InitStructure);
bogdanm 0:9b334a45a8ff 104
bogdanm 0:9b334a45a8ff 105 // [TODO] Disconnect JTAG-DP + SW-DP signals.
bogdanm 0:9b334a45a8ff 106 // Warning: Need to reconnect under reset
bogdanm 0:9b334a45a8ff 107 //if ((pin == PA_13) || (pin == PA_14)) {
bogdanm 0:9b334a45a8ff 108 //
bogdanm 0:9b334a45a8ff 109 //}
bogdanm 0:9b334a45a8ff 110 //if ((pin == PA_15) || (pin == PB_3) || (pin == PB_4)) {
bogdanm 0:9b334a45a8ff 111 //
bogdanm 0:9b334a45a8ff 112 //}
bogdanm 0:9b334a45a8ff 113 }
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 /**
bogdanm 0:9b334a45a8ff 116 * Configure pin pull-up/pull-down
bogdanm 0:9b334a45a8ff 117 */
bogdanm 0:9b334a45a8ff 118 void pin_mode(PinName pin, PinMode mode) {
bogdanm 0:9b334a45a8ff 119 MBED_ASSERT(pin != (PinName)NC);
bogdanm 0:9b334a45a8ff 120
bogdanm 0:9b334a45a8ff 121 uint32_t port_index = STM_PORT(pin);
bogdanm 0:9b334a45a8ff 122 uint32_t pin_index = STM_PIN(pin);
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 // Enable GPIO clock
bogdanm 0:9b334a45a8ff 125 uint32_t gpio_add = Set_GPIO_Clock(port_index);
bogdanm 0:9b334a45a8ff 126 GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
bogdanm 0:9b334a45a8ff 127
bogdanm 0:9b334a45a8ff 128 // Configure pull-up/pull-down resistors
bogdanm 0:9b334a45a8ff 129 uint32_t pupd = (uint32_t)mode;
bogdanm 0:9b334a45a8ff 130 if (pupd > 2)
bogdanm 0:9b334a45a8ff 131 pupd = 0; // Open-drain = No pull-up/No pull-down
bogdanm 0:9b334a45a8ff 132 gpio->PUPDR &= (uint32_t)(~(GPIO_PUPDR_PUPDR0 << (pin_index * 2)));
bogdanm 0:9b334a45a8ff 133 gpio->PUPDR |= (uint32_t)(pupd << (pin_index * 2));
bogdanm 0:9b334a45a8ff 134
bogdanm 0:9b334a45a8ff 135 }