mbed library sources. Supersedes mbed-src. GR-PEACH runs on RAM.
Fork of mbed-dev by
targets/hal/TARGET_STM/TARGET_STM32L0/pinmap.c@103:493a29d2d4d7, 2016-03-30 (annotated)
- Committer:
- 1050186
- Date:
- Wed Mar 30 11:41:25 2016 +0000
- Revision:
- 103:493a29d2d4d7
- Parent:
- 0:9b334a45a8ff
GR-PEACH runs on RAM.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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bogdanm | 0:9b334a45a8ff | 1 | /* mbed Microcontroller Library |
bogdanm | 0:9b334a45a8ff | 2 | ******************************************************************************* |
bogdanm | 0:9b334a45a8ff | 3 | * Copyright (c) 2015, STMicroelectronics |
bogdanm | 0:9b334a45a8ff | 4 | * All rights reserved. |
bogdanm | 0:9b334a45a8ff | 5 | * |
bogdanm | 0:9b334a45a8ff | 6 | * Redistribution and use in source and binary forms, with or without |
bogdanm | 0:9b334a45a8ff | 7 | * modification, are permitted provided that the following conditions are met: |
bogdanm | 0:9b334a45a8ff | 8 | * |
bogdanm | 0:9b334a45a8ff | 9 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 10 | * this list of conditions and the following disclaimer. |
bogdanm | 0:9b334a45a8ff | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 12 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 0:9b334a45a8ff | 13 | * and/or other materials provided with the distribution. |
bogdanm | 0:9b334a45a8ff | 14 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 0:9b334a45a8ff | 15 | * may be used to endorse or promote products derived from this software |
bogdanm | 0:9b334a45a8ff | 16 | * without specific prior written permission. |
bogdanm | 0:9b334a45a8ff | 17 | * |
bogdanm | 0:9b334a45a8ff | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 0:9b334a45a8ff | 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 0:9b334a45a8ff | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 0:9b334a45a8ff | 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 0:9b334a45a8ff | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 0:9b334a45a8ff | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 0:9b334a45a8ff | 24 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 0:9b334a45a8ff | 25 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 0:9b334a45a8ff | 26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 0:9b334a45a8ff | 27 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 0:9b334a45a8ff | 28 | ******************************************************************************* |
bogdanm | 0:9b334a45a8ff | 29 | */ |
bogdanm | 0:9b334a45a8ff | 30 | #include "mbed_assert.h" |
bogdanm | 0:9b334a45a8ff | 31 | #include "pinmap.h" |
bogdanm | 0:9b334a45a8ff | 32 | #include "PortNames.h" |
bogdanm | 0:9b334a45a8ff | 33 | #include "mbed_error.h" |
bogdanm | 0:9b334a45a8ff | 34 | |
bogdanm | 0:9b334a45a8ff | 35 | // GPIO mode look-up table |
bogdanm | 0:9b334a45a8ff | 36 | // Warning: order must be the same as the one defined in PinNames.h !!! |
bogdanm | 0:9b334a45a8ff | 37 | static const uint32_t gpio_mode[13] = { |
bogdanm | 0:9b334a45a8ff | 38 | 0x00000000, // 0 = GPIO_MODE_INPUT |
bogdanm | 0:9b334a45a8ff | 39 | 0x00000001, // 1 = GPIO_MODE_OUTPUT_PP |
bogdanm | 0:9b334a45a8ff | 40 | 0x00000011, // 2 = GPIO_MODE_OUTPUT_OD |
bogdanm | 0:9b334a45a8ff | 41 | 0x00000002, // 3 = GPIO_MODE_AF_PP |
bogdanm | 0:9b334a45a8ff | 42 | 0x00000012, // 4 = GPIO_MODE_AF_OD |
bogdanm | 0:9b334a45a8ff | 43 | 0x00000003, // 5 = GPIO_MODE_ANALOG |
bogdanm | 0:9b334a45a8ff | 44 | 0x10110000, // 6 = GPIO_MODE_IT_RISING |
bogdanm | 0:9b334a45a8ff | 45 | 0x10210000, // 7 = GPIO_MODE_IT_FALLING |
bogdanm | 0:9b334a45a8ff | 46 | 0x10310000, // 8 = GPIO_MODE_IT_RISING_FALLING |
bogdanm | 0:9b334a45a8ff | 47 | 0x10120000, // 9 = GPIO_MODE_EVT_RISING |
bogdanm | 0:9b334a45a8ff | 48 | 0x10220000, // 10 = GPIO_MODE_EVT_FALLING |
bogdanm | 0:9b334a45a8ff | 49 | 0x10320000, // 11 = GPIO_MODE_EVT_RISING_FALLING |
bogdanm | 0:9b334a45a8ff | 50 | 0x10000000 // 12 = Reset IT and EVT (not in STM32Cube HAL) |
bogdanm | 0:9b334a45a8ff | 51 | }; |
bogdanm | 0:9b334a45a8ff | 52 | |
bogdanm | 0:9b334a45a8ff | 53 | // Enable GPIO clock and return GPIO base address |
bogdanm | 0:9b334a45a8ff | 54 | uint32_t Set_GPIO_Clock(uint32_t port_idx) |
bogdanm | 0:9b334a45a8ff | 55 | { |
bogdanm | 0:9b334a45a8ff | 56 | uint32_t gpio_add = 0; |
bogdanm | 0:9b334a45a8ff | 57 | switch (port_idx) { |
bogdanm | 0:9b334a45a8ff | 58 | case PortA: |
bogdanm | 0:9b334a45a8ff | 59 | gpio_add = GPIOA_BASE; |
bogdanm | 0:9b334a45a8ff | 60 | __GPIOA_CLK_ENABLE(); |
bogdanm | 0:9b334a45a8ff | 61 | break; |
bogdanm | 0:9b334a45a8ff | 62 | case PortB: |
bogdanm | 0:9b334a45a8ff | 63 | gpio_add = GPIOB_BASE; |
bogdanm | 0:9b334a45a8ff | 64 | __GPIOB_CLK_ENABLE(); |
bogdanm | 0:9b334a45a8ff | 65 | break; |
bogdanm | 0:9b334a45a8ff | 66 | #if defined(GPIOC_BASE) |
bogdanm | 0:9b334a45a8ff | 67 | case PortC: |
bogdanm | 0:9b334a45a8ff | 68 | gpio_add = GPIOC_BASE; |
bogdanm | 0:9b334a45a8ff | 69 | __GPIOC_CLK_ENABLE(); |
bogdanm | 0:9b334a45a8ff | 70 | break; |
bogdanm | 0:9b334a45a8ff | 71 | #endif |
bogdanm | 0:9b334a45a8ff | 72 | #if defined(GPIOD_BASE) |
bogdanm | 0:9b334a45a8ff | 73 | case PortD: |
bogdanm | 0:9b334a45a8ff | 74 | gpio_add = GPIOD_BASE; |
bogdanm | 0:9b334a45a8ff | 75 | __GPIOD_CLK_ENABLE(); |
bogdanm | 0:9b334a45a8ff | 76 | break; |
bogdanm | 0:9b334a45a8ff | 77 | #endif |
bogdanm | 0:9b334a45a8ff | 78 | #if defined(GPIOH_BASE) |
bogdanm | 0:9b334a45a8ff | 79 | case PortH: |
bogdanm | 0:9b334a45a8ff | 80 | gpio_add = GPIOH_BASE; |
bogdanm | 0:9b334a45a8ff | 81 | __GPIOH_CLK_ENABLE(); |
bogdanm | 0:9b334a45a8ff | 82 | break; |
bogdanm | 0:9b334a45a8ff | 83 | #endif |
bogdanm | 0:9b334a45a8ff | 84 | default: |
bogdanm | 0:9b334a45a8ff | 85 | error("Pinmap error: wrong port number."); |
bogdanm | 0:9b334a45a8ff | 86 | break; |
bogdanm | 0:9b334a45a8ff | 87 | } |
bogdanm | 0:9b334a45a8ff | 88 | return gpio_add; |
bogdanm | 0:9b334a45a8ff | 89 | } |
bogdanm | 0:9b334a45a8ff | 90 | |
bogdanm | 0:9b334a45a8ff | 91 | /** |
bogdanm | 0:9b334a45a8ff | 92 | * Configure pin (mode, speed, output type and pull-up/pull-down) |
bogdanm | 0:9b334a45a8ff | 93 | */ |
bogdanm | 0:9b334a45a8ff | 94 | void pin_function(PinName pin, int data) |
bogdanm | 0:9b334a45a8ff | 95 | { |
bogdanm | 0:9b334a45a8ff | 96 | MBED_ASSERT(pin != (PinName)NC); |
bogdanm | 0:9b334a45a8ff | 97 | // Get the pin informations |
bogdanm | 0:9b334a45a8ff | 98 | uint32_t mode = STM_PIN_MODE(data); |
bogdanm | 0:9b334a45a8ff | 99 | uint32_t pupd = STM_PIN_PUPD(data); |
bogdanm | 0:9b334a45a8ff | 100 | uint32_t afnum = STM_PIN_AFNUM(data); |
bogdanm | 0:9b334a45a8ff | 101 | |
bogdanm | 0:9b334a45a8ff | 102 | uint32_t port_index = STM_PORT(pin); |
bogdanm | 0:9b334a45a8ff | 103 | uint32_t pin_index = STM_PIN(pin); |
bogdanm | 0:9b334a45a8ff | 104 | |
bogdanm | 0:9b334a45a8ff | 105 | // Enable GPIO clock |
bogdanm | 0:9b334a45a8ff | 106 | uint32_t gpio_add = Set_GPIO_Clock(port_index); |
bogdanm | 0:9b334a45a8ff | 107 | GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add; |
bogdanm | 0:9b334a45a8ff | 108 | |
bogdanm | 0:9b334a45a8ff | 109 | // Configure GPIO |
bogdanm | 0:9b334a45a8ff | 110 | GPIO_InitTypeDef GPIO_InitStructure; |
bogdanm | 0:9b334a45a8ff | 111 | GPIO_InitStructure.Pin = (uint32_t)(1 << pin_index); |
bogdanm | 0:9b334a45a8ff | 112 | GPIO_InitStructure.Mode = gpio_mode[mode]; |
bogdanm | 0:9b334a45a8ff | 113 | GPIO_InitStructure.Pull = pupd; |
bogdanm | 0:9b334a45a8ff | 114 | GPIO_InitStructure.Speed = GPIO_SPEED_HIGH; |
bogdanm | 0:9b334a45a8ff | 115 | GPIO_InitStructure.Alternate = afnum; |
bogdanm | 0:9b334a45a8ff | 116 | HAL_GPIO_Init(gpio, &GPIO_InitStructure); |
bogdanm | 0:9b334a45a8ff | 117 | |
bogdanm | 0:9b334a45a8ff | 118 | // [TODO] Disconnect JTAG-DP + SW-DP signals. |
bogdanm | 0:9b334a45a8ff | 119 | // Warning: Need to reconnect under reset |
bogdanm | 0:9b334a45a8ff | 120 | //if ((pin == PA_13) || (pin == PA_14)) { |
bogdanm | 0:9b334a45a8ff | 121 | // |
bogdanm | 0:9b334a45a8ff | 122 | //} |
bogdanm | 0:9b334a45a8ff | 123 | //if ((pin == PA_15) || (pin == PB_3) || (pin == PB_4)) { |
bogdanm | 0:9b334a45a8ff | 124 | // |
bogdanm | 0:9b334a45a8ff | 125 | //} |
bogdanm | 0:9b334a45a8ff | 126 | } |
bogdanm | 0:9b334a45a8ff | 127 | |
bogdanm | 0:9b334a45a8ff | 128 | /** |
bogdanm | 0:9b334a45a8ff | 129 | * Configure pin pull-up/pull-down |
bogdanm | 0:9b334a45a8ff | 130 | */ |
bogdanm | 0:9b334a45a8ff | 131 | void pin_mode(PinName pin, PinMode mode) |
bogdanm | 0:9b334a45a8ff | 132 | { |
bogdanm | 0:9b334a45a8ff | 133 | MBED_ASSERT(pin != (PinName)NC); |
bogdanm | 0:9b334a45a8ff | 134 | uint32_t port_index = STM_PORT(pin); |
bogdanm | 0:9b334a45a8ff | 135 | uint32_t pin_index = STM_PIN(pin); |
bogdanm | 0:9b334a45a8ff | 136 | |
bogdanm | 0:9b334a45a8ff | 137 | // Enable GPIO clock |
bogdanm | 0:9b334a45a8ff | 138 | uint32_t gpio_add = Set_GPIO_Clock(port_index); |
bogdanm | 0:9b334a45a8ff | 139 | GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add; |
bogdanm | 0:9b334a45a8ff | 140 | |
bogdanm | 0:9b334a45a8ff | 141 | // Configure pull-up/pull-down resistors |
bogdanm | 0:9b334a45a8ff | 142 | uint32_t pupd = (uint32_t)mode; |
bogdanm | 0:9b334a45a8ff | 143 | if (pupd > 2) |
bogdanm | 0:9b334a45a8ff | 144 | { |
bogdanm | 0:9b334a45a8ff | 145 | pupd = 0; // Open-drain = No pull-up/No pull-down |
bogdanm | 0:9b334a45a8ff | 146 | } |
bogdanm | 0:9b334a45a8ff | 147 | gpio->PUPDR &= (uint32_t)(~(GPIO_PUPDR_PUPD0 << (pin_index * 2))); |
bogdanm | 0:9b334a45a8ff | 148 | gpio->PUPDR |= (uint32_t)(pupd << (pin_index * 2)); |
bogdanm | 0:9b334a45a8ff | 149 | |
bogdanm | 0:9b334a45a8ff | 150 | } |