mbed library sources. Supersedes mbed-src. GR-PEACH runs on RAM.
Fork of mbed-dev by
targets/hal/TARGET_STM/TARGET_STM32F4XX/PeripheralNames.h@103:493a29d2d4d7, 2016-03-30 (annotated)
- Committer:
- 1050186
- Date:
- Wed Mar 30 11:41:25 2016 +0000
- Revision:
- 103:493a29d2d4d7
- Parent:
- 0:9b334a45a8ff
GR-PEACH runs on RAM.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 0:9b334a45a8ff | 1 | /* mbed Microcontroller Library |
bogdanm | 0:9b334a45a8ff | 2 | * Copyright (c) 2006-2013 ARM Limited |
bogdanm | 0:9b334a45a8ff | 3 | * |
bogdanm | 0:9b334a45a8ff | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
bogdanm | 0:9b334a45a8ff | 5 | * you may not use this file except in compliance with the License. |
bogdanm | 0:9b334a45a8ff | 6 | * You may obtain a copy of the License at |
bogdanm | 0:9b334a45a8ff | 7 | * |
bogdanm | 0:9b334a45a8ff | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
bogdanm | 0:9b334a45a8ff | 9 | * |
bogdanm | 0:9b334a45a8ff | 10 | * Unless required by applicable law or agreed to in writing, software |
bogdanm | 0:9b334a45a8ff | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
bogdanm | 0:9b334a45a8ff | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
bogdanm | 0:9b334a45a8ff | 13 | * See the License for the specific language governing permissions and |
bogdanm | 0:9b334a45a8ff | 14 | * limitations under the License. |
bogdanm | 0:9b334a45a8ff | 15 | */ |
bogdanm | 0:9b334a45a8ff | 16 | #ifndef MBED_PERIPHERALNAMES_H |
bogdanm | 0:9b334a45a8ff | 17 | #define MBED_PERIPHERALNAMES_H |
bogdanm | 0:9b334a45a8ff | 18 | |
bogdanm | 0:9b334a45a8ff | 19 | #include "cmsis.h" |
bogdanm | 0:9b334a45a8ff | 20 | |
bogdanm | 0:9b334a45a8ff | 21 | #ifdef __cplusplus |
bogdanm | 0:9b334a45a8ff | 22 | extern "C" { |
bogdanm | 0:9b334a45a8ff | 23 | #endif |
bogdanm | 0:9b334a45a8ff | 24 | |
bogdanm | 0:9b334a45a8ff | 25 | typedef enum { |
bogdanm | 0:9b334a45a8ff | 26 | UART_1 = (int)USART1_BASE, |
bogdanm | 0:9b334a45a8ff | 27 | UART_2 = (int)USART2_BASE, |
bogdanm | 0:9b334a45a8ff | 28 | UART_3 = (int)USART3_BASE, |
bogdanm | 0:9b334a45a8ff | 29 | UART_4 = (int)UART4_BASE, |
bogdanm | 0:9b334a45a8ff | 30 | UART_5 = (int)UART5_BASE, |
bogdanm | 0:9b334a45a8ff | 31 | UART_6 = (int)USART6_BASE |
bogdanm | 0:9b334a45a8ff | 32 | } UARTName; |
bogdanm | 0:9b334a45a8ff | 33 | |
bogdanm | 0:9b334a45a8ff | 34 | typedef enum { |
bogdanm | 0:9b334a45a8ff | 35 | ADC0_0 = 0, |
bogdanm | 0:9b334a45a8ff | 36 | ADC0_1, |
bogdanm | 0:9b334a45a8ff | 37 | ADC0_2, |
bogdanm | 0:9b334a45a8ff | 38 | ADC0_3, |
bogdanm | 0:9b334a45a8ff | 39 | ADC0_4, |
bogdanm | 0:9b334a45a8ff | 40 | ADC0_5, |
bogdanm | 0:9b334a45a8ff | 41 | ADC0_6, |
bogdanm | 0:9b334a45a8ff | 42 | ADC0_7, |
bogdanm | 0:9b334a45a8ff | 43 | ADC0_8, |
bogdanm | 0:9b334a45a8ff | 44 | ADC0_9, |
bogdanm | 0:9b334a45a8ff | 45 | ADC0_10, |
bogdanm | 0:9b334a45a8ff | 46 | ADC0_11, |
bogdanm | 0:9b334a45a8ff | 47 | ADC0_12, |
bogdanm | 0:9b334a45a8ff | 48 | ADC0_13, |
bogdanm | 0:9b334a45a8ff | 49 | ADC0_14, |
bogdanm | 0:9b334a45a8ff | 50 | ADC0_15 |
bogdanm | 0:9b334a45a8ff | 51 | } ADCName; |
bogdanm | 0:9b334a45a8ff | 52 | |
bogdanm | 0:9b334a45a8ff | 53 | typedef enum { |
bogdanm | 0:9b334a45a8ff | 54 | DAC_0 = 0, |
bogdanm | 0:9b334a45a8ff | 55 | DAC_1 |
bogdanm | 0:9b334a45a8ff | 56 | } DACName; |
bogdanm | 0:9b334a45a8ff | 57 | |
bogdanm | 0:9b334a45a8ff | 58 | typedef enum { |
bogdanm | 0:9b334a45a8ff | 59 | SPI_1 = (int)SPI1_BASE, |
bogdanm | 0:9b334a45a8ff | 60 | SPI_2 = (int)SPI2_BASE, |
bogdanm | 0:9b334a45a8ff | 61 | SPI_3 = (int)SPI3_BASE, |
bogdanm | 0:9b334a45a8ff | 62 | } SPIName; |
bogdanm | 0:9b334a45a8ff | 63 | |
bogdanm | 0:9b334a45a8ff | 64 | typedef enum { |
bogdanm | 0:9b334a45a8ff | 65 | I2C_1 = (int)I2C1_BASE, |
bogdanm | 0:9b334a45a8ff | 66 | I2C_2 = (int)I2C2_BASE, |
bogdanm | 0:9b334a45a8ff | 67 | I2C_3 = (int)I2C3_BASE |
bogdanm | 0:9b334a45a8ff | 68 | } I2CName; |
bogdanm | 0:9b334a45a8ff | 69 | |
bogdanm | 0:9b334a45a8ff | 70 | typedef enum { |
bogdanm | 0:9b334a45a8ff | 71 | PWM_1 = 1, |
bogdanm | 0:9b334a45a8ff | 72 | PWM_2, |
bogdanm | 0:9b334a45a8ff | 73 | PWM_3, |
bogdanm | 0:9b334a45a8ff | 74 | PWM_4, |
bogdanm | 0:9b334a45a8ff | 75 | PWM_5, |
bogdanm | 0:9b334a45a8ff | 76 | PWM_6 |
bogdanm | 0:9b334a45a8ff | 77 | } PWMName; |
bogdanm | 0:9b334a45a8ff | 78 | |
bogdanm | 0:9b334a45a8ff | 79 | typedef enum { |
bogdanm | 0:9b334a45a8ff | 80 | CAN_1 = (int)CAN1_BASE, |
bogdanm | 0:9b334a45a8ff | 81 | CAN_2 = (int)CAN2_BASE |
bogdanm | 0:9b334a45a8ff | 82 | } CANName; |
bogdanm | 0:9b334a45a8ff | 83 | |
bogdanm | 0:9b334a45a8ff | 84 | #ifdef __cplusplus |
bogdanm | 0:9b334a45a8ff | 85 | } |
bogdanm | 0:9b334a45a8ff | 86 | #endif |
bogdanm | 0:9b334a45a8ff | 87 | |
bogdanm | 0:9b334a45a8ff | 88 | #endif |