u-blox / low-power-sleep

This class provides an API to assist with low power behaviour on an STM32F437 micro, as used on the u-blox C030 board. If you need to operate from battery for any significant period, or are mains powered and don't want to take the planet down with you, you should design your code with this in mind. This library uses the https://developer.mbed.org/users/Sissors/code/WakeUp/ library and so could be extended to support all of the MCUs that library supports.

Dependencies:   WakeUp

Dependents:   example-low-power-sleep aconnoCellularGnss

Files at this revision

API Documentation at this revision

Revision 4:691e6b38fc54, committed 2017-06-05

Comitter:
RobMeades
Date:
Mon Jun 05 14:28:14 2017 +0000
Parent:
3:442c9afc0229
Commit message:
Update readme.txt.

Changed in this revision

readme.txt Show annotated file Show diff for this revision Revisions of this file 
diff -r 442c9afc0229 -r 691e6b38fc54 readme.txt
--- a/readme.txt	Tue Apr 11 09:57:37 2017 +0000
+++ b/readme.txt	Mon Jun 05 14:28:14 2017 +0000
@@ -25,12 +25,12 @@
   instance allocated with 'new'),
 * more than 4 kbytes of statically allocated variables,
 
-...then it may be possible to use Standby mode.  Of course, designing your
-code to work in this way is quite a specific task.  The code will begin running
-at main() again on expiry of the Standby delay and will need to your code will
-need to determine how to behave based on the information it saved in the 4 kbyes
-of Backup SRAM.  But, given the huge saving in power, such a design may be
-worthwhile.
+...then it may be possible to use Standby mode.  Designing your code to work in
+this way requires a specific design approach.  Your code will begin running
+again at main() on expiry of the Standby delay and hence you will need to 
+determine how to behave based on the information that you have saved in the
+4 kbyes of Backup SRAM.  Given the huge saving in power, such a design approach
+may well be worthwhile.
 
 Finally, if your code has another means of retaining state across a low-power
 sleep cycle then even the Backup SRAM can be powered down, reducing the typical