u-blox / Mbed 2 deprecated IBMIoTClientEthernetExample

Port to C027 (using AppShield and Ethernet)

Dependencies:   C12832 EthernetInterface LM75B MMA7660 MQTT mbed-rtos mbed

Fork of IBMIoTClientEthernetExample by IBM Watson IoT

mbed-rtos/rtx/HAL_CM.c@6:37b6d0d56190, 2014-08-20 (annotated)

Committer:
samdanbury
Date:
Wed Aug 20 12:45:14 2014 +0000
Revision:
6:37b6d0d56190
Code completely changed to improve the structure, flow and memory usage of the application

Who changed what in which revision?

UserRevisionLine numberNew contents of line
samdanbury 6:37b6d0d56190 1 /*----------------------------------------------------------------------------
samdanbury 6:37b6d0d56190 2 * RL-ARM - RTX
samdanbury 6:37b6d0d56190 3 *----------------------------------------------------------------------------
samdanbury 6:37b6d0d56190 4 * Name: HAL_CM.C
samdanbury 6:37b6d0d56190 5 * Purpose: Hardware Abstraction Layer for Cortex-M
samdanbury 6:37b6d0d56190 6 * Rev.: V4.60
samdanbury 6:37b6d0d56190 7 *----------------------------------------------------------------------------
samdanbury 6:37b6d0d56190 8 *
samdanbury 6:37b6d0d56190 9 * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
samdanbury 6:37b6d0d56190 10 * All rights reserved.
samdanbury 6:37b6d0d56190 11 * Redistribution and use in source and binary forms, with or without
samdanbury 6:37b6d0d56190 12 * modification, are permitted provided that the following conditions are met:
samdanbury 6:37b6d0d56190 13 * - Redistributions of source code must retain the above copyright
samdanbury 6:37b6d0d56190 14 * notice, this list of conditions and the following disclaimer.
samdanbury 6:37b6d0d56190 15 * - Redistributions in binary form must reproduce the above copyright
samdanbury 6:37b6d0d56190 16 * notice, this list of conditions and the following disclaimer in the
samdanbury 6:37b6d0d56190 17 * documentation and/or other materials provided with the distribution.
samdanbury 6:37b6d0d56190 18 * - Neither the name of ARM nor the names of its contributors may be used
samdanbury 6:37b6d0d56190 19 * to endorse or promote products derived from this software without
samdanbury 6:37b6d0d56190 20 * specific prior written permission.
samdanbury 6:37b6d0d56190 21 *
samdanbury 6:37b6d0d56190 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
samdanbury 6:37b6d0d56190 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
samdanbury 6:37b6d0d56190 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
samdanbury 6:37b6d0d56190 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
samdanbury 6:37b6d0d56190 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
samdanbury 6:37b6d0d56190 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
samdanbury 6:37b6d0d56190 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
samdanbury 6:37b6d0d56190 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
samdanbury 6:37b6d0d56190 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
samdanbury 6:37b6d0d56190 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
samdanbury 6:37b6d0d56190 32 * POSSIBILITY OF SUCH DAMAGE.
samdanbury 6:37b6d0d56190 33 *---------------------------------------------------------------------------*/
samdanbury 6:37b6d0d56190 34
samdanbury 6:37b6d0d56190 35 #include "rt_TypeDef.h"
samdanbury 6:37b6d0d56190 36 #include "RTX_Conf.h"
samdanbury 6:37b6d0d56190 37 #include "rt_HAL_CM.h"
samdanbury 6:37b6d0d56190 38
samdanbury 6:37b6d0d56190 39
samdanbury 6:37b6d0d56190 40 /*----------------------------------------------------------------------------
samdanbury 6:37b6d0d56190 41 * Global Variables
samdanbury 6:37b6d0d56190 42 *---------------------------------------------------------------------------*/
samdanbury 6:37b6d0d56190 43
samdanbury 6:37b6d0d56190 44 #ifdef DBG_MSG
samdanbury 6:37b6d0d56190 45 BIT dbg_msg;
samdanbury 6:37b6d0d56190 46 #endif
samdanbury 6:37b6d0d56190 47
samdanbury 6:37b6d0d56190 48 /*----------------------------------------------------------------------------
samdanbury 6:37b6d0d56190 49 * Functions
samdanbury 6:37b6d0d56190 50 *---------------------------------------------------------------------------*/
samdanbury 6:37b6d0d56190 51
samdanbury 6:37b6d0d56190 52
samdanbury 6:37b6d0d56190 53 /*--------------------------- rt_init_stack ---------------------------------*/
samdanbury 6:37b6d0d56190 54
samdanbury 6:37b6d0d56190 55 void rt_init_stack (P_TCB p_TCB, FUNCP task_body) {
samdanbury 6:37b6d0d56190 56 /* Prepare TCB and saved context for a first time start of a task. */
samdanbury 6:37b6d0d56190 57 U32 *stk,i,size;
samdanbury 6:37b6d0d56190 58
samdanbury 6:37b6d0d56190 59 /* Prepare a complete interrupt frame for first task start */
samdanbury 6:37b6d0d56190 60 size = p_TCB->priv_stack >> 2;
samdanbury 6:37b6d0d56190 61
samdanbury 6:37b6d0d56190 62 /* Write to the top of stack. */
samdanbury 6:37b6d0d56190 63 stk = &p_TCB->stack[size];
samdanbury 6:37b6d0d56190 64
samdanbury 6:37b6d0d56190 65 /* Auto correct to 8-byte ARM stack alignment. */
samdanbury 6:37b6d0d56190 66 if ((U32)stk & 0x04) {
samdanbury 6:37b6d0d56190 67 stk--;
samdanbury 6:37b6d0d56190 68 }
samdanbury 6:37b6d0d56190 69
samdanbury 6:37b6d0d56190 70 stk -= 16;
samdanbury 6:37b6d0d56190 71
samdanbury 6:37b6d0d56190 72 /* Default xPSR and initial PC */
samdanbury 6:37b6d0d56190 73 stk[15] = INITIAL_xPSR;
samdanbury 6:37b6d0d56190 74 stk[14] = (U32)task_body;
samdanbury 6:37b6d0d56190 75
samdanbury 6:37b6d0d56190 76 /* Clear R4-R11,R0-R3,R12,LR registers. */
samdanbury 6:37b6d0d56190 77 for (i = 0; i < 14; i++) {
samdanbury 6:37b6d0d56190 78 stk[i] = 0;
samdanbury 6:37b6d0d56190 79 }
samdanbury 6:37b6d0d56190 80
samdanbury 6:37b6d0d56190 81 /* Assign a void pointer to R0. */
samdanbury 6:37b6d0d56190 82 stk[8] = (U32)p_TCB->msg;
samdanbury 6:37b6d0d56190 83
samdanbury 6:37b6d0d56190 84 /* Initial Task stack pointer. */
samdanbury 6:37b6d0d56190 85 p_TCB->tsk_stack = (U32)stk;
samdanbury 6:37b6d0d56190 86
samdanbury 6:37b6d0d56190 87 /* Task entry point. */
samdanbury 6:37b6d0d56190 88 p_TCB->ptask = task_body;
samdanbury 6:37b6d0d56190 89
samdanbury 6:37b6d0d56190 90 /* Set a magic word for checking of stack overflow.
samdanbury 6:37b6d0d56190 91 For the main thread (ID: 0x01) the stack is in a memory area shared with the
samdanbury 6:37b6d0d56190 92 heap, therefore the last word of the stack is a moving target.
samdanbury 6:37b6d0d56190 93 We want to do stack/heap collision detection instead.
samdanbury 6:37b6d0d56190 94 */
samdanbury 6:37b6d0d56190 95 if (p_TCB->task_id != 0x01)
samdanbury 6:37b6d0d56190 96 p_TCB->stack[0] = MAGIC_WORD;
samdanbury 6:37b6d0d56190 97 }
samdanbury 6:37b6d0d56190 98
samdanbury 6:37b6d0d56190 99
samdanbury 6:37b6d0d56190 100 /*--------------------------- rt_ret_val ----------------------------------*/
samdanbury 6:37b6d0d56190 101
samdanbury 6:37b6d0d56190 102 static __inline U32 *rt_ret_regs (P_TCB p_TCB) {
samdanbury 6:37b6d0d56190 103 /* Get pointer to task return value registers (R0..R3) in Stack */
samdanbury 6:37b6d0d56190 104 #if (__TARGET_FPU_VFP)
samdanbury 6:37b6d0d56190 105 if (p_TCB->stack_frame) {
samdanbury 6:37b6d0d56190 106 /* Extended Stack Frame: R4-R11,S16-S31,R0-R3,R12,LR,PC,xPSR,S0-S15,FPSCR */
samdanbury 6:37b6d0d56190 107 return (U32 *)(p_TCB->tsk_stack + 8*4 + 16*4);
samdanbury 6:37b6d0d56190 108 } else {
samdanbury 6:37b6d0d56190 109 /* Basic Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
samdanbury 6:37b6d0d56190 110 return (U32 *)(p_TCB->tsk_stack + 8*4);
samdanbury 6:37b6d0d56190 111 }
samdanbury 6:37b6d0d56190 112 #else
samdanbury 6:37b6d0d56190 113 /* Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
samdanbury 6:37b6d0d56190 114 return (U32 *)(p_TCB->tsk_stack + 8*4);
samdanbury 6:37b6d0d56190 115 #endif
samdanbury 6:37b6d0d56190 116 }
samdanbury 6:37b6d0d56190 117
samdanbury 6:37b6d0d56190 118 void rt_ret_val (P_TCB p_TCB, U32 v0) {
samdanbury 6:37b6d0d56190 119 U32 *ret;
samdanbury 6:37b6d0d56190 120
samdanbury 6:37b6d0d56190 121 ret = rt_ret_regs(p_TCB);
samdanbury 6:37b6d0d56190 122 ret[0] = v0;
samdanbury 6:37b6d0d56190 123 }
samdanbury 6:37b6d0d56190 124
samdanbury 6:37b6d0d56190 125 void rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1) {
samdanbury 6:37b6d0d56190 126 U32 *ret;
samdanbury 6:37b6d0d56190 127
samdanbury 6:37b6d0d56190 128 ret = rt_ret_regs(p_TCB);
samdanbury 6:37b6d0d56190 129 ret[0] = v0;
samdanbury 6:37b6d0d56190 130 ret[1] = v1;
samdanbury 6:37b6d0d56190 131 }
samdanbury 6:37b6d0d56190 132
samdanbury 6:37b6d0d56190 133
samdanbury 6:37b6d0d56190 134 /*--------------------------- dbg_init --------------------------------------*/
samdanbury 6:37b6d0d56190 135
samdanbury 6:37b6d0d56190 136 #ifdef DBG_MSG
samdanbury 6:37b6d0d56190 137 void dbg_init (void) {
samdanbury 6:37b6d0d56190 138 if ((DEMCR & DEMCR_TRCENA) &&
samdanbury 6:37b6d0d56190 139 (ITM_CONTROL & ITM_ITMENA) &&
samdanbury 6:37b6d0d56190 140 (ITM_ENABLE & (1UL << 31))) {
samdanbury 6:37b6d0d56190 141 dbg_msg = __TRUE;
samdanbury 6:37b6d0d56190 142 }
samdanbury 6:37b6d0d56190 143 }
samdanbury 6:37b6d0d56190 144 #endif
samdanbury 6:37b6d0d56190 145
samdanbury 6:37b6d0d56190 146 /*--------------------------- dbg_task_notify -------------------------------*/
samdanbury 6:37b6d0d56190 147
samdanbury 6:37b6d0d56190 148 #ifdef DBG_MSG
samdanbury 6:37b6d0d56190 149 void dbg_task_notify (P_TCB p_tcb, BOOL create) {
samdanbury 6:37b6d0d56190 150 while (ITM_PORT31_U32 == 0);
samdanbury 6:37b6d0d56190 151 ITM_PORT31_U32 = (U32)p_tcb->ptask;
samdanbury 6:37b6d0d56190 152 while (ITM_PORT31_U32 == 0);
samdanbury 6:37b6d0d56190 153 ITM_PORT31_U16 = (create << 8) | p_tcb->task_id;
samdanbury 6:37b6d0d56190 154 }
samdanbury 6:37b6d0d56190 155 #endif
samdanbury 6:37b6d0d56190 156
samdanbury 6:37b6d0d56190 157 /*--------------------------- dbg_task_switch -------------------------------*/
samdanbury 6:37b6d0d56190 158
samdanbury 6:37b6d0d56190 159 #ifdef DBG_MSG
samdanbury 6:37b6d0d56190 160 void dbg_task_switch (U32 task_id) {
samdanbury 6:37b6d0d56190 161 while (ITM_PORT31_U32 == 0);
samdanbury 6:37b6d0d56190 162 ITM_PORT31_U8 = task_id;
samdanbury 6:37b6d0d56190 163 }
samdanbury 6:37b6d0d56190 164 #endif
samdanbury 6:37b6d0d56190 165
samdanbury 6:37b6d0d56190 166
samdanbury 6:37b6d0d56190 167 /*----------------------------------------------------------------------------
samdanbury 6:37b6d0d56190 168 * end of file
samdanbury 6:37b6d0d56190 169 *---------------------------------------------------------------------------*/
samdanbury 6:37b6d0d56190 170