hal_tick.h changed for the L432KC target in TARGET/../device/ in order to reassign the system ticker from TIM2 to TIM7, since TIM2 was needed as a 32bit encoder counter.

Dependents:   Nucleo_L432KC_Quadrature_Decoder_with_ADC_and_DAC

Fork of mbed-dev by mbed official

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
144:ef7eb2e8f9f7
Child:
153:fa9ff456f731
This updates the lib to the mbed lib v128

NOTE: This release includes a restructuring of the file and directory locations and thus some
include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1
<> 149:156823d33999 2 /** \addtogroup hal */
<> 149:156823d33999 3 /** @{*/
<> 144:ef7eb2e8f9f7 4 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 5 * Copyright (c) 2006-2015 ARM Limited
<> 144:ef7eb2e8f9f7 6 *
<> 144:ef7eb2e8f9f7 7 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 8 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 9 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 14 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 16 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 17 * limitations under the License.
<> 144:ef7eb2e8f9f7 18 */
<> 144:ef7eb2e8f9f7 19 #ifndef MBED_I2C_API_H
<> 144:ef7eb2e8f9f7 20 #define MBED_I2C_API_H
<> 144:ef7eb2e8f9f7 21
<> 144:ef7eb2e8f9f7 22 #include "device.h"
<> 149:156823d33999 23 #include "hal/buffer.h"
<> 144:ef7eb2e8f9f7 24
<> 144:ef7eb2e8f9f7 25 #if DEVICE_I2C_ASYNCH
<> 149:156823d33999 26 #include "hal/dma_api.h"
<> 144:ef7eb2e8f9f7 27 #endif
<> 144:ef7eb2e8f9f7 28
<> 144:ef7eb2e8f9f7 29 #if DEVICE_I2C
<> 144:ef7eb2e8f9f7 30
<> 144:ef7eb2e8f9f7 31 /**
<> 144:ef7eb2e8f9f7 32 * @defgroup hal_I2CEvents I2C Events Macros
<> 144:ef7eb2e8f9f7 33 *
<> 144:ef7eb2e8f9f7 34 * @{
<> 144:ef7eb2e8f9f7 35 */
<> 144:ef7eb2e8f9f7 36 #define I2C_EVENT_ERROR (1 << 1)
<> 144:ef7eb2e8f9f7 37 #define I2C_EVENT_ERROR_NO_SLAVE (1 << 2)
<> 144:ef7eb2e8f9f7 38 #define I2C_EVENT_TRANSFER_COMPLETE (1 << 3)
<> 144:ef7eb2e8f9f7 39 #define I2C_EVENT_TRANSFER_EARLY_NACK (1 << 4)
<> 144:ef7eb2e8f9f7 40 #define I2C_EVENT_ALL (I2C_EVENT_ERROR | I2C_EVENT_TRANSFER_COMPLETE | I2C_EVENT_ERROR_NO_SLAVE | I2C_EVENT_TRANSFER_EARLY_NACK)
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 /**@}*/
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 #if DEVICE_I2C_ASYNCH
<> 144:ef7eb2e8f9f7 45 /** Asynch I2C HAL structure
<> 144:ef7eb2e8f9f7 46 */
<> 144:ef7eb2e8f9f7 47 typedef struct {
<> 144:ef7eb2e8f9f7 48 struct i2c_s i2c; /**< Target specific I2C structure */
<> 144:ef7eb2e8f9f7 49 struct buffer_s tx_buff; /**< Tx buffer */
<> 144:ef7eb2e8f9f7 50 struct buffer_s rx_buff; /**< Rx buffer */
<> 144:ef7eb2e8f9f7 51 } i2c_t;
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 #else
<> 144:ef7eb2e8f9f7 54 /** Non-asynch I2C HAL structure
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56 typedef struct i2c_s i2c_t;
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 #endif
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 enum {
<> 144:ef7eb2e8f9f7 61 I2C_ERROR_NO_SLAVE = -1,
<> 144:ef7eb2e8f9f7 62 I2C_ERROR_BUS_BUSY = -2
<> 144:ef7eb2e8f9f7 63 };
<> 144:ef7eb2e8f9f7 64
<> 144:ef7eb2e8f9f7 65 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 66 extern "C" {
<> 144:ef7eb2e8f9f7 67 #endif
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 /**
<> 144:ef7eb2e8f9f7 70 * \defgroup hal_GeneralI2C I2C Configuration Functions
<> 144:ef7eb2e8f9f7 71 * @{
<> 144:ef7eb2e8f9f7 72 */
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 /** Initialize the I2C peripheral. It sets the default parameters for I2C
<> 144:ef7eb2e8f9f7 75 * peripheral, and configures its specifieds pins.
<> 144:ef7eb2e8f9f7 76 *
<> 144:ef7eb2e8f9f7 77 * @param obj The I2C object
<> 144:ef7eb2e8f9f7 78 * @param sda The sda pin
<> 144:ef7eb2e8f9f7 79 * @param scl The scl pin
<> 144:ef7eb2e8f9f7 80 */
<> 144:ef7eb2e8f9f7 81 void i2c_init(i2c_t *obj, PinName sda, PinName scl);
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 /** Configure the I2C frequency
<> 144:ef7eb2e8f9f7 84 *
<> 144:ef7eb2e8f9f7 85 * @param obj The I2C object
<> 144:ef7eb2e8f9f7 86 * @param hz Frequency in Hz
<> 144:ef7eb2e8f9f7 87 */
<> 144:ef7eb2e8f9f7 88 void i2c_frequency(i2c_t *obj, int hz);
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90 /** Send START command
<> 144:ef7eb2e8f9f7 91 *
<> 144:ef7eb2e8f9f7 92 * @param obj The I2C object
<> 144:ef7eb2e8f9f7 93 */
<> 144:ef7eb2e8f9f7 94 int i2c_start(i2c_t *obj);
<> 144:ef7eb2e8f9f7 95
<> 144:ef7eb2e8f9f7 96 /** Send STOP command
<> 144:ef7eb2e8f9f7 97 *
<> 144:ef7eb2e8f9f7 98 * @param obj The I2C object
<> 144:ef7eb2e8f9f7 99 */
<> 144:ef7eb2e8f9f7 100 int i2c_stop(i2c_t *obj);
<> 144:ef7eb2e8f9f7 101
<> 144:ef7eb2e8f9f7 102 /** Blocking reading data
<> 144:ef7eb2e8f9f7 103 *
<> 144:ef7eb2e8f9f7 104 * @param obj The I2C object
<> 144:ef7eb2e8f9f7 105 * @param address 7-bit address (last bit is 1)
<> 144:ef7eb2e8f9f7 106 * @param data The buffer for receiving
<> 144:ef7eb2e8f9f7 107 * @param length Number of bytes to read
<> 144:ef7eb2e8f9f7 108 * @param stop Stop to be generated after the transfer is done
<> 144:ef7eb2e8f9f7 109 * @return Number of read bytes
<> 144:ef7eb2e8f9f7 110 */
<> 144:ef7eb2e8f9f7 111 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop);
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 /** Blocking sending data
<> 144:ef7eb2e8f9f7 114 *
<> 144:ef7eb2e8f9f7 115 * @param obj The I2C object
<> 144:ef7eb2e8f9f7 116 * @param address 7-bit address (last bit is 0)
<> 144:ef7eb2e8f9f7 117 * @param data The buffer for sending
<> 144:ef7eb2e8f9f7 118 * @param length Number of bytes to write
<> 144:ef7eb2e8f9f7 119 * @param stop Stop to be generated after the transfer is done
<> 144:ef7eb2e8f9f7 120 * @return Number of written bytes
<> 144:ef7eb2e8f9f7 121 */
<> 144:ef7eb2e8f9f7 122 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop);
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124 /** Reset I2C peripheral. TODO: The action here. Most of the implementation sends stop()
<> 144:ef7eb2e8f9f7 125 *
<> 144:ef7eb2e8f9f7 126 * @param obj The I2C object
<> 144:ef7eb2e8f9f7 127 */
<> 144:ef7eb2e8f9f7 128 void i2c_reset(i2c_t *obj);
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 /** Read one byte
<> 144:ef7eb2e8f9f7 131 *
<> 144:ef7eb2e8f9f7 132 * @param obj The I2C object
<> 144:ef7eb2e8f9f7 133 * @param last Acknoledge
<> 144:ef7eb2e8f9f7 134 * @return The read byte
<> 144:ef7eb2e8f9f7 135 */
<> 144:ef7eb2e8f9f7 136 int i2c_byte_read(i2c_t *obj, int last);
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 /** Write one byte
<> 144:ef7eb2e8f9f7 139 *
<> 144:ef7eb2e8f9f7 140 * @param obj The I2C object
<> 144:ef7eb2e8f9f7 141 * @param data Byte to be written
<> 144:ef7eb2e8f9f7 142 * @return 0 if NAK was received, 1 if ACK was received, 2 for timeout.
<> 144:ef7eb2e8f9f7 143 */
<> 144:ef7eb2e8f9f7 144 int i2c_byte_write(i2c_t *obj, int data);
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 /**@}*/
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 #if DEVICE_I2CSLAVE
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 /**
<> 144:ef7eb2e8f9f7 151 * \defgroup SynchI2C Synchronous I2C Hardware Abstraction Layer for slave
<> 144:ef7eb2e8f9f7 152 * @{
<> 144:ef7eb2e8f9f7 153 */
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 /** Configure I2C as slave or master.
<> 144:ef7eb2e8f9f7 156 * @param obj The I2C object
<> 144:ef7eb2e8f9f7 157 * @return non-zero if a value is available
<> 144:ef7eb2e8f9f7 158 */
<> 144:ef7eb2e8f9f7 159 void i2c_slave_mode(i2c_t *obj, int enable_slave);
<> 144:ef7eb2e8f9f7 160
<> 144:ef7eb2e8f9f7 161 /** Check to see if the I2C slave has been addressed.
<> 144:ef7eb2e8f9f7 162 * @param obj The I2C object
<> 144:ef7eb2e8f9f7 163 * @return The status - 1 - read addresses, 2 - write to all slaves,
<> 144:ef7eb2e8f9f7 164 * 3 write addressed, 0 - the slave has not been addressed
<> 144:ef7eb2e8f9f7 165 */
<> 144:ef7eb2e8f9f7 166 int i2c_slave_receive(i2c_t *obj);
<> 144:ef7eb2e8f9f7 167
<> 144:ef7eb2e8f9f7 168 /** Configure I2C as slave or master.
<> 144:ef7eb2e8f9f7 169 * @param obj The I2C object
<> 144:ef7eb2e8f9f7 170 * @return non-zero if a value is available
<> 144:ef7eb2e8f9f7 171 */
<> 144:ef7eb2e8f9f7 172 int i2c_slave_read(i2c_t *obj, char *data, int length);
<> 144:ef7eb2e8f9f7 173
<> 144:ef7eb2e8f9f7 174 /** Configure I2C as slave or master.
<> 144:ef7eb2e8f9f7 175 * @param obj The I2C object
<> 144:ef7eb2e8f9f7 176 * @return non-zero if a value is available
<> 144:ef7eb2e8f9f7 177 */
<> 144:ef7eb2e8f9f7 178 int i2c_slave_write(i2c_t *obj, const char *data, int length);
<> 144:ef7eb2e8f9f7 179
<> 144:ef7eb2e8f9f7 180 /** Configure I2C address.
<> 144:ef7eb2e8f9f7 181 * @param obj The I2C object
<> 144:ef7eb2e8f9f7 182 * @param idx Currently not used
<> 144:ef7eb2e8f9f7 183 * @param address The address to be set
<> 144:ef7eb2e8f9f7 184 * @param mask Currently not used
<> 144:ef7eb2e8f9f7 185 */
<> 144:ef7eb2e8f9f7 186 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask);
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188 #endif
<> 144:ef7eb2e8f9f7 189
<> 144:ef7eb2e8f9f7 190 /**@}*/
<> 144:ef7eb2e8f9f7 191
<> 144:ef7eb2e8f9f7 192 #if DEVICE_I2C_ASYNCH
<> 144:ef7eb2e8f9f7 193
<> 144:ef7eb2e8f9f7 194 /**
<> 144:ef7eb2e8f9f7 195 * \defgroup hal_AsynchI2C Asynchronous I2C Hardware Abstraction Layer
<> 144:ef7eb2e8f9f7 196 * @{
<> 144:ef7eb2e8f9f7 197 */
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 /** Start I2C asynchronous transfer
<> 144:ef7eb2e8f9f7 200 *
<> 144:ef7eb2e8f9f7 201 * @param obj The I2C object
<> 144:ef7eb2e8f9f7 202 * @param tx The transmit buffer
<> 144:ef7eb2e8f9f7 203 * @param tx_length The number of bytes to transmit
<> 144:ef7eb2e8f9f7 204 * @param rx The receive buffer
<> 144:ef7eb2e8f9f7 205 * @param rx_length The number of bytes to receive
<> 144:ef7eb2e8f9f7 206 * @param address The address to be set - 7bit or 9bit
<> 144:ef7eb2e8f9f7 207 * @param stop If true, stop will be generated after the transfer is done
<> 144:ef7eb2e8f9f7 208 * @param handler The I2C IRQ handler to be set
<> 144:ef7eb2e8f9f7 209 * @param hint DMA hint usage
<> 144:ef7eb2e8f9f7 210 */
<> 144:ef7eb2e8f9f7 211 void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t address, uint32_t stop, uint32_t handler, uint32_t event, DMAUsage hint);
<> 144:ef7eb2e8f9f7 212
<> 144:ef7eb2e8f9f7 213 /** The asynchronous IRQ handler
<> 144:ef7eb2e8f9f7 214 *
<> 144:ef7eb2e8f9f7 215 * @param obj The I2C object which holds the transfer information
<> 144:ef7eb2e8f9f7 216 * @return Event flags if a transfer termination condition was met, otherwise return 0.
<> 144:ef7eb2e8f9f7 217 */
<> 144:ef7eb2e8f9f7 218 uint32_t i2c_irq_handler_asynch(i2c_t *obj);
<> 144:ef7eb2e8f9f7 219
<> 144:ef7eb2e8f9f7 220 /** Attempts to determine if the I2C peripheral is already in use
<> 144:ef7eb2e8f9f7 221 *
<> 144:ef7eb2e8f9f7 222 * @param obj The I2C object
<> 144:ef7eb2e8f9f7 223 * @return Non-zero if the I2C module is active or zero if it is not
<> 144:ef7eb2e8f9f7 224 */
<> 144:ef7eb2e8f9f7 225 uint8_t i2c_active(i2c_t *obj);
<> 144:ef7eb2e8f9f7 226
<> 144:ef7eb2e8f9f7 227 /** Abort asynchronous transfer
<> 144:ef7eb2e8f9f7 228 *
<> 144:ef7eb2e8f9f7 229 * This function does not perform any check - that should happen in upper layers.
<> 144:ef7eb2e8f9f7 230 * @param obj The I2C object
<> 144:ef7eb2e8f9f7 231 */
<> 144:ef7eb2e8f9f7 232 void i2c_abort_asynch(i2c_t *obj);
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 #endif
<> 144:ef7eb2e8f9f7 235
<> 144:ef7eb2e8f9f7 236 /**@}*/
<> 144:ef7eb2e8f9f7 237
<> 144:ef7eb2e8f9f7 238 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 239 }
<> 144:ef7eb2e8f9f7 240 #endif
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 #endif
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 #endif
<> 149:156823d33999 245
<> 149:156823d33999 246 /** @}*/