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Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_STM/TARGET_STM32F0/pinmap.c@1:f30bdcd2b33b, 2017-02-27 (annotated)

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d 
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* mbed Microcontroller Library
group-onsemi 0:098463de4c5d 2 *******************************************************************************
group-onsemi 0:098463de4c5d 3 * Copyright (c) 2014, STMicroelectronics
group-onsemi 0:098463de4c5d 4 * All rights reserved.
group-onsemi 0:098463de4c5d 5 *
group-onsemi 0:098463de4c5d 6 * Redistribution and use in source and binary forms, with or without
group-onsemi 0:098463de4c5d 7 * modification, are permitted provided that the following conditions are met:
group-onsemi 0:098463de4c5d 8 *
group-onsemi 0:098463de4c5d 9 * 1. Redistributions of source code must retain the above copyright notice,
group-onsemi 0:098463de4c5d 10 * this list of conditions and the following disclaimer.
group-onsemi 0:098463de4c5d 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
group-onsemi 0:098463de4c5d 12 * this list of conditions and the following disclaimer in the documentation
group-onsemi 0:098463de4c5d 13 * and/or other materials provided with the distribution.
group-onsemi 0:098463de4c5d 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
group-onsemi 0:098463de4c5d 15 * may be used to endorse or promote products derived from this software
group-onsemi 0:098463de4c5d 16 * without specific prior written permission.
group-onsemi 0:098463de4c5d 17 *
group-onsemi 0:098463de4c5d 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
group-onsemi 0:098463de4c5d 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
group-onsemi 0:098463de4c5d 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
group-onsemi 0:098463de4c5d 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
group-onsemi 0:098463de4c5d 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
group-onsemi 0:098463de4c5d 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
group-onsemi 0:098463de4c5d 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
group-onsemi 0:098463de4c5d 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
group-onsemi 0:098463de4c5d 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
group-onsemi 0:098463de4c5d 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
group-onsemi 0:098463de4c5d 28 *******************************************************************************
group-onsemi 0:098463de4c5d 29 */
group-onsemi 0:098463de4c5d 30 #include "mbed_assert.h"
group-onsemi 0:098463de4c5d 31 #include "pinmap.h"
group-onsemi 0:098463de4c5d 32 #include "PortNames.h"
group-onsemi 0:098463de4c5d 33 #include "mbed_error.h"
group-onsemi 0:098463de4c5d 34
group-onsemi 0:098463de4c5d 35 // GPIO mode look-up table
group-onsemi 0:098463de4c5d 36 static const uint32_t gpio_mode[13] = {
group-onsemi 0:098463de4c5d 37 0x00000000, // 0 = GPIO_MODE_INPUT
group-onsemi 0:098463de4c5d 38 0x00000001, // 1 = GPIO_MODE_OUTPUT_PP
group-onsemi 0:098463de4c5d 39 0x00000011, // 2 = GPIO_MODE_OUTPUT_OD
group-onsemi 0:098463de4c5d 40 0x00000002, // 3 = GPIO_MODE_AF_PP
group-onsemi 0:098463de4c5d 41 0x00000012, // 4 = GPIO_MODE_AF_OD
group-onsemi 0:098463de4c5d 42 0x00000003, // 5 = GPIO_MODE_ANALOG
group-onsemi 0:098463de4c5d 43 0x10110000, // 6 = GPIO_MODE_IT_RISING
group-onsemi 0:098463de4c5d 44 0x10210000, // 7 = GPIO_MODE_IT_FALLING
group-onsemi 0:098463de4c5d 45 0x10310000, // 8 = GPIO_MODE_IT_RISING_FALLING
group-onsemi 0:098463de4c5d 46 0x10120000, // 9 = GPIO_MODE_EVT_RISING
group-onsemi 0:098463de4c5d 47 0x10220000, // 10 = GPIO_MODE_EVT_FALLING
group-onsemi 0:098463de4c5d 48 0x10320000, // 11 = GPIO_MODE_EVT_RISING_FALLING
group-onsemi 0:098463de4c5d 49 0x10000000 // 12 = Reset IT and EVT (not in STM32Cube HAL)
group-onsemi 0:098463de4c5d 50 };
group-onsemi 0:098463de4c5d 51
group-onsemi 0:098463de4c5d 52 // Enable GPIO clock and return GPIO base address
group-onsemi 0:098463de4c5d 53 uint32_t Set_GPIO_Clock(uint32_t port_idx) {
group-onsemi 0:098463de4c5d 54 uint32_t gpio_add = 0;
group-onsemi 0:098463de4c5d 55 switch (port_idx) {
group-onsemi 0:098463de4c5d 56 case PortA:
group-onsemi 0:098463de4c5d 57 gpio_add = GPIOA_BASE;
group-onsemi 0:098463de4c5d 58 __GPIOA_CLK_ENABLE();
group-onsemi 0:098463de4c5d 59 break;
group-onsemi 0:098463de4c5d 60 case PortB:
group-onsemi 0:098463de4c5d 61 gpio_add = GPIOB_BASE;
group-onsemi 0:098463de4c5d 62 __GPIOB_CLK_ENABLE();
group-onsemi 0:098463de4c5d 63 break;
group-onsemi 0:098463de4c5d 64 #if defined(GPIOC_BASE)
group-onsemi 0:098463de4c5d 65 case PortC:
group-onsemi 0:098463de4c5d 66 gpio_add = GPIOC_BASE;
group-onsemi 0:098463de4c5d 67 __GPIOC_CLK_ENABLE();
group-onsemi 0:098463de4c5d 68 break;
group-onsemi 0:098463de4c5d 69 #endif
group-onsemi 0:098463de4c5d 70 #if defined(GPIOD_BASE)
group-onsemi 0:098463de4c5d 71 case PortD:
group-onsemi 0:098463de4c5d 72 gpio_add = GPIOD_BASE;
group-onsemi 0:098463de4c5d 73 __GPIOD_CLK_ENABLE();
group-onsemi 0:098463de4c5d 74 break;
group-onsemi 0:098463de4c5d 75 #endif
group-onsemi 0:098463de4c5d 76 #if defined(GPIOF_BASE)
group-onsemi 0:098463de4c5d 77 case PortF:
group-onsemi 0:098463de4c5d 78 gpio_add = GPIOF_BASE;
group-onsemi 0:098463de4c5d 79 __GPIOF_CLK_ENABLE();
group-onsemi 0:098463de4c5d 80 break;
group-onsemi 0:098463de4c5d 81 #endif
group-onsemi 0:098463de4c5d 82 default:
group-onsemi 0:098463de4c5d 83 error("Pinmap error: wrong port number.");
group-onsemi 0:098463de4c5d 84 break;
group-onsemi 0:098463de4c5d 85 }
group-onsemi 0:098463de4c5d 86 return gpio_add;
group-onsemi 0:098463de4c5d 87 }
group-onsemi 0:098463de4c5d 88
group-onsemi 0:098463de4c5d 89 /**
group-onsemi 0:098463de4c5d 90 * Configure pin (mode, speed, output type and pull-up/pull-down)
group-onsemi 0:098463de4c5d 91 */
group-onsemi 0:098463de4c5d 92 void pin_function(PinName pin, int data) {
group-onsemi 0:098463de4c5d 93 MBED_ASSERT(pin != (PinName)NC);
group-onsemi 0:098463de4c5d 94
group-onsemi 0:098463de4c5d 95 // Get the pin informations
group-onsemi 0:098463de4c5d 96 uint32_t mode = STM_PIN_MODE(data);
group-onsemi 0:098463de4c5d 97 uint32_t pupd = STM_PIN_PUPD(data);
group-onsemi 0:098463de4c5d 98 uint32_t afnum = STM_PIN_AFNUM(data);
group-onsemi 0:098463de4c5d 99
group-onsemi 0:098463de4c5d 100 uint32_t port_index = STM_PORT(pin);
group-onsemi 0:098463de4c5d 101 uint32_t pin_index = STM_PIN(pin);
group-onsemi 0:098463de4c5d 102
group-onsemi 0:098463de4c5d 103 // Enable GPIO clock
group-onsemi 0:098463de4c5d 104 uint32_t gpio_add = Set_GPIO_Clock(port_index);
group-onsemi 0:098463de4c5d 105 GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
group-onsemi 0:098463de4c5d 106
group-onsemi 0:098463de4c5d 107 // Configure GPIO
group-onsemi 0:098463de4c5d 108 GPIO_InitTypeDef GPIO_InitStructure;
group-onsemi 0:098463de4c5d 109 GPIO_InitStructure.Pin = (uint32_t)(1 << pin_index);
group-onsemi 0:098463de4c5d 110 GPIO_InitStructure.Mode = gpio_mode[mode];
group-onsemi 0:098463de4c5d 111 GPIO_InitStructure.Pull = pupd;
group-onsemi 0:098463de4c5d 112 GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
group-onsemi 0:098463de4c5d 113 GPIO_InitStructure.Alternate = afnum;
group-onsemi 0:098463de4c5d 114 HAL_GPIO_Init(gpio, &GPIO_InitStructure);
group-onsemi 0:098463de4c5d 115
group-onsemi 0:098463de4c5d 116 // [TODO] Disconnect SWDIO and SWCLK signals ?
group-onsemi 0:098463de4c5d 117 // Warning: For debugging it is necessary to reconnect under reset if this is done.
group-onsemi 0:098463de4c5d 118 //if ((pin == PA_13) || (pin == PA_14)) {
group-onsemi 0:098463de4c5d 119 //
group-onsemi 0:098463de4c5d 120 //}
group-onsemi 0:098463de4c5d 121 }
group-onsemi 0:098463de4c5d 122
group-onsemi 0:098463de4c5d 123 /**
group-onsemi 0:098463de4c5d 124 * Configure pin pull-up/pull-down
group-onsemi 0:098463de4c5d 125 */
group-onsemi 0:098463de4c5d 126 void pin_mode(PinName pin, PinMode mode) {
group-onsemi 0:098463de4c5d 127 MBED_ASSERT(pin != (PinName)NC);
group-onsemi 0:098463de4c5d 128
group-onsemi 0:098463de4c5d 129 uint32_t port_index = STM_PORT(pin);
group-onsemi 0:098463de4c5d 130 uint32_t pin_index = STM_PIN(pin);
group-onsemi 0:098463de4c5d 131
group-onsemi 0:098463de4c5d 132 // Enable GPIO clock
group-onsemi 0:098463de4c5d 133 uint32_t gpio_add = Set_GPIO_Clock(port_index);
group-onsemi 0:098463de4c5d 134 GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
group-onsemi 0:098463de4c5d 135
group-onsemi 0:098463de4c5d 136 // Configure pull-up/pull-down resistors
group-onsemi 0:098463de4c5d 137 uint32_t pupd = (uint32_t)mode;
group-onsemi 0:098463de4c5d 138 if (pupd > 2) pupd = 0; // Open-drain = No pull-up/No pull-down
group-onsemi 0:098463de4c5d 139 gpio->PUPDR &= (uint32_t)(~(GPIO_PUPDR_PUPDR0 << (pin_index * 2)));
group-onsemi 0:098463de4c5d 140 gpio->PUPDR |= (uint32_t)(pupd << (pin_index * 2));
group-onsemi 0:098463de4c5d 141 }
group-onsemi 0:098463de4c5d 142
group-onsemi 0:098463de4c5d 143 /* Internal function for setting the gpiomode/function
group-onsemi 0:098463de4c5d 144 * without changing Pull mode
group-onsemi 0:098463de4c5d 145 */
group-onsemi 0:098463de4c5d 146 void pin_function_gpiomode(PinName pin, uint32_t gpiomode) {
group-onsemi 0:098463de4c5d 147
group-onsemi 0:098463de4c5d 148 /* Read current pull state from HW to avoid over-write*/
group-onsemi 0:098463de4c5d 149 uint32_t port_index = STM_PORT(pin);
group-onsemi 0:098463de4c5d 150 uint32_t pin_index = STM_PIN(pin);
group-onsemi 0:098463de4c5d 151 GPIO_TypeDef *gpio = (GPIO_TypeDef *) Set_GPIO_Clock(port_index);
group-onsemi 0:098463de4c5d 152 uint32_t temp = gpio->PUPDR;
group-onsemi 0:098463de4c5d 153 uint32_t pull = (temp >> (pin_index * 2U)) & GPIO_PUPDR_PUPDR0;
group-onsemi 0:098463de4c5d 154
group-onsemi 0:098463de4c5d 155 /* Then re-use global function for updating the mode part*/
group-onsemi 0:098463de4c5d 156 pin_function(pin, STM_PIN_DATA(gpiomode, pull, 0));
group-onsemi 0:098463de4c5d 157 }