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Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_NXP/TARGET_LPC2460/serial_api.c@0:098463de4c5d, 2017-01-25 (annotated)

Committer:
group-onsemi
Date:
Wed Jan 25 20:34:15 2017 +0000
Revision:
0:098463de4c5d
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* mbed Microcontroller Library
group-onsemi 0:098463de4c5d 2 * Copyright (c) 2006-2015 ARM Limited
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Licensed under the Apache License, Version 2.0 (the "License");
group-onsemi 0:098463de4c5d 5 * you may not use this file except in compliance with the License.
group-onsemi 0:098463de4c5d 6 * You may obtain a copy of the License at
group-onsemi 0:098463de4c5d 7 *
group-onsemi 0:098463de4c5d 8 * http://www.apache.org/licenses/LICENSE-2.0
group-onsemi 0:098463de4c5d 9 *
group-onsemi 0:098463de4c5d 10 * Unless required by applicable law or agreed to in writing, software
group-onsemi 0:098463de4c5d 11 * distributed under the License is distributed on an "AS IS" BASIS,
group-onsemi 0:098463de4c5d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
group-onsemi 0:098463de4c5d 13 * See the License for the specific language governing permissions and
group-onsemi 0:098463de4c5d 14 * limitations under the License.
group-onsemi 0:098463de4c5d 15 */
group-onsemi 0:098463de4c5d 16 // math.h required for floating point operations for baud rate calculation
group-onsemi 0:098463de4c5d 17 #include "mbed_assert.h"
group-onsemi 0:098463de4c5d 18 #include <math.h>
group-onsemi 0:098463de4c5d 19 #include <string.h>
group-onsemi 0:098463de4c5d 20 #include <stdlib.h>
group-onsemi 0:098463de4c5d 21
group-onsemi 0:098463de4c5d 22 #include "serial_api.h"
group-onsemi 0:098463de4c5d 23 #include "cmsis.h"
group-onsemi 0:098463de4c5d 24 #include "pinmap.h"
group-onsemi 0:098463de4c5d 25
group-onsemi 0:098463de4c5d 26 /******************************************************************************
group-onsemi 0:098463de4c5d 27 * INITIALIZATION
group-onsemi 0:098463de4c5d 28 ******************************************************************************/
group-onsemi 0:098463de4c5d 29 #define UART_NUM 4
group-onsemi 0:098463de4c5d 30
group-onsemi 0:098463de4c5d 31 static const PinMap PinMap_UART_TX[] = {
group-onsemi 0:098463de4c5d 32 {P0_0, UART_3, 2},
group-onsemi 0:098463de4c5d 33 {P0_2, UART_0, 1},
group-onsemi 0:098463de4c5d 34 {P0_10, UART_2, 1},
group-onsemi 0:098463de4c5d 35 {P0_15, UART_1, 1},
group-onsemi 0:098463de4c5d 36 {P0_25, UART_3, 3},
group-onsemi 0:098463de4c5d 37 {P2_0 , UART_1, 2},
group-onsemi 0:098463de4c5d 38 {P2_8 , UART_2, 2},
group-onsemi 0:098463de4c5d 39 {P4_28, UART_3, 3},
group-onsemi 0:098463de4c5d 40 {NC , NC , 0}
group-onsemi 0:098463de4c5d 41 };
group-onsemi 0:098463de4c5d 42
group-onsemi 0:098463de4c5d 43 static const PinMap PinMap_UART_RX[] = {
group-onsemi 0:098463de4c5d 44 {P0_1 , UART_3, 2},
group-onsemi 0:098463de4c5d 45 {P0_3 , UART_0, 1},
group-onsemi 0:098463de4c5d 46 {P0_11, UART_2, 1},
group-onsemi 0:098463de4c5d 47 {P0_16, UART_1, 1},
group-onsemi 0:098463de4c5d 48 {P0_26, UART_3, 3},
group-onsemi 0:098463de4c5d 49 {P2_1 , UART_1, 2},
group-onsemi 0:098463de4c5d 50 {P2_9 , UART_2, 2},
group-onsemi 0:098463de4c5d 51 {P4_29, UART_3, 3},
group-onsemi 0:098463de4c5d 52 {NC , NC , 0}
group-onsemi 0:098463de4c5d 53 };
group-onsemi 0:098463de4c5d 54
group-onsemi 0:098463de4c5d 55 static uint32_t serial_irq_ids[UART_NUM] = {0};
group-onsemi 0:098463de4c5d 56 static uart_irq_handler irq_handler;
group-onsemi 0:098463de4c5d 57
group-onsemi 0:098463de4c5d 58 int stdio_uart_inited = 0;
group-onsemi 0:098463de4c5d 59 serial_t stdio_uart;
group-onsemi 0:098463de4c5d 60
group-onsemi 0:098463de4c5d 61 void serial_init(serial_t *obj, PinName tx, PinName rx) {
group-onsemi 0:098463de4c5d 62 int is_stdio_uart = 0;
group-onsemi 0:098463de4c5d 63
group-onsemi 0:098463de4c5d 64 // determine the UART to use
group-onsemi 0:098463de4c5d 65 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
group-onsemi 0:098463de4c5d 66 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
group-onsemi 0:098463de4c5d 67 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
group-onsemi 0:098463de4c5d 68 MBED_ASSERT((int)uart != NC);
group-onsemi 0:098463de4c5d 69
group-onsemi 0:098463de4c5d 70 obj->uart = (LPC_UART_TypeDef *)uart;
group-onsemi 0:098463de4c5d 71 // enable power
group-onsemi 0:098463de4c5d 72 switch (uart) {
group-onsemi 0:098463de4c5d 73 case UART_0: LPC_SC->PCONP |= 1 << 3; break;
group-onsemi 0:098463de4c5d 74 case UART_1: LPC_SC->PCONP |= 1 << 4; break;
group-onsemi 0:098463de4c5d 75 case UART_2: LPC_SC->PCONP |= 1 << 24; break;
group-onsemi 0:098463de4c5d 76 case UART_3: LPC_SC->PCONP |= 1 << 25; break;
group-onsemi 0:098463de4c5d 77 }
group-onsemi 0:098463de4c5d 78
group-onsemi 0:098463de4c5d 79 // enable fifos and default rx trigger level
group-onsemi 0:098463de4c5d 80 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
group-onsemi 0:098463de4c5d 81 | 0 << 1 // Rx Fifo Reset
group-onsemi 0:098463de4c5d 82 | 0 << 2 // Tx Fifo Reset
group-onsemi 0:098463de4c5d 83 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
group-onsemi 0:098463de4c5d 84
group-onsemi 0:098463de4c5d 85 // disable irqs
group-onsemi 0:098463de4c5d 86 obj->uart->IER = 0 << 0 // Rx Data available irq enable
group-onsemi 0:098463de4c5d 87 | 0 << 1 // Tx Fifo empty irq enable
group-onsemi 0:098463de4c5d 88 | 0 << 2; // Rx Line Status irq enable
group-onsemi 0:098463de4c5d 89
group-onsemi 0:098463de4c5d 90 // set default baud rate and format
group-onsemi 0:098463de4c5d 91 serial_baud (obj, 9600);
group-onsemi 0:098463de4c5d 92 serial_format(obj, 8, ParityNone, 1);
group-onsemi 0:098463de4c5d 93
group-onsemi 0:098463de4c5d 94 // pinout the chosen uart
group-onsemi 0:098463de4c5d 95 pinmap_pinout(tx, PinMap_UART_TX);
group-onsemi 0:098463de4c5d 96 pinmap_pinout(rx, PinMap_UART_RX);
group-onsemi 0:098463de4c5d 97
group-onsemi 0:098463de4c5d 98 // set rx/tx pins in PullUp mode
group-onsemi 0:098463de4c5d 99 if (tx != NC) {
group-onsemi 0:098463de4c5d 100 pin_mode(tx, PullUp);
group-onsemi 0:098463de4c5d 101 }
group-onsemi 0:098463de4c5d 102 if (rx != NC) {
group-onsemi 0:098463de4c5d 103 pin_mode(rx, PullUp);
group-onsemi 0:098463de4c5d 104 }
group-onsemi 0:098463de4c5d 105
group-onsemi 0:098463de4c5d 106 switch (uart) {
group-onsemi 0:098463de4c5d 107 case UART_0: obj->index = 0; break;
group-onsemi 0:098463de4c5d 108 case UART_1: obj->index = 1; break;
group-onsemi 0:098463de4c5d 109 case UART_2: obj->index = 2; break;
group-onsemi 0:098463de4c5d 110 case UART_3: obj->index = 3; break;
group-onsemi 0:098463de4c5d 111 }
group-onsemi 0:098463de4c5d 112
group-onsemi 0:098463de4c5d 113 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
group-onsemi 0:098463de4c5d 114
group-onsemi 0:098463de4c5d 115 if (is_stdio_uart) {
group-onsemi 0:098463de4c5d 116 stdio_uart_inited = 1;
group-onsemi 0:098463de4c5d 117 memcpy(&stdio_uart, obj, sizeof(serial_t));
group-onsemi 0:098463de4c5d 118 }
group-onsemi 0:098463de4c5d 119 }
group-onsemi 0:098463de4c5d 120
group-onsemi 0:098463de4c5d 121 void serial_free(serial_t *obj) {
group-onsemi 0:098463de4c5d 122 serial_irq_ids[obj->index] = 0;
group-onsemi 0:098463de4c5d 123 }
group-onsemi 0:098463de4c5d 124
group-onsemi 0:098463de4c5d 125 // serial_baud
group-onsemi 0:098463de4c5d 126 // set the baud rate, taking in to account the current SystemFrequency
group-onsemi 0:098463de4c5d 127 void serial_baud(serial_t *obj, int baudrate) {
group-onsemi 0:098463de4c5d 128 MBED_ASSERT((int)obj->uart <= UART_3);
group-onsemi 0:098463de4c5d 129 // The LPC2300 and LPC1700 have a divider and a fractional divider to control the
group-onsemi 0:098463de4c5d 130 // baud rate. The formula is:
group-onsemi 0:098463de4c5d 131 //
group-onsemi 0:098463de4c5d 132 // Baudrate = (1 / PCLK) * 16 * DL * (1 + DivAddVal / MulVal)
group-onsemi 0:098463de4c5d 133 // where:
group-onsemi 0:098463de4c5d 134 // 1 < MulVal <= 15
group-onsemi 0:098463de4c5d 135 // 0 <= DivAddVal < 14
group-onsemi 0:098463de4c5d 136 // DivAddVal < MulVal
group-onsemi 0:098463de4c5d 137 //
group-onsemi 0:098463de4c5d 138 // set pclk to /1
group-onsemi 0:098463de4c5d 139 switch ((int)obj->uart) {
group-onsemi 0:098463de4c5d 140 case UART_0: LPC_SC->PCLKSEL0 &= ~(0x3 << 6); LPC_SC->PCLKSEL0 |= (0x1 << 6); break;
group-onsemi 0:098463de4c5d 141 case UART_1: LPC_SC->PCLKSEL0 &= ~(0x3 << 8); LPC_SC->PCLKSEL0 |= (0x1 << 8); break;
group-onsemi 0:098463de4c5d 142 case UART_2: LPC_SC->PCLKSEL1 &= ~(0x3 << 16); LPC_SC->PCLKSEL1 |= (0x1 << 16); break;
group-onsemi 0:098463de4c5d 143 case UART_3: LPC_SC->PCLKSEL1 &= ~(0x3 << 18); LPC_SC->PCLKSEL1 |= (0x1 << 18); break;
group-onsemi 0:098463de4c5d 144 default: break;
group-onsemi 0:098463de4c5d 145 }
group-onsemi 0:098463de4c5d 146
group-onsemi 0:098463de4c5d 147 uint32_t PCLK = SystemCoreClock;
group-onsemi 0:098463de4c5d 148
group-onsemi 0:098463de4c5d 149 // First we check to see if the basic divide with no DivAddVal/MulVal
group-onsemi 0:098463de4c5d 150 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
group-onsemi 0:098463de4c5d 151 // MulVal = 1. Otherwise, we search the valid ratio value range to find
group-onsemi 0:098463de4c5d 152 // the closest match. This could be more elegant, using search methods
group-onsemi 0:098463de4c5d 153 // and/or lookup tables, but the brute force method is not that much
group-onsemi 0:098463de4c5d 154 // slower, and is more maintainable.
group-onsemi 0:098463de4c5d 155 uint16_t DL = PCLK / (16 * baudrate);
group-onsemi 0:098463de4c5d 156
group-onsemi 0:098463de4c5d 157 uint8_t DivAddVal = 0;
group-onsemi 0:098463de4c5d 158 uint8_t MulVal = 1;
group-onsemi 0:098463de4c5d 159 int hit = 0;
group-onsemi 0:098463de4c5d 160 uint16_t dlv;
group-onsemi 0:098463de4c5d 161 uint8_t mv, dav;
group-onsemi 0:098463de4c5d 162 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
group-onsemi 0:098463de4c5d 163 int err_best = baudrate, b;
group-onsemi 0:098463de4c5d 164 for (mv = 1; mv < 16 && !hit; mv++)
group-onsemi 0:098463de4c5d 165 {
group-onsemi 0:098463de4c5d 166 for (dav = 0; dav < mv; dav++)
group-onsemi 0:098463de4c5d 167 {
group-onsemi 0:098463de4c5d 168 // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul))
group-onsemi 0:098463de4c5d 169 // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul))
group-onsemi 0:098463de4c5d 170 // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding
group-onsemi 0:098463de4c5d 171 // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision
group-onsemi 0:098463de4c5d 172 // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding
group-onsemi 0:098463de4c5d 173
group-onsemi 0:098463de4c5d 174 if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom
group-onsemi 0:098463de4c5d 175 dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2;
group-onsemi 0:098463de4c5d 176 else // 2 bits headroom, use more precision
group-onsemi 0:098463de4c5d 177 dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2;
group-onsemi 0:098463de4c5d 178
group-onsemi 0:098463de4c5d 179 // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood
group-onsemi 0:098463de4c5d 180 if (dlv == 0)
group-onsemi 0:098463de4c5d 181 dlv = 1;
group-onsemi 0:098463de4c5d 182
group-onsemi 0:098463de4c5d 183 // datasheet says if dav > 0 then DL must be >= 2
group-onsemi 0:098463de4c5d 184 if ((dav > 0) && (dlv < 2))
group-onsemi 0:098463de4c5d 185 dlv = 2;
group-onsemi 0:098463de4c5d 186
group-onsemi 0:098463de4c5d 187 // integer rearrangement of the baudrate equation (with rounding)
group-onsemi 0:098463de4c5d 188 b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2;
group-onsemi 0:098463de4c5d 189
group-onsemi 0:098463de4c5d 190 // check to see how we went
group-onsemi 0:098463de4c5d 191 b = abs(b - baudrate);
group-onsemi 0:098463de4c5d 192 if (b < err_best)
group-onsemi 0:098463de4c5d 193 {
group-onsemi 0:098463de4c5d 194 err_best = b;
group-onsemi 0:098463de4c5d 195
group-onsemi 0:098463de4c5d 196 DL = dlv;
group-onsemi 0:098463de4c5d 197 MulVal = mv;
group-onsemi 0:098463de4c5d 198 DivAddVal = dav;
group-onsemi 0:098463de4c5d 199
group-onsemi 0:098463de4c5d 200 if (b == baudrate)
group-onsemi 0:098463de4c5d 201 {
group-onsemi 0:098463de4c5d 202 hit = 1;
group-onsemi 0:098463de4c5d 203 break;
group-onsemi 0:098463de4c5d 204 }
group-onsemi 0:098463de4c5d 205 }
group-onsemi 0:098463de4c5d 206 }
group-onsemi 0:098463de4c5d 207 }
group-onsemi 0:098463de4c5d 208 }
group-onsemi 0:098463de4c5d 209
group-onsemi 0:098463de4c5d 210 // set LCR[DLAB] to enable writing to divider registers
group-onsemi 0:098463de4c5d 211 obj->uart->LCR |= (1 << 7);
group-onsemi 0:098463de4c5d 212
group-onsemi 0:098463de4c5d 213 // set divider values
group-onsemi 0:098463de4c5d 214 obj->uart->DLM = (DL >> 8) & 0xFF;
group-onsemi 0:098463de4c5d 215 obj->uart->DLL = (DL >> 0) & 0xFF;
group-onsemi 0:098463de4c5d 216 obj->uart->FDR = (uint32_t) DivAddVal << 0
group-onsemi 0:098463de4c5d 217 | (uint32_t) MulVal << 4;
group-onsemi 0:098463de4c5d 218
group-onsemi 0:098463de4c5d 219 // clear LCR[DLAB]
group-onsemi 0:098463de4c5d 220 obj->uart->LCR &= ~(1 << 7);
group-onsemi 0:098463de4c5d 221 }
group-onsemi 0:098463de4c5d 222
group-onsemi 0:098463de4c5d 223 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
group-onsemi 0:098463de4c5d 224 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
group-onsemi 0:098463de4c5d 225 MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 0: 5 data bits ... 3: 8 data bits
group-onsemi 0:098463de4c5d 226 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) ||
group-onsemi 0:098463de4c5d 227 (parity == ParityForced1) || (parity == ParityForced0));
group-onsemi 0:098463de4c5d 228
group-onsemi 0:098463de4c5d 229 stop_bits -= 1;
group-onsemi 0:098463de4c5d 230 data_bits -= 5;
group-onsemi 0:098463de4c5d 231
group-onsemi 0:098463de4c5d 232 int parity_enable = 0, parity_select = 0;
group-onsemi 0:098463de4c5d 233 switch (parity) {
group-onsemi 0:098463de4c5d 234 case ParityNone: parity_enable = 0; parity_select = 0; break;
group-onsemi 0:098463de4c5d 235 case ParityOdd : parity_enable = 1; parity_select = 0; break;
group-onsemi 0:098463de4c5d 236 case ParityEven: parity_enable = 1; parity_select = 1; break;
group-onsemi 0:098463de4c5d 237 case ParityForced1: parity_enable = 1; parity_select = 2; break;
group-onsemi 0:098463de4c5d 238 case ParityForced0: parity_enable = 1; parity_select = 3; break;
group-onsemi 0:098463de4c5d 239 default:
group-onsemi 0:098463de4c5d 240 break;
group-onsemi 0:098463de4c5d 241 }
group-onsemi 0:098463de4c5d 242
group-onsemi 0:098463de4c5d 243 obj->uart->LCR = data_bits << 0
group-onsemi 0:098463de4c5d 244 | stop_bits << 2
group-onsemi 0:098463de4c5d 245 | parity_enable << 3
group-onsemi 0:098463de4c5d 246 | parity_select << 4;
group-onsemi 0:098463de4c5d 247 }
group-onsemi 0:098463de4c5d 248
group-onsemi 0:098463de4c5d 249 /******************************************************************************
group-onsemi 0:098463de4c5d 250 * INTERRUPTS HANDLING
group-onsemi 0:098463de4c5d 251 ******************************************************************************/
group-onsemi 0:098463de4c5d 252 static inline void uart_irq(uint32_t iir, uint32_t index) {
group-onsemi 0:098463de4c5d 253 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
group-onsemi 0:098463de4c5d 254 SerialIrq irq_type;
group-onsemi 0:098463de4c5d 255 switch (iir) {
group-onsemi 0:098463de4c5d 256 case 1: irq_type = TxIrq; break;
group-onsemi 0:098463de4c5d 257 case 2: irq_type = RxIrq; break;
group-onsemi 0:098463de4c5d 258 default: return;
group-onsemi 0:098463de4c5d 259 }
group-onsemi 0:098463de4c5d 260
group-onsemi 0:098463de4c5d 261 if (serial_irq_ids[index] != 0){
group-onsemi 0:098463de4c5d 262 irq_handler(serial_irq_ids[index], irq_type);
group-onsemi 0:098463de4c5d 263 }
group-onsemi 0:098463de4c5d 264 }
group-onsemi 0:098463de4c5d 265
group-onsemi 0:098463de4c5d 266 void uart0_irq() {uart_irq((LPC_UART0->IIR >> 1) & 0x7, 0);}
group-onsemi 0:098463de4c5d 267 void uart1_irq() {uart_irq((LPC_UART1->IIR >> 1) & 0x7, 1);}
group-onsemi 0:098463de4c5d 268 void uart2_irq() {uart_irq((LPC_UART2->IIR >> 1) & 0x7, 2);}
group-onsemi 0:098463de4c5d 269 void uart3_irq() {uart_irq((LPC_UART3->IIR >> 1) & 0x7, 3);}
group-onsemi 0:098463de4c5d 270
group-onsemi 0:098463de4c5d 271 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
group-onsemi 0:098463de4c5d 272 irq_handler = handler;
group-onsemi 0:098463de4c5d 273 serial_irq_ids[obj->index] = id;
group-onsemi 0:098463de4c5d 274 }
group-onsemi 0:098463de4c5d 275
group-onsemi 0:098463de4c5d 276 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
group-onsemi 0:098463de4c5d 277 IRQn_Type irq_n = (IRQn_Type)0;
group-onsemi 0:098463de4c5d 278 uint32_t vector = 0;
group-onsemi 0:098463de4c5d 279 switch ((int)obj->uart) {
group-onsemi 0:098463de4c5d 280 case UART_0: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
group-onsemi 0:098463de4c5d 281 case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
group-onsemi 0:098463de4c5d 282 case UART_2: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
group-onsemi 0:098463de4c5d 283 case UART_3: irq_n=UART3_IRQn; vector = (uint32_t)&uart3_irq; break;
group-onsemi 0:098463de4c5d 284 }
group-onsemi 0:098463de4c5d 285
group-onsemi 0:098463de4c5d 286 if (enable) {
group-onsemi 0:098463de4c5d 287 obj->uart->IER |= 1 << irq;
group-onsemi 0:098463de4c5d 288 NVIC_SetVector(irq_n, vector);
group-onsemi 0:098463de4c5d 289 NVIC_EnableIRQ(irq_n);
group-onsemi 0:098463de4c5d 290 } else { // disable
group-onsemi 0:098463de4c5d 291 int all_disabled = 0;
group-onsemi 0:098463de4c5d 292 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
group-onsemi 0:098463de4c5d 293 obj->uart->IER &= ~(1 << irq);
group-onsemi 0:098463de4c5d 294 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
group-onsemi 0:098463de4c5d 295 if (all_disabled)
group-onsemi 0:098463de4c5d 296 NVIC_DisableIRQ(irq_n);
group-onsemi 0:098463de4c5d 297 }
group-onsemi 0:098463de4c5d 298 }
group-onsemi 0:098463de4c5d 299
group-onsemi 0:098463de4c5d 300 /******************************************************************************
group-onsemi 0:098463de4c5d 301 * READ/WRITE
group-onsemi 0:098463de4c5d 302 ******************************************************************************/
group-onsemi 0:098463de4c5d 303 int serial_getc(serial_t *obj) {
group-onsemi 0:098463de4c5d 304 while (!serial_readable(obj));
group-onsemi 0:098463de4c5d 305 return obj->uart->RBR;
group-onsemi 0:098463de4c5d 306 }
group-onsemi 0:098463de4c5d 307
group-onsemi 0:098463de4c5d 308 void serial_putc(serial_t *obj, int c) {
group-onsemi 0:098463de4c5d 309 while (!serial_writable(obj));
group-onsemi 0:098463de4c5d 310 obj->uart->THR = c;
group-onsemi 0:098463de4c5d 311 }
group-onsemi 0:098463de4c5d 312
group-onsemi 0:098463de4c5d 313 int serial_readable(serial_t *obj) {
group-onsemi 0:098463de4c5d 314 return obj->uart->LSR & 0x01;
group-onsemi 0:098463de4c5d 315 }
group-onsemi 0:098463de4c5d 316
group-onsemi 0:098463de4c5d 317 int serial_writable(serial_t *obj) {
group-onsemi 0:098463de4c5d 318 return obj->uart->LSR & 0x20;
group-onsemi 0:098463de4c5d 319 }
group-onsemi 0:098463de4c5d 320
group-onsemi 0:098463de4c5d 321 void serial_clear(serial_t *obj) {
group-onsemi 0:098463de4c5d 322 obj->uart->FCR = 1 << 1 // rx FIFO reset
group-onsemi 0:098463de4c5d 323 | 1 << 2 // tx FIFO reset
group-onsemi 0:098463de4c5d 324 | 0 << 6; // interrupt depth
group-onsemi 0:098463de4c5d 325 }
group-onsemi 0:098463de4c5d 326
group-onsemi 0:098463de4c5d 327 void serial_pinout_tx(PinName tx) {
group-onsemi 0:098463de4c5d 328 pinmap_pinout(tx, PinMap_UART_TX);
group-onsemi 0:098463de4c5d 329 }
group-onsemi 0:098463de4c5d 330
group-onsemi 0:098463de4c5d 331 void serial_break_set(serial_t *obj) {
group-onsemi 0:098463de4c5d 332 obj->uart->LCR |= (1 << 6);
group-onsemi 0:098463de4c5d 333 }
group-onsemi 0:098463de4c5d 334
group-onsemi 0:098463de4c5d 335 void serial_break_clear(serial_t *obj) {
group-onsemi 0:098463de4c5d 336 obj->uart->LCR &= ~(1 << 6);
group-onsemi 0:098463de4c5d 337 }
group-onsemi 0:098463de4c5d 338