ON Semiconductor / mbed-os

5.2.1 - Updated I2C files

Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

cmsis/core_cmInstr.h@0:098463de4c5d, 2017-01-25 (annotated)

Committer:
group-onsemi
Date:
Wed Jan 25 20:34:15 2017 +0000
Revision:
0:098463de4c5d
Initial commit

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group-onsemi 0:098463de4c5d 1 /**************************************************************************//**
group-onsemi 0:098463de4c5d 2 * @file core_cmInstr.h
group-onsemi 0:098463de4c5d 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
group-onsemi 0:098463de4c5d 4 * @version V4.10
group-onsemi 0:098463de4c5d 5 * @date 18. March 2015
group-onsemi 0:098463de4c5d 6 *
group-onsemi 0:098463de4c5d 7 * @note
group-onsemi 0:098463de4c5d 8 *
group-onsemi 0:098463de4c5d 9 ******************************************************************************/
group-onsemi 0:098463de4c5d 10 /* Copyright (c) 2009 - 2014 ARM LIMITED
group-onsemi 0:098463de4c5d 11
group-onsemi 0:098463de4c5d 12 All rights reserved.
group-onsemi 0:098463de4c5d 13 Redistribution and use in source and binary forms, with or without
group-onsemi 0:098463de4c5d 14 modification, are permitted provided that the following conditions are met:
group-onsemi 0:098463de4c5d 15 - Redistributions of source code must retain the above copyright
group-onsemi 0:098463de4c5d 16 notice, this list of conditions and the following disclaimer.
group-onsemi 0:098463de4c5d 17 - Redistributions in binary form must reproduce the above copyright
group-onsemi 0:098463de4c5d 18 notice, this list of conditions and the following disclaimer in the
group-onsemi 0:098463de4c5d 19 documentation and/or other materials provided with the distribution.
group-onsemi 0:098463de4c5d 20 - Neither the name of ARM nor the names of its contributors may be used
group-onsemi 0:098463de4c5d 21 to endorse or promote products derived from this software without
group-onsemi 0:098463de4c5d 22 specific prior written permission.
group-onsemi 0:098463de4c5d 23 *
group-onsemi 0:098463de4c5d 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
group-onsemi 0:098463de4c5d 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
group-onsemi 0:098463de4c5d 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
group-onsemi 0:098463de4c5d 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
group-onsemi 0:098463de4c5d 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
group-onsemi 0:098463de4c5d 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
group-onsemi 0:098463de4c5d 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
group-onsemi 0:098463de4c5d 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
group-onsemi 0:098463de4c5d 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
group-onsemi 0:098463de4c5d 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
group-onsemi 0:098463de4c5d 34 POSSIBILITY OF SUCH DAMAGE.
group-onsemi 0:098463de4c5d 35 ---------------------------------------------------------------------------*/
group-onsemi 0:098463de4c5d 36
group-onsemi 0:098463de4c5d 37
group-onsemi 0:098463de4c5d 38 #ifndef __CORE_CMINSTR_H
group-onsemi 0:098463de4c5d 39 #define __CORE_CMINSTR_H
group-onsemi 0:098463de4c5d 40
group-onsemi 0:098463de4c5d 41
group-onsemi 0:098463de4c5d 42 /* ########################## Core Instruction Access ######################### */
group-onsemi 0:098463de4c5d 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
group-onsemi 0:098463de4c5d 44 Access to dedicated instructions
group-onsemi 0:098463de4c5d 45 @{
group-onsemi 0:098463de4c5d 46 */
group-onsemi 0:098463de4c5d 47
group-onsemi 0:098463de4c5d 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
group-onsemi 0:098463de4c5d 49 /* ARM armcc specific functions */
group-onsemi 0:098463de4c5d 50
group-onsemi 0:098463de4c5d 51 #if (__ARMCC_VERSION < 400677)
group-onsemi 0:098463de4c5d 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
group-onsemi 0:098463de4c5d 53 #endif
group-onsemi 0:098463de4c5d 54
group-onsemi 0:098463de4c5d 55
group-onsemi 0:098463de4c5d 56 /** \brief No Operation
group-onsemi 0:098463de4c5d 57
group-onsemi 0:098463de4c5d 58 No Operation does nothing. This instruction can be used for code alignment purposes.
group-onsemi 0:098463de4c5d 59 */
group-onsemi 0:098463de4c5d 60 #define __NOP __nop
group-onsemi 0:098463de4c5d 61
group-onsemi 0:098463de4c5d 62
group-onsemi 0:098463de4c5d 63 /** \brief Wait For Interrupt
group-onsemi 0:098463de4c5d 64
group-onsemi 0:098463de4c5d 65 Wait For Interrupt is a hint instruction that suspends execution
group-onsemi 0:098463de4c5d 66 until one of a number of events occurs.
group-onsemi 0:098463de4c5d 67 */
group-onsemi 0:098463de4c5d 68 #define __WFI __wfi
group-onsemi 0:098463de4c5d 69
group-onsemi 0:098463de4c5d 70
group-onsemi 0:098463de4c5d 71 /** \brief Wait For Event
group-onsemi 0:098463de4c5d 72
group-onsemi 0:098463de4c5d 73 Wait For Event is a hint instruction that permits the processor to enter
group-onsemi 0:098463de4c5d 74 a low-power state until one of a number of events occurs.
group-onsemi 0:098463de4c5d 75 */
group-onsemi 0:098463de4c5d 76 #define __WFE __wfe
group-onsemi 0:098463de4c5d 77
group-onsemi 0:098463de4c5d 78
group-onsemi 0:098463de4c5d 79 /** \brief Send Event
group-onsemi 0:098463de4c5d 80
group-onsemi 0:098463de4c5d 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
group-onsemi 0:098463de4c5d 82 */
group-onsemi 0:098463de4c5d 83 #define __SEV __sev
group-onsemi 0:098463de4c5d 84
group-onsemi 0:098463de4c5d 85
group-onsemi 0:098463de4c5d 86 /** \brief Instruction Synchronization Barrier
group-onsemi 0:098463de4c5d 87
group-onsemi 0:098463de4c5d 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
group-onsemi 0:098463de4c5d 89 so that all instructions following the ISB are fetched from cache or
group-onsemi 0:098463de4c5d 90 memory, after the instruction has been completed.
group-onsemi 0:098463de4c5d 91 */
group-onsemi 0:098463de4c5d 92 #define __ISB() do {\
group-onsemi 0:098463de4c5d 93 __schedule_barrier();\
group-onsemi 0:098463de4c5d 94 __isb(0xF);\
group-onsemi 0:098463de4c5d 95 __schedule_barrier();\
group-onsemi 0:098463de4c5d 96 } while (0)
group-onsemi 0:098463de4c5d 97
group-onsemi 0:098463de4c5d 98 /** \brief Data Synchronization Barrier
group-onsemi 0:098463de4c5d 99
group-onsemi 0:098463de4c5d 100 This function acts as a special kind of Data Memory Barrier.
group-onsemi 0:098463de4c5d 101 It completes when all explicit memory accesses before this instruction complete.
group-onsemi 0:098463de4c5d 102 */
group-onsemi 0:098463de4c5d 103 #define __DSB() do {\
group-onsemi 0:098463de4c5d 104 __schedule_barrier();\
group-onsemi 0:098463de4c5d 105 __dsb(0xF);\
group-onsemi 0:098463de4c5d 106 __schedule_barrier();\
group-onsemi 0:098463de4c5d 107 } while (0)
group-onsemi 0:098463de4c5d 108
group-onsemi 0:098463de4c5d 109 /** \brief Data Memory Barrier
group-onsemi 0:098463de4c5d 110
group-onsemi 0:098463de4c5d 111 This function ensures the apparent order of the explicit memory operations before
group-onsemi 0:098463de4c5d 112 and after the instruction, without ensuring their completion.
group-onsemi 0:098463de4c5d 113 */
group-onsemi 0:098463de4c5d 114 #define __DMB() do {\
group-onsemi 0:098463de4c5d 115 __schedule_barrier();\
group-onsemi 0:098463de4c5d 116 __dmb(0xF);\
group-onsemi 0:098463de4c5d 117 __schedule_barrier();\
group-onsemi 0:098463de4c5d 118 } while (0)
group-onsemi 0:098463de4c5d 119
group-onsemi 0:098463de4c5d 120 /** \brief Reverse byte order (32 bit)
group-onsemi 0:098463de4c5d 121
group-onsemi 0:098463de4c5d 122 This function reverses the byte order in integer value.
group-onsemi 0:098463de4c5d 123
group-onsemi 0:098463de4c5d 124 \param [in] value Value to reverse
group-onsemi 0:098463de4c5d 125 \return Reversed value
group-onsemi 0:098463de4c5d 126 */
group-onsemi 0:098463de4c5d 127 #define __REV __rev
group-onsemi 0:098463de4c5d 128
group-onsemi 0:098463de4c5d 129
group-onsemi 0:098463de4c5d 130 /** \brief Reverse byte order (16 bit)
group-onsemi 0:098463de4c5d 131
group-onsemi 0:098463de4c5d 132 This function reverses the byte order in two unsigned short values.
group-onsemi 0:098463de4c5d 133
group-onsemi 0:098463de4c5d 134 \param [in] value Value to reverse
group-onsemi 0:098463de4c5d 135 \return Reversed value
group-onsemi 0:098463de4c5d 136 */
group-onsemi 0:098463de4c5d 137 #ifndef __NO_EMBEDDED_ASM
group-onsemi 0:098463de4c5d 138 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
group-onsemi 0:098463de4c5d 139 {
group-onsemi 0:098463de4c5d 140 rev16 r0, r0
group-onsemi 0:098463de4c5d 141 bx lr
group-onsemi 0:098463de4c5d 142 }
group-onsemi 0:098463de4c5d 143 #endif
group-onsemi 0:098463de4c5d 144
group-onsemi 0:098463de4c5d 145 /** \brief Reverse byte order in signed short value
group-onsemi 0:098463de4c5d 146
group-onsemi 0:098463de4c5d 147 This function reverses the byte order in a signed short value with sign extension to integer.
group-onsemi 0:098463de4c5d 148
group-onsemi 0:098463de4c5d 149 \param [in] value Value to reverse
group-onsemi 0:098463de4c5d 150 \return Reversed value
group-onsemi 0:098463de4c5d 151 */
group-onsemi 0:098463de4c5d 152 #ifndef __NO_EMBEDDED_ASM
group-onsemi 0:098463de4c5d 153 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
group-onsemi 0:098463de4c5d 154 {
group-onsemi 0:098463de4c5d 155 revsh r0, r0
group-onsemi 0:098463de4c5d 156 bx lr
group-onsemi 0:098463de4c5d 157 }
group-onsemi 0:098463de4c5d 158 #endif
group-onsemi 0:098463de4c5d 159
group-onsemi 0:098463de4c5d 160
group-onsemi 0:098463de4c5d 161 /** \brief Rotate Right in unsigned value (32 bit)
group-onsemi 0:098463de4c5d 162
group-onsemi 0:098463de4c5d 163 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
group-onsemi 0:098463de4c5d 164
group-onsemi 0:098463de4c5d 165 \param [in] value Value to rotate
group-onsemi 0:098463de4c5d 166 \param [in] value Number of Bits to rotate
group-onsemi 0:098463de4c5d 167 \return Rotated value
group-onsemi 0:098463de4c5d 168 */
group-onsemi 0:098463de4c5d 169 #define __ROR __ror
group-onsemi 0:098463de4c5d 170
group-onsemi 0:098463de4c5d 171
group-onsemi 0:098463de4c5d 172 /** \brief Breakpoint
group-onsemi 0:098463de4c5d 173
group-onsemi 0:098463de4c5d 174 This function causes the processor to enter Debug state.
group-onsemi 0:098463de4c5d 175 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
group-onsemi 0:098463de4c5d 176
group-onsemi 0:098463de4c5d 177 \param [in] value is ignored by the processor.
group-onsemi 0:098463de4c5d 178 If required, a debugger can use it to store additional information about the breakpoint.
group-onsemi 0:098463de4c5d 179 */
group-onsemi 0:098463de4c5d 180 #define __BKPT(value) __breakpoint(value)
group-onsemi 0:098463de4c5d 181
group-onsemi 0:098463de4c5d 182
group-onsemi 0:098463de4c5d 183 /** \brief Reverse bit order of value
group-onsemi 0:098463de4c5d 184
group-onsemi 0:098463de4c5d 185 This function reverses the bit order of the given value.
group-onsemi 0:098463de4c5d 186
group-onsemi 0:098463de4c5d 187 \param [in] value Value to reverse
group-onsemi 0:098463de4c5d 188 \return Reversed value
group-onsemi 0:098463de4c5d 189 */
group-onsemi 0:098463de4c5d 190 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
group-onsemi 0:098463de4c5d 191 #define __RBIT __rbit
group-onsemi 0:098463de4c5d 192 #else
group-onsemi 0:098463de4c5d 193 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
group-onsemi 0:098463de4c5d 194 {
group-onsemi 0:098463de4c5d 195 uint32_t result;
group-onsemi 0:098463de4c5d 196 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
group-onsemi 0:098463de4c5d 197
group-onsemi 0:098463de4c5d 198 result = value; // r will be reversed bits of v; first get LSB of v
group-onsemi 0:098463de4c5d 199 for (value >>= 1; value; value >>= 1)
group-onsemi 0:098463de4c5d 200 {
group-onsemi 0:098463de4c5d 201 result <<= 1;
group-onsemi 0:098463de4c5d 202 result |= value & 1;
group-onsemi 0:098463de4c5d 203 s--;
group-onsemi 0:098463de4c5d 204 }
group-onsemi 0:098463de4c5d 205 result <<= s; // shift when v's highest bits are zero
group-onsemi 0:098463de4c5d 206 return(result);
group-onsemi 0:098463de4c5d 207 }
group-onsemi 0:098463de4c5d 208 #endif
group-onsemi 0:098463de4c5d 209
group-onsemi 0:098463de4c5d 210
group-onsemi 0:098463de4c5d 211 /** \brief Count leading zeros
group-onsemi 0:098463de4c5d 212
group-onsemi 0:098463de4c5d 213 This function counts the number of leading zeros of a data value.
group-onsemi 0:098463de4c5d 214
group-onsemi 0:098463de4c5d 215 \param [in] value Value to count the leading zeros
group-onsemi 0:098463de4c5d 216 \return number of leading zeros in value
group-onsemi 0:098463de4c5d 217 */
group-onsemi 0:098463de4c5d 218 #define __CLZ __clz
group-onsemi 0:098463de4c5d 219
group-onsemi 0:098463de4c5d 220
group-onsemi 0:098463de4c5d 221 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
group-onsemi 0:098463de4c5d 222
group-onsemi 0:098463de4c5d 223 /** \brief LDR Exclusive (8 bit)
group-onsemi 0:098463de4c5d 224
group-onsemi 0:098463de4c5d 225 This function executes a exclusive LDR instruction for 8 bit value.
group-onsemi 0:098463de4c5d 226
group-onsemi 0:098463de4c5d 227 \param [in] ptr Pointer to data
group-onsemi 0:098463de4c5d 228 \return value of type uint8_t at (*ptr)
group-onsemi 0:098463de4c5d 229 */
group-onsemi 0:098463de4c5d 230 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
group-onsemi 0:098463de4c5d 231
group-onsemi 0:098463de4c5d 232
group-onsemi 0:098463de4c5d 233 /** \brief LDR Exclusive (16 bit)
group-onsemi 0:098463de4c5d 234
group-onsemi 0:098463de4c5d 235 This function executes a exclusive LDR instruction for 16 bit values.
group-onsemi 0:098463de4c5d 236
group-onsemi 0:098463de4c5d 237 \param [in] ptr Pointer to data
group-onsemi 0:098463de4c5d 238 \return value of type uint16_t at (*ptr)
group-onsemi 0:098463de4c5d 239 */
group-onsemi 0:098463de4c5d 240 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
group-onsemi 0:098463de4c5d 241
group-onsemi 0:098463de4c5d 242
group-onsemi 0:098463de4c5d 243 /** \brief LDR Exclusive (32 bit)
group-onsemi 0:098463de4c5d 244
group-onsemi 0:098463de4c5d 245 This function executes a exclusive LDR instruction for 32 bit values.
group-onsemi 0:098463de4c5d 246
group-onsemi 0:098463de4c5d 247 \param [in] ptr Pointer to data
group-onsemi 0:098463de4c5d 248 \return value of type uint32_t at (*ptr)
group-onsemi 0:098463de4c5d 249 */
group-onsemi 0:098463de4c5d 250 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
group-onsemi 0:098463de4c5d 251
group-onsemi 0:098463de4c5d 252
group-onsemi 0:098463de4c5d 253 /** \brief STR Exclusive (8 bit)
group-onsemi 0:098463de4c5d 254
group-onsemi 0:098463de4c5d 255 This function executes a exclusive STR instruction for 8 bit values.
group-onsemi 0:098463de4c5d 256
group-onsemi 0:098463de4c5d 257 \param [in] value Value to store
group-onsemi 0:098463de4c5d 258 \param [in] ptr Pointer to location
group-onsemi 0:098463de4c5d 259 \return 0 Function succeeded
group-onsemi 0:098463de4c5d 260 \return 1 Function failed
group-onsemi 0:098463de4c5d 261 */
group-onsemi 0:098463de4c5d 262 #define __STREXB(value, ptr) __strex(value, ptr)
group-onsemi 0:098463de4c5d 263
group-onsemi 0:098463de4c5d 264
group-onsemi 0:098463de4c5d 265 /** \brief STR Exclusive (16 bit)
group-onsemi 0:098463de4c5d 266
group-onsemi 0:098463de4c5d 267 This function executes a exclusive STR instruction for 16 bit values.
group-onsemi 0:098463de4c5d 268
group-onsemi 0:098463de4c5d 269 \param [in] value Value to store
group-onsemi 0:098463de4c5d 270 \param [in] ptr Pointer to location
group-onsemi 0:098463de4c5d 271 \return 0 Function succeeded
group-onsemi 0:098463de4c5d 272 \return 1 Function failed
group-onsemi 0:098463de4c5d 273 */
group-onsemi 0:098463de4c5d 274 #define __STREXH(value, ptr) __strex(value, ptr)
group-onsemi 0:098463de4c5d 275
group-onsemi 0:098463de4c5d 276
group-onsemi 0:098463de4c5d 277 /** \brief STR Exclusive (32 bit)
group-onsemi 0:098463de4c5d 278
group-onsemi 0:098463de4c5d 279 This function executes a exclusive STR instruction for 32 bit values.
group-onsemi 0:098463de4c5d 280
group-onsemi 0:098463de4c5d 281 \param [in] value Value to store
group-onsemi 0:098463de4c5d 282 \param [in] ptr Pointer to location
group-onsemi 0:098463de4c5d 283 \return 0 Function succeeded
group-onsemi 0:098463de4c5d 284 \return 1 Function failed
group-onsemi 0:098463de4c5d 285 */
group-onsemi 0:098463de4c5d 286 #define __STREXW(value, ptr) __strex(value, ptr)
group-onsemi 0:098463de4c5d 287
group-onsemi 0:098463de4c5d 288
group-onsemi 0:098463de4c5d 289 /** \brief Remove the exclusive lock
group-onsemi 0:098463de4c5d 290
group-onsemi 0:098463de4c5d 291 This function removes the exclusive lock which is created by LDREX.
group-onsemi 0:098463de4c5d 292
group-onsemi 0:098463de4c5d 293 */
group-onsemi 0:098463de4c5d 294 #define __CLREX __clrex
group-onsemi 0:098463de4c5d 295
group-onsemi 0:098463de4c5d 296
group-onsemi 0:098463de4c5d 297 /** \brief Signed Saturate
group-onsemi 0:098463de4c5d 298
group-onsemi 0:098463de4c5d 299 This function saturates a signed value.
group-onsemi 0:098463de4c5d 300
group-onsemi 0:098463de4c5d 301 \param [in] value Value to be saturated
group-onsemi 0:098463de4c5d 302 \param [in] sat Bit position to saturate to (1..32)
group-onsemi 0:098463de4c5d 303 \return Saturated value
group-onsemi 0:098463de4c5d 304 */
group-onsemi 0:098463de4c5d 305 #define __SSAT __ssat
group-onsemi 0:098463de4c5d 306
group-onsemi 0:098463de4c5d 307
group-onsemi 0:098463de4c5d 308 /** \brief Unsigned Saturate
group-onsemi 0:098463de4c5d 309
group-onsemi 0:098463de4c5d 310 This function saturates an unsigned value.
group-onsemi 0:098463de4c5d 311
group-onsemi 0:098463de4c5d 312 \param [in] value Value to be saturated
group-onsemi 0:098463de4c5d 313 \param [in] sat Bit position to saturate to (0..31)
group-onsemi 0:098463de4c5d 314 \return Saturated value
group-onsemi 0:098463de4c5d 315 */
group-onsemi 0:098463de4c5d 316 #define __USAT __usat
group-onsemi 0:098463de4c5d 317
group-onsemi 0:098463de4c5d 318
group-onsemi 0:098463de4c5d 319 /** \brief Rotate Right with Extend (32 bit)
group-onsemi 0:098463de4c5d 320
group-onsemi 0:098463de4c5d 321 This function moves each bit of a bitstring right by one bit.
group-onsemi 0:098463de4c5d 322 The carry input is shifted in at the left end of the bitstring.
group-onsemi 0:098463de4c5d 323
group-onsemi 0:098463de4c5d 324 \param [in] value Value to rotate
group-onsemi 0:098463de4c5d 325 \return Rotated value
group-onsemi 0:098463de4c5d 326 */
group-onsemi 0:098463de4c5d 327 #ifndef __NO_EMBEDDED_ASM
group-onsemi 0:098463de4c5d 328 __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
group-onsemi 0:098463de4c5d 329 {
group-onsemi 0:098463de4c5d 330 rrx r0, r0
group-onsemi 0:098463de4c5d 331 bx lr
group-onsemi 0:098463de4c5d 332 }
group-onsemi 0:098463de4c5d 333 #endif
group-onsemi 0:098463de4c5d 334
group-onsemi 0:098463de4c5d 335
group-onsemi 0:098463de4c5d 336 /** \brief LDRT Unprivileged (8 bit)
group-onsemi 0:098463de4c5d 337
group-onsemi 0:098463de4c5d 338 This function executes a Unprivileged LDRT instruction for 8 bit value.
group-onsemi 0:098463de4c5d 339
group-onsemi 0:098463de4c5d 340 \param [in] ptr Pointer to data
group-onsemi 0:098463de4c5d 341 \return value of type uint8_t at (*ptr)
group-onsemi 0:098463de4c5d 342 */
group-onsemi 0:098463de4c5d 343 #define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
group-onsemi 0:098463de4c5d 344
group-onsemi 0:098463de4c5d 345
group-onsemi 0:098463de4c5d 346 /** \brief LDRT Unprivileged (16 bit)
group-onsemi 0:098463de4c5d 347
group-onsemi 0:098463de4c5d 348 This function executes a Unprivileged LDRT instruction for 16 bit values.
group-onsemi 0:098463de4c5d 349
group-onsemi 0:098463de4c5d 350 \param [in] ptr Pointer to data
group-onsemi 0:098463de4c5d 351 \return value of type uint16_t at (*ptr)
group-onsemi 0:098463de4c5d 352 */
group-onsemi 0:098463de4c5d 353 #define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
group-onsemi 0:098463de4c5d 354
group-onsemi 0:098463de4c5d 355
group-onsemi 0:098463de4c5d 356 /** \brief LDRT Unprivileged (32 bit)
group-onsemi 0:098463de4c5d 357
group-onsemi 0:098463de4c5d 358 This function executes a Unprivileged LDRT instruction for 32 bit values.
group-onsemi 0:098463de4c5d 359
group-onsemi 0:098463de4c5d 360 \param [in] ptr Pointer to data
group-onsemi 0:098463de4c5d 361 \return value of type uint32_t at (*ptr)
group-onsemi 0:098463de4c5d 362 */
group-onsemi 0:098463de4c5d 363 #define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
group-onsemi 0:098463de4c5d 364
group-onsemi 0:098463de4c5d 365
group-onsemi 0:098463de4c5d 366 /** \brief STRT Unprivileged (8 bit)
group-onsemi 0:098463de4c5d 367
group-onsemi 0:098463de4c5d 368 This function executes a Unprivileged STRT instruction for 8 bit values.
group-onsemi 0:098463de4c5d 369
group-onsemi 0:098463de4c5d 370 \param [in] value Value to store
group-onsemi 0:098463de4c5d 371 \param [in] ptr Pointer to location
group-onsemi 0:098463de4c5d 372 */
group-onsemi 0:098463de4c5d 373 #define __STRBT(value, ptr) __strt(value, ptr)
group-onsemi 0:098463de4c5d 374
group-onsemi 0:098463de4c5d 375
group-onsemi 0:098463de4c5d 376 /** \brief STRT Unprivileged (16 bit)
group-onsemi 0:098463de4c5d 377
group-onsemi 0:098463de4c5d 378 This function executes a Unprivileged STRT instruction for 16 bit values.
group-onsemi 0:098463de4c5d 379
group-onsemi 0:098463de4c5d 380 \param [in] value Value to store
group-onsemi 0:098463de4c5d 381 \param [in] ptr Pointer to location
group-onsemi 0:098463de4c5d 382 */
group-onsemi 0:098463de4c5d 383 #define __STRHT(value, ptr) __strt(value, ptr)
group-onsemi 0:098463de4c5d 384
group-onsemi 0:098463de4c5d 385
group-onsemi 0:098463de4c5d 386 /** \brief STRT Unprivileged (32 bit)
group-onsemi 0:098463de4c5d 387
group-onsemi 0:098463de4c5d 388 This function executes a Unprivileged STRT instruction for 32 bit values.
group-onsemi 0:098463de4c5d 389
group-onsemi 0:098463de4c5d 390 \param [in] value Value to store
group-onsemi 0:098463de4c5d 391 \param [in] ptr Pointer to location
group-onsemi 0:098463de4c5d 392 */
group-onsemi 0:098463de4c5d 393 #define __STRT(value, ptr) __strt(value, ptr)
group-onsemi 0:098463de4c5d 394
group-onsemi 0:098463de4c5d 395 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
group-onsemi 0:098463de4c5d 396
group-onsemi 0:098463de4c5d 397
group-onsemi 0:098463de4c5d 398 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
group-onsemi 0:098463de4c5d 399 /* GNU gcc specific functions */
group-onsemi 0:098463de4c5d 400
group-onsemi 0:098463de4c5d 401 /* Define macros for porting to both thumb1 and thumb2.
group-onsemi 0:098463de4c5d 402 * For thumb1, use low register (r0-r7), specified by constrant "l"
group-onsemi 0:098463de4c5d 403 * Otherwise, use general registers, specified by constrant "r" */
group-onsemi 0:098463de4c5d 404 #if defined (__thumb__) && !defined (__thumb2__)
group-onsemi 0:098463de4c5d 405 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
group-onsemi 0:098463de4c5d 406 #define __CMSIS_GCC_USE_REG(r) "l" (r)
group-onsemi 0:098463de4c5d 407 #else
group-onsemi 0:098463de4c5d 408 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
group-onsemi 0:098463de4c5d 409 #define __CMSIS_GCC_USE_REG(r) "r" (r)
group-onsemi 0:098463de4c5d 410 #endif
group-onsemi 0:098463de4c5d 411
group-onsemi 0:098463de4c5d 412 /** \brief No Operation
group-onsemi 0:098463de4c5d 413
group-onsemi 0:098463de4c5d 414 No Operation does nothing. This instruction can be used for code alignment purposes.
group-onsemi 0:098463de4c5d 415 */
group-onsemi 0:098463de4c5d 416 __attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
group-onsemi 0:098463de4c5d 417 {
group-onsemi 0:098463de4c5d 418 __ASM volatile ("nop");
group-onsemi 0:098463de4c5d 419 }
group-onsemi 0:098463de4c5d 420
group-onsemi 0:098463de4c5d 421
group-onsemi 0:098463de4c5d 422 /** \brief Wait For Interrupt
group-onsemi 0:098463de4c5d 423
group-onsemi 0:098463de4c5d 424 Wait For Interrupt is a hint instruction that suspends execution
group-onsemi 0:098463de4c5d 425 until one of a number of events occurs.
group-onsemi 0:098463de4c5d 426 */
group-onsemi 0:098463de4c5d 427 __attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
group-onsemi 0:098463de4c5d 428 {
group-onsemi 0:098463de4c5d 429 __ASM volatile ("wfi");
group-onsemi 0:098463de4c5d 430 }
group-onsemi 0:098463de4c5d 431
group-onsemi 0:098463de4c5d 432
group-onsemi 0:098463de4c5d 433 /** \brief Wait For Event
group-onsemi 0:098463de4c5d 434
group-onsemi 0:098463de4c5d 435 Wait For Event is a hint instruction that permits the processor to enter
group-onsemi 0:098463de4c5d 436 a low-power state until one of a number of events occurs.
group-onsemi 0:098463de4c5d 437 */
group-onsemi 0:098463de4c5d 438 __attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
group-onsemi 0:098463de4c5d 439 {
group-onsemi 0:098463de4c5d 440 __ASM volatile ("wfe");
group-onsemi 0:098463de4c5d 441 }
group-onsemi 0:098463de4c5d 442
group-onsemi 0:098463de4c5d 443
group-onsemi 0:098463de4c5d 444 /** \brief Send Event
group-onsemi 0:098463de4c5d 445
group-onsemi 0:098463de4c5d 446 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
group-onsemi 0:098463de4c5d 447 */
group-onsemi 0:098463de4c5d 448 __attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
group-onsemi 0:098463de4c5d 449 {
group-onsemi 0:098463de4c5d 450 __ASM volatile ("sev");
group-onsemi 0:098463de4c5d 451 }
group-onsemi 0:098463de4c5d 452
group-onsemi 0:098463de4c5d 453
group-onsemi 0:098463de4c5d 454 /** \brief Instruction Synchronization Barrier
group-onsemi 0:098463de4c5d 455
group-onsemi 0:098463de4c5d 456 Instruction Synchronization Barrier flushes the pipeline in the processor,
group-onsemi 0:098463de4c5d 457 so that all instructions following the ISB are fetched from cache or
group-onsemi 0:098463de4c5d 458 memory, after the instruction has been completed.
group-onsemi 0:098463de4c5d 459 */
group-onsemi 0:098463de4c5d 460 __attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
group-onsemi 0:098463de4c5d 461 {
group-onsemi 0:098463de4c5d 462 __ASM volatile ("isb 0xF":::"memory");
group-onsemi 0:098463de4c5d 463 }
group-onsemi 0:098463de4c5d 464
group-onsemi 0:098463de4c5d 465
group-onsemi 0:098463de4c5d 466 /** \brief Data Synchronization Barrier
group-onsemi 0:098463de4c5d 467
group-onsemi 0:098463de4c5d 468 This function acts as a special kind of Data Memory Barrier.
group-onsemi 0:098463de4c5d 469 It completes when all explicit memory accesses before this instruction complete.
group-onsemi 0:098463de4c5d 470 */
group-onsemi 0:098463de4c5d 471 __attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
group-onsemi 0:098463de4c5d 472 {
group-onsemi 0:098463de4c5d 473 __ASM volatile ("dsb 0xF":::"memory");
group-onsemi 0:098463de4c5d 474 }
group-onsemi 0:098463de4c5d 475
group-onsemi 0:098463de4c5d 476
group-onsemi 0:098463de4c5d 477 /** \brief Data Memory Barrier
group-onsemi 0:098463de4c5d 478
group-onsemi 0:098463de4c5d 479 This function ensures the apparent order of the explicit memory operations before
group-onsemi 0:098463de4c5d 480 and after the instruction, without ensuring their completion.
group-onsemi 0:098463de4c5d 481 */
group-onsemi 0:098463de4c5d 482 __attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
group-onsemi 0:098463de4c5d 483 {
group-onsemi 0:098463de4c5d 484 __ASM volatile ("dmb 0xF":::"memory");
group-onsemi 0:098463de4c5d 485 }
group-onsemi 0:098463de4c5d 486
group-onsemi 0:098463de4c5d 487
group-onsemi 0:098463de4c5d 488 /** \brief Reverse byte order (32 bit)
group-onsemi 0:098463de4c5d 489
group-onsemi 0:098463de4c5d 490 This function reverses the byte order in integer value.
group-onsemi 0:098463de4c5d 491
group-onsemi 0:098463de4c5d 492 \param [in] value Value to reverse
group-onsemi 0:098463de4c5d 493 \return Reversed value
group-onsemi 0:098463de4c5d 494 */
group-onsemi 0:098463de4c5d 495 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
group-onsemi 0:098463de4c5d 496 {
group-onsemi 0:098463de4c5d 497 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
group-onsemi 0:098463de4c5d 498 return __builtin_bswap32(value);
group-onsemi 0:098463de4c5d 499 #else
group-onsemi 0:098463de4c5d 500 uint32_t result;
group-onsemi 0:098463de4c5d 501
group-onsemi 0:098463de4c5d 502 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
group-onsemi 0:098463de4c5d 503 return(result);
group-onsemi 0:098463de4c5d 504 #endif
group-onsemi 0:098463de4c5d 505 }
group-onsemi 0:098463de4c5d 506
group-onsemi 0:098463de4c5d 507
group-onsemi 0:098463de4c5d 508 /** \brief Reverse byte order (16 bit)
group-onsemi 0:098463de4c5d 509
group-onsemi 0:098463de4c5d 510 This function reverses the byte order in two unsigned short values.
group-onsemi 0:098463de4c5d 511
group-onsemi 0:098463de4c5d 512 \param [in] value Value to reverse
group-onsemi 0:098463de4c5d 513 \return Reversed value
group-onsemi 0:098463de4c5d 514 */
group-onsemi 0:098463de4c5d 515 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
group-onsemi 0:098463de4c5d 516 {
group-onsemi 0:098463de4c5d 517 uint32_t result;
group-onsemi 0:098463de4c5d 518
group-onsemi 0:098463de4c5d 519 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
group-onsemi 0:098463de4c5d 520 return(result);
group-onsemi 0:098463de4c5d 521 }
group-onsemi 0:098463de4c5d 522
group-onsemi 0:098463de4c5d 523
group-onsemi 0:098463de4c5d 524 /** \brief Reverse byte order in signed short value
group-onsemi 0:098463de4c5d 525
group-onsemi 0:098463de4c5d 526 This function reverses the byte order in a signed short value with sign extension to integer.
group-onsemi 0:098463de4c5d 527
group-onsemi 0:098463de4c5d 528 \param [in] value Value to reverse
group-onsemi 0:098463de4c5d 529 \return Reversed value
group-onsemi 0:098463de4c5d 530 */
group-onsemi 0:098463de4c5d 531 __attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
group-onsemi 0:098463de4c5d 532 {
group-onsemi 0:098463de4c5d 533 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
group-onsemi 0:098463de4c5d 534 return (short)__builtin_bswap16(value);
group-onsemi 0:098463de4c5d 535 #else
group-onsemi 0:098463de4c5d 536 uint32_t result;
group-onsemi 0:098463de4c5d 537
group-onsemi 0:098463de4c5d 538 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
group-onsemi 0:098463de4c5d 539 return(result);
group-onsemi 0:098463de4c5d 540 #endif
group-onsemi 0:098463de4c5d 541 }
group-onsemi 0:098463de4c5d 542
group-onsemi 0:098463de4c5d 543
group-onsemi 0:098463de4c5d 544 /** \brief Rotate Right in unsigned value (32 bit)
group-onsemi 0:098463de4c5d 545
group-onsemi 0:098463de4c5d 546 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
group-onsemi 0:098463de4c5d 547
group-onsemi 0:098463de4c5d 548 \param [in] value Value to rotate
group-onsemi 0:098463de4c5d 549 \param [in] value Number of Bits to rotate
group-onsemi 0:098463de4c5d 550 \return Rotated value
group-onsemi 0:098463de4c5d 551 */
group-onsemi 0:098463de4c5d 552 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
group-onsemi 0:098463de4c5d 553 {
group-onsemi 0:098463de4c5d 554 return (op1 >> op2) | (op1 << (32 - op2));
group-onsemi 0:098463de4c5d 555 }
group-onsemi 0:098463de4c5d 556
group-onsemi 0:098463de4c5d 557
group-onsemi 0:098463de4c5d 558 /** \brief Breakpoint
group-onsemi 0:098463de4c5d 559
group-onsemi 0:098463de4c5d 560 This function causes the processor to enter Debug state.
group-onsemi 0:098463de4c5d 561 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
group-onsemi 0:098463de4c5d 562
group-onsemi 0:098463de4c5d 563 \param [in] value is ignored by the processor.
group-onsemi 0:098463de4c5d 564 If required, a debugger can use it to store additional information about the breakpoint.
group-onsemi 0:098463de4c5d 565 */
group-onsemi 0:098463de4c5d 566 #define __BKPT(value) __ASM volatile ("bkpt "#value)
group-onsemi 0:098463de4c5d 567
group-onsemi 0:098463de4c5d 568
group-onsemi 0:098463de4c5d 569 /** \brief Reverse bit order of value
group-onsemi 0:098463de4c5d 570
group-onsemi 0:098463de4c5d 571 This function reverses the bit order of the given value.
group-onsemi 0:098463de4c5d 572
group-onsemi 0:098463de4c5d 573 \param [in] value Value to reverse
group-onsemi 0:098463de4c5d 574 \return Reversed value
group-onsemi 0:098463de4c5d 575 */
group-onsemi 0:098463de4c5d 576 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
group-onsemi 0:098463de4c5d 577 {
group-onsemi 0:098463de4c5d 578 uint32_t result;
group-onsemi 0:098463de4c5d 579
group-onsemi 0:098463de4c5d 580 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
group-onsemi 0:098463de4c5d 581 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
group-onsemi 0:098463de4c5d 582 #else
group-onsemi 0:098463de4c5d 583 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
group-onsemi 0:098463de4c5d 584
group-onsemi 0:098463de4c5d 585 result = value; // r will be reversed bits of v; first get LSB of v
group-onsemi 0:098463de4c5d 586 for (value >>= 1; value; value >>= 1)
group-onsemi 0:098463de4c5d 587 {
group-onsemi 0:098463de4c5d 588 result <<= 1;
group-onsemi 0:098463de4c5d 589 result |= value & 1;
group-onsemi 0:098463de4c5d 590 s--;
group-onsemi 0:098463de4c5d 591 }
group-onsemi 0:098463de4c5d 592 result <<= s; // shift when v's highest bits are zero
group-onsemi 0:098463de4c5d 593 #endif
group-onsemi 0:098463de4c5d 594 return(result);
group-onsemi 0:098463de4c5d 595 }
group-onsemi 0:098463de4c5d 596
group-onsemi 0:098463de4c5d 597
group-onsemi 0:098463de4c5d 598 /** \brief Count leading zeros
group-onsemi 0:098463de4c5d 599
group-onsemi 0:098463de4c5d 600 This function counts the number of leading zeros of a data value.
group-onsemi 0:098463de4c5d 601
group-onsemi 0:098463de4c5d 602 \param [in] value Value to count the leading zeros
group-onsemi 0:098463de4c5d 603 \return number of leading zeros in value
group-onsemi 0:098463de4c5d 604 */
group-onsemi 0:098463de4c5d 605 #define __CLZ __builtin_clz
group-onsemi 0:098463de4c5d 606
group-onsemi 0:098463de4c5d 607
group-onsemi 0:098463de4c5d 608 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
group-onsemi 0:098463de4c5d 609
group-onsemi 0:098463de4c5d 610 /** \brief LDR Exclusive (8 bit)
group-onsemi 0:098463de4c5d 611
group-onsemi 0:098463de4c5d 612 This function executes a exclusive LDR instruction for 8 bit value.
group-onsemi 0:098463de4c5d 613
group-onsemi 0:098463de4c5d 614 \param [in] ptr Pointer to data
group-onsemi 0:098463de4c5d 615 \return value of type uint8_t at (*ptr)
group-onsemi 0:098463de4c5d 616 */
group-onsemi 0:098463de4c5d 617 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
group-onsemi 0:098463de4c5d 618 {
group-onsemi 0:098463de4c5d 619 uint32_t result;
group-onsemi 0:098463de4c5d 620
group-onsemi 0:098463de4c5d 621 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
group-onsemi 0:098463de4c5d 622 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
group-onsemi 0:098463de4c5d 623 #else
group-onsemi 0:098463de4c5d 624 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
group-onsemi 0:098463de4c5d 625 accepted by assembler. So has to use following less efficient pattern.
group-onsemi 0:098463de4c5d 626 */
group-onsemi 0:098463de4c5d 627 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
group-onsemi 0:098463de4c5d 628 #endif
group-onsemi 0:098463de4c5d 629 return ((uint8_t) result); /* Add explicit type cast here */
group-onsemi 0:098463de4c5d 630 }
group-onsemi 0:098463de4c5d 631
group-onsemi 0:098463de4c5d 632
group-onsemi 0:098463de4c5d 633 /** \brief LDR Exclusive (16 bit)
group-onsemi 0:098463de4c5d 634
group-onsemi 0:098463de4c5d 635 This function executes a exclusive LDR instruction for 16 bit values.
group-onsemi 0:098463de4c5d 636
group-onsemi 0:098463de4c5d 637 \param [in] ptr Pointer to data
group-onsemi 0:098463de4c5d 638 \return value of type uint16_t at (*ptr)
group-onsemi 0:098463de4c5d 639 */
group-onsemi 0:098463de4c5d 640 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
group-onsemi 0:098463de4c5d 641 {
group-onsemi 0:098463de4c5d 642 uint32_t result;
group-onsemi 0:098463de4c5d 643
group-onsemi 0:098463de4c5d 644 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
group-onsemi 0:098463de4c5d 645 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
group-onsemi 0:098463de4c5d 646 #else
group-onsemi 0:098463de4c5d 647 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
group-onsemi 0:098463de4c5d 648 accepted by assembler. So has to use following less efficient pattern.
group-onsemi 0:098463de4c5d 649 */
group-onsemi 0:098463de4c5d 650 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
group-onsemi 0:098463de4c5d 651 #endif
group-onsemi 0:098463de4c5d 652 return ((uint16_t) result); /* Add explicit type cast here */
group-onsemi 0:098463de4c5d 653 }
group-onsemi 0:098463de4c5d 654
group-onsemi 0:098463de4c5d 655
group-onsemi 0:098463de4c5d 656 /** \brief LDR Exclusive (32 bit)
group-onsemi 0:098463de4c5d 657
group-onsemi 0:098463de4c5d 658 This function executes a exclusive LDR instruction for 32 bit values.
group-onsemi 0:098463de4c5d 659
group-onsemi 0:098463de4c5d 660 \param [in] ptr Pointer to data
group-onsemi 0:098463de4c5d 661 \return value of type uint32_t at (*ptr)
group-onsemi 0:098463de4c5d 662 */
group-onsemi 0:098463de4c5d 663 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
group-onsemi 0:098463de4c5d 664 {
group-onsemi 0:098463de4c5d 665 uint32_t result;
group-onsemi 0:098463de4c5d 666
group-onsemi 0:098463de4c5d 667 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
group-onsemi 0:098463de4c5d 668 return(result);
group-onsemi 0:098463de4c5d 669 }
group-onsemi 0:098463de4c5d 670
group-onsemi 0:098463de4c5d 671
group-onsemi 0:098463de4c5d 672 /** \brief STR Exclusive (8 bit)
group-onsemi 0:098463de4c5d 673
group-onsemi 0:098463de4c5d 674 This function executes a exclusive STR instruction for 8 bit values.
group-onsemi 0:098463de4c5d 675
group-onsemi 0:098463de4c5d 676 \param [in] value Value to store
group-onsemi 0:098463de4c5d 677 \param [in] ptr Pointer to location
group-onsemi 0:098463de4c5d 678 \return 0 Function succeeded
group-onsemi 0:098463de4c5d 679 \return 1 Function failed
group-onsemi 0:098463de4c5d 680 */
group-onsemi 0:098463de4c5d 681 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
group-onsemi 0:098463de4c5d 682 {
group-onsemi 0:098463de4c5d 683 uint32_t result;
group-onsemi 0:098463de4c5d 684
group-onsemi 0:098463de4c5d 685 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
group-onsemi 0:098463de4c5d 686 return(result);
group-onsemi 0:098463de4c5d 687 }
group-onsemi 0:098463de4c5d 688
group-onsemi 0:098463de4c5d 689
group-onsemi 0:098463de4c5d 690 /** \brief STR Exclusive (16 bit)
group-onsemi 0:098463de4c5d 691
group-onsemi 0:098463de4c5d 692 This function executes a exclusive STR instruction for 16 bit values.
group-onsemi 0:098463de4c5d 693
group-onsemi 0:098463de4c5d 694 \param [in] value Value to store
group-onsemi 0:098463de4c5d 695 \param [in] ptr Pointer to location
group-onsemi 0:098463de4c5d 696 \return 0 Function succeeded
group-onsemi 0:098463de4c5d 697 \return 1 Function failed
group-onsemi 0:098463de4c5d 698 */
group-onsemi 0:098463de4c5d 699 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
group-onsemi 0:098463de4c5d 700 {
group-onsemi 0:098463de4c5d 701 uint32_t result;
group-onsemi 0:098463de4c5d 702
group-onsemi 0:098463de4c5d 703 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
group-onsemi 0:098463de4c5d 704 return(result);
group-onsemi 0:098463de4c5d 705 }
group-onsemi 0:098463de4c5d 706
group-onsemi 0:098463de4c5d 707
group-onsemi 0:098463de4c5d 708 /** \brief STR Exclusive (32 bit)
group-onsemi 0:098463de4c5d 709
group-onsemi 0:098463de4c5d 710 This function executes a exclusive STR instruction for 32 bit values.
group-onsemi 0:098463de4c5d 711
group-onsemi 0:098463de4c5d 712 \param [in] value Value to store
group-onsemi 0:098463de4c5d 713 \param [in] ptr Pointer to location
group-onsemi 0:098463de4c5d 714 \return 0 Function succeeded
group-onsemi 0:098463de4c5d 715 \return 1 Function failed
group-onsemi 0:098463de4c5d 716 */
group-onsemi 0:098463de4c5d 717 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
group-onsemi 0:098463de4c5d 718 {
group-onsemi 0:098463de4c5d 719 uint32_t result;
group-onsemi 0:098463de4c5d 720
group-onsemi 0:098463de4c5d 721 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
group-onsemi 0:098463de4c5d 722 return(result);
group-onsemi 0:098463de4c5d 723 }
group-onsemi 0:098463de4c5d 724
group-onsemi 0:098463de4c5d 725
group-onsemi 0:098463de4c5d 726 /** \brief Remove the exclusive lock
group-onsemi 0:098463de4c5d 727
group-onsemi 0:098463de4c5d 728 This function removes the exclusive lock which is created by LDREX.
group-onsemi 0:098463de4c5d 729
group-onsemi 0:098463de4c5d 730 */
group-onsemi 0:098463de4c5d 731 __attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
group-onsemi 0:098463de4c5d 732 {
group-onsemi 0:098463de4c5d 733 __ASM volatile ("clrex" ::: "memory");
group-onsemi 0:098463de4c5d 734 }
group-onsemi 0:098463de4c5d 735
group-onsemi 0:098463de4c5d 736
group-onsemi 0:098463de4c5d 737 /** \brief Signed Saturate
group-onsemi 0:098463de4c5d 738
group-onsemi 0:098463de4c5d 739 This function saturates a signed value.
group-onsemi 0:098463de4c5d 740
group-onsemi 0:098463de4c5d 741 \param [in] value Value to be saturated
group-onsemi 0:098463de4c5d 742 \param [in] sat Bit position to saturate to (1..32)
group-onsemi 0:098463de4c5d 743 \return Saturated value
group-onsemi 0:098463de4c5d 744 */
group-onsemi 0:098463de4c5d 745 #define __SSAT(ARG1,ARG2) \
group-onsemi 0:098463de4c5d 746 ({ \
group-onsemi 0:098463de4c5d 747 uint32_t __RES, __ARG1 = (ARG1); \
group-onsemi 0:098463de4c5d 748 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
group-onsemi 0:098463de4c5d 749 __RES; \
group-onsemi 0:098463de4c5d 750 })
group-onsemi 0:098463de4c5d 751
group-onsemi 0:098463de4c5d 752
group-onsemi 0:098463de4c5d 753 /** \brief Unsigned Saturate
group-onsemi 0:098463de4c5d 754
group-onsemi 0:098463de4c5d 755 This function saturates an unsigned value.
group-onsemi 0:098463de4c5d 756
group-onsemi 0:098463de4c5d 757 \param [in] value Value to be saturated
group-onsemi 0:098463de4c5d 758 \param [in] sat Bit position to saturate to (0..31)
group-onsemi 0:098463de4c5d 759 \return Saturated value
group-onsemi 0:098463de4c5d 760 */
group-onsemi 0:098463de4c5d 761 #define __USAT(ARG1,ARG2) \
group-onsemi 0:098463de4c5d 762 ({ \
group-onsemi 0:098463de4c5d 763 uint32_t __RES, __ARG1 = (ARG1); \
group-onsemi 0:098463de4c5d 764 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
group-onsemi 0:098463de4c5d 765 __RES; \
group-onsemi 0:098463de4c5d 766 })
group-onsemi 0:098463de4c5d 767
group-onsemi 0:098463de4c5d 768
group-onsemi 0:098463de4c5d 769 /** \brief Rotate Right with Extend (32 bit)
group-onsemi 0:098463de4c5d 770
group-onsemi 0:098463de4c5d 771 This function moves each bit of a bitstring right by one bit.
group-onsemi 0:098463de4c5d 772 The carry input is shifted in at the left end of the bitstring.
group-onsemi 0:098463de4c5d 773
group-onsemi 0:098463de4c5d 774 \param [in] value Value to rotate
group-onsemi 0:098463de4c5d 775 \return Rotated value
group-onsemi 0:098463de4c5d 776 */
group-onsemi 0:098463de4c5d 777 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
group-onsemi 0:098463de4c5d 778 {
group-onsemi 0:098463de4c5d 779 uint32_t result;
group-onsemi 0:098463de4c5d 780
group-onsemi 0:098463de4c5d 781 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
group-onsemi 0:098463de4c5d 782 return(result);
group-onsemi 0:098463de4c5d 783 }
group-onsemi 0:098463de4c5d 784
group-onsemi 0:098463de4c5d 785
group-onsemi 0:098463de4c5d 786 /** \brief LDRT Unprivileged (8 bit)
group-onsemi 0:098463de4c5d 787
group-onsemi 0:098463de4c5d 788 This function executes a Unprivileged LDRT instruction for 8 bit value.
group-onsemi 0:098463de4c5d 789
group-onsemi 0:098463de4c5d 790 \param [in] ptr Pointer to data
group-onsemi 0:098463de4c5d 791 \return value of type uint8_t at (*ptr)
group-onsemi 0:098463de4c5d 792 */
group-onsemi 0:098463de4c5d 793 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
group-onsemi 0:098463de4c5d 794 {
group-onsemi 0:098463de4c5d 795 uint32_t result;
group-onsemi 0:098463de4c5d 796
group-onsemi 0:098463de4c5d 797 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
group-onsemi 0:098463de4c5d 798 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) );
group-onsemi 0:098463de4c5d 799 #else
group-onsemi 0:098463de4c5d 800 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
group-onsemi 0:098463de4c5d 801 accepted by assembler. So has to use following less efficient pattern.
group-onsemi 0:098463de4c5d 802 */
group-onsemi 0:098463de4c5d 803 __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
group-onsemi 0:098463de4c5d 804 #endif
group-onsemi 0:098463de4c5d 805 return ((uint8_t) result); /* Add explicit type cast here */
group-onsemi 0:098463de4c5d 806 }
group-onsemi 0:098463de4c5d 807
group-onsemi 0:098463de4c5d 808
group-onsemi 0:098463de4c5d 809 /** \brief LDRT Unprivileged (16 bit)
group-onsemi 0:098463de4c5d 810
group-onsemi 0:098463de4c5d 811 This function executes a Unprivileged LDRT instruction for 16 bit values.
group-onsemi 0:098463de4c5d 812
group-onsemi 0:098463de4c5d 813 \param [in] ptr Pointer to data
group-onsemi 0:098463de4c5d 814 \return value of type uint16_t at (*ptr)
group-onsemi 0:098463de4c5d 815 */
group-onsemi 0:098463de4c5d 816 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
group-onsemi 0:098463de4c5d 817 {
group-onsemi 0:098463de4c5d 818 uint32_t result;
group-onsemi 0:098463de4c5d 819
group-onsemi 0:098463de4c5d 820 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
group-onsemi 0:098463de4c5d 821 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) );
group-onsemi 0:098463de4c5d 822 #else
group-onsemi 0:098463de4c5d 823 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
group-onsemi 0:098463de4c5d 824 accepted by assembler. So has to use following less efficient pattern.
group-onsemi 0:098463de4c5d 825 */
group-onsemi 0:098463de4c5d 826 __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
group-onsemi 0:098463de4c5d 827 #endif
group-onsemi 0:098463de4c5d 828 return ((uint16_t) result); /* Add explicit type cast here */
group-onsemi 0:098463de4c5d 829 }
group-onsemi 0:098463de4c5d 830
group-onsemi 0:098463de4c5d 831
group-onsemi 0:098463de4c5d 832 /** \brief LDRT Unprivileged (32 bit)
group-onsemi 0:098463de4c5d 833
group-onsemi 0:098463de4c5d 834 This function executes a Unprivileged LDRT instruction for 32 bit values.
group-onsemi 0:098463de4c5d 835
group-onsemi 0:098463de4c5d 836 \param [in] ptr Pointer to data
group-onsemi 0:098463de4c5d 837 \return value of type uint32_t at (*ptr)
group-onsemi 0:098463de4c5d 838 */
group-onsemi 0:098463de4c5d 839 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr)
group-onsemi 0:098463de4c5d 840 {
group-onsemi 0:098463de4c5d 841 uint32_t result;
group-onsemi 0:098463de4c5d 842
group-onsemi 0:098463de4c5d 843 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) );
group-onsemi 0:098463de4c5d 844 return(result);
group-onsemi 0:098463de4c5d 845 }
group-onsemi 0:098463de4c5d 846
group-onsemi 0:098463de4c5d 847
group-onsemi 0:098463de4c5d 848 /** \brief STRT Unprivileged (8 bit)
group-onsemi 0:098463de4c5d 849
group-onsemi 0:098463de4c5d 850 This function executes a Unprivileged STRT instruction for 8 bit values.
group-onsemi 0:098463de4c5d 851
group-onsemi 0:098463de4c5d 852 \param [in] value Value to store
group-onsemi 0:098463de4c5d 853 \param [in] ptr Pointer to location
group-onsemi 0:098463de4c5d 854 */
group-onsemi 0:098463de4c5d 855 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
group-onsemi 0:098463de4c5d 856 {
group-onsemi 0:098463de4c5d 857 __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
group-onsemi 0:098463de4c5d 858 }
group-onsemi 0:098463de4c5d 859
group-onsemi 0:098463de4c5d 860
group-onsemi 0:098463de4c5d 861 /** \brief STRT Unprivileged (16 bit)
group-onsemi 0:098463de4c5d 862
group-onsemi 0:098463de4c5d 863 This function executes a Unprivileged STRT instruction for 16 bit values.
group-onsemi 0:098463de4c5d 864
group-onsemi 0:098463de4c5d 865 \param [in] value Value to store
group-onsemi 0:098463de4c5d 866 \param [in] ptr Pointer to location
group-onsemi 0:098463de4c5d 867 */
group-onsemi 0:098463de4c5d 868 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
group-onsemi 0:098463de4c5d 869 {
group-onsemi 0:098463de4c5d 870 __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
group-onsemi 0:098463de4c5d 871 }
group-onsemi 0:098463de4c5d 872
group-onsemi 0:098463de4c5d 873
group-onsemi 0:098463de4c5d 874 /** \brief STRT Unprivileged (32 bit)
group-onsemi 0:098463de4c5d 875
group-onsemi 0:098463de4c5d 876 This function executes a Unprivileged STRT instruction for 32 bit values.
group-onsemi 0:098463de4c5d 877
group-onsemi 0:098463de4c5d 878 \param [in] value Value to store
group-onsemi 0:098463de4c5d 879 \param [in] ptr Pointer to location
group-onsemi 0:098463de4c5d 880 */
group-onsemi 0:098463de4c5d 881 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
group-onsemi 0:098463de4c5d 882 {
group-onsemi 0:098463de4c5d 883 __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) );
group-onsemi 0:098463de4c5d 884 }
group-onsemi 0:098463de4c5d 885
group-onsemi 0:098463de4c5d 886 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
group-onsemi 0:098463de4c5d 887
group-onsemi 0:098463de4c5d 888
group-onsemi 0:098463de4c5d 889 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
group-onsemi 0:098463de4c5d 890 /* IAR iccarm specific functions */
group-onsemi 0:098463de4c5d 891 #include <cmsis_iar.h>
group-onsemi 0:098463de4c5d 892
group-onsemi 0:098463de4c5d 893
group-onsemi 0:098463de4c5d 894 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
group-onsemi 0:098463de4c5d 895 /* TI CCS specific functions */
group-onsemi 0:098463de4c5d 896 #include <cmsis_ccs.h>
group-onsemi 0:098463de4c5d 897
group-onsemi 0:098463de4c5d 898
group-onsemi 0:098463de4c5d 899 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
group-onsemi 0:098463de4c5d 900 /* TASKING carm specific functions */
group-onsemi 0:098463de4c5d 901 /*
group-onsemi 0:098463de4c5d 902 * The CMSIS functions have been implemented as intrinsics in the compiler.
group-onsemi 0:098463de4c5d 903 * Please use "carm -?i" to get an up to date list of all intrinsics,
group-onsemi 0:098463de4c5d 904 * Including the CMSIS ones.
group-onsemi 0:098463de4c5d 905 */
group-onsemi 0:098463de4c5d 906
group-onsemi 0:098463de4c5d 907
group-onsemi 0:098463de4c5d 908 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
group-onsemi 0:098463de4c5d 909 /* Cosmic specific functions */
group-onsemi 0:098463de4c5d 910 #include <cmsis_csm.h>
group-onsemi 0:098463de4c5d 911
group-onsemi 0:098463de4c5d 912 #endif
group-onsemi 0:098463de4c5d 913
group-onsemi 0:098463de4c5d 914 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
group-onsemi 0:098463de4c5d 915
group-onsemi 0:098463de4c5d 916 #endif /* __CORE_CMINSTR_H */