ON Semiconductor / mbed-os

5.2.1 - Updated I2C files

Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_RENESAS/TARGET_RZ_A1H/PeripheralNames.h@1:f30bdcd2b33b, 2017-02-27 (annotated)

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d 
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* mbed Microcontroller Library
group-onsemi 0:098463de4c5d 2 * Copyright (c) 2006-2013 ARM Limited
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Licensed under the Apache License, Version 2.0 (the "License");
group-onsemi 0:098463de4c5d 5 * you may not use this file except in compliance with the License.
group-onsemi 0:098463de4c5d 6 * You may obtain a copy of the License at
group-onsemi 0:098463de4c5d 7 *
group-onsemi 0:098463de4c5d 8 * http://www.apache.org/licenses/LICENSE-2.0
group-onsemi 0:098463de4c5d 9 *
group-onsemi 0:098463de4c5d 10 * Unless required by applicable law or agreed to in writing, software
group-onsemi 0:098463de4c5d 11 * distributed under the License is distributed on an "AS IS" BASIS,
group-onsemi 0:098463de4c5d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
group-onsemi 0:098463de4c5d 13 * See the License for the specific language governing permissions and
group-onsemi 0:098463de4c5d 14 * limitations under the License.
group-onsemi 0:098463de4c5d 15 */
group-onsemi 0:098463de4c5d 16 #ifndef MBED_PERIPHERALNAMES_H
group-onsemi 0:098463de4c5d 17 #define MBED_PERIPHERALNAMES_H
group-onsemi 0:098463de4c5d 18
group-onsemi 0:098463de4c5d 19 #include "cmsis.h"
group-onsemi 0:098463de4c5d 20 #include "PinNames.h"
group-onsemi 0:098463de4c5d 21
group-onsemi 0:098463de4c5d 22 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 23 extern "C" {
group-onsemi 0:098463de4c5d 24 #endif
group-onsemi 0:098463de4c5d 25
group-onsemi 0:098463de4c5d 26 typedef enum {
group-onsemi 0:098463de4c5d 27 UART0,
group-onsemi 0:098463de4c5d 28 UART1,
group-onsemi 0:098463de4c5d 29 UART2,
group-onsemi 0:098463de4c5d 30 UART3,
group-onsemi 0:098463de4c5d 31 UART4,
group-onsemi 0:098463de4c5d 32 UART5,
group-onsemi 0:098463de4c5d 33 UART6,
group-onsemi 0:098463de4c5d 34 UART7,
group-onsemi 0:098463de4c5d 35 } UARTName;
group-onsemi 0:098463de4c5d 36
group-onsemi 0:098463de4c5d 37 // PWMType & 1 == 1 then have to use PWDTR[12] == 1
group-onsemi 0:098463de4c5d 38 typedef enum {
group-onsemi 0:098463de4c5d 39 PWM1A = 0,
group-onsemi 0:098463de4c5d 40 PWM1B,
group-onsemi 0:098463de4c5d 41 PWM1C,
group-onsemi 0:098463de4c5d 42 PWM1D,
group-onsemi 0:098463de4c5d 43 PWM1E,
group-onsemi 0:098463de4c5d 44 PWM1F,
group-onsemi 0:098463de4c5d 45 PWM1G,
group-onsemi 0:098463de4c5d 46 PWM1H,
group-onsemi 0:098463de4c5d 47 PWM2A = 0x10,
group-onsemi 0:098463de4c5d 48 PWM2B,
group-onsemi 0:098463de4c5d 49 PWM2C,
group-onsemi 0:098463de4c5d 50 PWM2D,
group-onsemi 0:098463de4c5d 51 PWM2E,
group-onsemi 0:098463de4c5d 52 PWM2F,
group-onsemi 0:098463de4c5d 53 PWM2G,
group-onsemi 0:098463de4c5d 54 PWM2H,
group-onsemi 0:098463de4c5d 55 } PWMType;
group-onsemi 0:098463de4c5d 56
group-onsemi 0:098463de4c5d 57 typedef enum {
group-onsemi 0:098463de4c5d 58 TIOC0A = 0,
group-onsemi 0:098463de4c5d 59 TIOC0B,
group-onsemi 0:098463de4c5d 60 TIOC0C,
group-onsemi 0:098463de4c5d 61 TIOC0D,
group-onsemi 0:098463de4c5d 62 TIOC1A = 0x10,
group-onsemi 0:098463de4c5d 63 TIOC1B,
group-onsemi 0:098463de4c5d 64 TIOC2A = 0x20,
group-onsemi 0:098463de4c5d 65 TIOC2B,
group-onsemi 0:098463de4c5d 66 TIOC3A = 0x30,
group-onsemi 0:098463de4c5d 67 TIOC3B,
group-onsemi 0:098463de4c5d 68 TIOC3C,
group-onsemi 0:098463de4c5d 69 TIOC3D,
group-onsemi 0:098463de4c5d 70 TIOC4A = 0x40,
group-onsemi 0:098463de4c5d 71 TIOC4B,
group-onsemi 0:098463de4c5d 72 TIOC4C,
group-onsemi 0:098463de4c5d 73 TIOC4D,
group-onsemi 0:098463de4c5d 74 } MTU2_PWMType;
group-onsemi 0:098463de4c5d 75
group-onsemi 0:098463de4c5d 76 typedef enum {
group-onsemi 0:098463de4c5d 77 PWM0_PIN = 0,
group-onsemi 0:098463de4c5d 78 PWM1_PIN,
group-onsemi 0:098463de4c5d 79 PWM2_PIN,
group-onsemi 0:098463de4c5d 80 PWM3_PIN,
group-onsemi 0:098463de4c5d 81 PWM4_PIN,
group-onsemi 0:098463de4c5d 82 PWM5_PIN,
group-onsemi 0:098463de4c5d 83 PWM6_PIN,
group-onsemi 0:098463de4c5d 84 PWM7_PIN,
group-onsemi 0:098463de4c5d 85 PWM8_PIN,
group-onsemi 0:098463de4c5d 86 PWM9_PIN,
group-onsemi 0:098463de4c5d 87 PWM10_PIN,
group-onsemi 0:098463de4c5d 88 PWM11_PIN,
group-onsemi 0:098463de4c5d 89 PWM12_PIN,
group-onsemi 0:098463de4c5d 90 PWM13_PIN,
group-onsemi 0:098463de4c5d 91 MTU2_PWM0_PIN = 0x20,
group-onsemi 0:098463de4c5d 92 MTU2_PWM1_PIN,
group-onsemi 0:098463de4c5d 93 MTU2_PWM2_PIN,
group-onsemi 0:098463de4c5d 94 MTU2_PWM3_PIN,
group-onsemi 0:098463de4c5d 95 MTU2_PWM4_PIN,
group-onsemi 0:098463de4c5d 96 MTU2_PWM5_PIN,
group-onsemi 0:098463de4c5d 97 MTU2_PWM6_PIN,
group-onsemi 0:098463de4c5d 98 MTU2_PWM7_PIN,
group-onsemi 0:098463de4c5d 99 MTU2_PWM8_PIN,
group-onsemi 0:098463de4c5d 100 MTU2_PWM9_PIN,
group-onsemi 0:098463de4c5d 101 MTU2_PWM10_PIN,
group-onsemi 0:098463de4c5d 102 MTU2_PWM11_PIN,
group-onsemi 0:098463de4c5d 103 MTU2_PWM12_PIN,
group-onsemi 0:098463de4c5d 104 MTU2_PWM13_PIN,
group-onsemi 0:098463de4c5d 105 MTU2_PWM14_PIN,
group-onsemi 0:098463de4c5d 106 MTU2_PWM15_PIN,
group-onsemi 0:098463de4c5d 107 MTU2_PWM16_PIN,
group-onsemi 0:098463de4c5d 108 MTU2_PWM17_PIN,
group-onsemi 0:098463de4c5d 109 MTU2_PWM18_PIN,
group-onsemi 0:098463de4c5d 110 MTU2_PWM19_PIN,
group-onsemi 0:098463de4c5d 111 MTU2_PWM20_PIN,
group-onsemi 0:098463de4c5d 112 MTU2_PWM21_PIN,
group-onsemi 0:098463de4c5d 113 } PWMName;
group-onsemi 0:098463de4c5d 114
group-onsemi 0:098463de4c5d 115 typedef enum {
group-onsemi 0:098463de4c5d 116 AN0= 0,
group-onsemi 0:098463de4c5d 117 AN1= 1,
group-onsemi 0:098463de4c5d 118 AN2= 2,
group-onsemi 0:098463de4c5d 119 AN3= 3,
group-onsemi 0:098463de4c5d 120 AN4= 4,
group-onsemi 0:098463de4c5d 121 AN5= 5,
group-onsemi 0:098463de4c5d 122 AN6= 6,
group-onsemi 0:098463de4c5d 123 AN7= 7,
group-onsemi 0:098463de4c5d 124 } ADCName;
group-onsemi 0:098463de4c5d 125
group-onsemi 0:098463de4c5d 126 typedef enum {
group-onsemi 0:098463de4c5d 127 SPI_0 = 0,
group-onsemi 0:098463de4c5d 128 SPI_1,
group-onsemi 0:098463de4c5d 129 SPI_2,
group-onsemi 0:098463de4c5d 130 SPI_3,
group-onsemi 0:098463de4c5d 131 } SPIName;
group-onsemi 0:098463de4c5d 132
group-onsemi 0:098463de4c5d 133 typedef enum {
group-onsemi 0:098463de4c5d 134 I2C_0 = 0,
group-onsemi 0:098463de4c5d 135 I2C_1,
group-onsemi 0:098463de4c5d 136 I2C_2,
group-onsemi 0:098463de4c5d 137 I2C_3
group-onsemi 0:098463de4c5d 138 } I2CName;
group-onsemi 0:098463de4c5d 139
group-onsemi 0:098463de4c5d 140 typedef enum {
group-onsemi 0:098463de4c5d 141 CAN_0 = 0,
group-onsemi 0:098463de4c5d 142 CAN_1,
group-onsemi 0:098463de4c5d 143 CAN_2,
group-onsemi 0:098463de4c5d 144 CAN_3,
group-onsemi 0:098463de4c5d 145 CAN_4
group-onsemi 0:098463de4c5d 146 } CANName;
group-onsemi 0:098463de4c5d 147
group-onsemi 0:098463de4c5d 148
group-onsemi 0:098463de4c5d 149 #define STDIO_UART_TX USBTX
group-onsemi 0:098463de4c5d 150 #define STDIO_UART_RX USBRX
group-onsemi 0:098463de4c5d 151 #define STDIO_UART UART2
group-onsemi 0:098463de4c5d 152
group-onsemi 0:098463de4c5d 153
group-onsemi 0:098463de4c5d 154
group-onsemi 0:098463de4c5d 155 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 156 }
group-onsemi 0:098463de4c5d 157 #endif
group-onsemi 0:098463de4c5d 158
group-onsemi 0:098463de4c5d 159 #endif