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Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_NXP/TARGET_LPC2460/device/LPC24xx.h@1:f30bdcd2b33b, 2017-02-27 (annotated)

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d 
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* mbed Microcontroller Library - LPC24xx CMSIS-like structs
group-onsemi 0:098463de4c5d 2 * Copyright (C) 2009-2015 ARM Limited. All rights reserved.
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * An LPC24xx header file, based on LPC23xx.h
group-onsemi 0:098463de4c5d 5 */
group-onsemi 0:098463de4c5d 6
group-onsemi 0:098463de4c5d 7 #ifndef __LPC24xx_H
group-onsemi 0:098463de4c5d 8 #define __LPC24xx_H
group-onsemi 0:098463de4c5d 9
group-onsemi 0:098463de4c5d 10 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 11 extern "C" {
group-onsemi 0:098463de4c5d 12 #endif
group-onsemi 0:098463de4c5d 13
group-onsemi 0:098463de4c5d 14 /*
group-onsemi 0:098463de4c5d 15 * ==========================================================================
group-onsemi 0:098463de4c5d 16 * ---------- Interrupt Number Definition -----------------------------------
group-onsemi 0:098463de4c5d 17 * ==========================================================================
group-onsemi 0:098463de4c5d 18 */
group-onsemi 0:098463de4c5d 19
group-onsemi 0:098463de4c5d 20 typedef enum IRQn
group-onsemi 0:098463de4c5d 21 {
group-onsemi 0:098463de4c5d 22 /****** LPC23xx Specific Interrupt Numbers *******************************************************/
group-onsemi 0:098463de4c5d 23 WDT_IRQn = 0, /*!< Watchdog Timer Interrupt */
group-onsemi 0:098463de4c5d 24
group-onsemi 0:098463de4c5d 25 TIMER0_IRQn = 4, /*!< Timer0 Interrupt */
group-onsemi 0:098463de4c5d 26 TIMER1_IRQn = 5, /*!< Timer1 Interrupt */
group-onsemi 0:098463de4c5d 27 UART0_IRQn = 6, /*!< UART0 Interrupt */
group-onsemi 0:098463de4c5d 28 UART1_IRQn = 7, /*!< UART1 Interrupt */
group-onsemi 0:098463de4c5d 29 PWM0_IRQn = 8, /*!< PWM0 Interrupt */
group-onsemi 0:098463de4c5d 30 PWM1_IRQn = 8, /*!< PWM1 Interrupt */
group-onsemi 0:098463de4c5d 31 I2C0_IRQn = 9, /*!< I2C0 Interrupt */
group-onsemi 0:098463de4c5d 32 SPI_IRQn = 10, /*!< SPI Interrupt */
group-onsemi 0:098463de4c5d 33 SSP0_IRQn = 10, /*!< SSP0 Interrupt */
group-onsemi 0:098463de4c5d 34 SSP1_IRQn = 11, /*!< SSP1 Interrupt */
group-onsemi 0:098463de4c5d 35 PLL0_IRQn = 12, /*!< PLL0 Lock (Main PLL) Interrupt */
group-onsemi 0:098463de4c5d 36 RTC_IRQn = 13, /*!< Real Time Clock Interrupt */
group-onsemi 0:098463de4c5d 37 EINT0_IRQn = 14, /*!< External Interrupt 0 Interrupt */
group-onsemi 0:098463de4c5d 38 EINT1_IRQn = 15, /*!< External Interrupt 1 Interrupt */
group-onsemi 0:098463de4c5d 39 EINT2_IRQn = 16, /*!< External Interrupt 2 Interrupt */
group-onsemi 0:098463de4c5d 40 EINT3_IRQn = 17, /*!< External Interrupt 3 Interrupt */
group-onsemi 0:098463de4c5d 41 ADC_IRQn = 18, /*!< A/D Converter Interrupt */
group-onsemi 0:098463de4c5d 42 I2C1_IRQn = 19, /*!< I2C1 Interrupt */
group-onsemi 0:098463de4c5d 43 BOD_IRQn = 20, /*!< Brown-Out Detect Interrupt */
group-onsemi 0:098463de4c5d 44 ENET_IRQn = 21, /*!< Ethernet Interrupt */
group-onsemi 0:098463de4c5d 45 USB_IRQn = 22, /*!< USB Interrupt */
group-onsemi 0:098463de4c5d 46 CAN_IRQn = 23, /*!< CAN Interrupt */
group-onsemi 0:098463de4c5d 47 SDMMC_IRQn = 24, /*!< SD/MMC Interrupt */
group-onsemi 0:098463de4c5d 48 DMA_IRQn = 25, /*!< General Purpose DMA Interrupt */
group-onsemi 0:098463de4c5d 49 TIMER2_IRQn = 26, /*!< Timer2 Interrupt */
group-onsemi 0:098463de4c5d 50 TIMER3_IRQn = 27, /*!< Timer3 Interrupt */
group-onsemi 0:098463de4c5d 51 UART2_IRQn = 28, /*!< UART2 Interrupt */
group-onsemi 0:098463de4c5d 52 UART3_IRQn = 29, /*!< UART3 Interrupt */
group-onsemi 0:098463de4c5d 53 I2C2_IRQn = 30, /*!< I2C2 Interrupt */
group-onsemi 0:098463de4c5d 54 I2S_IRQn = 31, /*!< I2S Interrupt */
group-onsemi 0:098463de4c5d 55 } IRQn_Type;
group-onsemi 0:098463de4c5d 56
group-onsemi 0:098463de4c5d 57 /*
group-onsemi 0:098463de4c5d 58 * ==========================================================================
group-onsemi 0:098463de4c5d 59 * ----------- Processor and Core Peripheral Section ------------------------
group-onsemi 0:098463de4c5d 60 * ==========================================================================
group-onsemi 0:098463de4c5d 61 */
group-onsemi 0:098463de4c5d 62
group-onsemi 0:098463de4c5d 63 /* Configuration of the ARM7 Processor and Core Peripherals */
group-onsemi 0:098463de4c5d 64 #define __MPU_PRESENT 0 /*!< MPU present or not */
group-onsemi 0:098463de4c5d 65 #define __NVIC_PRIO_BITS 4 /*!< Number of Bits used for Priority Levels */
group-onsemi 0:098463de4c5d 66 #define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
group-onsemi 0:098463de4c5d 67
group-onsemi 0:098463de4c5d 68
group-onsemi 0:098463de4c5d 69 #include <core_arm7.h>
group-onsemi 0:098463de4c5d 70 #include "system_LPC24xx.h" /* System Header */
group-onsemi 0:098463de4c5d 71
group-onsemi 0:098463de4c5d 72
group-onsemi 0:098463de4c5d 73 /******************************************************************************/
group-onsemi 0:098463de4c5d 74 /* Device Specific Peripheral registers structures */
group-onsemi 0:098463de4c5d 75 /******************************************************************************/
group-onsemi 0:098463de4c5d 76 #if defined ( __CC_ARM )
group-onsemi 0:098463de4c5d 77 #pragma anon_unions
group-onsemi 0:098463de4c5d 78 #endif
group-onsemi 0:098463de4c5d 79
group-onsemi 0:098463de4c5d 80 /*------------- Vector Interupt Controler (VIC) ------------------------------*/
group-onsemi 0:098463de4c5d 81 typedef struct
group-onsemi 0:098463de4c5d 82 {
group-onsemi 0:098463de4c5d 83 __I uint32_t IRQStatus;
group-onsemi 0:098463de4c5d 84 __I uint32_t FIQStatus;
group-onsemi 0:098463de4c5d 85 __I uint32_t RawIntr;
group-onsemi 0:098463de4c5d 86 __IO uint32_t IntSelect;
group-onsemi 0:098463de4c5d 87 __IO uint32_t IntEnable;
group-onsemi 0:098463de4c5d 88 __O uint32_t IntEnClr;
group-onsemi 0:098463de4c5d 89 __IO uint32_t SoftInt;
group-onsemi 0:098463de4c5d 90 __O uint32_t SoftIntClr;
group-onsemi 0:098463de4c5d 91 __IO uint32_t Protection;
group-onsemi 0:098463de4c5d 92 __IO uint32_t SWPriorityMask;
group-onsemi 0:098463de4c5d 93 __IO uint32_t RESERVED0[54];
group-onsemi 0:098463de4c5d 94 __IO uint32_t VectAddr[32];
group-onsemi 0:098463de4c5d 95 __IO uint32_t RESERVED1[32];
group-onsemi 0:098463de4c5d 96 __IO uint32_t VectPriority[32];
group-onsemi 0:098463de4c5d 97 __IO uint32_t RESERVED2[800];
group-onsemi 0:098463de4c5d 98 __IO uint32_t Address;
group-onsemi 0:098463de4c5d 99 } LPC_VIC_TypeDef;
group-onsemi 0:098463de4c5d 100
group-onsemi 0:098463de4c5d 101 /*------------- System Control (SC) ------------------------------------------*/
group-onsemi 0:098463de4c5d 102 typedef struct
group-onsemi 0:098463de4c5d 103 {
group-onsemi 0:098463de4c5d 104 __IO uint32_t MAMCR;
group-onsemi 0:098463de4c5d 105 __IO uint32_t MAMTIM;
group-onsemi 0:098463de4c5d 106 uint32_t RESERVED0[14];
group-onsemi 0:098463de4c5d 107 __IO uint32_t MEMMAP;
group-onsemi 0:098463de4c5d 108 uint32_t RESERVED1[15];
group-onsemi 0:098463de4c5d 109 __IO uint32_t PLL0CON; /* Clocking and Power Control */
group-onsemi 0:098463de4c5d 110 __IO uint32_t PLL0CFG;
group-onsemi 0:098463de4c5d 111 __I uint32_t PLL0STAT;
group-onsemi 0:098463de4c5d 112 __O uint32_t PLL0FEED;
group-onsemi 0:098463de4c5d 113 uint32_t RESERVED2[12];
group-onsemi 0:098463de4c5d 114 __IO uint32_t PCON;
group-onsemi 0:098463de4c5d 115 __IO uint32_t PCONP;
group-onsemi 0:098463de4c5d 116 uint32_t RESERVED3[15];
group-onsemi 0:098463de4c5d 117 __IO uint32_t CCLKCFG;
group-onsemi 0:098463de4c5d 118 __IO uint32_t USBCLKCFG;
group-onsemi 0:098463de4c5d 119 __IO uint32_t CLKSRCSEL;
group-onsemi 0:098463de4c5d 120 uint32_t RESERVED4[12];
group-onsemi 0:098463de4c5d 121 __IO uint32_t EXTINT; /* External Interrupts */
group-onsemi 0:098463de4c5d 122 __IO uint32_t INTWAKE;
group-onsemi 0:098463de4c5d 123 __IO uint32_t EXTMODE;
group-onsemi 0:098463de4c5d 124 __IO uint32_t EXTPOLAR;
group-onsemi 0:098463de4c5d 125 uint32_t RESERVED6[12];
group-onsemi 0:098463de4c5d 126 __IO uint32_t RSID; /* Reset */
group-onsemi 0:098463de4c5d 127 __IO uint32_t CSPR;
group-onsemi 0:098463de4c5d 128 __IO uint32_t AHBCFG1;
group-onsemi 0:098463de4c5d 129 __IO uint32_t AHBCFG2;
group-onsemi 0:098463de4c5d 130 uint32_t RESERVED7[4];
group-onsemi 0:098463de4c5d 131 __IO uint32_t SCS; /* Syscon Miscellaneous Registers */
group-onsemi 0:098463de4c5d 132 __IO uint32_t IRCTRIM; /* Clock Dividers */
group-onsemi 0:098463de4c5d 133 __IO uint32_t PCLKSEL0;
group-onsemi 0:098463de4c5d 134 __IO uint32_t PCLKSEL1;
group-onsemi 0:098463de4c5d 135 uint32_t RESERVED8[4];
group-onsemi 0:098463de4c5d 136 __IO uint32_t USBIntSt; /* USB Device/OTG Interrupt Register */
group-onsemi 0:098463de4c5d 137 uint32_t RESERVED9;
group-onsemi 0:098463de4c5d 138 // __IO uint32_t CLKOUTCFG; /* Clock Output Configuration */
group-onsemi 0:098463de4c5d 139 } LPC_SC_TypeDef;
group-onsemi 0:098463de4c5d 140
group-onsemi 0:098463de4c5d 141 /*------------- Pin Connect Block (PINCON) -----------------------------------*/
group-onsemi 0:098463de4c5d 142 typedef struct
group-onsemi 0:098463de4c5d 143 {
group-onsemi 0:098463de4c5d 144 __IO uint32_t PINSEL0;
group-onsemi 0:098463de4c5d 145 __IO uint32_t PINSEL1;
group-onsemi 0:098463de4c5d 146 __IO uint32_t PINSEL2;
group-onsemi 0:098463de4c5d 147 __IO uint32_t PINSEL3;
group-onsemi 0:098463de4c5d 148 __IO uint32_t PINSEL4;
group-onsemi 0:098463de4c5d 149 __IO uint32_t PINSEL5;
group-onsemi 0:098463de4c5d 150 __IO uint32_t PINSEL6;
group-onsemi 0:098463de4c5d 151 __IO uint32_t PINSEL7;
group-onsemi 0:098463de4c5d 152 __IO uint32_t PINSEL8;
group-onsemi 0:098463de4c5d 153 __IO uint32_t PINSEL9;
group-onsemi 0:098463de4c5d 154 __IO uint32_t PINSEL10;
group-onsemi 0:098463de4c5d 155 uint32_t RESERVED0[5];
group-onsemi 0:098463de4c5d 156 __IO uint32_t PINMODE0;
group-onsemi 0:098463de4c5d 157 __IO uint32_t PINMODE1;
group-onsemi 0:098463de4c5d 158 __IO uint32_t PINMODE2;
group-onsemi 0:098463de4c5d 159 __IO uint32_t PINMODE3;
group-onsemi 0:098463de4c5d 160 __IO uint32_t PINMODE4;
group-onsemi 0:098463de4c5d 161 __IO uint32_t PINMODE5;
group-onsemi 0:098463de4c5d 162 __IO uint32_t PINMODE6;
group-onsemi 0:098463de4c5d 163 __IO uint32_t PINMODE7;
group-onsemi 0:098463de4c5d 164 __IO uint32_t PINMODE8;
group-onsemi 0:098463de4c5d 165 __IO uint32_t PINMODE9;
group-onsemi 0:098463de4c5d 166 __IO uint32_t PINMODE_OD0;
group-onsemi 0:098463de4c5d 167 __IO uint32_t PINMODE_OD1;
group-onsemi 0:098463de4c5d 168 __IO uint32_t PINMODE_OD2;
group-onsemi 0:098463de4c5d 169 __IO uint32_t PINMODE_OD3;
group-onsemi 0:098463de4c5d 170 __IO uint32_t PINMODE_OD4;
group-onsemi 0:098463de4c5d 171 } LPC_PINCON_TypeDef;
group-onsemi 0:098463de4c5d 172
group-onsemi 0:098463de4c5d 173 #define PCTIM0 1
group-onsemi 0:098463de4c5d 174 #define PCTIM1 2
group-onsemi 0:098463de4c5d 175 #define PCUART0 3
group-onsemi 0:098463de4c5d 176 #define PCUART1 4
group-onsemi 0:098463de4c5d 177 #define PCPWM1 6
group-onsemi 0:098463de4c5d 178 #define PCI2C0 7
group-onsemi 0:098463de4c5d 179 #define PCSPI 8
group-onsemi 0:098463de4c5d 180 #define PCRTC 9
group-onsemi 0:098463de4c5d 181 #define PCSSP1 10
group-onsemi 0:098463de4c5d 182 #define PCEMC 11
group-onsemi 0:098463de4c5d 183 #define PCADC 12
group-onsemi 0:098463de4c5d 184 #define PCAN1 13
group-onsemi 0:098463de4c5d 185 #define PCAN2 14
group-onsemi 0:098463de4c5d 186 #define PCI2C1 19
group-onsemi 0:098463de4c5d 187 #define PCSSP0 21
group-onsemi 0:098463de4c5d 188 #define PCTIM2 22
group-onsemi 0:098463de4c5d 189 #define PCTIM3 23
group-onsemi 0:098463de4c5d 190 #define PCUART2 24
group-onsemi 0:098463de4c5d 191 #define PCUART3 25
group-onsemi 0:098463de4c5d 192 #define PCI2C2 26
group-onsemi 0:098463de4c5d 193 #define PCI2S 27
group-onsemi 0:098463de4c5d 194 #define PCSDC 28
group-onsemi 0:098463de4c5d 195 #define PCGPDMA 29
group-onsemi 0:098463de4c5d 196 #define PCENET 30
group-onsemi 0:098463de4c5d 197 #define PCUSB 31
group-onsemi 0:098463de4c5d 198
group-onsemi 0:098463de4c5d 199 /*------------- General Purpose Input/Output (GPIO) --------------------------*/
group-onsemi 0:098463de4c5d 200 typedef struct
group-onsemi 0:098463de4c5d 201 {
group-onsemi 0:098463de4c5d 202 __IO uint32_t FIODIR;
group-onsemi 0:098463de4c5d 203 uint32_t RESERVED0[3];
group-onsemi 0:098463de4c5d 204 __IO uint32_t FIOMASK;
group-onsemi 0:098463de4c5d 205 __IO uint32_t FIOPIN;
group-onsemi 0:098463de4c5d 206 __IO uint32_t FIOSET;
group-onsemi 0:098463de4c5d 207 __O uint32_t FIOCLR;
group-onsemi 0:098463de4c5d 208 } LPC_GPIO_TypeDef;
group-onsemi 0:098463de4c5d 209
group-onsemi 0:098463de4c5d 210 typedef struct
group-onsemi 0:098463de4c5d 211 {
group-onsemi 0:098463de4c5d 212 __I uint32_t IntStatus;
group-onsemi 0:098463de4c5d 213 __I uint32_t IO0IntStatR;
group-onsemi 0:098463de4c5d 214 __I uint32_t IO0IntStatF;
group-onsemi 0:098463de4c5d 215 __O uint32_t IO0IntClr;
group-onsemi 0:098463de4c5d 216 __IO uint32_t IO0IntEnR;
group-onsemi 0:098463de4c5d 217 __IO uint32_t IO0IntEnF;
group-onsemi 0:098463de4c5d 218 uint32_t RESERVED0[3];
group-onsemi 0:098463de4c5d 219 __I uint32_t IO2IntStatR;
group-onsemi 0:098463de4c5d 220 __I uint32_t IO2IntStatF;
group-onsemi 0:098463de4c5d 221 __O uint32_t IO2IntClr;
group-onsemi 0:098463de4c5d 222 __IO uint32_t IO2IntEnR;
group-onsemi 0:098463de4c5d 223 __IO uint32_t IO2IntEnF;
group-onsemi 0:098463de4c5d 224 } LPC_GPIOINT_TypeDef;
group-onsemi 0:098463de4c5d 225
group-onsemi 0:098463de4c5d 226 /*------------- Timer (TIM) --------------------------------------------------*/
group-onsemi 0:098463de4c5d 227 typedef struct
group-onsemi 0:098463de4c5d 228 {
group-onsemi 0:098463de4c5d 229 __IO uint32_t IR;
group-onsemi 0:098463de4c5d 230 __IO uint32_t TCR;
group-onsemi 0:098463de4c5d 231 __IO uint32_t TC;
group-onsemi 0:098463de4c5d 232 __IO uint32_t PR;
group-onsemi 0:098463de4c5d 233 __IO uint32_t PC;
group-onsemi 0:098463de4c5d 234 __IO uint32_t MCR;
group-onsemi 0:098463de4c5d 235 __IO uint32_t MR0;
group-onsemi 0:098463de4c5d 236 __IO uint32_t MR1;
group-onsemi 0:098463de4c5d 237 __IO uint32_t MR2;
group-onsemi 0:098463de4c5d 238 __IO uint32_t MR3;
group-onsemi 0:098463de4c5d 239 __IO uint32_t CCR;
group-onsemi 0:098463de4c5d 240 __I uint32_t CR0;
group-onsemi 0:098463de4c5d 241 __I uint32_t CR1;
group-onsemi 0:098463de4c5d 242 uint32_t RESERVED0[2];
group-onsemi 0:098463de4c5d 243 __IO uint32_t EMR;
group-onsemi 0:098463de4c5d 244 uint32_t RESERVED1[12];
group-onsemi 0:098463de4c5d 245 __IO uint32_t CTCR;
group-onsemi 0:098463de4c5d 246 } LPC_TIM_TypeDef;
group-onsemi 0:098463de4c5d 247
group-onsemi 0:098463de4c5d 248 /*------------- Pulse-Width Modulation (PWM) ---------------------------------*/
group-onsemi 0:098463de4c5d 249 typedef struct
group-onsemi 0:098463de4c5d 250 {
group-onsemi 0:098463de4c5d 251 __IO uint32_t IR;
group-onsemi 0:098463de4c5d 252 __IO uint32_t TCR;
group-onsemi 0:098463de4c5d 253 __IO uint32_t TC;
group-onsemi 0:098463de4c5d 254 __IO uint32_t PR;
group-onsemi 0:098463de4c5d 255 __IO uint32_t PC;
group-onsemi 0:098463de4c5d 256 __IO uint32_t MCR;
group-onsemi 0:098463de4c5d 257 __IO uint32_t MR0;
group-onsemi 0:098463de4c5d 258 __IO uint32_t MR1;
group-onsemi 0:098463de4c5d 259 __IO uint32_t MR2;
group-onsemi 0:098463de4c5d 260 __IO uint32_t MR3;
group-onsemi 0:098463de4c5d 261 __IO uint32_t CCR;
group-onsemi 0:098463de4c5d 262 __I uint32_t CR0;
group-onsemi 0:098463de4c5d 263 __I uint32_t CR1;
group-onsemi 0:098463de4c5d 264 __I uint32_t CR2;
group-onsemi 0:098463de4c5d 265 __I uint32_t CR3;
group-onsemi 0:098463de4c5d 266 uint32_t RESERVED0;
group-onsemi 0:098463de4c5d 267 __IO uint32_t MR4;
group-onsemi 0:098463de4c5d 268 __IO uint32_t MR5;
group-onsemi 0:098463de4c5d 269 __IO uint32_t MR6;
group-onsemi 0:098463de4c5d 270 __IO uint32_t PCR;
group-onsemi 0:098463de4c5d 271 __IO uint32_t LER;
group-onsemi 0:098463de4c5d 272 uint32_t RESERVED1[7];
group-onsemi 0:098463de4c5d 273 __IO uint32_t CTCR;
group-onsemi 0:098463de4c5d 274 } LPC_PWM_TypeDef;
group-onsemi 0:098463de4c5d 275
group-onsemi 0:098463de4c5d 276 /*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/
group-onsemi 0:098463de4c5d 277 typedef struct
group-onsemi 0:098463de4c5d 278 {
group-onsemi 0:098463de4c5d 279 union {
group-onsemi 0:098463de4c5d 280 __I uint8_t RBR;
group-onsemi 0:098463de4c5d 281 __O uint8_t THR;
group-onsemi 0:098463de4c5d 282 __IO uint8_t DLL;
group-onsemi 0:098463de4c5d 283 uint32_t RESERVED0;
group-onsemi 0:098463de4c5d 284 };
group-onsemi 0:098463de4c5d 285 union {
group-onsemi 0:098463de4c5d 286 __IO uint8_t DLM;
group-onsemi 0:098463de4c5d 287 __IO uint32_t IER;
group-onsemi 0:098463de4c5d 288 };
group-onsemi 0:098463de4c5d 289 union {
group-onsemi 0:098463de4c5d 290 __I uint32_t IIR;
group-onsemi 0:098463de4c5d 291 __O uint8_t FCR;
group-onsemi 0:098463de4c5d 292 };
group-onsemi 0:098463de4c5d 293 __IO uint8_t LCR;
group-onsemi 0:098463de4c5d 294 uint8_t RESERVED1[7];
group-onsemi 0:098463de4c5d 295 __IO uint8_t LSR;
group-onsemi 0:098463de4c5d 296 uint8_t RESERVED2[7];
group-onsemi 0:098463de4c5d 297 __IO uint8_t SCR;
group-onsemi 0:098463de4c5d 298 uint8_t RESERVED3[3];
group-onsemi 0:098463de4c5d 299 __IO uint32_t ACR;
group-onsemi 0:098463de4c5d 300 __IO uint8_t ICR;
group-onsemi 0:098463de4c5d 301 uint8_t RESERVED4[3];
group-onsemi 0:098463de4c5d 302 __IO uint8_t FDR;
group-onsemi 0:098463de4c5d 303 uint8_t RESERVED5[7];
group-onsemi 0:098463de4c5d 304 __IO uint8_t TER;
group-onsemi 0:098463de4c5d 305 uint8_t RESERVED6[27];
group-onsemi 0:098463de4c5d 306 __IO uint8_t RS485CTRL;
group-onsemi 0:098463de4c5d 307 uint8_t RESERVED7[3];
group-onsemi 0:098463de4c5d 308 __IO uint8_t ADRMATCH;
group-onsemi 0:098463de4c5d 309 } LPC_UART_TypeDef;
group-onsemi 0:098463de4c5d 310
group-onsemi 0:098463de4c5d 311 typedef struct
group-onsemi 0:098463de4c5d 312 {
group-onsemi 0:098463de4c5d 313 union {
group-onsemi 0:098463de4c5d 314 __I uint8_t RBR;
group-onsemi 0:098463de4c5d 315 __O uint8_t THR;
group-onsemi 0:098463de4c5d 316 __IO uint8_t DLL;
group-onsemi 0:098463de4c5d 317 uint32_t RESERVED0;
group-onsemi 0:098463de4c5d 318 };
group-onsemi 0:098463de4c5d 319 union {
group-onsemi 0:098463de4c5d 320 __IO uint8_t DLM;
group-onsemi 0:098463de4c5d 321 __IO uint32_t IER;
group-onsemi 0:098463de4c5d 322 };
group-onsemi 0:098463de4c5d 323 union {
group-onsemi 0:098463de4c5d 324 __I uint32_t IIR;
group-onsemi 0:098463de4c5d 325 __O uint8_t FCR;
group-onsemi 0:098463de4c5d 326 };
group-onsemi 0:098463de4c5d 327 __IO uint8_t LCR;
group-onsemi 0:098463de4c5d 328 uint8_t RESERVED1[3];
group-onsemi 0:098463de4c5d 329 __IO uint8_t MCR;
group-onsemi 0:098463de4c5d 330 uint8_t RESERVED2[3];
group-onsemi 0:098463de4c5d 331 __IO uint8_t LSR;
group-onsemi 0:098463de4c5d 332 uint8_t RESERVED3[3];
group-onsemi 0:098463de4c5d 333 __IO uint8_t MSR;
group-onsemi 0:098463de4c5d 334 uint8_t RESERVED4[3];
group-onsemi 0:098463de4c5d 335 __IO uint8_t SCR;
group-onsemi 0:098463de4c5d 336 uint8_t RESERVED5[3];
group-onsemi 0:098463de4c5d 337 __IO uint32_t ACR;
group-onsemi 0:098463de4c5d 338 uint32_t RESERVED6;
group-onsemi 0:098463de4c5d 339 __IO uint32_t FDR;
group-onsemi 0:098463de4c5d 340 uint32_t RESERVED7;
group-onsemi 0:098463de4c5d 341 __IO uint8_t TER;
group-onsemi 0:098463de4c5d 342 uint8_t RESERVED8[27];
group-onsemi 0:098463de4c5d 343 __IO uint8_t RS485CTRL;
group-onsemi 0:098463de4c5d 344 uint8_t RESERVED9[3];
group-onsemi 0:098463de4c5d 345 __IO uint8_t ADRMATCH;
group-onsemi 0:098463de4c5d 346 uint8_t RESERVED10[3];
group-onsemi 0:098463de4c5d 347 __IO uint8_t RS485DLY;
group-onsemi 0:098463de4c5d 348 } LPC_UART1_TypeDef;
group-onsemi 0:098463de4c5d 349
group-onsemi 0:098463de4c5d 350 /*------------- Serial Peripheral Interface (SPI) ----------------------------*/
group-onsemi 0:098463de4c5d 351 typedef struct
group-onsemi 0:098463de4c5d 352 {
group-onsemi 0:098463de4c5d 353 __IO uint32_t SPCR;
group-onsemi 0:098463de4c5d 354 __I uint32_t SPSR;
group-onsemi 0:098463de4c5d 355 __IO uint32_t SPDR;
group-onsemi 0:098463de4c5d 356 __IO uint32_t SPCCR;
group-onsemi 0:098463de4c5d 357 uint32_t RESERVED0[3];
group-onsemi 0:098463de4c5d 358 __IO uint32_t SPINT;
group-onsemi 0:098463de4c5d 359 } LPC_SPI_TypeDef;
group-onsemi 0:098463de4c5d 360
group-onsemi 0:098463de4c5d 361 /*------------- Synchronous Serial Communication (SSP) -----------------------*/
group-onsemi 0:098463de4c5d 362 typedef struct
group-onsemi 0:098463de4c5d 363 {
group-onsemi 0:098463de4c5d 364 __IO uint32_t CR0;
group-onsemi 0:098463de4c5d 365 __IO uint32_t CR1;
group-onsemi 0:098463de4c5d 366 __IO uint32_t DR;
group-onsemi 0:098463de4c5d 367 __I uint32_t SR;
group-onsemi 0:098463de4c5d 368 __IO uint32_t CPSR;
group-onsemi 0:098463de4c5d 369 __IO uint32_t IMSC;
group-onsemi 0:098463de4c5d 370 __IO uint32_t RIS;
group-onsemi 0:098463de4c5d 371 __IO uint32_t MIS;
group-onsemi 0:098463de4c5d 372 __IO uint32_t ICR;
group-onsemi 0:098463de4c5d 373 __IO uint32_t DMACR;
group-onsemi 0:098463de4c5d 374 } LPC_SSP_TypeDef;
group-onsemi 0:098463de4c5d 375
group-onsemi 0:098463de4c5d 376 /*------------- Inter-Integrated Circuit (I2C) -------------------------------*/
group-onsemi 0:098463de4c5d 377 typedef struct
group-onsemi 0:098463de4c5d 378 {
group-onsemi 0:098463de4c5d 379 __IO uint32_t I2CONSET;
group-onsemi 0:098463de4c5d 380 __I uint32_t I2STAT;
group-onsemi 0:098463de4c5d 381 __IO uint32_t I2DAT;
group-onsemi 0:098463de4c5d 382 __IO uint32_t I2ADR0;
group-onsemi 0:098463de4c5d 383 __IO uint32_t I2SCLH;
group-onsemi 0:098463de4c5d 384 __IO uint32_t I2SCLL;
group-onsemi 0:098463de4c5d 385 __O uint32_t I2CONCLR;
group-onsemi 0:098463de4c5d 386 __IO uint32_t MMCTRL;
group-onsemi 0:098463de4c5d 387 __IO uint32_t I2ADR1;
group-onsemi 0:098463de4c5d 388 __IO uint32_t I2ADR2;
group-onsemi 0:098463de4c5d 389 __IO uint32_t I2ADR3;
group-onsemi 0:098463de4c5d 390 __I uint32_t I2DATA_BUFFER;
group-onsemi 0:098463de4c5d 391 __IO uint32_t I2MASK0;
group-onsemi 0:098463de4c5d 392 __IO uint32_t I2MASK1;
group-onsemi 0:098463de4c5d 393 __IO uint32_t I2MASK2;
group-onsemi 0:098463de4c5d 394 __IO uint32_t I2MASK3;
group-onsemi 0:098463de4c5d 395 } LPC_I2C_TypeDef;
group-onsemi 0:098463de4c5d 396
group-onsemi 0:098463de4c5d 397 /*------------- Inter IC Sound (I2S) -----------------------------------------*/
group-onsemi 0:098463de4c5d 398 typedef struct
group-onsemi 0:098463de4c5d 399 {
group-onsemi 0:098463de4c5d 400 __IO uint32_t I2SDAO;
group-onsemi 0:098463de4c5d 401 __I uint32_t I2SDAI;
group-onsemi 0:098463de4c5d 402 __O uint32_t I2STXFIFO;
group-onsemi 0:098463de4c5d 403 __I uint32_t I2SRXFIFO;
group-onsemi 0:098463de4c5d 404 __I uint32_t I2SSTATE;
group-onsemi 0:098463de4c5d 405 __IO uint32_t I2SDMA1;
group-onsemi 0:098463de4c5d 406 __IO uint32_t I2SDMA2;
group-onsemi 0:098463de4c5d 407 __IO uint32_t I2SIRQ;
group-onsemi 0:098463de4c5d 408 __IO uint32_t I2STXRATE;
group-onsemi 0:098463de4c5d 409 __IO uint32_t I2SRXRATE;
group-onsemi 0:098463de4c5d 410 __IO uint32_t I2STXBITRATE;
group-onsemi 0:098463de4c5d 411 __IO uint32_t I2SRXBITRATE;
group-onsemi 0:098463de4c5d 412 __IO uint32_t I2STXMODE;
group-onsemi 0:098463de4c5d 413 __IO uint32_t I2SRXMODE;
group-onsemi 0:098463de4c5d 414 } LPC_I2S_TypeDef;
group-onsemi 0:098463de4c5d 415
group-onsemi 0:098463de4c5d 416 /*------------- Real-Time Clock (RTC) ----------------------------------------*/
group-onsemi 0:098463de4c5d 417 typedef struct
group-onsemi 0:098463de4c5d 418 {
group-onsemi 0:098463de4c5d 419 __IO uint8_t ILR;
group-onsemi 0:098463de4c5d 420 uint8_t RESERVED0[3];
group-onsemi 0:098463de4c5d 421 __IO uint8_t CTC;
group-onsemi 0:098463de4c5d 422 uint8_t RESERVED1[3];
group-onsemi 0:098463de4c5d 423 __IO uint8_t CCR;
group-onsemi 0:098463de4c5d 424 uint8_t RESERVED2[3];
group-onsemi 0:098463de4c5d 425 __IO uint8_t CIIR;
group-onsemi 0:098463de4c5d 426 uint8_t RESERVED3[3];
group-onsemi 0:098463de4c5d 427 __IO uint8_t AMR;
group-onsemi 0:098463de4c5d 428 uint8_t RESERVED4[3];
group-onsemi 0:098463de4c5d 429 __I uint32_t CTIME0;
group-onsemi 0:098463de4c5d 430 __I uint32_t CTIME1;
group-onsemi 0:098463de4c5d 431 __I uint32_t CTIME2;
group-onsemi 0:098463de4c5d 432 __IO uint8_t SEC;
group-onsemi 0:098463de4c5d 433 uint8_t RESERVED5[3];
group-onsemi 0:098463de4c5d 434 __IO uint8_t MIN;
group-onsemi 0:098463de4c5d 435 uint8_t RESERVED6[3];
group-onsemi 0:098463de4c5d 436 __IO uint8_t HOUR;
group-onsemi 0:098463de4c5d 437 uint8_t RESERVED7[3];
group-onsemi 0:098463de4c5d 438 __IO uint8_t DOM;
group-onsemi 0:098463de4c5d 439 uint8_t RESERVED8[3];
group-onsemi 0:098463de4c5d 440 __IO uint8_t DOW;
group-onsemi 0:098463de4c5d 441 uint8_t RESERVED9[3];
group-onsemi 0:098463de4c5d 442 __IO uint16_t DOY;
group-onsemi 0:098463de4c5d 443 uint16_t RESERVED10;
group-onsemi 0:098463de4c5d 444 __IO uint8_t MONTH;
group-onsemi 0:098463de4c5d 445 uint8_t RESERVED11[3];
group-onsemi 0:098463de4c5d 446 __IO uint16_t YEAR;
group-onsemi 0:098463de4c5d 447 uint16_t RESERVED12;
group-onsemi 0:098463de4c5d 448 __IO uint32_t CALIBRATION;
group-onsemi 0:098463de4c5d 449 __IO uint32_t GPREG0;
group-onsemi 0:098463de4c5d 450 __IO uint32_t GPREG1;
group-onsemi 0:098463de4c5d 451 __IO uint32_t GPREG2;
group-onsemi 0:098463de4c5d 452 __IO uint32_t GPREG3;
group-onsemi 0:098463de4c5d 453 __IO uint32_t GPREG4;
group-onsemi 0:098463de4c5d 454 __IO uint8_t WAKEUPDIS;
group-onsemi 0:098463de4c5d 455 uint8_t RESERVED13[3];
group-onsemi 0:098463de4c5d 456 __IO uint8_t PWRCTRL;
group-onsemi 0:098463de4c5d 457 uint8_t RESERVED14[3];
group-onsemi 0:098463de4c5d 458 __IO uint8_t ALSEC;
group-onsemi 0:098463de4c5d 459 uint8_t RESERVED15[3];
group-onsemi 0:098463de4c5d 460 __IO uint8_t ALMIN;
group-onsemi 0:098463de4c5d 461 uint8_t RESERVED16[3];
group-onsemi 0:098463de4c5d 462 __IO uint8_t ALHOUR;
group-onsemi 0:098463de4c5d 463 uint8_t RESERVED17[3];
group-onsemi 0:098463de4c5d 464 __IO uint8_t ALDOM;
group-onsemi 0:098463de4c5d 465 uint8_t RESERVED18[3];
group-onsemi 0:098463de4c5d 466 __IO uint8_t ALDOW;
group-onsemi 0:098463de4c5d 467 uint8_t RESERVED19[3];
group-onsemi 0:098463de4c5d 468 __IO uint16_t ALDOY;
group-onsemi 0:098463de4c5d 469 uint16_t RESERVED20;
group-onsemi 0:098463de4c5d 470 __IO uint8_t ALMON;
group-onsemi 0:098463de4c5d 471 uint8_t RESERVED21[3];
group-onsemi 0:098463de4c5d 472 __IO uint16_t ALYEAR;
group-onsemi 0:098463de4c5d 473 uint16_t RESERVED22;
group-onsemi 0:098463de4c5d 474 } LPC_RTC_TypeDef;
group-onsemi 0:098463de4c5d 475
group-onsemi 0:098463de4c5d 476 /*------------- Watchdog Timer (WDT) -----------------------------------------*/
group-onsemi 0:098463de4c5d 477 typedef struct
group-onsemi 0:098463de4c5d 478 {
group-onsemi 0:098463de4c5d 479 __IO uint8_t WDMOD;
group-onsemi 0:098463de4c5d 480 uint8_t RESERVED0[3];
group-onsemi 0:098463de4c5d 481 __IO uint32_t WDTC;
group-onsemi 0:098463de4c5d 482 __O uint8_t WDFEED;
group-onsemi 0:098463de4c5d 483 uint8_t RESERVED1[3];
group-onsemi 0:098463de4c5d 484 __I uint32_t WDTV;
group-onsemi 0:098463de4c5d 485 __IO uint32_t WDCLKSEL;
group-onsemi 0:098463de4c5d 486 } LPC_WDT_TypeDef;
group-onsemi 0:098463de4c5d 487
group-onsemi 0:098463de4c5d 488 /*------------- Analog-to-Digital Converter (ADC) ----------------------------*/
group-onsemi 0:098463de4c5d 489 typedef struct
group-onsemi 0:098463de4c5d 490 {
group-onsemi 0:098463de4c5d 491 __IO uint32_t ADCR;
group-onsemi 0:098463de4c5d 492 __IO uint32_t ADGDR;
group-onsemi 0:098463de4c5d 493 uint32_t RESERVED0;
group-onsemi 0:098463de4c5d 494 __IO uint32_t ADINTEN;
group-onsemi 0:098463de4c5d 495 __I uint32_t ADDR0;
group-onsemi 0:098463de4c5d 496 __I uint32_t ADDR1;
group-onsemi 0:098463de4c5d 497 __I uint32_t ADDR2;
group-onsemi 0:098463de4c5d 498 __I uint32_t ADDR3;
group-onsemi 0:098463de4c5d 499 __I uint32_t ADDR4;
group-onsemi 0:098463de4c5d 500 __I uint32_t ADDR5;
group-onsemi 0:098463de4c5d 501 __I uint32_t ADDR6;
group-onsemi 0:098463de4c5d 502 __I uint32_t ADDR7;
group-onsemi 0:098463de4c5d 503 __I uint32_t ADSTAT;
group-onsemi 0:098463de4c5d 504 __IO uint32_t ADTRM;
group-onsemi 0:098463de4c5d 505 } LPC_ADC_TypeDef;
group-onsemi 0:098463de4c5d 506
group-onsemi 0:098463de4c5d 507 /*------------- Digital-to-Analog Converter (DAC) ----------------------------*/
group-onsemi 0:098463de4c5d 508 typedef struct
group-onsemi 0:098463de4c5d 509 {
group-onsemi 0:098463de4c5d 510 __IO uint32_t DACR;
group-onsemi 0:098463de4c5d 511 __IO uint32_t DACCTRL;
group-onsemi 0:098463de4c5d 512 __IO uint16_t DACCNTVAL;
group-onsemi 0:098463de4c5d 513 } LPC_DAC_TypeDef;
group-onsemi 0:098463de4c5d 514
group-onsemi 0:098463de4c5d 515 /*------------- Multimedia Card Interface (MCI) ------------------------------*/
group-onsemi 0:098463de4c5d 516 typedef struct
group-onsemi 0:098463de4c5d 517 {
group-onsemi 0:098463de4c5d 518 __IO uint32_t MCIPower; /* Power control */
group-onsemi 0:098463de4c5d 519 __IO uint32_t MCIClock; /* Clock control */
group-onsemi 0:098463de4c5d 520 __IO uint32_t MCIArgument;
group-onsemi 0:098463de4c5d 521 __IO uint32_t MMCCommand;
group-onsemi 0:098463de4c5d 522 __I uint32_t MCIRespCmd;
group-onsemi 0:098463de4c5d 523 __I uint32_t MCIResponse0;
group-onsemi 0:098463de4c5d 524 __I uint32_t MCIResponse1;
group-onsemi 0:098463de4c5d 525 __I uint32_t MCIResponse2;
group-onsemi 0:098463de4c5d 526 __I uint32_t MCIResponse3;
group-onsemi 0:098463de4c5d 527 __IO uint32_t MCIDataTimer;
group-onsemi 0:098463de4c5d 528 __IO uint32_t MCIDataLength;
group-onsemi 0:098463de4c5d 529 __IO uint32_t MCIDataCtrl;
group-onsemi 0:098463de4c5d 530 __I uint32_t MCIDataCnt;
group-onsemi 0:098463de4c5d 531 __I uint32_t MCIStatus;
group-onsemi 0:098463de4c5d 532 __O uint32_t MCIClear;
group-onsemi 0:098463de4c5d 533 __IO uint32_t MCIMask0;
group-onsemi 0:098463de4c5d 534 uint32_t RESERVED1[2];
group-onsemi 0:098463de4c5d 535 __I uint32_t MCIFifoCnt;
group-onsemi 0:098463de4c5d 536 uint32_t RESERVED2[13];
group-onsemi 0:098463de4c5d 537 __IO uint32_t MCIFIFO[16];
group-onsemi 0:098463de4c5d 538 } LPC_MCI_TypeDef;
group-onsemi 0:098463de4c5d 539
group-onsemi 0:098463de4c5d 540 /*------------- Controller Area Network (CAN) --------------------------------*/
group-onsemi 0:098463de4c5d 541 typedef struct
group-onsemi 0:098463de4c5d 542 {
group-onsemi 0:098463de4c5d 543 __IO uint32_t mask[512]; /* ID Masks */
group-onsemi 0:098463de4c5d 544 } LPC_CANAF_RAM_TypeDef;
group-onsemi 0:098463de4c5d 545
group-onsemi 0:098463de4c5d 546 typedef struct /* Acceptance Filter Registers */
group-onsemi 0:098463de4c5d 547 {
group-onsemi 0:098463de4c5d 548 __IO uint32_t AFMR;
group-onsemi 0:098463de4c5d 549 __IO uint32_t SFF_sa;
group-onsemi 0:098463de4c5d 550 __IO uint32_t SFF_GRP_sa;
group-onsemi 0:098463de4c5d 551 __IO uint32_t EFF_sa;
group-onsemi 0:098463de4c5d 552 __IO uint32_t EFF_GRP_sa;
group-onsemi 0:098463de4c5d 553 __IO uint32_t ENDofTable;
group-onsemi 0:098463de4c5d 554 __I uint32_t LUTerrAd;
group-onsemi 0:098463de4c5d 555 __I uint32_t LUTerr;
group-onsemi 0:098463de4c5d 556 __IO uint32_t FCANIE;
group-onsemi 0:098463de4c5d 557 __IO uint32_t FCANIC0;
group-onsemi 0:098463de4c5d 558 __IO uint32_t FCANIC1;
group-onsemi 0:098463de4c5d 559 } LPC_CANAF_TypeDef;
group-onsemi 0:098463de4c5d 560
group-onsemi 0:098463de4c5d 561 typedef struct /* Central Registers */
group-onsemi 0:098463de4c5d 562 {
group-onsemi 0:098463de4c5d 563 __I uint32_t CANTxSR;
group-onsemi 0:098463de4c5d 564 __I uint32_t CANRxSR;
group-onsemi 0:098463de4c5d 565 __I uint32_t CANMSR;
group-onsemi 0:098463de4c5d 566 } LPC_CANCR_TypeDef;
group-onsemi 0:098463de4c5d 567
group-onsemi 0:098463de4c5d 568 typedef struct /* Controller Registers */
group-onsemi 0:098463de4c5d 569 {
group-onsemi 0:098463de4c5d 570 __IO uint32_t MOD;
group-onsemi 0:098463de4c5d 571 __O uint32_t CMR;
group-onsemi 0:098463de4c5d 572 __IO uint32_t GSR;
group-onsemi 0:098463de4c5d 573 __I uint32_t ICR;
group-onsemi 0:098463de4c5d 574 __IO uint32_t IER;
group-onsemi 0:098463de4c5d 575 __IO uint32_t BTR;
group-onsemi 0:098463de4c5d 576 __IO uint32_t EWL;
group-onsemi 0:098463de4c5d 577 __I uint32_t SR;
group-onsemi 0:098463de4c5d 578 __IO uint32_t RFS;
group-onsemi 0:098463de4c5d 579 __IO uint32_t RID;
group-onsemi 0:098463de4c5d 580 __IO uint32_t RDA;
group-onsemi 0:098463de4c5d 581 __IO uint32_t RDB;
group-onsemi 0:098463de4c5d 582 __IO uint32_t TFI1;
group-onsemi 0:098463de4c5d 583 __IO uint32_t TID1;
group-onsemi 0:098463de4c5d 584 __IO uint32_t TDA1;
group-onsemi 0:098463de4c5d 585 __IO uint32_t TDB1;
group-onsemi 0:098463de4c5d 586 __IO uint32_t TFI2;
group-onsemi 0:098463de4c5d 587 __IO uint32_t TID2;
group-onsemi 0:098463de4c5d 588 __IO uint32_t TDA2;
group-onsemi 0:098463de4c5d 589 __IO uint32_t TDB2;
group-onsemi 0:098463de4c5d 590 __IO uint32_t TFI3;
group-onsemi 0:098463de4c5d 591 __IO uint32_t TID3;
group-onsemi 0:098463de4c5d 592 __IO uint32_t TDA3;
group-onsemi 0:098463de4c5d 593 __IO uint32_t TDB3;
group-onsemi 0:098463de4c5d 594 } LPC_CAN_TypeDef;
group-onsemi 0:098463de4c5d 595
group-onsemi 0:098463de4c5d 596 /*------------- General Purpose Direct Memory Access (GPDMA) -----------------*/
group-onsemi 0:098463de4c5d 597 typedef struct /* Common Registers */
group-onsemi 0:098463de4c5d 598 {
group-onsemi 0:098463de4c5d 599 __I uint32_t DMACIntStat;
group-onsemi 0:098463de4c5d 600 __I uint32_t DMACIntTCStat;
group-onsemi 0:098463de4c5d 601 __O uint32_t DMACIntTCClear;
group-onsemi 0:098463de4c5d 602 __I uint32_t DMACIntErrStat;
group-onsemi 0:098463de4c5d 603 __O uint32_t DMACIntErrClr;
group-onsemi 0:098463de4c5d 604 __I uint32_t DMACRawIntTCStat;
group-onsemi 0:098463de4c5d 605 __I uint32_t DMACRawIntErrStat;
group-onsemi 0:098463de4c5d 606 __I uint32_t DMACEnbldChns;
group-onsemi 0:098463de4c5d 607 __IO uint32_t DMACSoftBReq;
group-onsemi 0:098463de4c5d 608 __IO uint32_t DMACSoftSReq;
group-onsemi 0:098463de4c5d 609 __IO uint32_t DMACSoftLBReq;
group-onsemi 0:098463de4c5d 610 __IO uint32_t DMACSoftLSReq;
group-onsemi 0:098463de4c5d 611 __IO uint32_t DMACConfig;
group-onsemi 0:098463de4c5d 612 __IO uint32_t DMACSync;
group-onsemi 0:098463de4c5d 613 } LPC_GPDMA_TypeDef;
group-onsemi 0:098463de4c5d 614
group-onsemi 0:098463de4c5d 615 typedef struct /* Channel Registers */
group-onsemi 0:098463de4c5d 616 {
group-onsemi 0:098463de4c5d 617 __IO uint32_t DMACCSrcAddr;
group-onsemi 0:098463de4c5d 618 __IO uint32_t DMACCDestAddr;
group-onsemi 0:098463de4c5d 619 __IO uint32_t DMACCLLI;
group-onsemi 0:098463de4c5d 620 __IO uint32_t DMACCControl;
group-onsemi 0:098463de4c5d 621 __IO uint32_t DMACCConfig;
group-onsemi 0:098463de4c5d 622 } LPC_GPDMACH_TypeDef;
group-onsemi 0:098463de4c5d 623
group-onsemi 0:098463de4c5d 624 /*------------- Universal Serial Bus (USB) -----------------------------------*/
group-onsemi 0:098463de4c5d 625 typedef struct
group-onsemi 0:098463de4c5d 626 {
group-onsemi 0:098463de4c5d 627 __I uint32_t HcRevision; /* USB Host Registers */
group-onsemi 0:098463de4c5d 628 __IO uint32_t HcControl;
group-onsemi 0:098463de4c5d 629 __IO uint32_t HcCommandStatus;
group-onsemi 0:098463de4c5d 630 __IO uint32_t HcInterruptStatus;
group-onsemi 0:098463de4c5d 631 __IO uint32_t HcInterruptEnable;
group-onsemi 0:098463de4c5d 632 __IO uint32_t HcInterruptDisable;
group-onsemi 0:098463de4c5d 633 __IO uint32_t HcHCCA;
group-onsemi 0:098463de4c5d 634 __I uint32_t HcPeriodCurrentED;
group-onsemi 0:098463de4c5d 635 __IO uint32_t HcControlHeadED;
group-onsemi 0:098463de4c5d 636 __IO uint32_t HcControlCurrentED;
group-onsemi 0:098463de4c5d 637 __IO uint32_t HcBulkHeadED;
group-onsemi 0:098463de4c5d 638 __IO uint32_t HcBulkCurrentED;
group-onsemi 0:098463de4c5d 639 __I uint32_t HcDoneHead;
group-onsemi 0:098463de4c5d 640 __IO uint32_t HcFmInterval;
group-onsemi 0:098463de4c5d 641 __I uint32_t HcFmRemaining;
group-onsemi 0:098463de4c5d 642 __I uint32_t HcFmNumber;
group-onsemi 0:098463de4c5d 643 __IO uint32_t HcPeriodicStart;
group-onsemi 0:098463de4c5d 644 __IO uint32_t HcLSTreshold;
group-onsemi 0:098463de4c5d 645 __IO uint32_t HcRhDescriptorA;
group-onsemi 0:098463de4c5d 646 __IO uint32_t HcRhDescriptorB;
group-onsemi 0:098463de4c5d 647 __IO uint32_t HcRhStatus;
group-onsemi 0:098463de4c5d 648 __IO uint32_t HcRhPortStatus1;
group-onsemi 0:098463de4c5d 649 __IO uint32_t HcRhPortStatus2;
group-onsemi 0:098463de4c5d 650 uint32_t RESERVED0[40];
group-onsemi 0:098463de4c5d 651 __I uint32_t Module_ID;
group-onsemi 0:098463de4c5d 652
group-onsemi 0:098463de4c5d 653 __I uint32_t OTGIntSt; /* USB On-The-Go Registers */
group-onsemi 0:098463de4c5d 654 __IO uint32_t OTGIntEn;
group-onsemi 0:098463de4c5d 655 __O uint32_t OTGIntSet;
group-onsemi 0:098463de4c5d 656 __O uint32_t OTGIntClr;
group-onsemi 0:098463de4c5d 657 __IO uint32_t OTGStCtrl;
group-onsemi 0:098463de4c5d 658 __IO uint32_t OTGTmr;
group-onsemi 0:098463de4c5d 659 uint32_t RESERVED1[58];
group-onsemi 0:098463de4c5d 660
group-onsemi 0:098463de4c5d 661 __I uint32_t USBDevIntSt; /* USB Device Interrupt Registers */
group-onsemi 0:098463de4c5d 662 __IO uint32_t USBDevIntEn;
group-onsemi 0:098463de4c5d 663 __O uint32_t USBDevIntClr;
group-onsemi 0:098463de4c5d 664 __O uint32_t USBDevIntSet;
group-onsemi 0:098463de4c5d 665
group-onsemi 0:098463de4c5d 666 __O uint32_t USBCmdCode; /* USB Device SIE Command Registers */
group-onsemi 0:098463de4c5d 667 __I uint32_t USBCmdData;
group-onsemi 0:098463de4c5d 668
group-onsemi 0:098463de4c5d 669 __I uint32_t USBRxData; /* USB Device Transfer Registers */
group-onsemi 0:098463de4c5d 670 __O uint32_t USBTxData;
group-onsemi 0:098463de4c5d 671 __I uint32_t USBRxPLen;
group-onsemi 0:098463de4c5d 672 __O uint32_t USBTxPLen;
group-onsemi 0:098463de4c5d 673 __IO uint32_t USBCtrl;
group-onsemi 0:098463de4c5d 674 __O uint32_t USBDevIntPri;
group-onsemi 0:098463de4c5d 675
group-onsemi 0:098463de4c5d 676 __I uint32_t USBEpIntSt; /* USB Device Endpoint Interrupt Regs */
group-onsemi 0:098463de4c5d 677 __IO uint32_t USBEpIntEn;
group-onsemi 0:098463de4c5d 678 __O uint32_t USBEpIntClr;
group-onsemi 0:098463de4c5d 679 __O uint32_t USBEpIntSet;
group-onsemi 0:098463de4c5d 680 __O uint32_t USBEpIntPri;
group-onsemi 0:098463de4c5d 681
group-onsemi 0:098463de4c5d 682 __IO uint32_t USBReEp; /* USB Device Endpoint Realization Reg*/
group-onsemi 0:098463de4c5d 683 __O uint32_t USBEpInd;
group-onsemi 0:098463de4c5d 684 __IO uint32_t USBMaxPSize;
group-onsemi 0:098463de4c5d 685
group-onsemi 0:098463de4c5d 686 __I uint32_t USBDMARSt; /* USB Device DMA Registers */
group-onsemi 0:098463de4c5d 687 __O uint32_t USBDMARClr;
group-onsemi 0:098463de4c5d 688 __O uint32_t USBDMARSet;
group-onsemi 0:098463de4c5d 689 uint32_t RESERVED2[9];
group-onsemi 0:098463de4c5d 690 __IO uint32_t USBUDCAH;
group-onsemi 0:098463de4c5d 691 __I uint32_t USBEpDMASt;
group-onsemi 0:098463de4c5d 692 __O uint32_t USBEpDMAEn;
group-onsemi 0:098463de4c5d 693 __O uint32_t USBEpDMADis;
group-onsemi 0:098463de4c5d 694 __I uint32_t USBDMAIntSt;
group-onsemi 0:098463de4c5d 695 __IO uint32_t USBDMAIntEn;
group-onsemi 0:098463de4c5d 696 uint32_t RESERVED3[2];
group-onsemi 0:098463de4c5d 697 __I uint32_t USBEoTIntSt;
group-onsemi 0:098463de4c5d 698 __O uint32_t USBEoTIntClr;
group-onsemi 0:098463de4c5d 699 __O uint32_t USBEoTIntSet;
group-onsemi 0:098463de4c5d 700 __I uint32_t USBNDDRIntSt;
group-onsemi 0:098463de4c5d 701 __O uint32_t USBNDDRIntClr;
group-onsemi 0:098463de4c5d 702 __O uint32_t USBNDDRIntSet;
group-onsemi 0:098463de4c5d 703 __I uint32_t USBSysErrIntSt;
group-onsemi 0:098463de4c5d 704 __O uint32_t USBSysErrIntClr;
group-onsemi 0:098463de4c5d 705 __O uint32_t USBSysErrIntSet;
group-onsemi 0:098463de4c5d 706 uint32_t RESERVED4[15];
group-onsemi 0:098463de4c5d 707
group-onsemi 0:098463de4c5d 708 __I uint32_t I2C_RX; /* USB OTG I2C Registers */
group-onsemi 0:098463de4c5d 709 __O uint32_t I2C_WO;
group-onsemi 0:098463de4c5d 710 __I uint32_t I2C_STS;
group-onsemi 0:098463de4c5d 711 __IO uint32_t I2C_CTL;
group-onsemi 0:098463de4c5d 712 __IO uint32_t I2C_CLKHI;
group-onsemi 0:098463de4c5d 713 __O uint32_t I2C_CLKLO;
group-onsemi 0:098463de4c5d 714 uint32_t RESERVED5[823];
group-onsemi 0:098463de4c5d 715
group-onsemi 0:098463de4c5d 716 union {
group-onsemi 0:098463de4c5d 717 __IO uint32_t USBClkCtrl; /* USB Clock Control Registers */
group-onsemi 0:098463de4c5d 718 __IO uint32_t OTGClkCtrl;
group-onsemi 0:098463de4c5d 719 };
group-onsemi 0:098463de4c5d 720 union {
group-onsemi 0:098463de4c5d 721 __I uint32_t USBClkSt;
group-onsemi 0:098463de4c5d 722 __I uint32_t OTGClkSt;
group-onsemi 0:098463de4c5d 723 };
group-onsemi 0:098463de4c5d 724 } LPC_USB_TypeDef;
group-onsemi 0:098463de4c5d 725
group-onsemi 0:098463de4c5d 726 /*------------- Ethernet Media Access Controller (EMAC) ----------------------*/
group-onsemi 0:098463de4c5d 727 typedef struct
group-onsemi 0:098463de4c5d 728 {
group-onsemi 0:098463de4c5d 729 __IO uint32_t MAC1; /* MAC Registers */
group-onsemi 0:098463de4c5d 730 __IO uint32_t MAC2;
group-onsemi 0:098463de4c5d 731 __IO uint32_t IPGT;
group-onsemi 0:098463de4c5d 732 __IO uint32_t IPGR;
group-onsemi 0:098463de4c5d 733 __IO uint32_t CLRT;
group-onsemi 0:098463de4c5d 734 __IO uint32_t MAXF;
group-onsemi 0:098463de4c5d 735 __IO uint32_t SUPP;
group-onsemi 0:098463de4c5d 736 __IO uint32_t TEST;
group-onsemi 0:098463de4c5d 737 __IO uint32_t MCFG;
group-onsemi 0:098463de4c5d 738 __IO uint32_t MCMD;
group-onsemi 0:098463de4c5d 739 __IO uint32_t MADR;
group-onsemi 0:098463de4c5d 740 __O uint32_t MWTD;
group-onsemi 0:098463de4c5d 741 __I uint32_t MRDD;
group-onsemi 0:098463de4c5d 742 __I uint32_t MIND;
group-onsemi 0:098463de4c5d 743 uint32_t RESERVED0[2];
group-onsemi 0:098463de4c5d 744 __IO uint32_t SA0;
group-onsemi 0:098463de4c5d 745 __IO uint32_t SA1;
group-onsemi 0:098463de4c5d 746 __IO uint32_t SA2;
group-onsemi 0:098463de4c5d 747 uint32_t RESERVED1[45];
group-onsemi 0:098463de4c5d 748 __IO uint32_t Command; /* Control Registers */
group-onsemi 0:098463de4c5d 749 __I uint32_t Status;
group-onsemi 0:098463de4c5d 750 __IO uint32_t RxDescriptor;
group-onsemi 0:098463de4c5d 751 __IO uint32_t RxStatus;
group-onsemi 0:098463de4c5d 752 __IO uint32_t RxDescriptorNumber;
group-onsemi 0:098463de4c5d 753 __I uint32_t RxProduceIndex;
group-onsemi 0:098463de4c5d 754 __IO uint32_t RxConsumeIndex;
group-onsemi 0:098463de4c5d 755 __IO uint32_t TxDescriptor;
group-onsemi 0:098463de4c5d 756 __IO uint32_t TxStatus;
group-onsemi 0:098463de4c5d 757 __IO uint32_t TxDescriptorNumber;
group-onsemi 0:098463de4c5d 758 __IO uint32_t TxProduceIndex;
group-onsemi 0:098463de4c5d 759 __I uint32_t TxConsumeIndex;
group-onsemi 0:098463de4c5d 760 uint32_t RESERVED2[10];
group-onsemi 0:098463de4c5d 761 __I uint32_t TSV0;
group-onsemi 0:098463de4c5d 762 __I uint32_t TSV1;
group-onsemi 0:098463de4c5d 763 __I uint32_t RSV;
group-onsemi 0:098463de4c5d 764 uint32_t RESERVED3[3];
group-onsemi 0:098463de4c5d 765 __IO uint32_t FlowControlCounter;
group-onsemi 0:098463de4c5d 766 __I uint32_t FlowControlStatus;
group-onsemi 0:098463de4c5d 767 uint32_t RESERVED4[34];
group-onsemi 0:098463de4c5d 768 __IO uint32_t RxFilterCtrl; /* Rx Filter Registers */
group-onsemi 0:098463de4c5d 769 __IO uint32_t RxFilterWoLStatus;
group-onsemi 0:098463de4c5d 770 __IO uint32_t RxFilterWoLClear;
group-onsemi 0:098463de4c5d 771 uint32_t RESERVED5;
group-onsemi 0:098463de4c5d 772 __IO uint32_t HashFilterL;
group-onsemi 0:098463de4c5d 773 __IO uint32_t HashFilterH;
group-onsemi 0:098463de4c5d 774 uint32_t RESERVED6[882];
group-onsemi 0:098463de4c5d 775 __I uint32_t IntStatus; /* Module Control Registers */
group-onsemi 0:098463de4c5d 776 __IO uint32_t IntEnable;
group-onsemi 0:098463de4c5d 777 __O uint32_t IntClear;
group-onsemi 0:098463de4c5d 778 __O uint32_t IntSet;
group-onsemi 0:098463de4c5d 779 uint32_t RESERVED7;
group-onsemi 0:098463de4c5d 780 __IO uint32_t PowerDown;
group-onsemi 0:098463de4c5d 781 uint32_t RESERVED8;
group-onsemi 0:098463de4c5d 782 __IO uint32_t Module_ID;
group-onsemi 0:098463de4c5d 783 } LPC_EMAC_TypeDef;
group-onsemi 0:098463de4c5d 784
group-onsemi 0:098463de4c5d 785 /*-------------------- External Memory Controller (EMC) ----------------------*/
group-onsemi 0:098463de4c5d 786 typedef struct
group-onsemi 0:098463de4c5d 787 {
group-onsemi 0:098463de4c5d 788 __IO uint32_t EMCControl;
group-onsemi 0:098463de4c5d 789 __I uint32_t EMCStatus;
group-onsemi 0:098463de4c5d 790 __IO uint32_t EMCConfig;
group-onsemi 0:098463de4c5d 791 uint32_t RESERVED1[5];
group-onsemi 0:098463de4c5d 792 __IO uint32_t EMCDynamicControl;
group-onsemi 0:098463de4c5d 793 __IO uint32_t EMCDynamicRefresh;
group-onsemi 0:098463de4c5d 794 __IO uint32_t EMCDynamicReadConfig;
group-onsemi 0:098463de4c5d 795 uint32_t RESERVED2;
group-onsemi 0:098463de4c5d 796 __IO uint32_t EMCDynamicRP;
group-onsemi 0:098463de4c5d 797 __IO uint32_t EMCDynamicRAS;
group-onsemi 0:098463de4c5d 798 __IO uint32_t EMCDynamicSREX;
group-onsemi 0:098463de4c5d 799 __IO uint32_t EMCDynamicAPR;
group-onsemi 0:098463de4c5d 800 __IO uint32_t EMCDynamicDAL;
group-onsemi 0:098463de4c5d 801 __IO uint32_t EMCDynamicWR;
group-onsemi 0:098463de4c5d 802 __IO uint32_t EMCDynamicRC;
group-onsemi 0:098463de4c5d 803 __IO uint32_t EMCDynamicRFC;
group-onsemi 0:098463de4c5d 804 __IO uint32_t EMCDynamicXSR;
group-onsemi 0:098463de4c5d 805 __IO uint32_t EMCDynamicRRD;
group-onsemi 0:098463de4c5d 806 __IO uint32_t EMCDynamicMRD;
group-onsemi 0:098463de4c5d 807 uint32_t RESERVED3[9];
group-onsemi 0:098463de4c5d 808 __IO uint32_t EMCStaticExtendedWait;
group-onsemi 0:098463de4c5d 809 uint32_t RESERVED4[31];
group-onsemi 0:098463de4c5d 810 __IO uint32_t EMCDynamicConfig0;
group-onsemi 0:098463de4c5d 811 __IO uint32_t EMCDynamicRasCas0;
group-onsemi 0:098463de4c5d 812 uint32_t RESERVED5[6];
group-onsemi 0:098463de4c5d 813 __IO uint32_t EMCDynamicConfig1;
group-onsemi 0:098463de4c5d 814 __IO uint32_t EMCDynamicRasCas1;
group-onsemi 0:098463de4c5d 815 uint32_t RESERVED6[6];
group-onsemi 0:098463de4c5d 816 __IO uint32_t EMCDynamicConfic2;
group-onsemi 0:098463de4c5d 817 __IO uint32_t EMCDynamicRasCas2;
group-onsemi 0:098463de4c5d 818 uint32_t RESERVED7[6];
group-onsemi 0:098463de4c5d 819 __IO uint32_t EMCDynamicConfig3;
group-onsemi 0:098463de4c5d 820 __IO uint32_t EMCDynamicRasCas3;
group-onsemi 0:098463de4c5d 821 uint32_t RESERVED8[38];
group-onsemi 0:098463de4c5d 822 __IO uint32_t EMCStaticConfig0;
group-onsemi 0:098463de4c5d 823 __IO uint32_t EMCStaticWaitWen0;
group-onsemi 0:098463de4c5d 824 __IO uint32_t EMCStaticWaitOen0;
group-onsemi 0:098463de4c5d 825 __IO uint32_t EMCStaticWaitRd0;
group-onsemi 0:098463de4c5d 826 __IO uint32_t EMCStaticWaitPage0;
group-onsemi 0:098463de4c5d 827 __IO uint32_t EMCStaticWaitWr0;
group-onsemi 0:098463de4c5d 828 __IO uint32_t EMCStaticWaitTurn0;
group-onsemi 0:098463de4c5d 829 uint32_t RESERVED9;
group-onsemi 0:098463de4c5d 830 __IO uint32_t EMCStaticConfig1;
group-onsemi 0:098463de4c5d 831 __IO uint32_t EMCStaticWaitWen1;
group-onsemi 0:098463de4c5d 832 __IO uint32_t EMCStaticWaitOen1;
group-onsemi 0:098463de4c5d 833 __IO uint32_t EMCStaticWaitRd1;
group-onsemi 0:098463de4c5d 834 __IO uint32_t EMCStaticWaitPage1;
group-onsemi 0:098463de4c5d 835 __IO uint32_t EMCStaticWaitWr1;
group-onsemi 0:098463de4c5d 836 __IO uint32_t EMCStaticWaitTurn1;
group-onsemi 0:098463de4c5d 837 uint32_t RESERVED10;
group-onsemi 0:098463de4c5d 838 __IO uint32_t EMCStaticConfig2;
group-onsemi 0:098463de4c5d 839 __IO uint32_t EMCStaticWaitWen2;
group-onsemi 0:098463de4c5d 840 __IO uint32_t EMCStaticWaitOen2;
group-onsemi 0:098463de4c5d 841 __IO uint32_t EMCStaticWaitRd2;
group-onsemi 0:098463de4c5d 842 __IO uint32_t EMCStaticWaitPage2;
group-onsemi 0:098463de4c5d 843 __IO uint32_t EMCStaticWaitWr2;
group-onsemi 0:098463de4c5d 844 __IO uint32_t EMCStaticWaitTurn2;
group-onsemi 0:098463de4c5d 845 uint32_t RESERVED11;
group-onsemi 0:098463de4c5d 846 __IO uint32_t EMCStaticConfig3;
group-onsemi 0:098463de4c5d 847 __IO uint32_t EMCStaticWaitWen3;
group-onsemi 0:098463de4c5d 848 __IO uint32_t EMCStaticWaitOen3;
group-onsemi 0:098463de4c5d 849 __IO uint32_t EMCStaticWaitRd3;
group-onsemi 0:098463de4c5d 850 __IO uint32_t EMCStaticWaitPage3;
group-onsemi 0:098463de4c5d 851 __IO uint32_t EMCStaticWaitWr3;
group-onsemi 0:098463de4c5d 852 __IO uint32_t EMCStaticWaitTurn3;
group-onsemi 0:098463de4c5d 853 } LPC_EMC_TypeDef;
group-onsemi 0:098463de4c5d 854 #if defined ( __CC_ARM )
group-onsemi 0:098463de4c5d 855 #pragma no_anon_unions
group-onsemi 0:098463de4c5d 856 #endif
group-onsemi 0:098463de4c5d 857
group-onsemi 0:098463de4c5d 858 /******************************************************************************/
group-onsemi 0:098463de4c5d 859 /* Peripheral memory map */
group-onsemi 0:098463de4c5d 860 /******************************************************************************/
group-onsemi 0:098463de4c5d 861 /* Base addresses */
group-onsemi 0:098463de4c5d 862
group-onsemi 0:098463de4c5d 863 /* AHB Peripheral # 0 */
group-onsemi 0:098463de4c5d 864
group-onsemi 0:098463de4c5d 865 /*
group-onsemi 0:098463de4c5d 866 #define FLASH_BASE (0x00000000UL)
group-onsemi 0:098463de4c5d 867 #define RAM_BASE (0x10000000UL)
group-onsemi 0:098463de4c5d 868 #define GPIO_BASE (0x2009C000UL)
group-onsemi 0:098463de4c5d 869 #define APB0_BASE (0x40000000UL)
group-onsemi 0:098463de4c5d 870 #define APB1_BASE (0x40080000UL)
group-onsemi 0:098463de4c5d 871 #define AHB_BASE (0x50000000UL)
group-onsemi 0:098463de4c5d 872 #define CM3_BASE (0xE0000000UL)
group-onsemi 0:098463de4c5d 873 */
group-onsemi 0:098463de4c5d 874
group-onsemi 0:098463de4c5d 875 // TODO - #define VIC_BASE_ADDR 0xFFFFF000
group-onsemi 0:098463de4c5d 876
group-onsemi 0:098463de4c5d 877 #define LPC_WDT_BASE (0xE0000000)
group-onsemi 0:098463de4c5d 878 #define LPC_TIM0_BASE (0xE0004000)
group-onsemi 0:098463de4c5d 879 #define LPC_TIM1_BASE (0xE0008000)
group-onsemi 0:098463de4c5d 880 #define LPC_UART0_BASE (0xE000C000)
group-onsemi 0:098463de4c5d 881 #define LPC_UART1_BASE (0xE0010000)
group-onsemi 0:098463de4c5d 882 #define LPC_PWM1_BASE (0xE0018000)
group-onsemi 0:098463de4c5d 883 #define LPC_I2C0_BASE (0xE001C000)
group-onsemi 0:098463de4c5d 884 #define LPC_SPI_BASE (0xE0020000)
group-onsemi 0:098463de4c5d 885 #define LPC_RTC_BASE (0xE0024000)
group-onsemi 0:098463de4c5d 886 #define LPC_GPIOINT_BASE (0xE0028080)
group-onsemi 0:098463de4c5d 887 #define LPC_PINCON_BASE (0xE002C000)
group-onsemi 0:098463de4c5d 888 #define LPC_SSP1_BASE (0xE0030000)
group-onsemi 0:098463de4c5d 889 #define LPC_ADC_BASE (0xE0034000)
group-onsemi 0:098463de4c5d 890 #define LPC_CANAF_RAM_BASE (0xE0038000)
group-onsemi 0:098463de4c5d 891 #define LPC_CANAF_BASE (0xE003C000)
group-onsemi 0:098463de4c5d 892 #define LPC_CANCR_BASE (0xE0040000)
group-onsemi 0:098463de4c5d 893 #define LPC_CAN1_BASE (0xE0044000)
group-onsemi 0:098463de4c5d 894 #define LPC_CAN2_BASE (0xE0048000)
group-onsemi 0:098463de4c5d 895 #define LPC_I2C1_BASE (0xE005C000)
group-onsemi 0:098463de4c5d 896 #define LPC_SSP0_BASE (0xE0068000)
group-onsemi 0:098463de4c5d 897 #define LPC_DAC_BASE (0xE006C000)
group-onsemi 0:098463de4c5d 898 #define LPC_TIM2_BASE (0xE0070000)
group-onsemi 0:098463de4c5d 899 #define LPC_TIM3_BASE (0xE0074000)
group-onsemi 0:098463de4c5d 900 #define LPC_UART2_BASE (0xE0078000)
group-onsemi 0:098463de4c5d 901 #define LPC_UART3_BASE (0xE007C000)
group-onsemi 0:098463de4c5d 902 #define LPC_I2C2_BASE (0xE0080000)
group-onsemi 0:098463de4c5d 903 #define LPC_I2S_BASE (0xE0088000)
group-onsemi 0:098463de4c5d 904 #define LPC_MCI_BASE (0xE008C000)
group-onsemi 0:098463de4c5d 905 #define LPC_SC_BASE (0xE01FC000)
group-onsemi 0:098463de4c5d 906 #define LPC_EMAC_BASE (0xFFE00000)
group-onsemi 0:098463de4c5d 907 #define LPC_GPDMA_BASE (0xFFE04000)
group-onsemi 0:098463de4c5d 908 #define LPC_GPDMACH0_BASE (0xFFE04100)
group-onsemi 0:098463de4c5d 909 #define LPC_GPDMACH1_BASE (0xFFE04120)
group-onsemi 0:098463de4c5d 910 #define LPC_EMC_BASE (0xFFE08000)
group-onsemi 0:098463de4c5d 911 #define LPC_USB_BASE (0xFFE0C000)
group-onsemi 0:098463de4c5d 912 #define LPC_VIC_BASE (0xFFFFF000)
group-onsemi 0:098463de4c5d 913
group-onsemi 0:098463de4c5d 914 /* GPIOs */
group-onsemi 0:098463de4c5d 915 #define LPC_GPIO0_BASE (0x3FFFC000)
group-onsemi 0:098463de4c5d 916 #define LPC_GPIO1_BASE (0x3FFFC020)
group-onsemi 0:098463de4c5d 917 #define LPC_GPIO2_BASE (0x3FFFC040)
group-onsemi 0:098463de4c5d 918 #define LPC_GPIO3_BASE (0x3FFFC060)
group-onsemi 0:098463de4c5d 919 #define LPC_GPIO4_BASE (0x3FFFC080)
group-onsemi 0:098463de4c5d 920
group-onsemi 0:098463de4c5d 921
group-onsemi 0:098463de4c5d 922 /******************************************************************************/
group-onsemi 0:098463de4c5d 923 /* Peripheral declaration */
group-onsemi 0:098463de4c5d 924 /******************************************************************************/
group-onsemi 0:098463de4c5d 925 #define LPC_SC (( LPC_SC_TypeDef *) LPC_SC_BASE)
group-onsemi 0:098463de4c5d 926 #define LPC_GPIO0 (( LPC_GPIO_TypeDef *) LPC_GPIO0_BASE)
group-onsemi 0:098463de4c5d 927 #define LPC_GPIO1 (( LPC_GPIO_TypeDef *) LPC_GPIO1_BASE)
group-onsemi 0:098463de4c5d 928 #define LPC_GPIO2 (( LPC_GPIO_TypeDef *) LPC_GPIO2_BASE)
group-onsemi 0:098463de4c5d 929 #define LPC_GPIO3 (( LPC_GPIO_TypeDef *) LPC_GPIO3_BASE)
group-onsemi 0:098463de4c5d 930 #define LPC_GPIO4 (( LPC_GPIO_TypeDef *) LPC_GPIO4_BASE)
group-onsemi 0:098463de4c5d 931 #define LPC_WDT (( LPC_WDT_TypeDef *) LPC_WDT_BASE)
group-onsemi 0:098463de4c5d 932 #define LPC_TIM0 (( LPC_TIM_TypeDef *) LPC_TIM0_BASE)
group-onsemi 0:098463de4c5d 933 #define LPC_TIM1 (( LPC_TIM_TypeDef *) LPC_TIM1_BASE)
group-onsemi 0:098463de4c5d 934 #define LPC_TIM2 (( LPC_TIM_TypeDef *) LPC_TIM2_BASE)
group-onsemi 0:098463de4c5d 935 #define LPC_TIM3 (( LPC_TIM_TypeDef *) LPC_TIM3_BASE)
group-onsemi 0:098463de4c5d 936 #define LPC_UART0 (( LPC_UART_TypeDef *) LPC_UART0_BASE)
group-onsemi 0:098463de4c5d 937 #define LPC_UART1 (( LPC_UART1_TypeDef *) LPC_UART1_BASE)
group-onsemi 0:098463de4c5d 938 #define LPC_UART2 (( LPC_UART_TypeDef *) LPC_UART2_BASE)
group-onsemi 0:098463de4c5d 939 #define LPC_UART3 (( LPC_UART_TypeDef *) LPC_UART3_BASE)
group-onsemi 0:098463de4c5d 940 #define LPC_PWM1 (( LPC_PWM_TypeDef *) LPC_PWM1_BASE)
group-onsemi 0:098463de4c5d 941 #define LPC_I2C0 (( LPC_I2C_TypeDef *) LPC_I2C0_BASE)
group-onsemi 0:098463de4c5d 942 #define LPC_I2C1 (( LPC_I2C_TypeDef *) LPC_I2C1_BASE)
group-onsemi 0:098463de4c5d 943 #define LPC_I2C2 (( LPC_I2C_TypeDef *) LPC_I2C2_BASE)
group-onsemi 0:098463de4c5d 944 #define LPC_I2S (( LPC_I2S_TypeDef *) LPC_I2S_BASE)
group-onsemi 0:098463de4c5d 945 #define LPC_SPI (( LPC_SPI_TypeDef *) LPC_SPI_BASE)
group-onsemi 0:098463de4c5d 946 #define LPC_RTC (( LPC_RTC_TypeDef *) LPC_RTC_BASE)
group-onsemi 0:098463de4c5d 947 #define LPC_GPIOINT (( LPC_GPIOINT_TypeDef *) LPC_GPIOINT_BASE)
group-onsemi 0:098463de4c5d 948 #define LPC_PINCON (( LPC_PINCON_TypeDef *) LPC_PINCON_BASE)
group-onsemi 0:098463de4c5d 949 #define LPC_SSP0 (( LPC_SSP_TypeDef *) LPC_SSP0_BASE)
group-onsemi 0:098463de4c5d 950 #define LPC_SSP1 (( LPC_SSP_TypeDef *) LPC_SSP1_BASE)
group-onsemi 0:098463de4c5d 951 #define LPC_ADC (( LPC_ADC_TypeDef *) LPC_ADC_BASE)
group-onsemi 0:098463de4c5d 952 #define LPC_DAC (( LPC_DAC_TypeDef *) LPC_DAC_BASE)
group-onsemi 0:098463de4c5d 953 #define LPC_CANAF_RAM ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE)
group-onsemi 0:098463de4c5d 954 #define LPC_CANAF (( LPC_CANAF_TypeDef *) LPC_CANAF_BASE)
group-onsemi 0:098463de4c5d 955 #define LPC_CANCR (( LPC_CANCR_TypeDef *) LPC_CANCR_BASE)
group-onsemi 0:098463de4c5d 956 #define LPC_CAN1 (( LPC_CAN_TypeDef *) LPC_CAN1_BASE)
group-onsemi 0:098463de4c5d 957 #define LPC_CAN2 (( LPC_CAN_TypeDef *) LPC_CAN2_BASE)
group-onsemi 0:098463de4c5d 958 #define LPC_MCI (( LPC_MCI_TypeDef *) LPC_MCI_BASE)
group-onsemi 0:098463de4c5d 959 #define LPC_EMAC (( LPC_EMAC_TypeDef *) LPC_EMAC_BASE)
group-onsemi 0:098463de4c5d 960 #define LPC_GPDMA (( LPC_GPDMA_TypeDef *) LPC_GPDMA_BASE)
group-onsemi 0:098463de4c5d 961 #define LPC_GPDMACH0 (( LPC_GPDMACH_TypeDef *) LPC_GPDMACH0_BASE)
group-onsemi 0:098463de4c5d 962 #define LPC_GPDMACH1 (( LPC_GPDMACH_TypeDef *) LPC_GPDMACH1_BASE)
group-onsemi 0:098463de4c5d 963 #define LPC_USB (( LPC_USB_TypeDef *) LPC_USB_BASE)
group-onsemi 0:098463de4c5d 964 #define LPC_VIC (( LPC_VIC_TypeDef *) LPC_VIC_BASE)
group-onsemi 0:098463de4c5d 965 #define LPC_EMC (( LPC_EMC_TypeDef *) LPC_EMC_BASE)
group-onsemi 0:098463de4c5d 966
group-onsemi 0:098463de4c5d 967 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 968 }
group-onsemi 0:098463de4c5d 969 #endif
group-onsemi 0:098463de4c5d 970
group-onsemi 0:098463de4c5d 971 #endif // __LPC24xx_H
group-onsemi 0:098463de4c5d 972