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Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_Maxim/TARGET_MAX32625/mxc/pmu.h@1:f30bdcd2b33b, 2017-02-27 (annotated)

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d 
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /*******************************************************************************
group-onsemi 0:098463de4c5d 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Permission is hereby granted, free of charge, to any person obtaining a
group-onsemi 0:098463de4c5d 5 * copy of this software and associated documentation files (the "Software"),
group-onsemi 0:098463de4c5d 6 * to deal in the Software without restriction, including without limitation
group-onsemi 0:098463de4c5d 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
group-onsemi 0:098463de4c5d 8 * and/or sell copies of the Software, and to permit persons to whom the
group-onsemi 0:098463de4c5d 9 * Software is furnished to do so, subject to the following conditions:
group-onsemi 0:098463de4c5d 10 *
group-onsemi 0:098463de4c5d 11 * The above copyright notice and this permission notice shall be included
group-onsemi 0:098463de4c5d 12 * in all copies or substantial portions of the Software.
group-onsemi 0:098463de4c5d 13 *
group-onsemi 0:098463de4c5d 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
group-onsemi 0:098463de4c5d 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
group-onsemi 0:098463de4c5d 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
group-onsemi 0:098463de4c5d 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
group-onsemi 0:098463de4c5d 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
group-onsemi 0:098463de4c5d 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
group-onsemi 0:098463de4c5d 20 * OTHER DEALINGS IN THE SOFTWARE.
group-onsemi 0:098463de4c5d 21 *
group-onsemi 0:098463de4c5d 22 * Except as contained in this notice, the name of Maxim Integrated
group-onsemi 0:098463de4c5d 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
group-onsemi 0:098463de4c5d 24 * Products, Inc. Branding Policy.
group-onsemi 0:098463de4c5d 25 *
group-onsemi 0:098463de4c5d 26 * The mere transfer of this software does not imply any licenses
group-onsemi 0:098463de4c5d 27 * of trade secrets, proprietary technology, copyrights, patents,
group-onsemi 0:098463de4c5d 28 * trademarks, maskwork rights, or any other form of intellectual
group-onsemi 0:098463de4c5d 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
group-onsemi 0:098463de4c5d 30 * ownership rights.
group-onsemi 0:098463de4c5d 31 *
group-onsemi 0:098463de4c5d 32 * $Date: 2016-06-21 16:14:41 -0500 (Tue, 21 Jun 2016) $
group-onsemi 0:098463de4c5d 33 * $Revision: 23446 $
group-onsemi 0:098463de4c5d 34 *
group-onsemi 0:098463de4c5d 35 ******************************************************************************/
group-onsemi 0:098463de4c5d 36
group-onsemi 0:098463de4c5d 37 /**
group-onsemi 0:098463de4c5d 38 * @file pmu.h
group-onsemi 0:098463de4c5d 39 * @addtogroup pmu Peripheral Management Unit
group-onsemi 0:098463de4c5d 40 * @{
group-onsemi 0:098463de4c5d 41 * @brief This is the API for the peripheral management unit.
group-onsemi 0:098463de4c5d 42 */
group-onsemi 0:098463de4c5d 43
group-onsemi 0:098463de4c5d 44 #ifndef _PMU_H_
group-onsemi 0:098463de4c5d 45 #define _PMU_H_
group-onsemi 0:098463de4c5d 46
group-onsemi 0:098463de4c5d 47 #include "pmu_regs.h"
group-onsemi 0:098463de4c5d 48
group-onsemi 0:098463de4c5d 49 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 50 extern "C" {
group-onsemi 0:098463de4c5d 51 #endif
group-onsemi 0:098463de4c5d 52
group-onsemi 0:098463de4c5d 53 /// @brief Defines Clock scale used for Timeout
group-onsemi 0:098463de4c5d 54 typedef enum {
group-onsemi 0:098463de4c5d 55 PMU_PS_SEL_DISABLE = MXC_V_PMU_CFG_PS_SEL_DISABLE, // Timeout disabled
group-onsemi 0:098463de4c5d 56 PMU_PS_SEL_DIV_2_8 = MXC_V_PMU_CFG_PS_SEL_DIV_2_8, // Timeout clk = PMU clock / 2^8 = 256
group-onsemi 0:098463de4c5d 57 PMU_PS_SEL_DIV_2_16 = MXC_V_PMU_CFG_PS_SEL_DIV_2_16, // Timeout clk = PMU clock / 2^16 = 65536
group-onsemi 0:098463de4c5d 58 PMU_PS_SEL_DIV_2_24 = MXC_V_PMU_CFG_PS_SEL_DIV_2_24 // Timeout clk = PMU clock / 2^24 = 16777216
group-onsemi 0:098463de4c5d 59 }pmu_ps_sel_t;
group-onsemi 0:098463de4c5d 60
group-onsemi 0:098463de4c5d 61 /// @brief Defines the number of clk ticks for timeout duration
group-onsemi 0:098463de4c5d 62 typedef enum {
group-onsemi 0:098463de4c5d 63 PMU_TO_SEL_TICKS_4 = MXC_V_PMU_CFG_TO_SEL_TICKS_4, //timeout = 4 * Timeout clk period
group-onsemi 0:098463de4c5d 64 PMU_TO_SEL_TICKS_8 = MXC_V_PMU_CFG_TO_SEL_TICKS_8, //timeout = 8 * Timeout clk period
group-onsemi 0:098463de4c5d 65 PMU_TO_SEL_TICKS_16 = MXC_V_PMU_CFG_TO_SEL_TICKS_16, //timeout = 16 * Timeout clk period
group-onsemi 0:098463de4c5d 66 PMU_TO_SEL_TICKS_32 = MXC_V_PMU_CFG_TO_SEL_TICKS_32, //timeout = 32 * Timeout clk period
group-onsemi 0:098463de4c5d 67 PMU_TO_SEL_TICKS_64 = MXC_V_PMU_CFG_TO_SEL_TICKS_64, //timeout = 64 * Timeout clk period
group-onsemi 0:098463de4c5d 68 PMU_TO_SEL_TICKS_128 = MXC_V_PMU_CFG_TO_SEL_TICKS_128, //timeout = 128 * Timeout clk period
group-onsemi 0:098463de4c5d 69 PMU_TO_SEL_TICKS_256 = MXC_V_PMU_CFG_TO_SEL_TICKS_256, //timeout = 256 * Timeout clk period
group-onsemi 0:098463de4c5d 70 PMU_TO_SEL_TICKS_512 = MXC_V_PMU_CFG_TO_SEL_TICKS_512 //timeout = 512 * Timeout clk period
group-onsemi 0:098463de4c5d 71 }pmu_to_sel_t;
group-onsemi 0:098463de4c5d 72
group-onsemi 0:098463de4c5d 73
group-onsemi 0:098463de4c5d 74 /* The macros like the one below are designed to help build static PMU programs
group-onsemi 0:098463de4c5d 75 * as arrays of 32bit words.
group-onsemi 0:098463de4c5d 76 */
group-onsemi 0:098463de4c5d 77 #define PMU_IS(interrupt, stop) ((!!interrupt) << PMU_INT_POS) | ((!!stop) << PMU_STOP_POS)
group-onsemi 0:098463de4c5d 78
group-onsemi 0:098463de4c5d 79 typedef struct pmu_move_des_t {
group-onsemi 0:098463de4c5d 80 uint32_t op_code : 3; /* 0x0 */
group-onsemi 0:098463de4c5d 81 uint32_t interrupt : 1;
group-onsemi 0:098463de4c5d 82 uint32_t stop : 1;
group-onsemi 0:098463de4c5d 83 uint32_t read_size : 2;
group-onsemi 0:098463de4c5d 84 uint32_t read_inc : 1;
group-onsemi 0:098463de4c5d 85 uint32_t write_size : 2;
group-onsemi 0:098463de4c5d 86 uint32_t write_inc : 1;
group-onsemi 0:098463de4c5d 87 uint32_t cont : 1;
group-onsemi 0:098463de4c5d 88 uint32_t length : 20;
group-onsemi 0:098463de4c5d 89
group-onsemi 0:098463de4c5d 90 uint32_t write_address;
group-onsemi 0:098463de4c5d 91 uint32_t read_address;
group-onsemi 0:098463de4c5d 92 } pmu_move_des_t;
group-onsemi 0:098463de4c5d 93 #define PMU_MOVE(i, s, rs, ri, ws, wi, c, length, wa, ra) \
group-onsemi 0:098463de4c5d 94 (PMU_MOVE_OP | PMU_IS(i,s) | ((rs & 3) << PMU_MOVE_READS_POS) | ((!!ri) << PMU_MOVE_READI_POS) | \
group-onsemi 0:098463de4c5d 95 ((ws & 3) << PMU_MOVE_WRITES_POS) | ((!!wi) << PMU_MOVE_WRITEI_POS) | ((!!c) << PMU_MOVE_CONT_POS) | ((length & 0xFFFFF) << PMU_MOVE_LEN_POS)), wa, ra
group-onsemi 0:098463de4c5d 96
group-onsemi 0:098463de4c5d 97 /* new_value = value | (old_value & ~ mask) */
group-onsemi 0:098463de4c5d 98 typedef struct pmu_write_des_t {
group-onsemi 0:098463de4c5d 99 uint32_t op_code : 3; /* 0x1 */
group-onsemi 0:098463de4c5d 100 uint32_t interrupt : 1;
group-onsemi 0:098463de4c5d 101 uint32_t stop : 1;
group-onsemi 0:098463de4c5d 102 uint32_t : 3;
group-onsemi 0:098463de4c5d 103 uint32_t write_method : 4;
group-onsemi 0:098463de4c5d 104 uint32_t : 20;
group-onsemi 0:098463de4c5d 105
group-onsemi 0:098463de4c5d 106 uint32_t write_address;
group-onsemi 0:098463de4c5d 107 uint32_t value;
group-onsemi 0:098463de4c5d 108 uint32_t mask;
group-onsemi 0:098463de4c5d 109 } pmu_write_des_t;
group-onsemi 0:098463de4c5d 110 #define PMU_WRITE(i, s, wm, a, v, m) (PMU_WRITE_OP | PMU_IS(i,s) | ((wm & 0xF) << PMU_WRITE_METHOD_POS)), a, v, m
group-onsemi 0:098463de4c5d 111
group-onsemi 0:098463de4c5d 112 typedef struct pmu_wait_des_t {
group-onsemi 0:098463de4c5d 113 uint32_t op_code : 3; /* 0x2 */
group-onsemi 0:098463de4c5d 114 uint32_t interrupt : 1;
group-onsemi 0:098463de4c5d 115 uint32_t stop : 1;
group-onsemi 0:098463de4c5d 116 uint32_t wait : 1;
group-onsemi 0:098463de4c5d 117 uint32_t sel : 1;
group-onsemi 0:098463de4c5d 118 uint32_t : 25;
group-onsemi 0:098463de4c5d 119
group-onsemi 0:098463de4c5d 120 uint32_t mask1;
group-onsemi 0:098463de4c5d 121 uint32_t mask2;
group-onsemi 0:098463de4c5d 122 uint32_t wait_count;
group-onsemi 0:098463de4c5d 123 } pmu_wait_des_t;
group-onsemi 0:098463de4c5d 124 #define PMU_WAIT(i, s, sel, m1, m2, cnt) (PMU_WAIT_OP | PMU_IS(i,s) | ((cnt>0)?(1<<PMU_WAIT_WAIT_POS):0) | ((!!sel) << PMU_WAIT_SEL_POS)), \
group-onsemi 0:098463de4c5d 125 m1, m2, cnt
group-onsemi 0:098463de4c5d 126
group-onsemi 0:098463de4c5d 127 typedef struct pmu_jump_des_t {
group-onsemi 0:098463de4c5d 128 uint32_t op_code : 3; /* 0x3 */
group-onsemi 0:098463de4c5d 129 uint32_t interrupt : 1;
group-onsemi 0:098463de4c5d 130 uint32_t stop : 1;
group-onsemi 0:098463de4c5d 131 uint32_t : 27;
group-onsemi 0:098463de4c5d 132
group-onsemi 0:098463de4c5d 133 uint32_t address;
group-onsemi 0:098463de4c5d 134 } pmu_jump_des_t;
group-onsemi 0:098463de4c5d 135 #define PMU_JUMP(i, s, a) (PMU_JUMP_OP | PMU_IS(i,s)), a
group-onsemi 0:098463de4c5d 136
group-onsemi 0:098463de4c5d 137 typedef struct pmu_loop_des_t {
group-onsemi 0:098463de4c5d 138 uint32_t op_code : 3; /* 0x4 */
group-onsemi 0:098463de4c5d 139 uint32_t interrupt : 1;
group-onsemi 0:098463de4c5d 140 uint32_t stop : 1;
group-onsemi 0:098463de4c5d 141 uint32_t sel_counter : 1;
group-onsemi 0:098463de4c5d 142 uint32_t : 26;
group-onsemi 0:098463de4c5d 143
group-onsemi 0:098463de4c5d 144 uint32_t address;
group-onsemi 0:098463de4c5d 145 } pmu_loop_des_t;
group-onsemi 0:098463de4c5d 146 #define PMU_LOOP(i, s, c, a) (PMU_LOOP_OP | PMU_IS(i,s) | ((!!c) << PMU_LOOP_SEL_COUNTER_POS)), a
group-onsemi 0:098463de4c5d 147
group-onsemi 0:098463de4c5d 148 typedef struct pmu_poll_des_t {
group-onsemi 0:098463de4c5d 149 uint32_t op_code : 3; /* 0x5 */
group-onsemi 0:098463de4c5d 150 uint32_t interrupt : 1;
group-onsemi 0:098463de4c5d 151 uint32_t stop : 1;
group-onsemi 0:098463de4c5d 152 uint32_t : 2;
group-onsemi 0:098463de4c5d 153 uint32_t and : 1;
group-onsemi 0:098463de4c5d 154 uint32_t : 24;
group-onsemi 0:098463de4c5d 155
group-onsemi 0:098463de4c5d 156 uint32_t poll_addr;
group-onsemi 0:098463de4c5d 157 uint32_t data;
group-onsemi 0:098463de4c5d 158 uint32_t mask;
group-onsemi 0:098463de4c5d 159 uint32_t poll_interval;
group-onsemi 0:098463de4c5d 160 } pmu_poll_des_t;
group-onsemi 0:098463de4c5d 161 #define PMU_POLL(i, s, a, adr, d, m, per) (PMU_POLL_OP | PMU_IS(i,s) | ((!!a) << PMU_POLL_AND_POS)), adr, d, m, per
group-onsemi 0:098463de4c5d 162
group-onsemi 0:098463de4c5d 163 typedef struct pmu_branch_des_t {
group-onsemi 0:098463de4c5d 164 uint32_t op_code : 3; /* 0x6 */
group-onsemi 0:098463de4c5d 165 uint32_t interrupt : 1;
group-onsemi 0:098463de4c5d 166 uint32_t stop : 1;
group-onsemi 0:098463de4c5d 167 uint32_t : 2;
group-onsemi 0:098463de4c5d 168 uint32_t and : 1;
group-onsemi 0:098463de4c5d 169 uint32_t type : 3;
group-onsemi 0:098463de4c5d 170 uint32_t : 21;
group-onsemi 0:098463de4c5d 171
group-onsemi 0:098463de4c5d 172 uint32_t poll_addr;
group-onsemi 0:098463de4c5d 173 uint32_t data;
group-onsemi 0:098463de4c5d 174 uint32_t mask;
group-onsemi 0:098463de4c5d 175 uint32_t address;
group-onsemi 0:098463de4c5d 176 } pmu_branch_des_t;
group-onsemi 0:098463de4c5d 177 #define PMU_BRANCH(i, s, a, t, adr, d, m, badr) \
group-onsemi 0:098463de4c5d 178 (PMU_BRANCH_OP | PMU_IS(i,s) | ((!!a) << PMU_BRANCH_AND_POS)| ((t & 7) << PMU_BRANCH_TYPE_POS)), adr, d, m, badr
group-onsemi 0:098463de4c5d 179
group-onsemi 0:098463de4c5d 180 typedef struct pmu_transfer_des_t {
group-onsemi 0:098463de4c5d 181 uint32_t op_code : 3; /* 0x7 */
group-onsemi 0:098463de4c5d 182 uint32_t interrupt : 1;
group-onsemi 0:098463de4c5d 183 uint32_t stop : 1;
group-onsemi 0:098463de4c5d 184 uint32_t read_size : 2;
group-onsemi 0:098463de4c5d 185 uint32_t read_inc : 1;
group-onsemi 0:098463de4c5d 186 uint32_t write_size : 2;
group-onsemi 0:098463de4c5d 187 uint32_t write_inc : 1;
group-onsemi 0:098463de4c5d 188 uint32_t : 1;
group-onsemi 0:098463de4c5d 189 uint32_t tx_length : 20;
group-onsemi 0:098463de4c5d 190
group-onsemi 0:098463de4c5d 191 uint32_t write_address;
group-onsemi 0:098463de4c5d 192 uint32_t read_address;
group-onsemi 0:098463de4c5d 193
group-onsemi 0:098463de4c5d 194 uint32_t int_mask : 25; /* valid int_mask is from 0 - 24 */
group-onsemi 0:098463de4c5d 195 uint32_t : 1;
group-onsemi 0:098463de4c5d 196 uint32_t burst_size : 6;
group-onsemi 0:098463de4c5d 197 } pmu_transfer_des_t;
group-onsemi 0:098463de4c5d 198 #define PMU_TRANSFER(i, s, rs, ri, ws, wi, l, wa, ra, imsk, b) \
group-onsemi 0:098463de4c5d 199 (PMU_TRANSFER_OP | PMU_IS(i,s) | ((rs & 3) << PMU_TX_READS_POS) | ((!!ri) << PMU_TX_READI_POS) | \
group-onsemi 0:098463de4c5d 200 ((ws & 3) << PMU_TX_WRITES_POS) | ((!!wi) << PMU_TX_WRITEI_POS) | ((l & 0xFFFFF) << PMU_TX_LEN_POS)), wa, ra, \
group-onsemi 0:098463de4c5d 201 ((imsk) | ((b & 0x3F) << PMU_TX_BS_POS))
group-onsemi 0:098463de4c5d 202
group-onsemi 0:098463de4c5d 203 /**
group-onsemi 0:098463de4c5d 204 * @brief Type alias \c pmu_callback with function signature: \code void (*pmu_callback)(int pmu_status) \endcode
group-onsemi 0:098463de4c5d 205 * @details The callback function will be called for every opcode that has
group-onsemi 0:098463de4c5d 206 * the interrupt bit set. If NULL, the channel interrupt will not
group-onsemi 0:098463de4c5d 207 * be enabled. The callback function argument is a status bit
group-onsemi 0:098463de4c5d 208 * indicating the status of the PMU program.
group-onsemi 0:098463de4c5d 209 * @param pmu_status The callback function argument is a status bit indicating
group-onsemi 0:098463de4c5d 210 * the status of the PMU program.
group-onsemi 0:098463de4c5d 211 */
group-onsemi 0:098463de4c5d 212 typedef void (*pmu_callback)(int pmu_status);
group-onsemi 0:098463de4c5d 213
group-onsemi 0:098463de4c5d 214 /**
group-onsemi 0:098463de4c5d 215 * @brief Start a PMU program on a channel
group-onsemi 0:098463de4c5d 216 * @param channel Channel to start
group-onsemi 0:098463de4c5d 217 * @param program_address Pointer to the first opcode of the PMU program
group-onsemi 0:098463de4c5d 218 * @param callback Callback function of the signature \c pmu_callback
group-onsemi 0:098463de4c5d 219 * @param arg Pointer to be passed to the interrupt callback function.
group-onsemi 0:098463de4c5d 220 * @returns E_NO_ERROR if everything is successful, error if unsuccessful.
group-onsemi 0:098463de4c5d 221 */
group-onsemi 0:098463de4c5d 222 int PMU_Start(unsigned int channel, const void *program_address, pmu_callback callback);
group-onsemi 0:098463de4c5d 223
group-onsemi 0:098463de4c5d 224 /**
group-onsemi 0:098463de4c5d 225 * @brief Set a loop counter value on a channel
group-onsemi 0:098463de4c5d 226 * @param channel Channel number to set the value on
group-onsemi 0:098463de4c5d 227 * @param counter_num Counter number for the channel (0 or 1)
group-onsemi 0:098463de4c5d 228 * @param value Loop count value
group-onsemi 0:098463de4c5d 229 * @returns E_NO_ERROR if everything is successful, error if unsuccessful.
group-onsemi 0:098463de4c5d 230 */
group-onsemi 0:098463de4c5d 231 int PMU_SetCounter(unsigned int channel, unsigned int counter_num, uint16_t value);
group-onsemi 0:098463de4c5d 232
group-onsemi 0:098463de4c5d 233 /**
group-onsemi 0:098463de4c5d 234 * @brief Stop a running channel. This will clear the enable bit on the channel
group-onsemi 0:098463de4c5d 235 * and stop the running PMU program at the current opcode. The callback
group-onsemi 0:098463de4c5d 236 * function is not called.
group-onsemi 0:098463de4c5d 237 * @param channel Channel to stop
group-onsemi 0:098463de4c5d 238 */
group-onsemi 0:098463de4c5d 239 void PMU_Stop(unsigned int channel);
group-onsemi 0:098463de4c5d 240
group-onsemi 0:098463de4c5d 241 /**
group-onsemi 0:098463de4c5d 242 * @brief Function to handle PMU interrupts. This function can be called from
group-onsemi 0:098463de4c5d 243 * the PMU interrupt service routine, or periodically from the
group-onsemi 0:098463de4c5d 244 * application if interrupts are not enabled.
group-onsemi 0:098463de4c5d 245 */
group-onsemi 0:098463de4c5d 246 void PMU_Handler(void);
group-onsemi 0:098463de4c5d 247
group-onsemi 0:098463de4c5d 248 /**
group-onsemi 0:098463de4c5d 249 * @brief Set the AHB bus operation timeout on a channel
group-onsemi 0:098463de4c5d 250 * @param channel Selected PMU channel
group-onsemi 0:098463de4c5d 251 * @param timeoutClkScale Clk scale use for timeout clk
group-onsemi 0:098463de4c5d 252 * @param timeoutTicks Number of ticks for timeout duration
group-onsemi 0:098463de4c5d 253 * @returns E_NO_ERROR if everything is successful, error if unsuccessful.
group-onsemi 0:098463de4c5d 254 */
group-onsemi 0:098463de4c5d 255 int PMU_SetTimeout(unsigned int channel, pmu_ps_sel_t timeoutClkScale, pmu_to_sel_t timeoutTicks);
group-onsemi 0:098463de4c5d 256
group-onsemi 0:098463de4c5d 257 /**
group-onsemi 0:098463de4c5d 258 * @brief Gets the PMU channel's flags
group-onsemi 0:098463de4c5d 259 * @param channel Selected PMU channel
group-onsemi 0:098463de4c5d 260 * @return 0 = flags not set, non-zero = flags
group-onsemi 0:098463de4c5d 261 */
group-onsemi 0:098463de4c5d 262 uint32_t PMU_GetFlags(unsigned int channel);
group-onsemi 0:098463de4c5d 263
group-onsemi 0:098463de4c5d 264 /**
group-onsemi 0:098463de4c5d 265 * @brief Clear the PMU channel's flags based on the mask
group-onsemi 0:098463de4c5d 266 * @param channel Selected PMU channel
group-onsemi 0:098463de4c5d 267 * @param mask bits of the flags to clear
group-onsemi 0:098463de4c5d 268 */
group-onsemi 0:098463de4c5d 269 void PMU_ClearFlags(unsigned int channel, unsigned int mask);
group-onsemi 0:098463de4c5d 270
group-onsemi 0:098463de4c5d 271 /**
group-onsemi 0:098463de4c5d 272 * @brief Determines if the PMU channel is running
group-onsemi 0:098463de4c5d 273 * @param channel Selected PMU channel
group-onsemi 0:098463de4c5d 274 * @return 0 = channel is off, non-zero = channel is running
group-onsemi 0:098463de4c5d 275 */
group-onsemi 0:098463de4c5d 276 uint32_t PMU_IsActive(unsigned int channel);
group-onsemi 0:098463de4c5d 277
group-onsemi 0:098463de4c5d 278 /**
group-onsemi 0:098463de4c5d 279 * @}
group-onsemi 0:098463de4c5d 280 */
group-onsemi 0:098463de4c5d 281
group-onsemi 0:098463de4c5d 282 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 283 }
group-onsemi 0:098463de4c5d 284 #endif
group-onsemi 0:098463de4c5d 285
group-onsemi 0:098463de4c5d 286 #endif /* _PMU_H_ */