5.2.1 - Updated I2C files
Dependents: mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510
targets/TARGET_Maxim/TARGET_MAX32610/analogout_api.c@1:f30bdcd2b33b, 2017-02-27 (annotated)
- Committer:
- jacobjohnson
- Date:
- Mon Feb 27 17:45:05 2017 +0000
- Revision:
- 1:f30bdcd2b33b
- Parent:
- 0:098463de4c5d
changed the inputscale from 1 to 7 in analogin_api.c. This will need to be changed later, and accessed from the main level, but for now this allows the adc to read a value from 0 to 3.7V, instead of just up to 1V.;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
group-onsemi | 0:098463de4c5d | 1 | /******************************************************************************* |
group-onsemi | 0:098463de4c5d | 2 | * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved. |
group-onsemi | 0:098463de4c5d | 3 | * |
group-onsemi | 0:098463de4c5d | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
group-onsemi | 0:098463de4c5d | 5 | * copy of this software and associated documentation files (the "Software"), |
group-onsemi | 0:098463de4c5d | 6 | * to deal in the Software without restriction, including without limitation |
group-onsemi | 0:098463de4c5d | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
group-onsemi | 0:098463de4c5d | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
group-onsemi | 0:098463de4c5d | 9 | * Software is furnished to do so, subject to the following conditions: |
group-onsemi | 0:098463de4c5d | 10 | * |
group-onsemi | 0:098463de4c5d | 11 | * The above copyright notice and this permission notice shall be included |
group-onsemi | 0:098463de4c5d | 12 | * in all copies or substantial portions of the Software. |
group-onsemi | 0:098463de4c5d | 13 | * |
group-onsemi | 0:098463de4c5d | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
group-onsemi | 0:098463de4c5d | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
group-onsemi | 0:098463de4c5d | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
group-onsemi | 0:098463de4c5d | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
group-onsemi | 0:098463de4c5d | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
group-onsemi | 0:098463de4c5d | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
group-onsemi | 0:098463de4c5d | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
group-onsemi | 0:098463de4c5d | 21 | * |
group-onsemi | 0:098463de4c5d | 22 | * Except as contained in this notice, the name of Maxim Integrated |
group-onsemi | 0:098463de4c5d | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
group-onsemi | 0:098463de4c5d | 24 | * Products, Inc. Branding Policy. |
group-onsemi | 0:098463de4c5d | 25 | * |
group-onsemi | 0:098463de4c5d | 26 | * The mere transfer of this software does not imply any licenses |
group-onsemi | 0:098463de4c5d | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
group-onsemi | 0:098463de4c5d | 28 | * trademarks, maskwork rights, or any other form of intellectual |
group-onsemi | 0:098463de4c5d | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
group-onsemi | 0:098463de4c5d | 30 | * ownership rights. |
group-onsemi | 0:098463de4c5d | 31 | ******************************************************************************* |
group-onsemi | 0:098463de4c5d | 32 | */ |
group-onsemi | 0:098463de4c5d | 33 | |
group-onsemi | 0:098463de4c5d | 34 | #include "mbed_assert.h" |
group-onsemi | 0:098463de4c5d | 35 | #include "analogout_api.h" |
group-onsemi | 0:098463de4c5d | 36 | #include "clkman_regs.h" |
group-onsemi | 0:098463de4c5d | 37 | #include "pwrman_regs.h" |
group-onsemi | 0:098463de4c5d | 38 | #include "afe_regs.h" |
group-onsemi | 0:098463de4c5d | 39 | #include "PeripheralPins.h" |
group-onsemi | 0:098463de4c5d | 40 | |
group-onsemi | 0:098463de4c5d | 41 | //****************************************************************************** |
group-onsemi | 0:098463de4c5d | 42 | void analogout_init(dac_t *obj, PinName pin) |
group-onsemi | 0:098463de4c5d | 43 | { |
group-onsemi | 0:098463de4c5d | 44 | // Make sure pin is an analog pin we can use for ADC |
group-onsemi | 0:098463de4c5d | 45 | DACName dac = (DACName)pinmap_peripheral(pin, PinMap_DAC); |
group-onsemi | 0:098463de4c5d | 46 | MBED_ASSERT((DACName)dac != (DACName)NC); |
group-onsemi | 0:098463de4c5d | 47 | |
group-onsemi | 0:098463de4c5d | 48 | // Set the object pointer |
group-onsemi | 0:098463de4c5d | 49 | obj->dac = ((mxc_dac_regs_t*)MXC_DAC_GET_DAC((pin & 0x3))); |
group-onsemi | 0:098463de4c5d | 50 | obj->dac_fifo = ((mxc_dac_fifo_regs_t*)MXC_DAC_GET_FIFO((pin & 0x3))); |
group-onsemi | 0:098463de4c5d | 51 | obj->index = (pin & 0x3); |
group-onsemi | 0:098463de4c5d | 52 | |
group-onsemi | 0:098463de4c5d | 53 | // Set the ADC clock to the system clock frequency |
group-onsemi | 0:098463de4c5d | 54 | MXC_SET_FIELD(&MXC_CLKMAN->clk_ctrl, MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT, |
group-onsemi | 0:098463de4c5d | 55 | (MXC_F_CLKMAN_CLK_CTRL_ADC_GATE_N | (MXC_E_CLKMAN_ADC_SOURCE_SELECT_SYSTEM << |
group-onsemi | 0:098463de4c5d | 56 | MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT_POS))); |
group-onsemi | 0:098463de4c5d | 57 | |
group-onsemi | 0:098463de4c5d | 58 | |
group-onsemi | 0:098463de4c5d | 59 | // Setup the OPAMP in follower mode |
group-onsemi | 0:098463de4c5d | 60 | switch(obj->index) { |
group-onsemi | 0:098463de4c5d | 61 | case 0: |
group-onsemi | 0:098463de4c5d | 62 | // Enable DAC clock |
group-onsemi | 0:098463de4c5d | 63 | MXC_CLKMAN->clk_ctrl_14_dac0 = MXC_E_CLKMAN_CLK_SCALE_ENABLED; |
group-onsemi | 0:098463de4c5d | 64 | |
group-onsemi | 0:098463de4c5d | 65 | // Enable OPAMP |
group-onsemi | 0:098463de4c5d | 66 | MXC_AFE->ctrl5 &= ~MXC_F_AFE_CTRL5_OP_CMP0; |
group-onsemi | 0:098463de4c5d | 67 | |
group-onsemi | 0:098463de4c5d | 68 | // Set the positive and negative inputs |
group-onsemi | 0:098463de4c5d | 69 | MXC_SET_FIELD(&MXC_AFE->ctrl4, (MXC_F_AFE_CTRL4_DAC_SEL_A | |
group-onsemi | 0:098463de4c5d | 70 | MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP0 | MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP0), |
group-onsemi | 0:098463de4c5d | 71 | ((0x1 << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP0_POS) | |
group-onsemi | 0:098463de4c5d | 72 | (0x1 << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP0_POS) | |
group-onsemi | 0:098463de4c5d | 73 | (0x0 << MXC_F_AFE_CTRL4_DAC_SEL_A_POS))); |
group-onsemi | 0:098463de4c5d | 74 | |
group-onsemi | 0:098463de4c5d | 75 | // Enable N and P channel inputs |
group-onsemi | 0:098463de4c5d | 76 | MXC_AFE->ctrl3 |= (MXC_F_AFE_CTRL3_EN_PCH_OPAMP0 | |
group-onsemi | 0:098463de4c5d | 77 | MXC_F_AFE_CTRL3_EN_NCH_OPAMP0); |
group-onsemi | 0:098463de4c5d | 78 | break; |
group-onsemi | 0:098463de4c5d | 79 | case 1: |
group-onsemi | 0:098463de4c5d | 80 | // Enable DAC clock |
group-onsemi | 0:098463de4c5d | 81 | MXC_CLKMAN->clk_ctrl_15_dac1 = MXC_E_CLKMAN_CLK_SCALE_ENABLED; |
group-onsemi | 0:098463de4c5d | 82 | |
group-onsemi | 0:098463de4c5d | 83 | // Enable OPAMP |
group-onsemi | 0:098463de4c5d | 84 | MXC_AFE->ctrl5 &= ~MXC_F_AFE_CTRL5_OP_CMP1; |
group-onsemi | 0:098463de4c5d | 85 | |
group-onsemi | 0:098463de4c5d | 86 | // Set the positive and negative inputs |
group-onsemi | 0:098463de4c5d | 87 | MXC_SET_FIELD(&MXC_AFE->ctrl4, (MXC_F_AFE_CTRL4_DAC_SEL_B | |
group-onsemi | 0:098463de4c5d | 88 | MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP1 | MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP1), |
group-onsemi | 0:098463de4c5d | 89 | ((0x1 << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP1_POS) | |
group-onsemi | 0:098463de4c5d | 90 | (0x1 << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP1_POS) | |
group-onsemi | 0:098463de4c5d | 91 | (0x1 << MXC_F_AFE_CTRL4_DAC_SEL_B_POS))); |
group-onsemi | 0:098463de4c5d | 92 | |
group-onsemi | 0:098463de4c5d | 93 | // Enable N and P channel inputs |
group-onsemi | 0:098463de4c5d | 94 | MXC_AFE->ctrl3 |= (MXC_F_AFE_CTRL3_EN_PCH_OPAMP1 | |
group-onsemi | 0:098463de4c5d | 95 | MXC_F_AFE_CTRL3_EN_NCH_OPAMP1); |
group-onsemi | 0:098463de4c5d | 96 | |
group-onsemi | 0:098463de4c5d | 97 | break; |
group-onsemi | 0:098463de4c5d | 98 | case 2: |
group-onsemi | 0:098463de4c5d | 99 | // Enable DAC clock |
group-onsemi | 0:098463de4c5d | 100 | MXC_CLKMAN->clk_ctrl_16_dac2 = MXC_E_CLKMAN_CLK_SCALE_ENABLED; |
group-onsemi | 0:098463de4c5d | 101 | |
group-onsemi | 0:098463de4c5d | 102 | // Enable OPAMP |
group-onsemi | 0:098463de4c5d | 103 | MXC_AFE->ctrl5 &= ~MXC_F_AFE_CTRL5_OP_CMP2; |
group-onsemi | 0:098463de4c5d | 104 | |
group-onsemi | 0:098463de4c5d | 105 | // Set the positive and negative inputs |
group-onsemi | 0:098463de4c5d | 106 | MXC_SET_FIELD(&MXC_AFE->ctrl4, (MXC_F_AFE_CTRL4_DAC_SEL_C | |
group-onsemi | 0:098463de4c5d | 107 | MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP2 | MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP2), |
group-onsemi | 0:098463de4c5d | 108 | ((0x1 << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP2_POS) | |
group-onsemi | 0:098463de4c5d | 109 | (0x1 << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP2_POS) | |
group-onsemi | 0:098463de4c5d | 110 | (0x2 << MXC_F_AFE_CTRL4_DAC_SEL_C_POS))); |
group-onsemi | 0:098463de4c5d | 111 | |
group-onsemi | 0:098463de4c5d | 112 | // Enable N and P channel inputs |
group-onsemi | 0:098463de4c5d | 113 | MXC_AFE->ctrl3 |= (MXC_F_AFE_CTRL3_EN_PCH_OPAMP2 | |
group-onsemi | 0:098463de4c5d | 114 | MXC_F_AFE_CTRL3_EN_NCH_OPAMP2); |
group-onsemi | 0:098463de4c5d | 115 | break; |
group-onsemi | 0:098463de4c5d | 116 | case 3: |
group-onsemi | 0:098463de4c5d | 117 | // Enable DAC clock |
group-onsemi | 0:098463de4c5d | 118 | MXC_CLKMAN->clk_ctrl_17_dac3 = MXC_E_CLKMAN_CLK_SCALE_ENABLED; |
group-onsemi | 0:098463de4c5d | 119 | |
group-onsemi | 0:098463de4c5d | 120 | // Enable OPAMP |
group-onsemi | 0:098463de4c5d | 121 | MXC_AFE->ctrl5 &= ~MXC_F_AFE_CTRL5_OP_CMP3; |
group-onsemi | 0:098463de4c5d | 122 | |
group-onsemi | 0:098463de4c5d | 123 | // Set the positive and negative inputs |
group-onsemi | 0:098463de4c5d | 124 | MXC_SET_FIELD(&MXC_AFE->ctrl4, (MXC_F_AFE_CTRL4_DAC_SEL_D | |
group-onsemi | 0:098463de4c5d | 125 | MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP3 | MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP3), |
group-onsemi | 0:098463de4c5d | 126 | ((0x1 << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP3_POS) | |
group-onsemi | 0:098463de4c5d | 127 | (0x1 << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP3_POS) | |
group-onsemi | 0:098463de4c5d | 128 | (0x3 << MXC_F_AFE_CTRL4_DAC_SEL_D_POS))); |
group-onsemi | 0:098463de4c5d | 129 | |
group-onsemi | 0:098463de4c5d | 130 | // Enable N and P channel inputs |
group-onsemi | 0:098463de4c5d | 131 | MXC_AFE->ctrl3 |= (MXC_F_AFE_CTRL3_EN_PCH_OPAMP3 | |
group-onsemi | 0:098463de4c5d | 132 | MXC_F_AFE_CTRL3_EN_NCH_OPAMP3); |
group-onsemi | 0:098463de4c5d | 133 | break; |
group-onsemi | 0:098463de4c5d | 134 | } |
group-onsemi | 0:098463de4c5d | 135 | |
group-onsemi | 0:098463de4c5d | 136 | // Enable AFE power |
group-onsemi | 0:098463de4c5d | 137 | MXC_PWRMAN->pwr_rst_ctrl |= MXC_F_PWRMAN_PWR_RST_CTRL_AFE_POWERED; |
group-onsemi | 0:098463de4c5d | 138 | |
group-onsemi | 0:098463de4c5d | 139 | // Setup internal voltage references |
group-onsemi | 0:098463de4c5d | 140 | MXC_SET_FIELD(&MXC_AFE->ctrl1, (MXC_F_AFE_CTRL1_REF_DAC_VOLT_SEL | MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL), |
group-onsemi | 0:098463de4c5d | 141 | (MXC_F_AFE_CTRL1_REF_ADC_POWERUP | MXC_F_AFE_CTRL1_REF_BLK_POWERUP | |
group-onsemi | 0:098463de4c5d | 142 | (MXC_E_AFE_REF_VOLT_SEL_1500 << MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS))); |
group-onsemi | 0:098463de4c5d | 143 | |
group-onsemi | 0:098463de4c5d | 144 | // Disable interpolation |
group-onsemi | 0:098463de4c5d | 145 | obj->dac->ctrl0 &= ~MXC_F_DAC_CTRL0_INTERP_MODE; |
group-onsemi | 0:098463de4c5d | 146 | } |
group-onsemi | 0:098463de4c5d | 147 | |
group-onsemi | 0:098463de4c5d | 148 | //****************************************************************************** |
group-onsemi | 0:098463de4c5d | 149 | void analogout_write(dac_t *obj, float value) |
group-onsemi | 0:098463de4c5d | 150 | { |
group-onsemi | 0:098463de4c5d | 151 | analogout_write_u16(obj, (uint16_t)((value/1.0) * 0xFFFF)); |
group-onsemi | 0:098463de4c5d | 152 | } |
group-onsemi | 0:098463de4c5d | 153 | |
group-onsemi | 0:098463de4c5d | 154 | //****************************************************************************** |
group-onsemi | 0:098463de4c5d | 155 | void analogout_write_u16(dac_t *obj, uint16_t value) |
group-onsemi | 0:098463de4c5d | 156 | { |
group-onsemi | 0:098463de4c5d | 157 | // Enable the OPAMP |
group-onsemi | 0:098463de4c5d | 158 | // Setup the OPAMP in follower mode |
group-onsemi | 0:098463de4c5d | 159 | switch(obj->index) { |
group-onsemi | 0:098463de4c5d | 160 | case 0: |
group-onsemi | 0:098463de4c5d | 161 | MXC_AFE->ctrl3 |= MXC_F_AFE_CTRL3_POWERUP_OPAMP0; |
group-onsemi | 0:098463de4c5d | 162 | break; |
group-onsemi | 0:098463de4c5d | 163 | case 1: |
group-onsemi | 0:098463de4c5d | 164 | MXC_AFE->ctrl3 |= MXC_F_AFE_CTRL3_POWERUP_OPAMP1; |
group-onsemi | 0:098463de4c5d | 165 | break; |
group-onsemi | 0:098463de4c5d | 166 | case 2: |
group-onsemi | 0:098463de4c5d | 167 | MXC_AFE->ctrl3 |= MXC_F_AFE_CTRL3_POWERUP_OPAMP2; |
group-onsemi | 0:098463de4c5d | 168 | break; |
group-onsemi | 0:098463de4c5d | 169 | case 3: |
group-onsemi | 0:098463de4c5d | 170 | MXC_AFE->ctrl3 |= MXC_F_AFE_CTRL3_POWERUP_OPAMP3; |
group-onsemi | 0:098463de4c5d | 171 | break; |
group-onsemi | 0:098463de4c5d | 172 | } |
group-onsemi | 0:098463de4c5d | 173 | |
group-onsemi | 0:098463de4c5d | 174 | // Output 1 sample with minimal delay |
group-onsemi | 0:098463de4c5d | 175 | obj->dac->rate |= 0x1; |
group-onsemi | 0:098463de4c5d | 176 | |
group-onsemi | 0:098463de4c5d | 177 | // Set the start mode to output once data is in the FIFO |
group-onsemi | 0:098463de4c5d | 178 | obj->dac->ctrl0 &= ~(MXC_F_DAC_CTRL0_START_MODE | MXC_F_DAC_CTRL0_OP_MODE); |
group-onsemi | 0:098463de4c5d | 179 | |
group-onsemi | 0:098463de4c5d | 180 | // Enable the DAC |
group-onsemi | 0:098463de4c5d | 181 | obj->dac->ctrl0 |= (MXC_F_DAC_CTRL0_POWER_MODE_2 | |
group-onsemi | 0:098463de4c5d | 182 | MXC_F_DAC_CTRL0_POWER_MODE_1_0 | MXC_F_DAC_CTRL0_POWER_ON | |
group-onsemi | 0:098463de4c5d | 183 | MXC_F_DAC_CTRL0_CLOCK_GATE_EN | MXC_F_DAC_CTRL0_CPU_START); |
group-onsemi | 0:098463de4c5d | 184 | |
group-onsemi | 0:098463de4c5d | 185 | if(obj->index < 2) { |
group-onsemi | 0:098463de4c5d | 186 | obj->out = (value); |
group-onsemi | 0:098463de4c5d | 187 | obj->dac_fifo->output_16 = (obj->out); |
group-onsemi | 0:098463de4c5d | 188 | |
group-onsemi | 0:098463de4c5d | 189 | } else { |
group-onsemi | 0:098463de4c5d | 190 | // Convert 16 bits to 8 bits |
group-onsemi | 0:098463de4c5d | 191 | obj->out = (value >> 8); |
group-onsemi | 0:098463de4c5d | 192 | obj->dac_fifo->output_8 = (obj->out); |
group-onsemi | 0:098463de4c5d | 193 | } |
group-onsemi | 0:098463de4c5d | 194 | } |
group-onsemi | 0:098463de4c5d | 195 | |
group-onsemi | 0:098463de4c5d | 196 | //****************************************************************************** |
group-onsemi | 0:098463de4c5d | 197 | float analogout_read(dac_t *obj) |
group-onsemi | 0:098463de4c5d | 198 | { |
group-onsemi | 0:098463de4c5d | 199 | return (((float)analogout_read_u16(obj) / (float)0xFFFF) * 1.5); |
group-onsemi | 0:098463de4c5d | 200 | } |
group-onsemi | 0:098463de4c5d | 201 | |
group-onsemi | 0:098463de4c5d | 202 | //****************************************************************************** |
group-onsemi | 0:098463de4c5d | 203 | uint16_t analogout_read_u16(dac_t *obj) |
group-onsemi | 0:098463de4c5d | 204 | { |
group-onsemi | 0:098463de4c5d | 205 | if(obj->index < 2) { |
group-onsemi | 0:098463de4c5d | 206 | // Convert 12 bits to 16 bits |
group-onsemi | 0:098463de4c5d | 207 | return (obj->out << 4); |
group-onsemi | 0:098463de4c5d | 208 | } else { |
group-onsemi | 0:098463de4c5d | 209 | // Convert 8 bits to 16 bits |
group-onsemi | 0:098463de4c5d | 210 | return (obj->out << 8); |
group-onsemi | 0:098463de4c5d | 211 | } |
group-onsemi | 0:098463de4c5d | 212 | } |