ON Semiconductor / mbed-os

5.2.1 - Updated I2C files

Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_Maxim/TARGET_MAX32600/spi_api.c@1:f30bdcd2b33b, 2017-02-27 (annotated)

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d 
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /*******************************************************************************
group-onsemi 0:098463de4c5d 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Permission is hereby granted, free of charge, to any person obtaining a
group-onsemi 0:098463de4c5d 5 * copy of this software and associated documentation files (the "Software"),
group-onsemi 0:098463de4c5d 6 * to deal in the Software without restriction, including without limitation
group-onsemi 0:098463de4c5d 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
group-onsemi 0:098463de4c5d 8 * and/or sell copies of the Software, and to permit persons to whom the
group-onsemi 0:098463de4c5d 9 * Software is furnished to do so, subject to the following conditions:
group-onsemi 0:098463de4c5d 10 *
group-onsemi 0:098463de4c5d 11 * The above copyright notice and this permission notice shall be included
group-onsemi 0:098463de4c5d 12 * in all copies or substantial portions of the Software.
group-onsemi 0:098463de4c5d 13 *
group-onsemi 0:098463de4c5d 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
group-onsemi 0:098463de4c5d 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
group-onsemi 0:098463de4c5d 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
group-onsemi 0:098463de4c5d 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
group-onsemi 0:098463de4c5d 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
group-onsemi 0:098463de4c5d 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
group-onsemi 0:098463de4c5d 20 * OTHER DEALINGS IN THE SOFTWARE.
group-onsemi 0:098463de4c5d 21 *
group-onsemi 0:098463de4c5d 22 * Except as contained in this notice, the name of Maxim Integrated
group-onsemi 0:098463de4c5d 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
group-onsemi 0:098463de4c5d 24 * Products, Inc. Branding Policy.
group-onsemi 0:098463de4c5d 25 *
group-onsemi 0:098463de4c5d 26 * The mere transfer of this software does not imply any licenses
group-onsemi 0:098463de4c5d 27 * of trade secrets, proprietary technology, copyrights, patents,
group-onsemi 0:098463de4c5d 28 * trademarks, maskwork rights, or any other form of intellectual
group-onsemi 0:098463de4c5d 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
group-onsemi 0:098463de4c5d 30 * ownership rights.
group-onsemi 0:098463de4c5d 31 *******************************************************************************
group-onsemi 0:098463de4c5d 32 */
group-onsemi 0:098463de4c5d 33
group-onsemi 0:098463de4c5d 34 #include <string.h>
group-onsemi 0:098463de4c5d 35 #include "mbed_assert.h"
group-onsemi 0:098463de4c5d 36 #include "cmsis.h"
group-onsemi 0:098463de4c5d 37 #include "spi_api.h"
group-onsemi 0:098463de4c5d 38 #include "pinmap.h"
group-onsemi 0:098463de4c5d 39 #include "ioman_regs.h"
group-onsemi 0:098463de4c5d 40 #include "clkman_regs.h"
group-onsemi 0:098463de4c5d 41 #include "PeripheralPins.h"
group-onsemi 0:098463de4c5d 42
group-onsemi 0:098463de4c5d 43 #define DEFAULT_CHAR 8
group-onsemi 0:098463de4c5d 44 #define DEFAULT_MODE 0
group-onsemi 0:098463de4c5d 45 #define DEFAULT_FREQ 1000000
group-onsemi 0:098463de4c5d 46
group-onsemi 0:098463de4c5d 47 // Formatting settings
group-onsemi 0:098463de4c5d 48 static int spi_bits;
group-onsemi 0:098463de4c5d 49
group-onsemi 0:098463de4c5d 50 //******************************************************************************
group-onsemi 0:098463de4c5d 51 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
group-onsemi 0:098463de4c5d 52 {
group-onsemi 0:098463de4c5d 53 // Make sure pins are pointing to the same SPI instance
group-onsemi 0:098463de4c5d 54 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
group-onsemi 0:098463de4c5d 55 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
group-onsemi 0:098463de4c5d 56 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
group-onsemi 0:098463de4c5d 57 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
group-onsemi 0:098463de4c5d 58
group-onsemi 0:098463de4c5d 59 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
group-onsemi 0:098463de4c5d 60 SPIName spi_cntl;
group-onsemi 0:098463de4c5d 61
group-onsemi 0:098463de4c5d 62 // Give the application the option to manually control Slave Select
group-onsemi 0:098463de4c5d 63 if((SPIName)spi_ssel != (SPIName)NC) {
group-onsemi 0:098463de4c5d 64 spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
group-onsemi 0:098463de4c5d 65 } else {
group-onsemi 0:098463de4c5d 66 spi_cntl = spi_sclk;
group-onsemi 0:098463de4c5d 67 }
group-onsemi 0:098463de4c5d 68
group-onsemi 0:098463de4c5d 69 SPIName spi = (SPIName)pinmap_merge(spi_data, spi_cntl);
group-onsemi 0:098463de4c5d 70
group-onsemi 0:098463de4c5d 71 MBED_ASSERT((SPIName)spi != (SPIName)NC);
group-onsemi 0:098463de4c5d 72
group-onsemi 0:098463de4c5d 73 // Set the obj pointer to the proper SPI Instance
group-onsemi 0:098463de4c5d 74 obj->spi = (mxc_spi_regs_t*)spi;
group-onsemi 0:098463de4c5d 75
group-onsemi 0:098463de4c5d 76 // Set the SPI index and FIFOs
group-onsemi 0:098463de4c5d 77 obj->index = MXC_SPI_BASE_TO_INSTANCE(obj->spi);
group-onsemi 0:098463de4c5d 78 obj->rxfifo = MXC_SPI_GET_RXFIFO(obj->index);
group-onsemi 0:098463de4c5d 79 obj->txfifo = MXC_SPI_GET_TXFIFO(obj->index);
group-onsemi 0:098463de4c5d 80
group-onsemi 0:098463de4c5d 81 // Configure the pins
group-onsemi 0:098463de4c5d 82 pinmap_pinout(mosi, PinMap_SPI_MOSI);
group-onsemi 0:098463de4c5d 83 pinmap_pinout(miso, PinMap_SPI_MISO);
group-onsemi 0:098463de4c5d 84 pinmap_pinout(sclk, PinMap_SPI_SCLK);
group-onsemi 0:098463de4c5d 85 pinmap_pinout(ssel, PinMap_SPI_SSEL);
group-onsemi 0:098463de4c5d 86
group-onsemi 0:098463de4c5d 87 // Enable SPI and FIFOs
group-onsemi 0:098463de4c5d 88 obj->spi->gen_ctrl = (MXC_F_SPI_GEN_CTRL_SPI_MSTR_EN |
group-onsemi 0:098463de4c5d 89 MXC_F_SPI_GEN_CTRL_TX_FIFO_EN |
group-onsemi 0:098463de4c5d 90 MXC_F_SPI_GEN_CTRL_RX_FIFO_EN );
group-onsemi 0:098463de4c5d 91 }
group-onsemi 0:098463de4c5d 92
group-onsemi 0:098463de4c5d 93 //******************************************************************************
group-onsemi 0:098463de4c5d 94 void spi_format(spi_t *obj, int bits, int mode, int slave)
group-onsemi 0:098463de4c5d 95 {
group-onsemi 0:098463de4c5d 96 // Check the validity of the inputs
group-onsemi 0:098463de4c5d 97 MBED_ASSERT(((bits >= 1) && (bits <= 32)) && ((mode >= 0) && (mode <= 3)));
group-onsemi 0:098463de4c5d 98
group-onsemi 0:098463de4c5d 99 // Only supports master mode
group-onsemi 0:098463de4c5d 100 MBED_ASSERT(!slave);
group-onsemi 0:098463de4c5d 101
group-onsemi 0:098463de4c5d 102 // Save formatting data
group-onsemi 0:098463de4c5d 103 spi_bits = bits;
group-onsemi 0:098463de4c5d 104
group-onsemi 0:098463de4c5d 105 // Set the mode
group-onsemi 0:098463de4c5d 106 obj->spi->mstr_cfg &= ~(MXC_F_SPI_MSTR_CFG_SPI_MODE);
group-onsemi 0:098463de4c5d 107 obj->spi->mstr_cfg |= (mode << MXC_F_SPI_MSTR_CFG_SPI_MODE_POS);
group-onsemi 0:098463de4c5d 108 }
group-onsemi 0:098463de4c5d 109
group-onsemi 0:098463de4c5d 110 //******************************************************************************
group-onsemi 0:098463de4c5d 111 void spi_frequency(spi_t *obj, int hz)
group-onsemi 0:098463de4c5d 112 {
group-onsemi 0:098463de4c5d 113 // Maximum frequency is half the system frequency
group-onsemi 0:098463de4c5d 114 MBED_ASSERT((unsigned int)hz <= (SystemCoreClock / 2));
group-onsemi 0:098463de4c5d 115 unsigned clocks = ((SystemCoreClock/2)/(hz));
group-onsemi 0:098463de4c5d 116
group-onsemi 0:098463de4c5d 117 // Figure out the divider ratio
group-onsemi 0:098463de4c5d 118 int clk_div = 1;
group-onsemi 0:098463de4c5d 119 while(clk_div < 10) {
group-onsemi 0:098463de4c5d 120 if(clocks < 0x10) {
group-onsemi 0:098463de4c5d 121 break;
group-onsemi 0:098463de4c5d 122 }
group-onsemi 0:098463de4c5d 123 clk_div++;
group-onsemi 0:098463de4c5d 124 clocks = clocks >> 1;
group-onsemi 0:098463de4c5d 125 }
group-onsemi 0:098463de4c5d 126
group-onsemi 0:098463de4c5d 127 // Turn on the SPI clock
group-onsemi 0:098463de4c5d 128 if(obj->index == 0) {
group-onsemi 0:098463de4c5d 129 MXC_CLKMAN->clk_ctrl_3_spi0 = clk_div;
group-onsemi 0:098463de4c5d 130 } else if(obj->index == 1) {
group-onsemi 0:098463de4c5d 131 MXC_CLKMAN->clk_ctrl_4_spi1 = clk_div;
group-onsemi 0:098463de4c5d 132 } else if(obj->index == 2) {
group-onsemi 0:098463de4c5d 133 MXC_CLKMAN->clk_ctrl_5_spi2 = clk_div;
group-onsemi 0:098463de4c5d 134 } else {
group-onsemi 0:098463de4c5d 135 MBED_ASSERT(0);
group-onsemi 0:098463de4c5d 136 }
group-onsemi 0:098463de4c5d 137
group-onsemi 0:098463de4c5d 138 // Set the number of clocks to hold sclk high and low
group-onsemi 0:098463de4c5d 139 MXC_SET_FIELD(&obj->spi->mstr_cfg, (MXC_F_SPI_MSTR_CFG_SCK_HI_CLK | MXC_F_SPI_MSTR_CFG_SCK_LO_CLK),
group-onsemi 0:098463de4c5d 140 ((clocks << MXC_F_SPI_MSTR_CFG_SCK_HI_CLK_POS) | (clocks << MXC_F_SPI_MSTR_CFG_SCK_LO_CLK_POS)));
group-onsemi 0:098463de4c5d 141 }
group-onsemi 0:098463de4c5d 142
group-onsemi 0:098463de4c5d 143 //******************************************************************************
group-onsemi 0:098463de4c5d 144 int spi_master_write(spi_t *obj, int value)
group-onsemi 0:098463de4c5d 145 {
group-onsemi 0:098463de4c5d 146 int bits = spi_bits;
group-onsemi 0:098463de4c5d 147 if(spi_bits == 32) {
group-onsemi 0:098463de4c5d 148 bits = 0;
group-onsemi 0:098463de4c5d 149 }
group-onsemi 0:098463de4c5d 150 // Create the header
group-onsemi 0:098463de4c5d 151 uint16_t header = ((0x3 << MXC_F_SPI_FIFO_DIR_POS ) | // TX and RX
group-onsemi 0:098463de4c5d 152 (0x0 << MXC_F_SPI_FIFO_UNIT_POS) | // Send bits
group-onsemi 0:098463de4c5d 153 (bits << MXC_F_SPI_FIFO_SIZE_POS) | // Number of units
group-onsemi 0:098463de4c5d 154 (0x1 << MXC_F_SPI_FIFO_DASS_POS)); // Deassert SS
group-onsemi 0:098463de4c5d 155
group-onsemi 0:098463de4c5d 156 // Send the message header
group-onsemi 0:098463de4c5d 157 obj->txfifo->txfifo_16 = header;
group-onsemi 0:098463de4c5d 158
group-onsemi 0:098463de4c5d 159 // Send the data
group-onsemi 0:098463de4c5d 160 if(spi_bits < 17) {
group-onsemi 0:098463de4c5d 161 obj->txfifo->txfifo_16 = (uint16_t)value;
group-onsemi 0:098463de4c5d 162 } else {
group-onsemi 0:098463de4c5d 163 obj->txfifo->txfifo_32 = (uint32_t)value;
group-onsemi 0:098463de4c5d 164 }
group-onsemi 0:098463de4c5d 165
group-onsemi 0:098463de4c5d 166 // Get the data
group-onsemi 0:098463de4c5d 167 bits = spi_bits;
group-onsemi 0:098463de4c5d 168 int result = 0;
group-onsemi 0:098463de4c5d 169 int i = 0;
group-onsemi 0:098463de4c5d 170 while(bits > 0) {
group-onsemi 0:098463de4c5d 171 // Wait for data
group-onsemi 0:098463de4c5d 172 while(((obj->spi->fifo_ctrl & MXC_F_SPI_FIFO_CTRL_RX_FIFO_USED)
group-onsemi 0:098463de4c5d 173 >> MXC_F_SPI_FIFO_CTRL_RX_FIFO_USED_POS) < 1) {}
group-onsemi 0:098463de4c5d 174
group-onsemi 0:098463de4c5d 175 result |= (obj->rxfifo->rxfifo_8 << (i++*8));
group-onsemi 0:098463de4c5d 176 bits-=8;
group-onsemi 0:098463de4c5d 177 }
group-onsemi 0:098463de4c5d 178
group-onsemi 0:098463de4c5d 179 return result;
group-onsemi 0:098463de4c5d 180 }
group-onsemi 0:098463de4c5d 181
group-onsemi 0:098463de4c5d 182 //******************************************************************************
group-onsemi 0:098463de4c5d 183 int spi_busy(spi_t *obj)
group-onsemi 0:098463de4c5d 184 {
group-onsemi 0:098463de4c5d 185 return !(obj->spi->intfl & MXC_F_SPI_INTFL_TX_READY);
group-onsemi 0:098463de4c5d 186 }