ON Semiconductor / mbed-os

5.2.1 - Updated I2C files

Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_Freescale/TARGET_KLXX/i2c_api.c@1:f30bdcd2b33b, 2017-02-27 (annotated)

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d 
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* mbed Microcontroller Library
group-onsemi 0:098463de4c5d 2 * Copyright (c) 2006-2013 ARM Limited
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Licensed under the Apache License, Version 2.0 (the "License");
group-onsemi 0:098463de4c5d 5 * you may not use this file except in compliance with the License.
group-onsemi 0:098463de4c5d 6 * You may obtain a copy of the License at
group-onsemi 0:098463de4c5d 7 *
group-onsemi 0:098463de4c5d 8 * http://www.apache.org/licenses/LICENSE-2.0
group-onsemi 0:098463de4c5d 9 *
group-onsemi 0:098463de4c5d 10 * Unless required by applicable law or agreed to in writing, software
group-onsemi 0:098463de4c5d 11 * distributed under the License is distributed on an "AS IS" BASIS,
group-onsemi 0:098463de4c5d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
group-onsemi 0:098463de4c5d 13 * See the License for the specific language governing permissions and
group-onsemi 0:098463de4c5d 14 * limitations under the License.
group-onsemi 0:098463de4c5d 15 */
group-onsemi 0:098463de4c5d 16 #include "mbed_assert.h"
group-onsemi 0:098463de4c5d 17 #include "i2c_api.h"
group-onsemi 0:098463de4c5d 18
group-onsemi 0:098463de4c5d 19 #include "cmsis.h"
group-onsemi 0:098463de4c5d 20 #include "pinmap.h"
group-onsemi 0:098463de4c5d 21 #include "clk_freqs.h"
group-onsemi 0:098463de4c5d 22 #include "PeripheralPins.h"
group-onsemi 0:098463de4c5d 23
group-onsemi 0:098463de4c5d 24 static const uint16_t ICR[0x40] = {
group-onsemi 0:098463de4c5d 25 20, 22, 24, 26, 28,
group-onsemi 0:098463de4c5d 26 30, 34, 40, 28, 32,
group-onsemi 0:098463de4c5d 27 36, 40, 44, 48, 56,
group-onsemi 0:098463de4c5d 28 68, 48, 56, 64, 72,
group-onsemi 0:098463de4c5d 29 80, 88, 104, 128, 80,
group-onsemi 0:098463de4c5d 30 96, 112, 128, 144, 160,
group-onsemi 0:098463de4c5d 31 192, 240, 160, 192, 224,
group-onsemi 0:098463de4c5d 32 256, 288, 320, 384, 480,
group-onsemi 0:098463de4c5d 33 320, 384, 448, 512, 576,
group-onsemi 0:098463de4c5d 34 640, 768, 960, 640, 768,
group-onsemi 0:098463de4c5d 35 896, 1024, 1152, 1280, 1536,
group-onsemi 0:098463de4c5d 36 1920, 1280, 1536, 1792, 2048,
group-onsemi 0:098463de4c5d 37 2304, 2560, 3072, 3840
group-onsemi 0:098463de4c5d 38 };
group-onsemi 0:098463de4c5d 39
group-onsemi 0:098463de4c5d 40
group-onsemi 0:098463de4c5d 41 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
group-onsemi 0:098463de4c5d 42 // determine the I2C to use
group-onsemi 0:098463de4c5d 43 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
group-onsemi 0:098463de4c5d 44 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
group-onsemi 0:098463de4c5d 45 obj->i2c = (I2C_Type*)pinmap_merge(i2c_sda, i2c_scl);
group-onsemi 0:098463de4c5d 46 MBED_ASSERT((int)obj->i2c != NC);
group-onsemi 0:098463de4c5d 47
group-onsemi 0:098463de4c5d 48 // enable power
group-onsemi 0:098463de4c5d 49 switch ((int)obj->i2c) {
group-onsemi 0:098463de4c5d 50 case I2C_0: SIM->SCGC5 |= 1 << 13; SIM->SCGC4 |= 1 << 6; break;
group-onsemi 0:098463de4c5d 51 case I2C_1: SIM->SCGC5 |= 1 << 11; SIM->SCGC4 |= 1 << 7; break;
group-onsemi 0:098463de4c5d 52 }
group-onsemi 0:098463de4c5d 53
group-onsemi 0:098463de4c5d 54 // set default frequency at 100k
group-onsemi 0:098463de4c5d 55 i2c_frequency(obj, 100000);
group-onsemi 0:098463de4c5d 56
group-onsemi 0:098463de4c5d 57 // enable I2C interface
group-onsemi 0:098463de4c5d 58 obj->i2c->C1 |= 0x80;
group-onsemi 0:098463de4c5d 59
group-onsemi 0:098463de4c5d 60 pinmap_pinout(sda, PinMap_I2C_SDA);
group-onsemi 0:098463de4c5d 61 pinmap_pinout(scl, PinMap_I2C_SCL);
group-onsemi 0:098463de4c5d 62 }
group-onsemi 0:098463de4c5d 63
group-onsemi 0:098463de4c5d 64 int i2c_start(i2c_t *obj) {
group-onsemi 0:098463de4c5d 65 uint8_t temp;
group-onsemi 0:098463de4c5d 66 volatile int i;
group-onsemi 0:098463de4c5d 67 // if we are in the middle of a transaction
group-onsemi 0:098463de4c5d 68 // activate the repeat_start flag
group-onsemi 0:098463de4c5d 69 if (obj->i2c->S & I2C_S_BUSY_MASK) {
group-onsemi 0:098463de4c5d 70 // KL25Z errata sheet: repeat start cannot be generated if the
group-onsemi 0:098463de4c5d 71 // I2Cx_F[MULT] field is set to a non-zero value
group-onsemi 0:098463de4c5d 72 temp = obj->i2c->F >> 6;
group-onsemi 0:098463de4c5d 73 obj->i2c->F &= 0x3F;
group-onsemi 0:098463de4c5d 74 obj->i2c->C1 |= 0x04;
group-onsemi 0:098463de4c5d 75 for (i = 0; i < 100; i ++) __NOP();
group-onsemi 0:098463de4c5d 76 obj->i2c->F |= temp << 6;
group-onsemi 0:098463de4c5d 77 } else {
group-onsemi 0:098463de4c5d 78 obj->i2c->C1 |= I2C_C1_MST_MASK;
group-onsemi 0:098463de4c5d 79 obj->i2c->C1 |= I2C_C1_TX_MASK;
group-onsemi 0:098463de4c5d 80 }
group-onsemi 0:098463de4c5d 81 return 0;
group-onsemi 0:098463de4c5d 82 }
group-onsemi 0:098463de4c5d 83
group-onsemi 0:098463de4c5d 84 int i2c_stop(i2c_t *obj) {
group-onsemi 0:098463de4c5d 85 volatile uint32_t n = 0;
group-onsemi 0:098463de4c5d 86 obj->i2c->C1 &= ~I2C_C1_MST_MASK;
group-onsemi 0:098463de4c5d 87 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
group-onsemi 0:098463de4c5d 88
group-onsemi 0:098463de4c5d 89 // It seems that there are timing problems
group-onsemi 0:098463de4c5d 90 // when there is no waiting time after a STOP.
group-onsemi 0:098463de4c5d 91 // This wait is also included on the samples
group-onsemi 0:098463de4c5d 92 // code provided with the freedom board
group-onsemi 0:098463de4c5d 93 for (n = 0; n < 100; n++) __NOP();
group-onsemi 0:098463de4c5d 94 return 0;
group-onsemi 0:098463de4c5d 95 }
group-onsemi 0:098463de4c5d 96
group-onsemi 0:098463de4c5d 97 static int timeout_status_poll(i2c_t *obj, uint32_t mask) {
group-onsemi 0:098463de4c5d 98 uint32_t i, timeout = 100000;
group-onsemi 0:098463de4c5d 99
group-onsemi 0:098463de4c5d 100 for (i = 0; i < timeout; i++) {
group-onsemi 0:098463de4c5d 101 if (obj->i2c->S & mask)
group-onsemi 0:098463de4c5d 102 return 0;
group-onsemi 0:098463de4c5d 103 }
group-onsemi 0:098463de4c5d 104
group-onsemi 0:098463de4c5d 105 return 1;
group-onsemi 0:098463de4c5d 106 }
group-onsemi 0:098463de4c5d 107
group-onsemi 0:098463de4c5d 108 // this function waits the end of a tx transfer and return the status of the transaction:
group-onsemi 0:098463de4c5d 109 // 0: OK ack received
group-onsemi 0:098463de4c5d 110 // 1: OK ack not received
group-onsemi 0:098463de4c5d 111 // 2: failure
group-onsemi 0:098463de4c5d 112 static int i2c_wait_end_tx_transfer(i2c_t *obj) {
group-onsemi 0:098463de4c5d 113
group-onsemi 0:098463de4c5d 114 // wait for the interrupt flag
group-onsemi 0:098463de4c5d 115 if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
group-onsemi 0:098463de4c5d 116 return 2;
group-onsemi 0:098463de4c5d 117 }
group-onsemi 0:098463de4c5d 118
group-onsemi 0:098463de4c5d 119 obj->i2c->S |= I2C_S_IICIF_MASK;
group-onsemi 0:098463de4c5d 120
group-onsemi 0:098463de4c5d 121 // wait transfer complete
group-onsemi 0:098463de4c5d 122 if (timeout_status_poll(obj, I2C_S_TCF_MASK)) {
group-onsemi 0:098463de4c5d 123 return 2;
group-onsemi 0:098463de4c5d 124 }
group-onsemi 0:098463de4c5d 125
group-onsemi 0:098463de4c5d 126 // check if we received the ACK or not
group-onsemi 0:098463de4c5d 127 return obj->i2c->S & I2C_S_RXAK_MASK ? 1 : 0;
group-onsemi 0:098463de4c5d 128 }
group-onsemi 0:098463de4c5d 129
group-onsemi 0:098463de4c5d 130 // this function waits the end of a rx transfer and return the status of the transaction:
group-onsemi 0:098463de4c5d 131 // 0: OK
group-onsemi 0:098463de4c5d 132 // 1: failure
group-onsemi 0:098463de4c5d 133 static int i2c_wait_end_rx_transfer(i2c_t *obj) {
group-onsemi 0:098463de4c5d 134 // wait for the end of the rx transfer
group-onsemi 0:098463de4c5d 135 if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
group-onsemi 0:098463de4c5d 136 return 1;
group-onsemi 0:098463de4c5d 137 }
group-onsemi 0:098463de4c5d 138
group-onsemi 0:098463de4c5d 139 obj->i2c->S |= I2C_S_IICIF_MASK;
group-onsemi 0:098463de4c5d 140
group-onsemi 0:098463de4c5d 141 return 0;
group-onsemi 0:098463de4c5d 142 }
group-onsemi 0:098463de4c5d 143
group-onsemi 0:098463de4c5d 144 static void i2c_send_nack(i2c_t *obj) {
group-onsemi 0:098463de4c5d 145 obj->i2c->C1 |= I2C_C1_TXAK_MASK; // NACK
group-onsemi 0:098463de4c5d 146 }
group-onsemi 0:098463de4c5d 147
group-onsemi 0:098463de4c5d 148 static void i2c_send_ack(i2c_t *obj) {
group-onsemi 0:098463de4c5d 149 obj->i2c->C1 &= ~I2C_C1_TXAK_MASK; // ACK
group-onsemi 0:098463de4c5d 150 }
group-onsemi 0:098463de4c5d 151
group-onsemi 0:098463de4c5d 152 static int i2c_do_write(i2c_t *obj, int value) {
group-onsemi 0:098463de4c5d 153 // write the data
group-onsemi 0:098463de4c5d 154 obj->i2c->D = value;
group-onsemi 0:098463de4c5d 155
group-onsemi 0:098463de4c5d 156 // init and wait the end of the transfer
group-onsemi 0:098463de4c5d 157 return i2c_wait_end_tx_transfer(obj);
group-onsemi 0:098463de4c5d 158 }
group-onsemi 0:098463de4c5d 159
group-onsemi 0:098463de4c5d 160 static int i2c_do_read(i2c_t *obj, char * data, int last) {
group-onsemi 0:098463de4c5d 161 if (last)
group-onsemi 0:098463de4c5d 162 i2c_send_nack(obj);
group-onsemi 0:098463de4c5d 163 else
group-onsemi 0:098463de4c5d 164 i2c_send_ack(obj);
group-onsemi 0:098463de4c5d 165
group-onsemi 0:098463de4c5d 166 *data = (obj->i2c->D & 0xFF);
group-onsemi 0:098463de4c5d 167
group-onsemi 0:098463de4c5d 168 // start rx transfer and wait the end of the transfer
group-onsemi 0:098463de4c5d 169 return i2c_wait_end_rx_transfer(obj);
group-onsemi 0:098463de4c5d 170 }
group-onsemi 0:098463de4c5d 171
group-onsemi 0:098463de4c5d 172 void i2c_frequency(i2c_t *obj, int hz) {
group-onsemi 0:098463de4c5d 173 uint8_t icr = 0;
group-onsemi 0:098463de4c5d 174 uint8_t mult = 0;
group-onsemi 0:098463de4c5d 175 uint32_t error = 0;
group-onsemi 0:098463de4c5d 176 uint32_t p_error = 0xffffffff;
group-onsemi 0:098463de4c5d 177 uint32_t ref = 0;
group-onsemi 0:098463de4c5d 178 uint8_t i, j;
group-onsemi 0:098463de4c5d 179 // bus clk
group-onsemi 0:098463de4c5d 180 uint32_t PCLK = bus_frequency();
group-onsemi 0:098463de4c5d 181 uint32_t pulse = PCLK / (hz * 2);
group-onsemi 0:098463de4c5d 182
group-onsemi 0:098463de4c5d 183 // we look for the values that minimize the error
group-onsemi 0:098463de4c5d 184
group-onsemi 0:098463de4c5d 185 // test all the MULT values
group-onsemi 0:098463de4c5d 186 for (i = 1; i < 5; i*=2) {
group-onsemi 0:098463de4c5d 187 for (j = 0; j < 0x40; j++) {
group-onsemi 0:098463de4c5d 188 ref = PCLK / (i*ICR[j]);
group-onsemi 0:098463de4c5d 189 if (ref > (uint32_t)hz)
group-onsemi 0:098463de4c5d 190 continue;
group-onsemi 0:098463de4c5d 191 error = hz - ref;
group-onsemi 0:098463de4c5d 192 if (error < p_error) {
group-onsemi 0:098463de4c5d 193 icr = j;
group-onsemi 0:098463de4c5d 194 mult = i/2;
group-onsemi 0:098463de4c5d 195 p_error = error;
group-onsemi 0:098463de4c5d 196 }
group-onsemi 0:098463de4c5d 197 }
group-onsemi 0:098463de4c5d 198 }
group-onsemi 0:098463de4c5d 199 pulse = icr | (mult << 6);
group-onsemi 0:098463de4c5d 200
group-onsemi 0:098463de4c5d 201 // I2C Rate
group-onsemi 0:098463de4c5d 202 obj->i2c->F = pulse;
group-onsemi 0:098463de4c5d 203 }
group-onsemi 0:098463de4c5d 204
group-onsemi 0:098463de4c5d 205 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
group-onsemi 0:098463de4c5d 206 int count;
group-onsemi 0:098463de4c5d 207 char dummy_read, *ptr;
group-onsemi 0:098463de4c5d 208
group-onsemi 0:098463de4c5d 209 if (i2c_start(obj)) {
group-onsemi 0:098463de4c5d 210 i2c_stop(obj);
group-onsemi 0:098463de4c5d 211 return I2C_ERROR_BUS_BUSY;
group-onsemi 0:098463de4c5d 212 }
group-onsemi 0:098463de4c5d 213
group-onsemi 0:098463de4c5d 214 if (i2c_do_write(obj, (address | 0x01))) {
group-onsemi 0:098463de4c5d 215 i2c_stop(obj);
group-onsemi 0:098463de4c5d 216 return I2C_ERROR_NO_SLAVE;
group-onsemi 0:098463de4c5d 217 }
group-onsemi 0:098463de4c5d 218
group-onsemi 0:098463de4c5d 219 // set rx mode
group-onsemi 0:098463de4c5d 220 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
group-onsemi 0:098463de4c5d 221
group-onsemi 0:098463de4c5d 222 // Read in bytes
group-onsemi 0:098463de4c5d 223 for (count = 0; count < (length); count++) {
group-onsemi 0:098463de4c5d 224 ptr = (count == 0) ? &dummy_read : &data[count - 1];
group-onsemi 0:098463de4c5d 225 uint8_t stop_ = (count == (length - 1)) ? 1 : 0;
group-onsemi 0:098463de4c5d 226 if (i2c_do_read(obj, ptr, stop_)) {
group-onsemi 0:098463de4c5d 227 i2c_stop(obj);
group-onsemi 0:098463de4c5d 228 return count;
group-onsemi 0:098463de4c5d 229 }
group-onsemi 0:098463de4c5d 230 }
group-onsemi 0:098463de4c5d 231
group-onsemi 0:098463de4c5d 232 // If not repeated start, send stop.
group-onsemi 0:098463de4c5d 233 if (stop) {
group-onsemi 0:098463de4c5d 234 i2c_stop(obj);
group-onsemi 0:098463de4c5d 235 }
group-onsemi 0:098463de4c5d 236
group-onsemi 0:098463de4c5d 237 // last read
group-onsemi 0:098463de4c5d 238 data[count-1] = obj->i2c->D;
group-onsemi 0:098463de4c5d 239
group-onsemi 0:098463de4c5d 240 return length;
group-onsemi 0:098463de4c5d 241 }
group-onsemi 0:098463de4c5d 242 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
group-onsemi 0:098463de4c5d 243 int i;
group-onsemi 0:098463de4c5d 244
group-onsemi 0:098463de4c5d 245 if (i2c_start(obj)) {
group-onsemi 0:098463de4c5d 246 i2c_stop(obj);
group-onsemi 0:098463de4c5d 247 return I2C_ERROR_BUS_BUSY;
group-onsemi 0:098463de4c5d 248 }
group-onsemi 0:098463de4c5d 249
group-onsemi 0:098463de4c5d 250 if (i2c_do_write(obj, (address & 0xFE))) {
group-onsemi 0:098463de4c5d 251 i2c_stop(obj);
group-onsemi 0:098463de4c5d 252 return I2C_ERROR_NO_SLAVE;
group-onsemi 0:098463de4c5d 253 }
group-onsemi 0:098463de4c5d 254
group-onsemi 0:098463de4c5d 255 for (i = 0; i < length; i++) {
group-onsemi 0:098463de4c5d 256 if(i2c_do_write(obj, data[i])) {
group-onsemi 0:098463de4c5d 257 i2c_stop(obj);
group-onsemi 0:098463de4c5d 258 return i;
group-onsemi 0:098463de4c5d 259 }
group-onsemi 0:098463de4c5d 260 }
group-onsemi 0:098463de4c5d 261
group-onsemi 0:098463de4c5d 262 if (stop) {
group-onsemi 0:098463de4c5d 263 i2c_stop(obj);
group-onsemi 0:098463de4c5d 264 }
group-onsemi 0:098463de4c5d 265
group-onsemi 0:098463de4c5d 266 return length;
group-onsemi 0:098463de4c5d 267 }
group-onsemi 0:098463de4c5d 268
group-onsemi 0:098463de4c5d 269 void i2c_reset(i2c_t *obj) {
group-onsemi 0:098463de4c5d 270 i2c_stop(obj);
group-onsemi 0:098463de4c5d 271 }
group-onsemi 0:098463de4c5d 272
group-onsemi 0:098463de4c5d 273 int i2c_byte_read(i2c_t *obj, int last) {
group-onsemi 0:098463de4c5d 274 char data;
group-onsemi 0:098463de4c5d 275
group-onsemi 0:098463de4c5d 276 // set rx mode
group-onsemi 0:098463de4c5d 277 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
group-onsemi 0:098463de4c5d 278
group-onsemi 0:098463de4c5d 279 // Setup read
group-onsemi 0:098463de4c5d 280 i2c_do_read(obj, &data, last);
group-onsemi 0:098463de4c5d 281
group-onsemi 0:098463de4c5d 282 // set tx mode
group-onsemi 0:098463de4c5d 283 obj->i2c->C1 |= I2C_C1_TX_MASK;
group-onsemi 0:098463de4c5d 284 return obj->i2c->D;
group-onsemi 0:098463de4c5d 285 }
group-onsemi 0:098463de4c5d 286
group-onsemi 0:098463de4c5d 287 int i2c_byte_write(i2c_t *obj, int data) {
group-onsemi 0:098463de4c5d 288 // set tx mode
group-onsemi 0:098463de4c5d 289 obj->i2c->C1 |= I2C_C1_TX_MASK;
group-onsemi 0:098463de4c5d 290
group-onsemi 0:098463de4c5d 291 return !i2c_do_write(obj, (data & 0xFF));
group-onsemi 0:098463de4c5d 292 }
group-onsemi 0:098463de4c5d 293
group-onsemi 0:098463de4c5d 294
group-onsemi 0:098463de4c5d 295 #if DEVICE_I2CSLAVE
group-onsemi 0:098463de4c5d 296 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
group-onsemi 0:098463de4c5d 297 if (enable_slave) {
group-onsemi 0:098463de4c5d 298 // set slave mode
group-onsemi 0:098463de4c5d 299 obj->i2c->C1 &= ~I2C_C1_MST_MASK;
group-onsemi 0:098463de4c5d 300 obj->i2c->C1 |= I2C_C1_IICIE_MASK;
group-onsemi 0:098463de4c5d 301 } else {
group-onsemi 0:098463de4c5d 302 // set master mode
group-onsemi 0:098463de4c5d 303 obj->i2c->C1 |= I2C_C1_MST_MASK;
group-onsemi 0:098463de4c5d 304 }
group-onsemi 0:098463de4c5d 305 }
group-onsemi 0:098463de4c5d 306
group-onsemi 0:098463de4c5d 307 int i2c_slave_receive(i2c_t *obj) {
group-onsemi 0:098463de4c5d 308 switch(obj->i2c->S) {
group-onsemi 0:098463de4c5d 309 // read addressed
group-onsemi 0:098463de4c5d 310 case 0xE6: return 1;
group-onsemi 0:098463de4c5d 311
group-onsemi 0:098463de4c5d 312 // write addressed
group-onsemi 0:098463de4c5d 313 case 0xE2: return 3;
group-onsemi 0:098463de4c5d 314
group-onsemi 0:098463de4c5d 315 default: return 0;
group-onsemi 0:098463de4c5d 316 }
group-onsemi 0:098463de4c5d 317 }
group-onsemi 0:098463de4c5d 318
group-onsemi 0:098463de4c5d 319 int i2c_slave_read(i2c_t *obj, char *data, int length) {
group-onsemi 0:098463de4c5d 320 uint8_t dummy_read;
group-onsemi 0:098463de4c5d 321 uint8_t * ptr;
group-onsemi 0:098463de4c5d 322 int count;
group-onsemi 0:098463de4c5d 323
group-onsemi 0:098463de4c5d 324 // set rx mode
group-onsemi 0:098463de4c5d 325 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
group-onsemi 0:098463de4c5d 326
group-onsemi 0:098463de4c5d 327 // first dummy read
group-onsemi 0:098463de4c5d 328 dummy_read = obj->i2c->D;
group-onsemi 0:098463de4c5d 329 if(i2c_wait_end_rx_transfer(obj)) {
group-onsemi 0:098463de4c5d 330 return 0;
group-onsemi 0:098463de4c5d 331 }
group-onsemi 0:098463de4c5d 332
group-onsemi 0:098463de4c5d 333 // read address
group-onsemi 0:098463de4c5d 334 dummy_read = obj->i2c->D;
group-onsemi 0:098463de4c5d 335 if(i2c_wait_end_rx_transfer(obj)) {
group-onsemi 0:098463de4c5d 336 return 0;
group-onsemi 0:098463de4c5d 337 }
group-onsemi 0:098463de4c5d 338
group-onsemi 0:098463de4c5d 339 // read (length - 1) bytes
group-onsemi 0:098463de4c5d 340 for (count = 0; count < (length - 1); count++) {
group-onsemi 0:098463de4c5d 341 data[count] = obj->i2c->D;
group-onsemi 0:098463de4c5d 342 if(i2c_wait_end_rx_transfer(obj)) {
group-onsemi 0:098463de4c5d 343 return count;
group-onsemi 0:098463de4c5d 344 }
group-onsemi 0:098463de4c5d 345 }
group-onsemi 0:098463de4c5d 346
group-onsemi 0:098463de4c5d 347 // read last byte
group-onsemi 0:098463de4c5d 348 ptr = (length == 0) ? &dummy_read : (uint8_t *)&data[count];
group-onsemi 0:098463de4c5d 349 *ptr = obj->i2c->D;
group-onsemi 0:098463de4c5d 350
group-onsemi 0:098463de4c5d 351 return (length) ? (count + 1) : 0;
group-onsemi 0:098463de4c5d 352 }
group-onsemi 0:098463de4c5d 353
group-onsemi 0:098463de4c5d 354 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
group-onsemi 0:098463de4c5d 355 int i, count = 0;
group-onsemi 0:098463de4c5d 356
group-onsemi 0:098463de4c5d 357 // set tx mode
group-onsemi 0:098463de4c5d 358 obj->i2c->C1 |= I2C_C1_TX_MASK;
group-onsemi 0:098463de4c5d 359
group-onsemi 0:098463de4c5d 360 for (i = 0; i < length; i++) {
group-onsemi 0:098463de4c5d 361 if(i2c_do_write(obj, data[count++]) == 2) {
group-onsemi 0:098463de4c5d 362 return i;
group-onsemi 0:098463de4c5d 363 }
group-onsemi 0:098463de4c5d 364 }
group-onsemi 0:098463de4c5d 365
group-onsemi 0:098463de4c5d 366 // set rx mode
group-onsemi 0:098463de4c5d 367 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
group-onsemi 0:098463de4c5d 368
group-onsemi 0:098463de4c5d 369 // dummy rx transfer needed
group-onsemi 0:098463de4c5d 370 // otherwise the master cannot generate a stop bit
group-onsemi 0:098463de4c5d 371 obj->i2c->D;
group-onsemi 0:098463de4c5d 372 if(i2c_wait_end_rx_transfer(obj) == 2) {
group-onsemi 0:098463de4c5d 373 return count;
group-onsemi 0:098463de4c5d 374 }
group-onsemi 0:098463de4c5d 375
group-onsemi 0:098463de4c5d 376 return count;
group-onsemi 0:098463de4c5d 377 }
group-onsemi 0:098463de4c5d 378
group-onsemi 0:098463de4c5d 379 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
group-onsemi 0:098463de4c5d 380 obj->i2c->A1 = address & 0xfe;
group-onsemi 0:098463de4c5d 381 }
group-onsemi 0:098463de4c5d 382 #endif
group-onsemi 0:098463de4c5d 383