ON Semiconductor / mbed-os

5.2.1 - Updated I2C files

Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_Freescale/TARGET_KLXX/gpio_api.c@1:f30bdcd2b33b, 2017-02-27 (annotated)

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d 
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* mbed Microcontroller Library
group-onsemi 0:098463de4c5d 2 * Copyright (c) 2006-2013 ARM Limited
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Licensed under the Apache License, Version 2.0 (the "License");
group-onsemi 0:098463de4c5d 5 * you may not use this file except in compliance with the License.
group-onsemi 0:098463de4c5d 6 * You may obtain a copy of the License at
group-onsemi 0:098463de4c5d 7 *
group-onsemi 0:098463de4c5d 8 * http://www.apache.org/licenses/LICENSE-2.0
group-onsemi 0:098463de4c5d 9 *
group-onsemi 0:098463de4c5d 10 * Unless required by applicable law or agreed to in writing, software
group-onsemi 0:098463de4c5d 11 * distributed under the License is distributed on an "AS IS" BASIS,
group-onsemi 0:098463de4c5d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
group-onsemi 0:098463de4c5d 13 * See the License for the specific language governing permissions and
group-onsemi 0:098463de4c5d 14 * limitations under the License.
group-onsemi 0:098463de4c5d 15 */
group-onsemi 0:098463de4c5d 16 #include "mbed_assert.h"
group-onsemi 0:098463de4c5d 17 #include "gpio_api.h"
group-onsemi 0:098463de4c5d 18 #include "pinmap.h"
group-onsemi 0:098463de4c5d 19
group-onsemi 0:098463de4c5d 20 uint32_t gpio_set(PinName pin) {
group-onsemi 0:098463de4c5d 21 MBED_ASSERT(pin != (PinName)NC);
group-onsemi 0:098463de4c5d 22 pin_function(pin, 1);
group-onsemi 0:098463de4c5d 23 return 1 << ((pin & 0x7F) >> 2);
group-onsemi 0:098463de4c5d 24 }
group-onsemi 0:098463de4c5d 25
group-onsemi 0:098463de4c5d 26 void gpio_init(gpio_t *obj, PinName pin) {
group-onsemi 0:098463de4c5d 27 obj->pin = pin;
group-onsemi 0:098463de4c5d 28 if (pin == (PinName)NC)
group-onsemi 0:098463de4c5d 29 return;
group-onsemi 0:098463de4c5d 30
group-onsemi 0:098463de4c5d 31 obj->mask = gpio_set(pin);
group-onsemi 0:098463de4c5d 32
group-onsemi 0:098463de4c5d 33 unsigned int port = (unsigned int)pin >> PORT_SHIFT;
group-onsemi 0:098463de4c5d 34
group-onsemi 0:098463de4c5d 35 #if defined(TARGET_KL43Z)
group-onsemi 0:098463de4c5d 36 GPIO_Type *reg = (GPIO_Type *)(GPIOA_BASE + port * 0x40);
group-onsemi 0:098463de4c5d 37 #else
group-onsemi 0:098463de4c5d 38 FGPIO_Type *reg = (FGPIO_Type *)(FPTA_BASE + port * 0x40);
group-onsemi 0:098463de4c5d 39 #endif
group-onsemi 0:098463de4c5d 40 obj->reg_set = &reg->PSOR;
group-onsemi 0:098463de4c5d 41 obj->reg_clr = &reg->PCOR;
group-onsemi 0:098463de4c5d 42 obj->reg_in = &reg->PDIR;
group-onsemi 0:098463de4c5d 43 obj->reg_dir = &reg->PDDR;
group-onsemi 0:098463de4c5d 44 }
group-onsemi 0:098463de4c5d 45
group-onsemi 0:098463de4c5d 46 void gpio_mode(gpio_t *obj, PinMode mode) {
group-onsemi 0:098463de4c5d 47 pin_mode(obj->pin, mode);
group-onsemi 0:098463de4c5d 48 }
group-onsemi 0:098463de4c5d 49
group-onsemi 0:098463de4c5d 50 void gpio_dir(gpio_t *obj, PinDirection direction) {
group-onsemi 0:098463de4c5d 51 MBED_ASSERT(obj->pin != (PinName)NC);
group-onsemi 0:098463de4c5d 52 switch (direction) {
group-onsemi 0:098463de4c5d 53 case PIN_INPUT :
group-onsemi 0:098463de4c5d 54 *obj->reg_dir &= ~obj->mask;
group-onsemi 0:098463de4c5d 55 break;
group-onsemi 0:098463de4c5d 56 case PIN_OUTPUT:
group-onsemi 0:098463de4c5d 57 *obj->reg_dir |= obj->mask;
group-onsemi 0:098463de4c5d 58 break;
group-onsemi 0:098463de4c5d 59 }
group-onsemi 0:098463de4c5d 60 }