ON Semiconductor / mbed-os

5.2.1 - Updated I2C files

Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_Freescale/TARGET_KLXX/analogin_api.c@1:f30bdcd2b33b, 2017-02-27 (annotated)

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d 
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* mbed Microcontroller Library
group-onsemi 0:098463de4c5d 2 * Copyright (c) 2006-2013 ARM Limited
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Licensed under the Apache License, Version 2.0 (the "License");
group-onsemi 0:098463de4c5d 5 * you may not use this file except in compliance with the License.
group-onsemi 0:098463de4c5d 6 * You may obtain a copy of the License at
group-onsemi 0:098463de4c5d 7 *
group-onsemi 0:098463de4c5d 8 * http://www.apache.org/licenses/LICENSE-2.0
group-onsemi 0:098463de4c5d 9 *
group-onsemi 0:098463de4c5d 10 * Unless required by applicable law or agreed to in writing, software
group-onsemi 0:098463de4c5d 11 * distributed under the License is distributed on an "AS IS" BASIS,
group-onsemi 0:098463de4c5d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
group-onsemi 0:098463de4c5d 13 * See the License for the specific language governing permissions and
group-onsemi 0:098463de4c5d 14 * limitations under the License.
group-onsemi 0:098463de4c5d 15 */
group-onsemi 0:098463de4c5d 16 #include "mbed_assert.h"
group-onsemi 0:098463de4c5d 17 #include "analogin_api.h"
group-onsemi 0:098463de4c5d 18
group-onsemi 0:098463de4c5d 19 #include "cmsis.h"
group-onsemi 0:098463de4c5d 20 #include "pinmap.h"
group-onsemi 0:098463de4c5d 21 #include "clk_freqs.h"
group-onsemi 0:098463de4c5d 22 #include "PeripheralPins.h"
group-onsemi 0:098463de4c5d 23
group-onsemi 0:098463de4c5d 24 #define MAX_FADC 6000000
group-onsemi 0:098463de4c5d 25 #define CHANNELS_A_SHIFT 5
group-onsemi 0:098463de4c5d 26
group-onsemi 0:098463de4c5d 27
group-onsemi 0:098463de4c5d 28 void analogin_init(analogin_t *obj, PinName pin) {
group-onsemi 0:098463de4c5d 29 obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
group-onsemi 0:098463de4c5d 30 MBED_ASSERT(obj->adc != (ADCName)NC);
group-onsemi 0:098463de4c5d 31
group-onsemi 0:098463de4c5d 32 SIM->SCGC6 |= SIM_SCGC6_ADC0_MASK;
group-onsemi 0:098463de4c5d 33
group-onsemi 0:098463de4c5d 34 uint32_t port = (uint32_t)pin >> PORT_SHIFT;
group-onsemi 0:098463de4c5d 35 SIM->SCGC5 |= 1 << (SIM_SCGC5_PORTA_SHIFT + port);
group-onsemi 0:098463de4c5d 36
group-onsemi 0:098463de4c5d 37 uint32_t cfg2_muxsel = ADC_CFG2_MUXSEL_MASK;
group-onsemi 0:098463de4c5d 38 if (obj->adc & (1 << CHANNELS_A_SHIFT)) {
group-onsemi 0:098463de4c5d 39 cfg2_muxsel = 0;
group-onsemi 0:098463de4c5d 40 }
group-onsemi 0:098463de4c5d 41
group-onsemi 0:098463de4c5d 42 // bus clk
group-onsemi 0:098463de4c5d 43 uint32_t PCLK = bus_frequency();
group-onsemi 0:098463de4c5d 44 uint32_t clkdiv;
group-onsemi 0:098463de4c5d 45 for (clkdiv = 0; clkdiv < 4; clkdiv++) {
group-onsemi 0:098463de4c5d 46 if ((PCLK >> clkdiv) <= MAX_FADC)
group-onsemi 0:098463de4c5d 47 break;
group-onsemi 0:098463de4c5d 48 }
group-onsemi 0:098463de4c5d 49 if (clkdiv == 4) //Set max div
group-onsemi 0:098463de4c5d 50 clkdiv = 0x7;
group-onsemi 0:098463de4c5d 51
group-onsemi 0:098463de4c5d 52 ADC0->SC1[1] = ADC_SC1_ADCH(obj->adc & ~(1 << CHANNELS_A_SHIFT));
group-onsemi 0:098463de4c5d 53
group-onsemi 0:098463de4c5d 54 ADC0->CFG1 = ADC_CFG1_ADLPC_MASK // Low-Power Configuration
group-onsemi 0:098463de4c5d 55 | ADC_CFG1_ADIV(clkdiv & 0x3) // Clock Divide Select: (Input Clock)/8
group-onsemi 0:098463de4c5d 56 | ADC_CFG1_ADLSMP_MASK // Long Sample Time
group-onsemi 0:098463de4c5d 57 | ADC_CFG1_MODE(3) // (16)bits Resolution
group-onsemi 0:098463de4c5d 58 | ADC_CFG1_ADICLK(clkdiv >> 2); // Input Clock: (Bus Clock)/2
group-onsemi 0:098463de4c5d 59
group-onsemi 0:098463de4c5d 60 ADC0->CFG2 = cfg2_muxsel // ADxxb or ADxxa channels
group-onsemi 0:098463de4c5d 61 | ADC_CFG2_ADHSC_MASK // High-Speed Configuration
group-onsemi 0:098463de4c5d 62 | ADC_CFG2_ADLSTS(0); // Long Sample Time Select
group-onsemi 0:098463de4c5d 63
group-onsemi 0:098463de4c5d 64 ADC0->SC2 = ADC_SC2_REFSEL(0); // Default Voltage Reference
group-onsemi 0:098463de4c5d 65
group-onsemi 0:098463de4c5d 66 ADC0->SC3 = ADC_SC3_AVGE_MASK // Hardware Average Enable
group-onsemi 0:098463de4c5d 67 | ADC_SC3_AVGS(0); // 4 Samples Averaged
group-onsemi 0:098463de4c5d 68
group-onsemi 0:098463de4c5d 69 pinmap_pinout(pin, PinMap_ADC);
group-onsemi 0:098463de4c5d 70 }
group-onsemi 0:098463de4c5d 71
group-onsemi 0:098463de4c5d 72 uint16_t analogin_read_u16(analogin_t *obj) {
group-onsemi 0:098463de4c5d 73 // start conversion
group-onsemi 0:098463de4c5d 74 ADC0->SC1[0] = ADC_SC1_ADCH(obj->adc & ~(1 << CHANNELS_A_SHIFT));
group-onsemi 0:098463de4c5d 75
group-onsemi 0:098463de4c5d 76 // Wait Conversion Complete
group-onsemi 0:098463de4c5d 77 while ((ADC0->SC1[0] & ADC_SC1_COCO_MASK) != ADC_SC1_COCO_MASK);
group-onsemi 0:098463de4c5d 78
group-onsemi 0:098463de4c5d 79 // Return value
group-onsemi 0:098463de4c5d 80 return (uint16_t)ADC0->R[0];
group-onsemi 0:098463de4c5d 81 }
group-onsemi 0:098463de4c5d 82
group-onsemi 0:098463de4c5d 83 float analogin_read(analogin_t *obj) {
group-onsemi 0:098463de4c5d 84 uint16_t value = analogin_read_u16(obj);
group-onsemi 0:098463de4c5d 85 return (float)value * (1.0f / (float)0xFFFF);
group-onsemi 0:098463de4c5d 86 }
group-onsemi 0:098463de4c5d 87