5.2.1 - Updated I2C files

Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* mbed Microcontroller Library
group-onsemi 0:098463de4c5d 2 * Copyright (c) 2006-2013 ARM Limited
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Licensed under the Apache License, Version 2.0 (the "License");
group-onsemi 0:098463de4c5d 5 * you may not use this file except in compliance with the License.
group-onsemi 0:098463de4c5d 6 * You may obtain a copy of the License at
group-onsemi 0:098463de4c5d 7 *
group-onsemi 0:098463de4c5d 8 * http://www.apache.org/licenses/LICENSE-2.0
group-onsemi 0:098463de4c5d 9 *
group-onsemi 0:098463de4c5d 10 * Unless required by applicable law or agreed to in writing, software
group-onsemi 0:098463de4c5d 11 * distributed under the License is distributed on an "AS IS" BASIS,
group-onsemi 0:098463de4c5d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
group-onsemi 0:098463de4c5d 13 * See the License for the specific language governing permissions and
group-onsemi 0:098463de4c5d 14 * limitations under the License.
group-onsemi 0:098463de4c5d 15 */
group-onsemi 0:098463de4c5d 16 #include "drivers/SPI.h"
group-onsemi 0:098463de4c5d 17 #include "platform/critical.h"
group-onsemi 0:098463de4c5d 18
group-onsemi 0:098463de4c5d 19 #if DEVICE_SPI
group-onsemi 0:098463de4c5d 20
group-onsemi 0:098463de4c5d 21 namespace mbed {
group-onsemi 0:098463de4c5d 22
group-onsemi 0:098463de4c5d 23 #if DEVICE_SPI_ASYNCH && TRANSACTION_QUEUE_SIZE_SPI
group-onsemi 0:098463de4c5d 24 CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> SPI::_transaction_buffer;
group-onsemi 0:098463de4c5d 25 #endif
group-onsemi 0:098463de4c5d 26
group-onsemi 0:098463de4c5d 27 SPI::SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel) :
group-onsemi 0:098463de4c5d 28 _spi(),
group-onsemi 0:098463de4c5d 29 #if DEVICE_SPI_ASYNCH
group-onsemi 0:098463de4c5d 30 _irq(this),
group-onsemi 0:098463de4c5d 31 _usage(DMA_USAGE_NEVER),
group-onsemi 0:098463de4c5d 32 #endif
group-onsemi 0:098463de4c5d 33 _bits(8),
group-onsemi 0:098463de4c5d 34 _mode(0),
group-onsemi 0:098463de4c5d 35 _hz(1000000) {
group-onsemi 0:098463de4c5d 36 // No lock needed in the constructor
group-onsemi 0:098463de4c5d 37
group-onsemi 0:098463de4c5d 38 spi_init(&_spi, mosi, miso, sclk, ssel);
group-onsemi 0:098463de4c5d 39 aquire();
group-onsemi 0:098463de4c5d 40 }
group-onsemi 0:098463de4c5d 41
group-onsemi 0:098463de4c5d 42 void SPI::format(int bits, int mode) {
group-onsemi 0:098463de4c5d 43 lock();
group-onsemi 0:098463de4c5d 44 _bits = bits;
group-onsemi 0:098463de4c5d 45 _mode = mode;
group-onsemi 0:098463de4c5d 46 SPI::_owner = NULL; // Not that elegant, but works. rmeyer
group-onsemi 0:098463de4c5d 47 aquire();
group-onsemi 0:098463de4c5d 48 unlock();
group-onsemi 0:098463de4c5d 49 }
group-onsemi 0:098463de4c5d 50
group-onsemi 0:098463de4c5d 51 void SPI::frequency(int hz) {
group-onsemi 0:098463de4c5d 52 lock();
group-onsemi 0:098463de4c5d 53 _hz = hz;
group-onsemi 0:098463de4c5d 54 SPI::_owner = NULL; // Not that elegant, but works. rmeyer
group-onsemi 0:098463de4c5d 55 aquire();
group-onsemi 0:098463de4c5d 56 unlock();
group-onsemi 0:098463de4c5d 57 }
group-onsemi 0:098463de4c5d 58
group-onsemi 0:098463de4c5d 59 SPI* SPI::_owner = NULL;
group-onsemi 0:098463de4c5d 60 SingletonPtr<PlatformMutex> SPI::_mutex;
group-onsemi 0:098463de4c5d 61
group-onsemi 0:098463de4c5d 62 // ignore the fact there are multiple physical spis, and always update if it wasnt us last
group-onsemi 0:098463de4c5d 63 void SPI::aquire() {
group-onsemi 0:098463de4c5d 64 lock();
group-onsemi 0:098463de4c5d 65 if (_owner != this) {
group-onsemi 0:098463de4c5d 66 spi_format(&_spi, _bits, _mode, 0);
group-onsemi 0:098463de4c5d 67 spi_frequency(&_spi, _hz);
group-onsemi 0:098463de4c5d 68 _owner = this;
group-onsemi 0:098463de4c5d 69 }
group-onsemi 0:098463de4c5d 70 unlock();
group-onsemi 0:098463de4c5d 71 }
group-onsemi 0:098463de4c5d 72
group-onsemi 0:098463de4c5d 73 int SPI::write(int value) {
group-onsemi 0:098463de4c5d 74 lock();
group-onsemi 0:098463de4c5d 75 aquire();
group-onsemi 0:098463de4c5d 76 int ret = spi_master_write(&_spi, value);
group-onsemi 0:098463de4c5d 77 unlock();
group-onsemi 0:098463de4c5d 78 return ret;
group-onsemi 0:098463de4c5d 79 }
group-onsemi 0:098463de4c5d 80
group-onsemi 0:098463de4c5d 81 void SPI::lock() {
group-onsemi 0:098463de4c5d 82 _mutex->lock();
group-onsemi 0:098463de4c5d 83 }
group-onsemi 0:098463de4c5d 84
group-onsemi 0:098463de4c5d 85 void SPI::unlock() {
group-onsemi 0:098463de4c5d 86 _mutex->unlock();
group-onsemi 0:098463de4c5d 87 }
group-onsemi 0:098463de4c5d 88
group-onsemi 0:098463de4c5d 89 #if DEVICE_SPI_ASYNCH
group-onsemi 0:098463de4c5d 90
group-onsemi 0:098463de4c5d 91 int SPI::transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
group-onsemi 0:098463de4c5d 92 {
group-onsemi 0:098463de4c5d 93 if (spi_active(&_spi)) {
group-onsemi 0:098463de4c5d 94 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
group-onsemi 0:098463de4c5d 95 }
group-onsemi 0:098463de4c5d 96 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
group-onsemi 0:098463de4c5d 97 return 0;
group-onsemi 0:098463de4c5d 98 }
group-onsemi 0:098463de4c5d 99
group-onsemi 0:098463de4c5d 100 void SPI::abort_transfer()
group-onsemi 0:098463de4c5d 101 {
group-onsemi 0:098463de4c5d 102 spi_abort_asynch(&_spi);
group-onsemi 0:098463de4c5d 103 #if TRANSACTION_QUEUE_SIZE_SPI
group-onsemi 0:098463de4c5d 104 dequeue_transaction();
group-onsemi 0:098463de4c5d 105 #endif
group-onsemi 0:098463de4c5d 106 }
group-onsemi 0:098463de4c5d 107
group-onsemi 0:098463de4c5d 108
group-onsemi 0:098463de4c5d 109 void SPI::clear_transfer_buffer()
group-onsemi 0:098463de4c5d 110 {
group-onsemi 0:098463de4c5d 111 #if TRANSACTION_QUEUE_SIZE_SPI
group-onsemi 0:098463de4c5d 112 _transaction_buffer.reset();
group-onsemi 0:098463de4c5d 113 #endif
group-onsemi 0:098463de4c5d 114 }
group-onsemi 0:098463de4c5d 115
group-onsemi 0:098463de4c5d 116 void SPI::abort_all_transfers()
group-onsemi 0:098463de4c5d 117 {
group-onsemi 0:098463de4c5d 118 clear_transfer_buffer();
group-onsemi 0:098463de4c5d 119 abort_transfer();
group-onsemi 0:098463de4c5d 120 }
group-onsemi 0:098463de4c5d 121
group-onsemi 0:098463de4c5d 122 int SPI::set_dma_usage(DMAUsage usage)
group-onsemi 0:098463de4c5d 123 {
group-onsemi 0:098463de4c5d 124 if (spi_active(&_spi)) {
group-onsemi 0:098463de4c5d 125 return -1;
group-onsemi 0:098463de4c5d 126 }
group-onsemi 0:098463de4c5d 127 _usage = usage;
group-onsemi 0:098463de4c5d 128 return 0;
group-onsemi 0:098463de4c5d 129 }
group-onsemi 0:098463de4c5d 130
group-onsemi 0:098463de4c5d 131 int SPI::queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
group-onsemi 0:098463de4c5d 132 {
group-onsemi 0:098463de4c5d 133 #if TRANSACTION_QUEUE_SIZE_SPI
group-onsemi 0:098463de4c5d 134 transaction_t t;
group-onsemi 0:098463de4c5d 135
group-onsemi 0:098463de4c5d 136 t.tx_buffer = const_cast<void *>(tx_buffer);
group-onsemi 0:098463de4c5d 137 t.tx_length = tx_length;
group-onsemi 0:098463de4c5d 138 t.rx_buffer = rx_buffer;
group-onsemi 0:098463de4c5d 139 t.rx_length = rx_length;
group-onsemi 0:098463de4c5d 140 t.event = event;
group-onsemi 0:098463de4c5d 141 t.callback = callback;
group-onsemi 0:098463de4c5d 142 t.width = bit_width;
group-onsemi 0:098463de4c5d 143 Transaction<SPI> transaction(this, t);
group-onsemi 0:098463de4c5d 144 if (_transaction_buffer.full()) {
group-onsemi 0:098463de4c5d 145 return -1; // the buffer is full
group-onsemi 0:098463de4c5d 146 } else {
group-onsemi 0:098463de4c5d 147 core_util_critical_section_enter();
group-onsemi 0:098463de4c5d 148 _transaction_buffer.push(transaction);
group-onsemi 0:098463de4c5d 149 if (!spi_active(&_spi)) {
group-onsemi 0:098463de4c5d 150 dequeue_transaction();
group-onsemi 0:098463de4c5d 151 }
group-onsemi 0:098463de4c5d 152 core_util_critical_section_exit();
group-onsemi 0:098463de4c5d 153 return 0;
group-onsemi 0:098463de4c5d 154 }
group-onsemi 0:098463de4c5d 155 #else
group-onsemi 0:098463de4c5d 156 return -1;
group-onsemi 0:098463de4c5d 157 #endif
group-onsemi 0:098463de4c5d 158 }
group-onsemi 0:098463de4c5d 159
group-onsemi 0:098463de4c5d 160 void SPI::start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
group-onsemi 0:098463de4c5d 161 {
group-onsemi 0:098463de4c5d 162 aquire();
group-onsemi 0:098463de4c5d 163 _callback = callback;
group-onsemi 0:098463de4c5d 164 _irq.callback(&SPI::irq_handler_asynch);
group-onsemi 0:098463de4c5d 165 spi_master_transfer(&_spi, tx_buffer, tx_length, rx_buffer, rx_length, bit_width, _irq.entry(), event , _usage);
group-onsemi 0:098463de4c5d 166 }
group-onsemi 0:098463de4c5d 167
group-onsemi 0:098463de4c5d 168 #if TRANSACTION_QUEUE_SIZE_SPI
group-onsemi 0:098463de4c5d 169
group-onsemi 0:098463de4c5d 170 void SPI::start_transaction(transaction_t *data)
group-onsemi 0:098463de4c5d 171 {
group-onsemi 0:098463de4c5d 172 start_transfer(data->tx_buffer, data->tx_length, data->rx_buffer, data->rx_length, data->width, data->callback, data->event);
group-onsemi 0:098463de4c5d 173 }
group-onsemi 0:098463de4c5d 174
group-onsemi 0:098463de4c5d 175 void SPI::dequeue_transaction()
group-onsemi 0:098463de4c5d 176 {
group-onsemi 0:098463de4c5d 177 Transaction<SPI> t;
group-onsemi 0:098463de4c5d 178 if (_transaction_buffer.pop(t)) {
group-onsemi 0:098463de4c5d 179 SPI* obj = t.get_object();
group-onsemi 0:098463de4c5d 180 transaction_t* data = t.get_transaction();
group-onsemi 0:098463de4c5d 181 obj->start_transaction(data);
group-onsemi 0:098463de4c5d 182 }
group-onsemi 0:098463de4c5d 183 }
group-onsemi 0:098463de4c5d 184
group-onsemi 0:098463de4c5d 185 #endif
group-onsemi 0:098463de4c5d 186
group-onsemi 0:098463de4c5d 187 void SPI::irq_handler_asynch(void)
group-onsemi 0:098463de4c5d 188 {
group-onsemi 0:098463de4c5d 189 int event = spi_irq_handler_asynch(&_spi);
group-onsemi 0:098463de4c5d 190 if (_callback && (event & SPI_EVENT_ALL)) {
group-onsemi 0:098463de4c5d 191 _callback.call(event & SPI_EVENT_ALL);
group-onsemi 0:098463de4c5d 192 }
group-onsemi 0:098463de4c5d 193 #if TRANSACTION_QUEUE_SIZE_SPI
group-onsemi 0:098463de4c5d 194 if (event & (SPI_EVENT_ALL | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE)) {
group-onsemi 0:098463de4c5d 195 // SPI peripheral is free (event happend), dequeue transaction
group-onsemi 0:098463de4c5d 196 dequeue_transaction();
group-onsemi 0:098463de4c5d 197 }
group-onsemi 0:098463de4c5d 198 #endif
group-onsemi 0:098463de4c5d 199 }
group-onsemi 0:098463de4c5d 200
group-onsemi 0:098463de4c5d 201 #endif
group-onsemi 0:098463de4c5d 202
group-onsemi 0:098463de4c5d 203 } // namespace mbed
group-onsemi 0:098463de4c5d 204
group-onsemi 0:098463de4c5d 205 #endif