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Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_WIZNET/TARGET_W7500x/rtc_api.c@0:098463de4c5d, 2017-01-25 (annotated)

Committer:
group-onsemi
Date:
Wed Jan 25 20:34:15 2017 +0000
Revision:
0:098463de4c5d
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* mbed Microcontroller Library
group-onsemi 0:098463de4c5d 2 * Copyright (c) 2006-2013 ARM Limited
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Licensed under the Apache License, Version 2.0 (the "License");
group-onsemi 0:098463de4c5d 5 * you may not use this file except in compliance with the License.
group-onsemi 0:098463de4c5d 6 * You may obtain a copy of the License at
group-onsemi 0:098463de4c5d 7 *
group-onsemi 0:098463de4c5d 8 * http://www.apache.org/licenses/LICENSE-2.0
group-onsemi 0:098463de4c5d 9 *
group-onsemi 0:098463de4c5d 10 * Unless required by applicable law or agreed to in writing, software
group-onsemi 0:098463de4c5d 11 * distributed under the License is distributed on an "AS IS" BASIS,
group-onsemi 0:098463de4c5d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
group-onsemi 0:098463de4c5d 13 * See the License for the specific language governing permissions and
group-onsemi 0:098463de4c5d 14 * limitations under the License.
group-onsemi 0:098463de4c5d 15 */
group-onsemi 0:098463de4c5d 16 #include "rtc_api.h"
group-onsemi 0:098463de4c5d 17 #include "cmsis.h"
group-onsemi 0:098463de4c5d 18 #include "W7500x_pwm.h"
group-onsemi 0:098463de4c5d 19
group-onsemi 0:098463de4c5d 20 time_t wiz_rtc_time;
group-onsemi 0:098463de4c5d 21 char rtc_enabled = 0;
group-onsemi 0:098463de4c5d 22
group-onsemi 0:098463de4c5d 23 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 24 extern "C"{
group-onsemi 0:098463de4c5d 25 #endif
group-onsemi 0:098463de4c5d 26 void PWM3_Handler(void)
group-onsemi 0:098463de4c5d 27 {
group-onsemi 0:098463de4c5d 28
group-onsemi 0:098463de4c5d 29 wiz_rtc_time++;
group-onsemi 0:098463de4c5d 30 PWM_CH3_ClearOverflowInt();
group-onsemi 0:098463de4c5d 31
group-onsemi 0:098463de4c5d 32 }
group-onsemi 0:098463de4c5d 33 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 34 }
group-onsemi 0:098463de4c5d 35 #endif
group-onsemi 0:098463de4c5d 36
group-onsemi 0:098463de4c5d 37
group-onsemi 0:098463de4c5d 38
group-onsemi 0:098463de4c5d 39 void rtc_init(void) {
group-onsemi 0:098463de4c5d 40 PWM_TimerModeInitTypeDef TimerModeStructure;
group-onsemi 0:098463de4c5d 41 *(volatile uint32_t *)(0x410010e0) = 0x03;
group-onsemi 0:098463de4c5d 42
group-onsemi 0:098463de4c5d 43 /* Timer mode configuration */
group-onsemi 0:098463de4c5d 44 TimerModeStructure.PWM_CHn_PR = 7;
group-onsemi 0:098463de4c5d 45 TimerModeStructure.PWM_CHn_MR = 1;
group-onsemi 0:098463de4c5d 46 TimerModeStructure.PWM_CHn_LR = 0xF4240;
group-onsemi 0:098463de4c5d 47 TimerModeStructure.PWM_CHn_UDMR = PWM_CHn_UDMR_UpCount;
group-onsemi 0:098463de4c5d 48 TimerModeStructure.PWM_CHn_PDMR = PWM_CHn_PDMR_Periodic;
group-onsemi 0:098463de4c5d 49
group-onsemi 0:098463de4c5d 50 PWM_TimerModeInit(PWM_CH3, &TimerModeStructure);
group-onsemi 0:098463de4c5d 51
group-onsemi 0:098463de4c5d 52 /* PWM interrupt configuration */
group-onsemi 0:098463de4c5d 53 PWM_IntConfig(PWM_CH3, ENABLE);
group-onsemi 0:098463de4c5d 54 PWM_CHn_IntConfig(PWM_CH3, PWM_CHn_IER_OIE, ENABLE);
group-onsemi 0:098463de4c5d 55
group-onsemi 0:098463de4c5d 56 /* PWM channel 0 start */
group-onsemi 0:098463de4c5d 57 PWM_CHn_Start(PWM_CH3);
group-onsemi 0:098463de4c5d 58 NVIC_SetVector(PWM3_IRQn, (uint32_t)PWM3_Handler);
group-onsemi 0:098463de4c5d 59 NVIC_EnableIRQ(PWM3_IRQn);
group-onsemi 0:098463de4c5d 60 rtc_enabled = 1;
group-onsemi 0:098463de4c5d 61 }
group-onsemi 0:098463de4c5d 62
group-onsemi 0:098463de4c5d 63 void rtc_free(void) {
group-onsemi 0:098463de4c5d 64 // [TODO]
group-onsemi 0:098463de4c5d 65 }
group-onsemi 0:098463de4c5d 66
group-onsemi 0:098463de4c5d 67
group-onsemi 0:098463de4c5d 68 int rtc_isenabled(void) {
group-onsemi 0:098463de4c5d 69 return rtc_enabled;
group-onsemi 0:098463de4c5d 70 }
group-onsemi 0:098463de4c5d 71
group-onsemi 0:098463de4c5d 72
group-onsemi 0:098463de4c5d 73 time_t rtc_read(void) {
group-onsemi 0:098463de4c5d 74 return wiz_rtc_time;
group-onsemi 0:098463de4c5d 75 }
group-onsemi 0:098463de4c5d 76
group-onsemi 0:098463de4c5d 77 void rtc_write(time_t t) {
group-onsemi 0:098463de4c5d 78 //*(volatile uint32_t *)(0x41001008) = 0x42; // timer disable, interrupt disable
group-onsemi 0:098463de4c5d 79 wiz_rtc_time = t;
group-onsemi 0:098463de4c5d 80 //*(volatile uint32_t *)(0x41001008) = 0x72; // timer enable interrupt enable
group-onsemi 0:098463de4c5d 81 }