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Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_ONSEMI/TARGET_NCS36510/pmu_map.h@0:098463de4c5d, 2017-01-25 (annotated)

Committer:
group-onsemi
Date:
Wed Jan 25 20:34:15 2017 +0000
Revision:
0:098463de4c5d
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /**
group-onsemi 0:098463de4c5d 2 ******************************************************************************
group-onsemi 0:098463de4c5d 3 * @file pmu_map.h
group-onsemi 0:098463de4c5d 4 * @brief PMU hw module register map
group-onsemi 0:098463de4c5d 5 * @internal
group-onsemi 0:098463de4c5d 6 * @author ON Semiconductor
group-onsemi 0:098463de4c5d 7 * $Rev: 3372 $
group-onsemi 0:098463de4c5d 8 * $Date: 2015-04-22 12:18:18 +0530 (Wed, 22 Apr 2015) $
group-onsemi 0:098463de4c5d 9 ******************************************************************************
group-onsemi 0:098463de4c5d 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
group-onsemi 0:098463de4c5d 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
group-onsemi 0:098463de4c5d 12 * under limited terms and conditions. The terms and conditions pertaining to the software
group-onsemi 0:098463de4c5d 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
group-onsemi 0:098463de4c5d 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
group-onsemi 0:098463de4c5d 15 * if applicable the software license agreement. Do not use this software and/or
group-onsemi 0:098463de4c5d 16 * documentation unless you have carefully read and you agree to the limited terms and
group-onsemi 0:098463de4c5d 17 * conditions. By using this software and/or documentation, you agree to the limited
group-onsemi 0:098463de4c5d 18 * terms and conditions.
group-onsemi 0:098463de4c5d 19 *
group-onsemi 0:098463de4c5d 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
group-onsemi 0:098463de4c5d 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
group-onsemi 0:098463de4c5d 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
group-onsemi 0:098463de4c5d 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
group-onsemi 0:098463de4c5d 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
group-onsemi 0:098463de4c5d 25 * @endinternal
group-onsemi 0:098463de4c5d 26 *
group-onsemi 0:098463de4c5d 27 * @ingroup pmu
group-onsemi 0:098463de4c5d 28 *
group-onsemi 0:098463de4c5d 29 * @details
group-onsemi 0:098463de4c5d 30 */
group-onsemi 0:098463de4c5d 31
group-onsemi 0:098463de4c5d 32 #ifndef PMU_MAP_H_
group-onsemi 0:098463de4c5d 33 #define PMU_MAP_H_
group-onsemi 0:098463de4c5d 34
group-onsemi 0:098463de4c5d 35 /*************************************************************************************************
group-onsemi 0:098463de4c5d 36 * *
group-onsemi 0:098463de4c5d 37 * Header files *
group-onsemi 0:098463de4c5d 38 * *
group-onsemi 0:098463de4c5d 39 *************************************************************************************************/
group-onsemi 0:098463de4c5d 40
group-onsemi 0:098463de4c5d 41 #include "architecture.h"
group-onsemi 0:098463de4c5d 42
group-onsemi 0:098463de4c5d 43 /**************************************************************************************************
group-onsemi 0:098463de4c5d 44 * *
group-onsemi 0:098463de4c5d 45 * Type definitions *
group-onsemi 0:098463de4c5d 46 * *
group-onsemi 0:098463de4c5d 47 **************************************************************************************************/
group-onsemi 0:098463de4c5d 48
group-onsemi 0:098463de4c5d 49 /** PMU control
group-onsemi 0:098463de4c5d 50 * The Power Management Unit (PMU) is used to control the differing power modes.
group-onsemi 0:098463de4c5d 51 */
group-onsemi 0:098463de4c5d 52 typedef struct {
group-onsemi 0:098463de4c5d 53 union {
group-onsemi 0:098463de4c5d 54 struct {
group-onsemi 0:098463de4c5d 55 __IO uint32_t ENCOMA :1; /**< 0- Sleep or SleepDeep depending on System Control Register (see WFI and WFE instructions), 1 – Coma */
group-onsemi 0:098463de4c5d 56 __IO uint32_t SRAMA :1; /**< SRAMA Powered in Coma Modes: 0 – SRAM Powered, 1 – SRAM Un-Powered */
group-onsemi 0:098463de4c5d 57 __IO uint32_t SRAMB :1; /**< SRAMB Powered in Coma Modes: 0 – SRAM Powered, 1 – SRAM Un-Powered */
group-onsemi 0:098463de4c5d 58 __IO uint32_t EXT32K :1; /**< External 32.768kHz Enable: 0 – Disabled (off), 1 – Enabled (on), Hardware guarantees that this oscillator cannot be powered if the internal 32kHz oscillator is already powered down. Hardware insures that one of the 32kHz oscillators is running. */
group-onsemi 0:098463de4c5d 59 __IO uint32_t INT32K :1; /**< Internal 32kHz Enable: 0 – Enabled (on), 1 – Disabled (Off), Hardware guarantees that this oscillator cannot be powered down if the external 32.768kHz oscillator is already powered down. Hardware insures that one of the 32kHz oscillators is running. */
group-onsemi 0:098463de4c5d 60 __IO uint32_t INT32M :1; /**< Internal 32MHz Enable: 0 – Enabled (on), 1 – Disabled (off), This bit will automatically get cleared when exiting Coma, or SleepDeep modes of operation. This bit should be set by software after switching over to the external 32MHz oscillator using the Oscillator Select bit in the Clock Control register */
group-onsemi 0:098463de4c5d 61 __IO uint32_t C1V1:1; /**< Coma mode 1V1 regulator setting: 0 - Linear regulator, 1 - switching regulator */
group-onsemi 0:098463de4c5d 62 __IO uint32_t N1V1:1; /**< Regular mode (Run sleep and deepsleep) 1V1 regulator mode: 0 - Linear regulator, 1 - switching regulator */
group-onsemi 0:098463de4c5d 63 __IO uint32_t DBGPOW :1; /**< Debugger Power Behavior: 0 – Normal power behavior when the debugger is present, 1 – When debugger is present the ASIC can only enter SleepDeep mode and FVDDH and FVDDL always remain powered. The 32MHz oscillators can never be powered down in this mode either. */
group-onsemi 0:098463de4c5d 64 __IO uint32_t UVIC:1; /**< Under voltage indicator control: 0 - disabled, 1 - enabled */
group-onsemi 0:098463de4c5d 65 __IO uint32_t UVII:1; /**< Under voltage indicator input: 0 - 1V1 regulator, 1 - FVDDH regulator */
group-onsemi 0:098463de4c5d 66 __IO uint32_t UVIR:1; /**< Under voltage indicator reset: 0 - do not reset, 1 - reset */
group-onsemi 0:098463de4c5d 67 } BITS;
group-onsemi 0:098463de4c5d 68 __IO uint32_t WORD;
group-onsemi 0:098463de4c5d 69 } CONTROL; /* 0x4001D000 */
group-onsemi 0:098463de4c5d 70 union {
group-onsemi 0:098463de4c5d 71 struct {
group-onsemi 0:098463de4c5d 72 __I uint32_t BATTDET:1; /**< Detected battery: 0 - 1V, 1 - 3V */
group-onsemi 0:098463de4c5d 73 __I uint32_t UVIC:1; /**< Under voltage status: 0 - normal, 1 - low */
group-onsemi 0:098463de4c5d 74
group-onsemi 0:098463de4c5d 75 } BITS;
group-onsemi 0:098463de4c5d 76 __IO uint32_t WORD;
group-onsemi 0:098463de4c5d 77 } STATUS; /* 0x4001D004 */
group-onsemi 0:098463de4c5d 78
group-onsemi 0:098463de4c5d 79 __IO uint32_t PLACEHOLDER; /* 0x4001D008 */
group-onsemi 0:098463de4c5d 80 __IO uint32_t FVDD_TSTARTUP; /**< Regulator start time. */ /* 0x4001D00C */
group-onsemi 0:098463de4c5d 81 __IO uint32_t PLACEHOLDER1; /* 0x4001D010 */
group-onsemi 0:098463de4c5d 82 __IO uint32_t FVDD_TSETTLE; /**< Regulator settle time. */ /* 0x4001D014 */
group-onsemi 0:098463de4c5d 83 union {
group-onsemi 0:098463de4c5d 84 struct {
group-onsemi 0:098463de4c5d 85 __IO uint32_t TH:6; /**< Threshold */
group-onsemi 0:098463de4c5d 86 __I uint32_t PAD:2;
group-onsemi 0:098463de4c5d 87 __I uint32_t UVIVAL:6; /**< UVI value */
group-onsemi 0:098463de4c5d 88 } BITS;
group-onsemi 0:098463de4c5d 89 __IO uint32_t WORD;
group-onsemi 0:098463de4c5d 90 } UVI_TBASE; /* 0x4001D018 */
group-onsemi 0:098463de4c5d 91 __IO uint32_t SRAM_TRIM; /* 0x4001D01C */
group-onsemi 0:098463de4c5d 92
group-onsemi 0:098463de4c5d 93 } PmuReg_t, *PmuReg_pt;
group-onsemi 0:098463de4c5d 94
group-onsemi 0:098463de4c5d 95 #endif /* PMU_MAP_H_ */