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Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_NXP/TARGET_LPC2460/gpio_api.c@0:098463de4c5d, 2017-01-25 (annotated)

Committer:
group-onsemi
Date:
Wed Jan 25 20:34:15 2017 +0000
Revision:
0:098463de4c5d
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* mbed Microcontroller Library
group-onsemi 0:098463de4c5d 2 * Copyright (c) 2006-2015 ARM Limited
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Licensed under the Apache License, Version 2.0 (the "License");
group-onsemi 0:098463de4c5d 5 * you may not use this file except in compliance with the License.
group-onsemi 0:098463de4c5d 6 * You may obtain a copy of the License at
group-onsemi 0:098463de4c5d 7 *
group-onsemi 0:098463de4c5d 8 * http://www.apache.org/licenses/LICENSE-2.0
group-onsemi 0:098463de4c5d 9 *
group-onsemi 0:098463de4c5d 10 * Unless required by applicable law or agreed to in writing, software
group-onsemi 0:098463de4c5d 11 * distributed under the License is distributed on an "AS IS" BASIS,
group-onsemi 0:098463de4c5d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
group-onsemi 0:098463de4c5d 13 * See the License for the specific language governing permissions and
group-onsemi 0:098463de4c5d 14 * limitations under the License.
group-onsemi 0:098463de4c5d 15 */
group-onsemi 0:098463de4c5d 16 #include "mbed_assert.h"
group-onsemi 0:098463de4c5d 17 #include "gpio_api.h"
group-onsemi 0:098463de4c5d 18 #include "pinmap.h"
group-onsemi 0:098463de4c5d 19
group-onsemi 0:098463de4c5d 20 uint32_t gpio_set(PinName pin) {
group-onsemi 0:098463de4c5d 21 LPC_SC->SCS |= 1; // High speed GPIO is enabled on ports 0 and 1
group-onsemi 0:098463de4c5d 22
group-onsemi 0:098463de4c5d 23 pin_function(pin, 0);
group-onsemi 0:098463de4c5d 24
group-onsemi 0:098463de4c5d 25 return (1 << ((int)pin & 0x1F));
group-onsemi 0:098463de4c5d 26 }
group-onsemi 0:098463de4c5d 27
group-onsemi 0:098463de4c5d 28 void gpio_init(gpio_t *obj, PinName pin) {
group-onsemi 0:098463de4c5d 29 if (pin == (PinName)NC)
group-onsemi 0:098463de4c5d 30 return;
group-onsemi 0:098463de4c5d 31 obj->pin = pin;
group-onsemi 0:098463de4c5d 32 if (pin == (PinName)NC)
group-onsemi 0:098463de4c5d 33 return;
group-onsemi 0:098463de4c5d 34
group-onsemi 0:098463de4c5d 35 obj->mask = gpio_set(pin);
group-onsemi 0:098463de4c5d 36
group-onsemi 0:098463de4c5d 37 LPC_GPIO_TypeDef *port_reg = (LPC_GPIO_TypeDef *) ((int)pin & ~0x1F);
group-onsemi 0:098463de4c5d 38
group-onsemi 0:098463de4c5d 39 obj->reg_set = &port_reg->FIOSET;
group-onsemi 0:098463de4c5d 40 obj->reg_mask = &port_reg->FIOMASK;
group-onsemi 0:098463de4c5d 41 obj->reg_clr = &port_reg->FIOCLR;
group-onsemi 0:098463de4c5d 42 obj->reg_in = &port_reg->FIOPIN;
group-onsemi 0:098463de4c5d 43 obj->reg_dir = &port_reg->FIODIR;
group-onsemi 0:098463de4c5d 44 }
group-onsemi 0:098463de4c5d 45
group-onsemi 0:098463de4c5d 46 void gpio_mode(gpio_t *obj, PinMode mode) {
group-onsemi 0:098463de4c5d 47 pin_mode(obj->pin, mode);
group-onsemi 0:098463de4c5d 48 }
group-onsemi 0:098463de4c5d 49
group-onsemi 0:098463de4c5d 50 void gpio_dir(gpio_t *obj, PinDirection direction) {
group-onsemi 0:098463de4c5d 51 if (obj->pin == (PinName)NC)
group-onsemi 0:098463de4c5d 52 return;
group-onsemi 0:098463de4c5d 53 switch (direction) {
group-onsemi 0:098463de4c5d 54 case PIN_INPUT : *obj->reg_dir &= ~obj->mask; break;
group-onsemi 0:098463de4c5d 55 case PIN_OUTPUT: *obj->reg_dir |= obj->mask; break;
group-onsemi 0:098463de4c5d 56 }
group-onsemi 0:098463de4c5d 57 }