altb_pmic / Mbed OS IndNav_QK3_T265

branch for tests with T265

Dependencies:   Lib_Cntrl AHRS Lib_Misc

Sources/Controller_Loops.h@0:a479dc61e931, 2019-10-02 (annotated)

Committer:
altb2
Date:
Wed Oct 02 15:31:12 2019 +0000
Revision:
0:a479dc61e931
Child:
1:d8c9f6b16279
first setup, not running!!!!

Who changed what in which revision?

UserRevisionLine numberNew contents of line
altb2 0:a479dc61e931 1 #ifndef CONTROLLER_LOOPS_H_
altb2 0:a479dc61e931 2 #define CONTROLLER_LOOPS_H_
altb2 0:a479dc61e931 3
altb2 0:a479dc61e931 4 class Controller_Loops
altb2 0:a479dc61e931 5 {
altb2 0:a479dc61e931 6 public:
altb2 0:a479dc61e931 7 void init_loops(void);
altb2 0:a479dc61e931 8 void run_loops(void);
altb2 0:a479dc61e931 9
altb2 0:a479dc61e931 10
altb2 0:a479dc61e931 11 private:
altb2 0:a479dc61e931 12 bool Rate_Controller_Running;
altb2 0:a479dc61e931 13 bool Attitude_Controller_Running;
altb2 0:a479dc61e931 14 bool Yaw_Controller_Running;
altb2 0:a479dc61e931 15 bool Vel_Controller_Running;
altb2 0:a479dc61e931 16 bool Pos_Controller_Running;
altb2 0:a479dc61e931 17 bool Althold_Controller_Running;
altb2 0:a479dc61e931 18
altb2 0:a479dc61e931 19 PID_Cntrl rate_cntrl;
altb2 0:a479dc61e931 20 PID_Cntrl vel_cntrl;
altb2 0:a479dc61e931 21 PID_Cntrl pos_cntrl;
altb2 0:a479dc61e931 22
altb2 0:a479dc61e931 23 float scale_PM1_to_vel, scale_PM1_to_rate, scale_PM1_to_angle;
altb2 0:a479dc61e931 24
altb2 0:a479dc61e931 25 Signal signal;
altb2 0:a479dc61e931 26 Thread thread;
altb2 0:a479dc61e931 27 Ticker ticker;
altb2 0:a479dc61e931 28 void sendSignal();
altb2 0:a479dc61e931 29 uint8_t downsamp_1;
altb2 0:a479dc61e931 30 uint8_t downsamp_2;
altb2 0:a479dc61e931 31 uint8_t downsamp_counter_1;
altb2 0:a479dc61e931 32 uint8_t downsamp_counter_2;
altb2 0:a479dc61e931 33 float calc_des_pos(float);
altb2 0:a479dc61e931 34 float des_z;
altb2 0:a479dc61e931 35 void reset_des_z(void);
altb2 0:a479dc61e931 36 void reset_des_z(float);
altb2 0:a479dc61e931 37 float max_delta; // max tracking error in z
altb2 0:a479dc61e931 38 float max_climb_rate;
altb2 0:a479dc61e931 39
altb2 0:a479dc61e931 40
altb2 0:a479dc61e931 41 }
altb2 0:a479dc61e931 42 #endif