Vekatech / VK_RZ_A1H_LCD_demo

Lcd companion boards support (VKLCD50RTA & VKLCD70RT)

What is this ?

This is a demo program using Renesas RGA library & USB Camera to demonstrate VK-RZ/A1H's companion boards workability.

Supported companion Boards:

VKLCD50RTA

/media/uploads/tvendov/front_view_hmi_50.png /media/uploads/tvendov/side_view_hmi_50.png

VKLCD70RT

/media/uploads/tvendov/front_view_hmi_70.png/media/uploads/tvendov/side_view_hmi_70.png /media/uploads/tvendov/front_view_lvds.png/media/uploads/tvendov/back_view_lvds.png

How to Configure ?

You can choose which display is installed by altering the lcd_panel.h file

Leave the active one & comment out the others:

#define     LCD_VDC5_CH0_PANEL                  LCD_CH0_PANEL_VKLCD50RTA
//#define     LCD_VDC5_CH0_PANEL                  LCD_CH0_PANEL_VKLCD70RT

You can alter the whole demo with your pictures if you like:

How to compile ?

  • The Demo can be compiled in 3 modes:
    • I. Execution from the internal 10-MB on-chip SRAM.
      • After import in the online compiler just leave only the VKRZA1H_RAM.sct & delete all others linker files in the TOOLCHAIN_ARM_STD folder.
      • Save the result binary in the SD Card (<SD>:\vkrza1\lcd_sample ), altering vkrza1h.ini by this way
    • II. Execution from the on-board serial FALSH in dual (32-MB) mode.
      • After import in the online compiler just leave only the VKRZA1H_DOUBLE.sct & delete all others linker files in the TOOLCHAIN_ARM_STD folder.
      • Drag & drop the result binary in MBED disk, (previously inited in double flash mode)
    • III. Execution from the on-board serial FALSH in single (16-MB) mode.
      • After import in the online compiler just leave only the VKRZA1H_SINGLE.sct & delete all others linker files in the TOOLCHAIN_ARM_STD folder.
      • Drag & drop the result binary in MBED disk, (previously inited in single flash mode )

Quick presentation:

Other demos ?

More demos you can find on our FTP

RGA/video/DisplayBace.h@0:6435b67ad23c, 2017-02-16 (annotated)

Committer:
tvendov
Date:
Thu Feb 16 10:23:48 2017 +0000
Revision:
0:6435b67ad23c
Initial lcd support (VKLCD50RTA & VKLCD70RT companion boards)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
tvendov 0:6435b67ad23c 1 /*******************************************************************************
tvendov 0:6435b67ad23c 2 * DISCLAIMER
tvendov 0:6435b67ad23c 3 * This software is supplied by Renesas Electronics Corporation and is only
tvendov 0:6435b67ad23c 4 * intended for use with Renesas products. No other uses are authorized. This
tvendov 0:6435b67ad23c 5 * software is owned by Renesas Electronics Corporation and is protected under
tvendov 0:6435b67ad23c 6 * all applicable laws, including copyright laws.
tvendov 0:6435b67ad23c 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
tvendov 0:6435b67ad23c 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
tvendov 0:6435b67ad23c 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
tvendov 0:6435b67ad23c 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
tvendov 0:6435b67ad23c 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
tvendov 0:6435b67ad23c 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
tvendov 0:6435b67ad23c 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
tvendov 0:6435b67ad23c 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
tvendov 0:6435b67ad23c 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
tvendov 0:6435b67ad23c 16 * Renesas reserves the right, without notice, to make changes to this software
tvendov 0:6435b67ad23c 17 * and to discontinue the availability of this software. By using this software,
tvendov 0:6435b67ad23c 18 * you agree to the additional terms and conditions found by accessing the
tvendov 0:6435b67ad23c 19 * following link:
tvendov 0:6435b67ad23c 20 * http://www.renesas.com/disclaimer
tvendov 0:6435b67ad23c 21 * Copyright (C) 2012 - 2015 Renesas Electronics Corporation. All rights reserved.
tvendov 0:6435b67ad23c 22 *******************************************************************************/
tvendov 0:6435b67ad23c 23 /**************************************************************************//**
tvendov 0:6435b67ad23c 24 * @file DisplayBase.h
tvendov 0:6435b67ad23c 25 * @brief Display driver wrapper class for RGA
tvendov 0:6435b67ad23c 26 ******************************************************************************/
tvendov 0:6435b67ad23c 27
tvendov 0:6435b67ad23c 28 #ifndef MBED_DISPLAYBASE_H
tvendov 0:6435b67ad23c 29 #define MBED_DISPLAYBASE_H
tvendov 0:6435b67ad23c 30
tvendov 0:6435b67ad23c 31 #include "pinmap.h"
tvendov 0:6435b67ad23c 32
tvendov 0:6435b67ad23c 33 /*! @class DisplayBase
tvendov 0:6435b67ad23c 34 * @brief Display driver wrapper class for RGA
tvendov 0:6435b67ad23c 35 */
tvendov 0:6435b67ad23c 36 class DisplayBase
tvendov 0:6435b67ad23c 37 {
tvendov 0:6435b67ad23c 38
tvendov 0:6435b67ad23c 39 public:
tvendov 0:6435b67ad23c 40 /*! @enum video_input_channel_t
tvendov 0:6435b67ad23c 41 @brief Video input channel select
tvendov 0:6435b67ad23c 42 */
tvendov 0:6435b67ad23c 43 typedef enum {
tvendov 0:6435b67ad23c 44 VIDEO_INPUT_CHANNEL_0 = 0, /*!< Video input channel 0 */
tvendov 0:6435b67ad23c 45 VIDEO_INPUT_CHANNEL_1 /*!< Video input channel 1 */
tvendov 0:6435b67ad23c 46 } video_input_channel_t;
tvendov 0:6435b67ad23c 47
tvendov 0:6435b67ad23c 48 /*! @enum video_adc_vinsel_t
tvendov 0:6435b67ad23c 49 @brief Input pin control
tvendov 0:6435b67ad23c 50 */
tvendov 0:6435b67ad23c 51 typedef enum {
tvendov 0:6435b67ad23c 52 VIDEO_ADC_VINSEL_VIN1 = 0, /*!< VIN1 input */
tvendov 0:6435b67ad23c 53 VIDEO_ADC_VINSEL_VIN2 /*!< VIN2 input */
tvendov 0:6435b67ad23c 54 } video_adc_vinsel_t;
tvendov 0:6435b67ad23c 55
tvendov 0:6435b67ad23c 56 /*! @enum graphics_layer_t
tvendov 0:6435b67ad23c 57 @brief Graphics layer select
tvendov 0:6435b67ad23c 58 */
tvendov 0:6435b67ad23c 59 typedef enum {
tvendov 0:6435b67ad23c 60 GRAPHICS_LAYER_0 = 0, /*!< Graphics layer 0 */
tvendov 0:6435b67ad23c 61 GRAPHICS_LAYER_1, /*!< Graphics layer 1 */
tvendov 0:6435b67ad23c 62 GRAPHICS_LAYER_2, /*!< Graphics layer 2 */
tvendov 0:6435b67ad23c 63 GRAPHICS_LAYER_3 /*!< Graphics layer 3 */
tvendov 0:6435b67ad23c 64 } graphics_layer_t;
tvendov 0:6435b67ad23c 65
tvendov 0:6435b67ad23c 66 /*! @enum graphics_error_t
tvendov 0:6435b67ad23c 67 @brief Error codes
tvendov 0:6435b67ad23c 68 */
tvendov 0:6435b67ad23c 69 typedef enum {
tvendov 0:6435b67ad23c 70 GRAPHICS_OK = 0, /*!< Normal termination */
tvendov 0:6435b67ad23c 71 GRAPHICS_VDC5_ERR = -1, /*!< VDC5 driver error */
tvendov 0:6435b67ad23c 72 GRAPHICS_FORMA_ERR = -2, /*!< Not support format */
tvendov 0:6435b67ad23c 73 GRAPHICS_LAYER_ERR = -3, /*!< Invalid layer ID error */
tvendov 0:6435b67ad23c 74 GRAPHICS_CHANNLE_ERR = -4, /*!< Invalid channel error */
tvendov 0:6435b67ad23c 75 GRAPHICS_VIDEO_NTSC_SIZE_ERR = -5, /*!< Video write size(vw) error */
tvendov 0:6435b67ad23c 76 GRAPHICS_VIDEO_PAL_SIZE_ERR = -6, /*!< Video Write size(vw) error */
tvendov 0:6435b67ad23c 77 GRAPHICS_PARAM_RANGE_ERR = -7 /*!< Parameter range error */
tvendov 0:6435b67ad23c 78 } graphics_error_t;
tvendov 0:6435b67ad23c 79
tvendov 0:6435b67ad23c 80 /*! @enum graphics_format_t
tvendov 0:6435b67ad23c 81 @brief Graphics layer read format selects
tvendov 0:6435b67ad23c 82 */
tvendov 0:6435b67ad23c 83 typedef enum {
tvendov 0:6435b67ad23c 84 GRAPHICS_FORMAT_YCBCR422 = 0, /*!< YCbCr422 (2byte / px) */
tvendov 0:6435b67ad23c 85 GRAPHICS_FORMAT_RGB565, /*!< RGB565 (2byte / px) */
tvendov 0:6435b67ad23c 86 GRAPHICS_FORMAT_RGB888, /*!< RGB888 (4byte / px) */
tvendov 0:6435b67ad23c 87 GRAPHICS_FORMAT_ARGB8888, /*!< ARGB8888 (4byte / px) */
tvendov 0:6435b67ad23c 88 GRAPHICS_FORMAT_ARGB4444 /*!< ARGB4444 (2byte / px) */
tvendov 0:6435b67ad23c 89 } graphics_format_t;
tvendov 0:6435b67ad23c 90
tvendov 0:6435b67ad23c 91 /*! @enum video_format_t
tvendov 0:6435b67ad23c 92 @brief Video writing format selects
tvendov 0:6435b67ad23c 93 */
tvendov 0:6435b67ad23c 94 typedef enum {
tvendov 0:6435b67ad23c 95 VIDEO_FORMAT_YCBCR422 = 0, /*!< YCbCr422 (2byte / px) */
tvendov 0:6435b67ad23c 96 VIDEO_FORMAT_RGB565, /*!< RGB565 (2byte / px) */
tvendov 0:6435b67ad23c 97 VIDEO_FORMAT_RGB888 /*!< RGB888 (4byte / px) */
tvendov 0:6435b67ad23c 98 } video_format_t;
tvendov 0:6435b67ad23c 99
tvendov 0:6435b67ad23c 100 /*! @enum wr_rd_swa_t
tvendov 0:6435b67ad23c 101 @brief Frame buffer swap setting
tvendov 0:6435b67ad23c 102 */
tvendov 0:6435b67ad23c 103 typedef enum {
tvendov 0:6435b67ad23c 104 WR_RD_WRSWA_NON = 0, /*!< Not swapped: 1-2-3-4-5-6-7-8 */
tvendov 0:6435b67ad23c 105 WR_RD_WRSWA_8BIT, /*!< Swapped in 8-bit units: 2-1-4-3-6-5-8-7 */
tvendov 0:6435b67ad23c 106 WR_RD_WRSWA_16BIT, /*!< Swapped in 16-bit units: 3-4-1-2-7-8-5-6 */
tvendov 0:6435b67ad23c 107 WR_RD_WRSWA_16_8BIT, /*!< Swapped in 16-bit units + 8-bit units: 4-3-2-1-8-7-6-5 */
tvendov 0:6435b67ad23c 108 WR_RD_WRSWA_32BIT, /*!< Swapped in 32-bit units: 5-6-7-8-1-2-3-4 */
tvendov 0:6435b67ad23c 109 WR_RD_WRSWA_32_8BIT, /*!< Swapped in 32-bit units + 8-bit units: 6-5-8-7-2-1-4-3 */
tvendov 0:6435b67ad23c 110 WR_RD_WRSWA_32_16BIT, /*!< Swapped in 32-bit units + 16-bit units: 7-8-5-6-3-4-1-2 */
tvendov 0:6435b67ad23c 111 WR_RD_WRSWA_32_16_8BIT, /*!< Swapped in 32-bit units + 16-bit units + 8-bit units: 8-7-6-5-4-3-2-1 */
tvendov 0:6435b67ad23c 112 } wr_rd_swa_t;
tvendov 0:6435b67ad23c 113
tvendov 0:6435b67ad23c 114 /*! @enum lcd_tcon_pin_t
tvendov 0:6435b67ad23c 115 @brief LCD tcon output pin selects
tvendov 0:6435b67ad23c 116 */
tvendov 0:6435b67ad23c 117 typedef enum {
tvendov 0:6435b67ad23c 118 LCD_TCON_PIN_NON = -1, /*!< Not using output */
tvendov 0:6435b67ad23c 119 LCD_TCON_PIN_0, /*!< LCD_TCON0 */
tvendov 0:6435b67ad23c 120 LCD_TCON_PIN_1, /*!< LCD_TCON1 */
tvendov 0:6435b67ad23c 121 LCD_TCON_PIN_2, /*!< LCD_TCON2 */
tvendov 0:6435b67ad23c 122 LCD_TCON_PIN_3, /*!< LCD_TCON3 */
tvendov 0:6435b67ad23c 123 LCD_TCON_PIN_4, /*!< LCD_TCON4 */
tvendov 0:6435b67ad23c 124 } lcd_tcon_pin_t;
tvendov 0:6435b67ad23c 125
tvendov 0:6435b67ad23c 126 /*! @enum lcd_outformat_t
tvendov 0:6435b67ad23c 127 @brief LCD output format selects
tvendov 0:6435b67ad23c 128 */
tvendov 0:6435b67ad23c 129 typedef enum {
tvendov 0:6435b67ad23c 130 LCD_OUTFORMAT_RGB888 = 0, /*!< RGB888 or LVDS */
tvendov 0:6435b67ad23c 131 LCD_OUTFORMAT_RGB666, /*!< RGB666 */
tvendov 0:6435b67ad23c 132 LCD_OUTFORMAT_RGB565 /*!< RGB565 */
tvendov 0:6435b67ad23c 133 } lcd_outformat_t;
tvendov 0:6435b67ad23c 134
tvendov 0:6435b67ad23c 135 /*! @enum edge_t
tvendov 0:6435b67ad23c 136 @brief Edge of a signal
tvendov 0:6435b67ad23c 137 */
tvendov 0:6435b67ad23c 138 typedef enum {
tvendov 0:6435b67ad23c 139 EDGE_RISING = 0, /*!< Rising edge */
tvendov 0:6435b67ad23c 140 EDGE_FALLING = 1 /*!< Falling edge */
tvendov 0:6435b67ad23c 141 } edge_t;
tvendov 0:6435b67ad23c 142
tvendov 0:6435b67ad23c 143 /*! @enum lcd_type_t
tvendov 0:6435b67ad23c 144 @brief LCD type
tvendov 0:6435b67ad23c 145 */
tvendov 0:6435b67ad23c 146 typedef enum {
tvendov 0:6435b67ad23c 147 LCD_TYPE_LVDS = 0, /*!< LVDS control */
tvendov 0:6435b67ad23c 148 LCD_TYPE_PARALLEL_RGB /*!< RGB parallel signal control */
tvendov 0:6435b67ad23c 149 } lcd_type_t;
tvendov 0:6435b67ad23c 150
tvendov 0:6435b67ad23c 151 /*! @enum sig_pol_t
tvendov 0:6435b67ad23c 152 @brief Polarity of a signal
tvendov 0:6435b67ad23c 153 */
tvendov 0:6435b67ad23c 154 typedef enum {
tvendov 0:6435b67ad23c 155 SIG_POL_NOT_INVERTED = 0, /*!< Not inverted */
tvendov 0:6435b67ad23c 156 SIG_POL_INVERTED /*!< Inverted */
tvendov 0:6435b67ad23c 157 } sig_pol_t;
tvendov 0:6435b67ad23c 158
tvendov 0:6435b67ad23c 159 /*! @enum int_type_t
tvendov 0:6435b67ad23c 160 @brief Interrupt type
tvendov 0:6435b67ad23c 161 */
tvendov 0:6435b67ad23c 162 typedef enum {
tvendov 0:6435b67ad23c 163 INT_TYPE_S0_VI_VSYNC = 0, /*!< Vsync signal input to scaler 0 */
tvendov 0:6435b67ad23c 164 INT_TYPE_S0_LO_VSYNC, /*!< Vsync signal output from scaler 0 */
tvendov 0:6435b67ad23c 165 INT_TYPE_S0_VSYNCERR, /*!< Missing Vsync signal for scaler 0 */
tvendov 0:6435b67ad23c 166 INT_TYPE_VLINE, /*!< Specified line signal for panel output in graphics 3 */
tvendov 0:6435b67ad23c 167 INT_TYPE_S0_VFIELD, /*!< Field end signal for recording function in scaler 0 */
tvendov 0:6435b67ad23c 168 INT_TYPE_IV1_VBUFERR, /*!< Frame buffer write overflow signal for scaler 0 */
tvendov 0:6435b67ad23c 169 INT_TYPE_IV3_VBUFERR, /*!< Frame buffer read underflow signal for graphics 0 */
tvendov 0:6435b67ad23c 170 INT_TYPE_IV5_VBUFERR, /*!< Frame buffer read underflow signal for graphics 2 */
tvendov 0:6435b67ad23c 171 INT_TYPE_IV6_VBUFERR, /*!< Frame buffer read underflow signal for graphics 3 */
tvendov 0:6435b67ad23c 172 INT_TYPE_S0_WLINE, /*!< Write specification line signal input to scaling-down control block in scaler 0 */
tvendov 0:6435b67ad23c 173 INT_TYPE_S1_VI_VSYNC, /*!< Vsync signal input to scaler 1 */
tvendov 0:6435b67ad23c 174 INT_TYPE_S1_LO_VSYNC, /*!< Vsync signal output from scaler 1 */
tvendov 0:6435b67ad23c 175 INT_TYPE_S1_VSYNCERR, /*!< Missing Vsync signal for scaler 1 */
tvendov 0:6435b67ad23c 176 INT_TYPE_S1_VFIELD, /*!< Field end signal for recording function in scaler 1 */
tvendov 0:6435b67ad23c 177 INT_TYPE_IV2_VBUFERR, /*!< Frame buffer write overflow signal for scaler 1 */
tvendov 0:6435b67ad23c 178 INT_TYPE_IV4_VBUFERR, /*!< Frame buffer read underflow signal for graphics 1 */
tvendov 0:6435b67ad23c 179 INT_TYPE_S1_WLINE, /*!< Write specification line signal input to scaling-down control block in scaler 1 */
tvendov 0:6435b67ad23c 180 INT_TYPE_OIR_VI_VSYNC, /*!< Vsync signal input to output image generator */
tvendov 0:6435b67ad23c 181 INT_TYPE_OIR_LO_VSYNC, /*!< Vsync signal output from output image generator */
tvendov 0:6435b67ad23c 182 INT_TYPE_OIR_VLINE, /*!< Specified line signal for panel output in output image generator */
tvendov 0:6435b67ad23c 183 INT_TYPE_OIR_VFIELD, /*!< Field end signal for recording function in output image generator */
tvendov 0:6435b67ad23c 184 INT_TYPE_IV7_VBUFERR, /*!< Frame buffer write overflow signal for output image generator */
tvendov 0:6435b67ad23c 185 INT_TYPE_IV8_VBUFERR, /*!< Frame buffer read underflow signal for graphics (OIR) */
tvendov 0:6435b67ad23c 186 INT_TYPE_NUM /*!< The number of VDC5 interrupt types */
tvendov 0:6435b67ad23c 187 } int_type_t;
tvendov 0:6435b67ad23c 188
tvendov 0:6435b67ad23c 189 /*! @enum graphics_video_col_sys_t
tvendov 0:6435b67ad23c 190 @brief Video color system
tvendov 0:6435b67ad23c 191 */
tvendov 0:6435b67ad23c 192 typedef enum {
tvendov 0:6435b67ad23c 193 COL_SYS_NTSC_358 = 0, /*!< NTSC-3.58 */
tvendov 0:6435b67ad23c 194 COL_SYS_NTSC_443 = 1, /*!< NTSC-4.43 */
tvendov 0:6435b67ad23c 195 COL_SYS_PAL_443 = 2, /*!< PAL-4.43 */
tvendov 0:6435b67ad23c 196 COL_SYS_PAL_M = 3, /*!< PAL-M */
tvendov 0:6435b67ad23c 197 COL_SYS_PAL_N = 4, /*!< PAL-N */
tvendov 0:6435b67ad23c 198 COL_SYS_SECAM = 5, /*!< SECAM */
tvendov 0:6435b67ad23c 199 COL_SYS_NTSC_443_60 = 6, /*!< NTSC-4.43 (60Hz) */
tvendov 0:6435b67ad23c 200 COL_SYS_PAL_60 = 7, /*!< PAL-60 */
tvendov 0:6435b67ad23c 201 } graphics_video_col_sys_t;
tvendov 0:6435b67ad23c 202
tvendov 0:6435b67ad23c 203 /*! @enum video_input_sel_t
tvendov 0:6435b67ad23c 204 @brief External Input select
tvendov 0:6435b67ad23c 205 */
tvendov 0:6435b67ad23c 206 typedef enum {
tvendov 0:6435b67ad23c 207 INPUT_SEL_VDEC = 0, /*!< Video decoder output signals */
tvendov 0:6435b67ad23c 208 INPUT_SEL_EXT = 1 /*!< Signals supplied via the external input pins */
tvendov 0:6435b67ad23c 209 } video_input_sel_t;
tvendov 0:6435b67ad23c 210
tvendov 0:6435b67ad23c 211 /*! @enum video_extin_format_t
tvendov 0:6435b67ad23c 212 @brief External input format select
tvendov 0:6435b67ad23c 213 */
tvendov 0:6435b67ad23c 214 typedef enum {
tvendov 0:6435b67ad23c 215 VIDEO_EXTIN_FORMAT_RGB888 = 0, /*!< RGB888 Not support */
tvendov 0:6435b67ad23c 216 VIDEO_EXTIN_FORMAT_RGB666, /*!< RGB666 */
tvendov 0:6435b67ad23c 217 VIDEO_EXTIN_FORMAT_RGB565, /*!< RGB565 */
tvendov 0:6435b67ad23c 218 VIDEO_EXTIN_FORMAT_BT656, /*!< BT6556 */
tvendov 0:6435b67ad23c 219 VIDEO_EXTIN_FORMAT_BT601, /*!< BT6501 */
tvendov 0:6435b67ad23c 220 VIDEO_EXTIN_FORMAT_YCBCR422, /*!< YCbCr422 */
tvendov 0:6435b67ad23c 221 VIDEO_EXTIN_FORMAT_YCBCR444, /*!< YCbCr444 Not support */
tvendov 0:6435b67ad23c 222 } video_extin_format_t;
tvendov 0:6435b67ad23c 223
tvendov 0:6435b67ad23c 224 /*! @enum onoff_t
tvendov 0:6435b67ad23c 225 @brief On/off
tvendov 0:6435b67ad23c 226 */
tvendov 0:6435b67ad23c 227 typedef enum {
tvendov 0:6435b67ad23c 228 OFF = 0, /*!< Off */
tvendov 0:6435b67ad23c 229 ON = 1 /*!< On */
tvendov 0:6435b67ad23c 230 } onoff_t;
tvendov 0:6435b67ad23c 231
tvendov 0:6435b67ad23c 232 /*! @enum extin_input_line_t
tvendov 0:6435b67ad23c 233 @brief Number of lines for BT.656 external input
tvendov 0:6435b67ad23c 234 */
tvendov 0:6435b67ad23c 235 typedef enum {
tvendov 0:6435b67ad23c 236 EXTIN_LINE_525 = 0, /*!< 525 lines */
tvendov 0:6435b67ad23c 237 EXTIN_LINE_625 = 1 /*!< 625 lines */
tvendov 0:6435b67ad23c 238 } extin_input_line_t;
tvendov 0:6435b67ad23c 239
tvendov 0:6435b67ad23c 240 /*! @enum extin_h_pos_t
tvendov 0:6435b67ad23c 241 @brief Y/Cb/Y/Cr data string start timing
tvendov 0:6435b67ad23c 242 */
tvendov 0:6435b67ad23c 243 typedef enum {
tvendov 0:6435b67ad23c 244 EXTIN_H_POS_CBYCRY = 0, /*!< Cb/Y/Cr/Y (BT656/601), Cb/Cr (YCbCr422) */
tvendov 0:6435b67ad23c 245 EXTIN_H_POS_YCRYCB, /*!< Y/Cr/Y/Cb (BT656/601), setting prohibited (YCbCr422) */
tvendov 0:6435b67ad23c 246 EXTIN_H_POS_CRYCBY, /*!< Cr/Y/Cb/Y (BT656/601), setting prohibited (YCbCr422) */
tvendov 0:6435b67ad23c 247 EXTIN_H_POS_YCBYCR, /*!< Y/Cb/Y/Cr (BT656/601), Cr/Cb (YCbCr422) */
tvendov 0:6435b67ad23c 248 EXTIN_H_POS_NUM
tvendov 0:6435b67ad23c 249 } extin_h_pos_t;
tvendov 0:6435b67ad23c 250
tvendov 0:6435b67ad23c 251 typedef enum
tvendov 0:6435b67ad23c 252 {
tvendov 0:6435b67ad23c 253 SLIDE_OUT_RIGHT = 0, /*!< --> */
tvendov 0:6435b67ad23c 254 SLIDE_IN_RIGHT, /*!< <-- */
tvendov 0:6435b67ad23c 255 SLIDE_OUT_BOTTOM, /*!< \/ */
tvendov 0:6435b67ad23c 256 SLIDE_IN_BOTTOM, /*!< /\ */
tvendov 0:6435b67ad23c 257 SLIDE_OUT_LEFT, /*!< <-- */
tvendov 0:6435b67ad23c 258 SLIDE_IN_LEFT, /*!< --> */
tvendov 0:6435b67ad23c 259 SLIDE_OUT_TOP, /*!< \/ */
tvendov 0:6435b67ad23c 260 SLIDE_IN_TOP, /*!< /\ */
tvendov 0:6435b67ad23c 261 SLIDE_NONE, /*!< . */
tvendov 0:6435b67ad23c 262 } slide_t;
tvendov 0:6435b67ad23c 263
tvendov 0:6435b67ad23c 264 /*! @struct rect_t
tvendov 0:6435b67ad23c 265 @brief The relative position within the graphics display area
tvendov 0:6435b67ad23c 266 */
tvendov 0:6435b67ad23c 267 typedef struct {
tvendov 0:6435b67ad23c 268 unsigned short vs; /*!< Vertical start pos */
tvendov 0:6435b67ad23c 269 unsigned short vw; /*!< Vertical width (height) */
tvendov 0:6435b67ad23c 270 unsigned short hs; /*!< Horizontal start pos */
tvendov 0:6435b67ad23c 271 unsigned short hw; /*!< Horizontal width */
tvendov 0:6435b67ad23c 272 } rect_t;
tvendov 0:6435b67ad23c 273
tvendov 0:6435b67ad23c 274 /*! @struct lcd_config_t
tvendov 0:6435b67ad23c 275 @brief LCD configuration
tvendov 0:6435b67ad23c 276 */
tvendov 0:6435b67ad23c 277 typedef struct {
tvendov 0:6435b67ad23c 278 lcd_type_t lcd_type; /*!< LVDS or Pararel RGB */
tvendov 0:6435b67ad23c 279 double intputClock; /*!< P1 clk [MHz] ex. 66.67f */
tvendov 0:6435b67ad23c 280 double outputClock; /*!< LCD clk [MHz] ex. 33.33f */
tvendov 0:6435b67ad23c 281
tvendov 0:6435b67ad23c 282 lcd_outformat_t lcd_outformat; /*!< Output format select */
tvendov 0:6435b67ad23c 283 edge_t lcd_edge; /*!< Output phase control of LCD_DATA23 to LCD_DATA0 pin */
tvendov 0:6435b67ad23c 284
tvendov 0:6435b67ad23c 285 unsigned short h_toatal_period; /*!< Free-running Hsync period */
tvendov 0:6435b67ad23c 286 unsigned short v_toatal_period; /*!< Free-running Vsync period */
tvendov 0:6435b67ad23c 287 unsigned short h_disp_widht; /*!< LCD display area size, horizontal width */
tvendov 0:6435b67ad23c 288 unsigned short v_disp_widht; /*!< LCD display area size, vertical width */
tvendov 0:6435b67ad23c 289 unsigned short h_back_porch; /*!< LCD display horizontal back porch period */
tvendov 0:6435b67ad23c 290 unsigned short v_back_porch; /*!< LCD display vertical back porch period */
tvendov 0:6435b67ad23c 291
tvendov 0:6435b67ad23c 292 lcd_tcon_pin_t h_sync_port; /*!< TCONn or Not use(-1) */
tvendov 0:6435b67ad23c 293 sig_pol_t h_sync_port_polarity; /*!< Polarity inversion control of signal */
tvendov 0:6435b67ad23c 294 unsigned short h_sync_width; /*!< Hsync width */
tvendov 0:6435b67ad23c 295
tvendov 0:6435b67ad23c 296 lcd_tcon_pin_t v_sync_port; /*!< TCONn or Not use(-1) */
tvendov 0:6435b67ad23c 297 sig_pol_t v_sync_port_polarity; /*!< Polarity inversion control of signal */
tvendov 0:6435b67ad23c 298 unsigned short v_sync_width; /*!< Vsync width */
tvendov 0:6435b67ad23c 299
tvendov 0:6435b67ad23c 300 lcd_tcon_pin_t de_port; /*!< TCONn or Not use(-1) */
tvendov 0:6435b67ad23c 301 sig_pol_t de_port_polarity; /*!< Polarity inversion control of signal */
tvendov 0:6435b67ad23c 302 } lcd_config_t;
tvendov 0:6435b67ad23c 303
tvendov 0:6435b67ad23c 304 /*! @struct video_ext_in_config_t
tvendov 0:6435b67ad23c 305 @brief Digital Video Input configuration
tvendov 0:6435b67ad23c 306 */
tvendov 0:6435b67ad23c 307 typedef struct {
tvendov 0:6435b67ad23c 308 video_extin_format_t inp_format; /*!< External Input Format Select */
tvendov 0:6435b67ad23c 309 edge_t inp_pxd_edge; /*!< Clock Edge Select for Capturing External Input Video Image */
tvendov 0:6435b67ad23c 310 edge_t inp_vs_edge; /*!< Clock Edge Select for Capturing External Input Vsync Signal */
tvendov 0:6435b67ad23c 311 edge_t inp_hs_edge; /*!< Clock Edge Select for Capturing External Input Hsync Signal */
tvendov 0:6435b67ad23c 312 onoff_t inp_endian_on; /*!< External Input B/R Signal Swap On/Off Control */
tvendov 0:6435b67ad23c 313 onoff_t inp_swap_on; /*!< External Input Bit Endian Change On/Off Control */
tvendov 0:6435b67ad23c 314 sig_pol_t inp_vs_inv; /*!< External Input Vsync Signal DV_VSYNC Inversion Control */
tvendov 0:6435b67ad23c 315 sig_pol_t inp_hs_inv; /*!< External Input Hsync Signal DV_HSYNC Inversion Control */
tvendov 0:6435b67ad23c 316 extin_input_line_t inp_f525_625; /*!< Number of lines for BT.656 external input */
tvendov 0:6435b67ad23c 317 extin_h_pos_t inp_h_pos; /*!< Y/Cb/Y/Cr data string start timing to Hsync reference */
tvendov 0:6435b67ad23c 318 unsigned short cap_vs_pos; /*!< Capture start position from Vsync */
tvendov 0:6435b67ad23c 319 unsigned short cap_hs_pos; /*!< Capture start position form Hsync */
tvendov 0:6435b67ad23c 320 unsigned short cap_width; /*!< Capture width */
tvendov 0:6435b67ad23c 321 unsigned short cap_height; /*!< Capture height should be a multiple of 4.*/
tvendov 0:6435b67ad23c 322 } video_ext_in_config_t;
tvendov 0:6435b67ad23c 323
tvendov 0:6435b67ad23c 324 /** Constructor method of display base object
tvendov 0:6435b67ad23c 325 */
tvendov 0:6435b67ad23c 326 DisplayBase( void );
tvendov 0:6435b67ad23c 327
tvendov 0:6435b67ad23c 328 /** Graphics initialization processing<br>
tvendov 0:6435b67ad23c 329 * If not using display, set NULL in parameter.
tvendov 0:6435b67ad23c 330 * @param[in] lcd_config : LCD configuration
tvendov 0:6435b67ad23c 331 * @retval Error code
tvendov 0:6435b67ad23c 332 */
tvendov 0:6435b67ad23c 333 graphics_error_t Graphics_init( lcd_config_t * lcd_config );
tvendov 0:6435b67ad23c 334
tvendov 0:6435b67ad23c 335 /** Graphics Video initialization processing<br>
tvendov 0:6435b67ad23c 336 * If setting INPUT_SEL_VDEC in video_input_sel parameter, set NULL in video_ext_in_config parameter.
tvendov 0:6435b67ad23c 337 * @param[in] video_input_sel : Input select
tvendov 0:6435b67ad23c 338 * @param[in] video_ext_in_config : Video configuration
tvendov 0:6435b67ad23c 339 * @retval error code
tvendov 0:6435b67ad23c 340 */
tvendov 0:6435b67ad23c 341 graphics_error_t Graphics_Video_init( video_input_sel_t video_input_sel, video_ext_in_config_t * video_ext_in_config );
tvendov 0:6435b67ad23c 342
tvendov 0:6435b67ad23c 343 /** LCD output port initialization processing
tvendov 0:6435b67ad23c 344 * @param[in] pin : Pin assign for LCD output
tvendov 0:6435b67ad23c 345 * @param[in] pin_count : Total number of pin assign
tvendov 0:6435b67ad23c 346 * @retval Error code
tvendov 0:6435b67ad23c 347 */
tvendov 0:6435b67ad23c 348 graphics_error_t Graphics_Lcd_Port_Init( PinName *pin, unsigned int pin_count );
tvendov 0:6435b67ad23c 349
tvendov 0:6435b67ad23c 350 /** LVDS output port initialization processing
tvendov 0:6435b67ad23c 351 * @param[in] pin : Pin assign for LVDS output
tvendov 0:6435b67ad23c 352 * @param[in] pin_count : Total number of pin assign
tvendov 0:6435b67ad23c 353 * @retval Error code
tvendov 0:6435b67ad23c 354 */
tvendov 0:6435b67ad23c 355 graphics_error_t Graphics_Lvds_Port_Init( PinName *pin, unsigned int pin_count );
tvendov 0:6435b67ad23c 356
tvendov 0:6435b67ad23c 357 /** Digital video input port initialization processing
tvendov 0:6435b67ad23c 358 * @param[in] pin : Pin assign for digital video input port
tvendov 0:6435b67ad23c 359 * @param[in] pin_count : Total number of pin assign
tvendov 0:6435b67ad23c 360 * @retval Error code
tvendov 0:6435b67ad23c 361 */
tvendov 0:6435b67ad23c 362 graphics_error_t Graphics_Dvinput_Port_Init( PinName *pin, unsigned int pin_count );
tvendov 0:6435b67ad23c 363
tvendov 0:6435b67ad23c 364 /** Interrupt callback setup
tvendov 0:6435b67ad23c 365 * This function performs the following processing:
tvendov 0:6435b67ad23c 366 * - Enables the interrupt when the pointer to the corresponding interrupt callback function is specified.<br>
tvendov 0:6435b67ad23c 367 * - Registers the specified interrupt callback function.<br>
tvendov 0:6435b67ad23c 368 * - Disables the interrupt when the pointer to the corresponding interrupt callback function is not specified.<br>
tvendov 0:6435b67ad23c 369 * @param[in] Graphics_Irq_Handler_Set : VDC5 interrupt type
tvendov 0:6435b67ad23c 370 * @param[in] num : Interrupt line number
tvendov 0:6435b67ad23c 371 * @param[in] callback : Interrupt callback function pointer
tvendov 0:6435b67ad23c 372 * @retval Error code
tvendov 0:6435b67ad23c 373 */
tvendov 0:6435b67ad23c 374 graphics_error_t Graphics_Irq_Handler_Set( int_type_t Graphics_Irq_Handler_Set, unsigned short num, void (* callback)(int_type_t) );
tvendov 0:6435b67ad23c 375
tvendov 0:6435b67ad23c 376 /** Start the graphics surface read process
tvendov 0:6435b67ad23c 377 * @param[in] layer_id : Graphics layer ID <br />
tvendov 0:6435b67ad23c 378 * - GRAPHICS_LAYER_0 : Layer 0
tvendov 0:6435b67ad23c 379 * - GRAPHICS_LAYER_1 : Layer 1
tvendov 0:6435b67ad23c 380 * - GRAPHICS_LAYER_2 : Layer 2
tvendov 0:6435b67ad23c 381 * - GRAPHICS_LAYER_3 : Layer 3
tvendov 0:6435b67ad23c 382 * @retval Error code
tvendov 0:6435b67ad23c 383 */
tvendov 0:6435b67ad23c 384 graphics_error_t Graphics_Start( graphics_layer_t layer_id );
tvendov 0:6435b67ad23c 385
tvendov 0:6435b67ad23c 386 /** Stop the graphics surface read process
tvendov 0:6435b67ad23c 387 * @param[in] layer_id : Graphics layer ID <br />
tvendov 0:6435b67ad23c 388 * - GRAPHICS_LAYER_0 : Layer 0
tvendov 0:6435b67ad23c 389 * - GRAPHICS_LAYER_1 : Layer 1
tvendov 0:6435b67ad23c 390 * - GRAPHICS_LAYER_2 : Layer 2
tvendov 0:6435b67ad23c 391 * - GRAPHICS_LAYER_3 : Layer 3
tvendov 0:6435b67ad23c 392 * @retval Error code
tvendov 0:6435b67ad23c 393 */
tvendov 0:6435b67ad23c 394 graphics_error_t Graphics_Stop( graphics_layer_t layer_id );
tvendov 0:6435b67ad23c 395
tvendov 0:6435b67ad23c 396 /** Start the video surface write process
tvendov 0:6435b67ad23c 397 * @param[in] video_input_channel : Video input channel <br />
tvendov 0:6435b67ad23c 398 * - VIDEO_INPUT_CHANNEL_0 : Video channel 0
tvendov 0:6435b67ad23c 399 * - VIDEO_INPUT_CHANNEL_1 : Video channel 1
tvendov 0:6435b67ad23c 400 * @retval Error code
tvendov 0:6435b67ad23c 401 */
tvendov 0:6435b67ad23c 402 graphics_error_t Video_Start ( video_input_channel_t video_input_channel );
tvendov 0:6435b67ad23c 403
tvendov 0:6435b67ad23c 404 /** Stop the video surface write process
tvendov 0:6435b67ad23c 405 * @param[in] video_input_channel : Video input channel <br />
tvendov 0:6435b67ad23c 406 * - VIDEO_INPUT_CHANNEL_0 : Video channel 0
tvendov 0:6435b67ad23c 407 * - VIDEO_INPUT_CHANNEL_1 : Video channel 1
tvendov 0:6435b67ad23c 408 * @retval Error code
tvendov 0:6435b67ad23c 409 */
tvendov 0:6435b67ad23c 410 graphics_error_t Video_Stop ( video_input_channel_t video_input_channel );
tvendov 0:6435b67ad23c 411
tvendov 0:6435b67ad23c 412 /** Graphics surface read process setting
tvendov 0:6435b67ad23c 413 * @param[in] layer_id : Graphics layer ID <br />
tvendov 0:6435b67ad23c 414 * - GRAPHICS_LAYER_0 : Layer 0
tvendov 0:6435b67ad23c 415 * - GRAPHICS_LAYER_1 : Layer 1
tvendov 0:6435b67ad23c 416 * - GRAPHICS_LAYER_2 : Layer 2
tvendov 0:6435b67ad23c 417 * - GRAPHICS_LAYER_3 : Layer 3
tvendov 0:6435b67ad23c 418 * @param[in] framebuff : Base address of the frame buffer(Not set NULL)
tvendov 0:6435b67ad23c 419 * @param[in] fb_stride : Line offset address of the frame buffer[byte] <br />
tvendov 0:6435b67ad23c 420 * Frame buffer stride should be set to a multiple of 32 or 128
tvendov 0:6435b67ad23c 421 * in accordance with the frame buffer burst transfer mode.
tvendov 0:6435b67ad23c 422 * @param[in] gr_format : Format of the frame buffer read signal <br />
tvendov 0:6435b67ad23c 423 * - VIDEO_FORMAT_YCBCR422 : YCBCR422 (2byte/px)
tvendov 0:6435b67ad23c 424 * - VIDEO_FORMAT_RGB565 : RGB565 (2byte/px)
tvendov 0:6435b67ad23c 425 * - VIDEO_FORMAT_RGB888 : RGB888 (4byte/px)
tvendov 0:6435b67ad23c 426 * - VIDEO_FORMAT_ARGB8888 : ARGB8888 (4byte/px)
tvendov 0:6435b67ad23c 427 * @param[in] wr_rd_swa : frame buffer swap setting <br />
tvendov 0:6435b67ad23c 428 * - WR_RD_WRSWA_NON : Not swapped: 1-2-3-4-5-6-7-8
tvendov 0:6435b67ad23c 429 * - WR_RD_WRSWA_8BIT : Swapped in 8-bit units: 2-1-4-3-6-5-8-7
tvendov 0:6435b67ad23c 430 * - WR_RD_WRSWA_16BIT : Swapped in 16-bit units: 3-4-1-2-7-8-5-6
tvendov 0:6435b67ad23c 431 * - WR_RD_WRSWA_16_8BIT : Swapped in 16-bit units + 8-bit units: 4-3-2-1-8-7-6-5
tvendov 0:6435b67ad23c 432 * - WR_RD_WRSWA_32BIT : Swapped in 32-bit units: 5-6-7-8-1-2-3-4
tvendov 0:6435b67ad23c 433 * - WR_RD_WRSWA_32_8BIT : Swapped in 32-bit units + 8-bit units: 6-5-8-7-2-1-4-3
tvendov 0:6435b67ad23c 434 * - WR_RD_WRSWA_32_16BIT : Swapped in 32-bit units + 16-bit units: 7-8-5-6-3-4-1-2
tvendov 0:6435b67ad23c 435 * - WR_RD_WRSWA_32_16_8BIT : Swapped in 32-bit units + 16-bit units + 8-bit units: 8-7-6-5-4-3-2-1
tvendov 0:6435b67ad23c 436 * @param[in] gr_rect : Graphics display area
tvendov 0:6435b67ad23c 437 * @retval Error code
tvendov 0:6435b67ad23c 438 */
tvendov 0:6435b67ad23c 439 graphics_error_t Graphics_Read_Setting (
tvendov 0:6435b67ad23c 440 graphics_layer_t layer_id,
tvendov 0:6435b67ad23c 441 void * framebuff,
tvendov 0:6435b67ad23c 442 unsigned int fb_stride,
tvendov 0:6435b67ad23c 443 graphics_format_t gr_format,
tvendov 0:6435b67ad23c 444 wr_rd_swa_t wr_rd_swa,
tvendov 0:6435b67ad23c 445 rect_t * gr_rect );
tvendov 0:6435b67ad23c 446
tvendov 0:6435b67ad23c 447 /** Graphics surface read buffer change process
tvendov 0:6435b67ad23c 448 * @param[in] layer_id : Graphics layer ID <br />
tvendov 0:6435b67ad23c 449 * - GRAPHICS_LAYER_0 : Layer 0
tvendov 0:6435b67ad23c 450 * - GRAPHICS_LAYER_1 : Layer 1
tvendov 0:6435b67ad23c 451 * - GRAPHICS_LAYER_2 : Layer 2
tvendov 0:6435b67ad23c 452 * - GRAPHICS_LAYER_3 : Layer 3
tvendov 0:6435b67ad23c 453 * @param[in] framebuff : Base address of the frame buffer(Not set NULL)
tvendov 0:6435b67ad23c 454 * @retval Error code
tvendov 0:6435b67ad23c 455 */
tvendov 0:6435b67ad23c 456 graphics_error_t Graphics_Read_Change (
tvendov 0:6435b67ad23c 457 graphics_layer_t layer_id,
tvendov 0:6435b67ad23c 458 void * framebuff);
tvendov 0:6435b67ad23c 459
tvendov 0:6435b67ad23c 460 /** Graphics surface read buffer change process
tvendov 0:6435b67ad23c 461 * @param[in] layer_id : Graphics layer ID <br />
tvendov 0:6435b67ad23c 462 * - GRAPHICS_LAYER_0 : Layer 0
tvendov 0:6435b67ad23c 463 * - GRAPHICS_LAYER_1 : Layer 1
tvendov 0:6435b67ad23c 464 * - GRAPHICS_LAYER_2 : Layer 2
tvendov 0:6435b67ad23c 465 * - GRAPHICS_LAYER_3 : Layer 3
tvendov 0:6435b67ad23c 466 * @param[in] framebuff : Base address of the frame buffer(Not set NULL)
tvendov 0:6435b67ad23c 467 * @param[in] fb_stride : stride of the framebuff
tvendov 0:6435b67ad23c 468 * @param[in] slide_dir : slide direction
tvendov 0:6435b67ad23c 469 * @retval Error code
tvendov 0:6435b67ad23c 470 */
tvendov 0:6435b67ad23c 471 graphics_error_t Graphics_Read_Change_More (
tvendov 0:6435b67ad23c 472 graphics_layer_t layer_id,
tvendov 0:6435b67ad23c 473 void * framebuff,
tvendov 0:6435b67ad23c 474 unsigned int fb_stride,
tvendov 0:6435b67ad23c 475 slide_t * slide_dir);
tvendov 0:6435b67ad23c 476
tvendov 0:6435b67ad23c 477 /** Video surface write process setting
tvendov 0:6435b67ad23c 478 * @param[in] video_input_channel : Video input channel <br />
tvendov 0:6435b67ad23c 479 * If using digital input, this parameter is not referenced. <br />
tvendov 0:6435b67ad23c 480 * - VIDEO_INPUT_CHANNEL_0 : Video channel 0
tvendov 0:6435b67ad23c 481 * - VIDEO_INPUT_CHANNEL_1 : Video channel 1
tvendov 0:6435b67ad23c 482 * @param[in] col_sys : Analog video signal color system <br />
tvendov 0:6435b67ad23c 483 * If using digital input, this parameter is not referenced. <br />
tvendov 0:6435b67ad23c 484 * - COL_SYS_NTSC_358 : NTSC-3.58
tvendov 0:6435b67ad23c 485 * - COL_SYS_NTSC_443 : NTSC-4.43
tvendov 0:6435b67ad23c 486 * - COL_SYS_PAL_443 : PAL-4.43
tvendov 0:6435b67ad23c 487 * - COL_SYS_PAL_M : PAL-M
tvendov 0:6435b67ad23c 488 * - COL_SYS_PAL_N : PAL-N
tvendov 0:6435b67ad23c 489 * - COL_SYS_SECAM : SECAM
tvendov 0:6435b67ad23c 490 * - COL_SYS_NTSC_443_60 : NTSC-4.43 (60Hz)
tvendov 0:6435b67ad23c 491 * - COL_SYS_PAL_60 : PAL-60
tvendov 0:6435b67ad23c 492 * @param[in] framebuff : Base address of the frame buffer(Not set NULL)
tvendov 0:6435b67ad23c 493 * @param[in] fb_stride : Line offset address of the frame buffer[byte] <br />
tvendov 0:6435b67ad23c 494 * Frame buffer stride should be set to a multiple of 32 or 128
tvendov 0:6435b67ad23c 495 * in accordance with the frame buffer burst transfer mode.
tvendov 0:6435b67ad23c 496 * @param[in] video_format : Frame buffer video-signal writing format <br />
tvendov 0:6435b67ad23c 497 * - VIDEO_FORMAT_YCBCR422 : YCBCR422 (2byte/px)
tvendov 0:6435b67ad23c 498 * - VIDEO_FORMAT_RGB565 : RGB565 (2byte/px)
tvendov 0:6435b67ad23c 499 * - VIDEO_FORMAT_RGB888 : RGB888 (4byte/px)
tvendov 0:6435b67ad23c 500 * @param[in] wr_rd_swa : frame buffer swap setting <br />
tvendov 0:6435b67ad23c 501 * - WR_RD_WRSWA_NON : Not swapped: 1-2-3-4-5-6-7-8
tvendov 0:6435b67ad23c 502 * - WR_RD_WRSWA_8BIT : Swapped in 8-bit units: 2-1-4-3-6-5-8-7
tvendov 0:6435b67ad23c 503 * - WR_RD_WRSWA_16BIT : Swapped in 16-bit units: 3-4-1-2-7-8-5-6
tvendov 0:6435b67ad23c 504 * - WR_RD_WRSWA_16_8BIT : Swapped in 16-bit units + 8-bit units: 4-3-2-1-8-7-6-5
tvendov 0:6435b67ad23c 505 * - WR_RD_WRSWA_32BIT : Swapped in 32-bit units: 5-6-7-8-1-2-3-4
tvendov 0:6435b67ad23c 506 * - WR_RD_WRSWA_32_8BIT : Swapped in 32-bit units + 8-bit units: 6-5-8-7-2-1-4-3
tvendov 0:6435b67ad23c 507 * - WR_RD_WRSWA_32_16BIT : Swapped in 32-bit units + 16-bit units: 7-8-5-6-3-4-1-2
tvendov 0:6435b67ad23c 508 * - WR_RD_WRSWA_32_16_8BIT : Swapped in 32-bit units + 16-bit units + 8-bit units: 8-7-6-5-4-3-2-1
tvendov 0:6435b67ad23c 509 * @param[in] video_write_buff_vw : Output height[px] <br />
tvendov 0:6435b67ad23c 510 * - NTSC format : Max height is 480[px]
tvendov 0:6435b67ad23c 511 * - PAL format : Max height is 520[px]
tvendov 0:6435b67ad23c 512 * @param[in] video_write_buff_hw : Output width[px] <br />
tvendov 0:6435b67ad23c 513 * - Max width : 800[px]
tvendov 0:6435b67ad23c 514 * @param[in] video_adc_vinsel : Input pin control <br />
tvendov 0:6435b67ad23c 515 * - VIDEO_ADC_VINSEL_VIN1 : VIN1 input
tvendov 0:6435b67ad23c 516 * - VIDEO_ADC_VINSEL_VIN2 : VIN2 input
tvendov 0:6435b67ad23c 517 * @retval Error code
tvendov 0:6435b67ad23c 518 */
tvendov 0:6435b67ad23c 519 graphics_error_t Video_Write_Setting (
tvendov 0:6435b67ad23c 520 video_input_channel_t video_input_channel,
tvendov 0:6435b67ad23c 521 graphics_video_col_sys_t col_sys,
tvendov 0:6435b67ad23c 522 void * framebuff,
tvendov 0:6435b67ad23c 523 unsigned int fb_stride,
tvendov 0:6435b67ad23c 524 video_format_t video_format,
tvendov 0:6435b67ad23c 525 wr_rd_swa_t wr_rd_swa,
tvendov 0:6435b67ad23c 526 unsigned short video_write_buff_vw,
tvendov 0:6435b67ad23c 527 unsigned short video_write_buff_hw,
tvendov 0:6435b67ad23c 528 video_adc_vinsel_t video_adc_vinsel = VIDEO_ADC_VINSEL_VIN1 );
tvendov 0:6435b67ad23c 529
tvendov 0:6435b67ad23c 530 /** Video surface write buffer change process
tvendov 0:6435b67ad23c 531 * @param[in] video_input_channel : Video input channel <br />
tvendov 0:6435b67ad23c 532 * - VIDEO_INPUT_CHANNEL_0 : Video channel 0
tvendov 0:6435b67ad23c 533 * - VIDEO_INPUT_CHANNEL_1 : Video channel 1
tvendov 0:6435b67ad23c 534 * @param[in] framebuff : Base address of the frame buffer(Not set NULL)
tvendov 0:6435b67ad23c 535 * @param[in] fb_stride : Line offset address of the frame buffer <br />
tvendov 0:6435b67ad23c 536 * Frame buffer stride should be set to a multiple of 32 or 128
tvendov 0:6435b67ad23c 537 * in accordance with the frame buffer burst transfer mode.
tvendov 0:6435b67ad23c 538 * @retval Error code
tvendov 0:6435b67ad23c 539 */
tvendov 0:6435b67ad23c 540 graphics_error_t Video_Write_Change (
tvendov 0:6435b67ad23c 541 video_input_channel_t video_input_channel,
tvendov 0:6435b67ad23c 542 void * framebuff,
tvendov 0:6435b67ad23c 543 uint32_t fb_stride );
tvendov 0:6435b67ad23c 544
tvendov 0:6435b67ad23c 545 protected:
tvendov 0:6435b67ad23c 546 lcd_config_t _lcd_config;
tvendov 0:6435b67ad23c 547 video_input_sel_t _video_input_sel;
tvendov 0:6435b67ad23c 548 video_ext_in_config_t _video_ext_in_config;
tvendov 0:6435b67ad23c 549 };
tvendov 0:6435b67ad23c 550
tvendov 0:6435b67ad23c 551
tvendov 0:6435b67ad23c 552 #endif /* MBED_DISPLAYBASE_H */
tvendov 0:6435b67ad23c 553