This program demonstrates the usage of the PWM. Program sets PWM0 chanel 1 and outputs it to the pin P1.2 where we get a PWM signal with a constant working cycle.
Dependencies: mbed
Diff: LPC4088-timer.h
- Revision:
- 0:c1305ab902af
diff -r 000000000000 -r c1305ab902af LPC4088-timer.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/LPC4088-timer.h Sat May 02 17:29:12 2015 +0000 @@ -0,0 +1,76 @@ +//definicije registrov za periferijo TIMER + +//timer 0 +/* +#define IR (*((volatile unsigned int *) 0x40004000)) +#define TCR (*((volatile unsigned int *) 0x40004004)) +#define TC (*((volatile unsigned int *) 0x40004008)) +#define PR (*((volatile unsigned int *) 0x4000400C)) +#define PC (*((volatile unsigned int *) 0x40004010)) +#define MCR (*((volatile unsigned int *) 0x40004014)) +#define MR0 (*((volatile unsigned int *) 0x40004018)) +#define MR1 (*((volatile unsigned int *) 0x4000401C)) +#define MR2 (*((volatile unsigned int *) 0x40004020)) +#define MR3 (*((volatile unsigned int *) 0x40004024)) +#define CCR (*((volatile unsigned int *) 0x40004028)) +#define CR0 (*((volatile unsigned int *) 0x4000402C)) +#define CR1 (*((volatile unsigned int *) 0x40004030)) +#define EMR (*((volatile unsigned int *) 0x4000403C)) +#define CTCR (*((volatile unsigned int *) 0x40004070)) +*/ + +//timer 1 +/* +#define IR (*((volatile unsigned int *) 0x40008000)) +#define TCR (*((volatile unsigned int *) 0x40008004)) +#define TC (*((volatile unsigned int *) 0x40008008)) +#define PR (*((volatile unsigned int *) 0x4000800C)) +#define PC (*((volatile unsigned int *) 0x40008010)) +#define MCR (*((volatile unsigned int *) 0x40008014)) +#define MR0 (*((volatile unsigned int *) 0x40008018)) +#define MR1 (*((volatile unsigned int *) 0x4000801C)) +#define MR2 (*((volatile unsigned int *) 0x40008020)) +#define MR3 (*((volatile unsigned int *) 0x40008024)) +#define CCR (*((volatile unsigned int *) 0x40008028)) +#define CR0 (*((volatile unsigned int *) 0x4000802C)) +#define CR1 (*((volatile unsigned int *) 0x40008030)) +#define EMR (*((volatile unsigned int *) 0x4000803C)) +#define CTCR (*((volatile unsigned int *) 0x40008070)) +*/ + +//timer 2 +#define IR (*((volatile unsigned int *) 0x40090000)) +#define TCR (*((volatile unsigned int *) 0x40090004)) +#define TC (*((volatile unsigned int *) 0x40090008)) +#define PR (*((volatile unsigned int *) 0x4009000C)) +#define PC (*((volatile unsigned int *) 0x40090010)) +#define MCR (*((volatile unsigned int *) 0x40090014)) +#define MR0 (*((volatile unsigned int *) 0x40090018)) +#define MR1 (*((volatile unsigned int *) 0x4009001C)) +#define MR2 (*((volatile unsigned int *) 0x40090020)) +#define MR3 (*((volatile unsigned int *) 0x40090024)) +#define CCR (*((volatile unsigned int *) 0x40090028)) +#define CR0 (*((volatile unsigned int *) 0x4009002C)) +#define CR1 (*((volatile unsigned int *) 0x40090030)) +#define EMR (*((volatile unsigned int *) 0x4009003C)) +#define CTCR (*((volatile unsigned int *) 0x40090070)) + + +//timer 3 +/* +#define IR (*((volatile unsigned int *) 0x40094000)) +#define TCR (*((volatile unsigned int *) 0x40094004)) +#define TC (*((volatile unsigned int *) 0x40094008)) +#define PR (*((volatile unsigned int *) 0x4009400C)) +#define PC (*((volatile unsigned int *) 0x40094010)) +#define MCR (*((volatile unsigned int *) 0x40094014)) +#define MR0 (*((volatile unsigned int *) 0x40094018)) +#define MR1 (*((volatile unsigned int *) 0x4009401C)) +#define MR2 (*((volatile unsigned int *) 0x40094020)) +#define MR3 (*((volatile unsigned int *) 0x40094024)) +#define CCR (*((volatile unsigned int *) 0x40094028)) +#define CR0 (*((volatile unsigned int *) 0x4009402C)) +#define CR1 (*((volatile unsigned int *) 0x40094030)) +#define EMR (*((volatile unsigned int *) 0x4009403C)) +#define CTCR (*((volatile unsigned int *) 0x40094070)) +*/