SX1261 and sx1262 common library
Dependents: SX126xDevKit SX1262PingPong SX126X_TXonly SX126X_PingPong_Demo ... more
Fork of SX126xLib by
sx126x.cpp@2:4ff11ea92fbe, 2016-09-23 (annotated)
- Committer:
- GregCr
- Date:
- Fri Sep 23 09:38:34 2016 +0000
- Revision:
- 2:4ff11ea92fbe
- Parent:
- 1:35d34672a089
- Child:
- 3:7e3595a9ebe0
updated
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
GregCr | 0:deaafdfde3bb | 1 | /* |
GregCr | 0:deaafdfde3bb | 2 | / _____) _ | | |
GregCr | 0:deaafdfde3bb | 3 | ( (____ _____ ____ _| |_ _____ ____| |__ |
GregCr | 0:deaafdfde3bb | 4 | \____ \| ___ | (_ _) ___ |/ ___) _ \ |
GregCr | 0:deaafdfde3bb | 5 | _____) ) ____| | | || |_| ____( (___| | | | |
GregCr | 0:deaafdfde3bb | 6 | (______/|_____)_|_|_| \__)_____)\____)_| |_| |
GregCr | 0:deaafdfde3bb | 7 | (C)2016 Semtech |
GregCr | 0:deaafdfde3bb | 8 | |
GregCr | 0:deaafdfde3bb | 9 | Description: Handling of the node configuration protocol |
GregCr | 0:deaafdfde3bb | 10 | |
GregCr | 0:deaafdfde3bb | 11 | License: Revised BSD License, see LICENSE.TXT file include in the project |
GregCr | 0:deaafdfde3bb | 12 | |
GregCr | 0:deaafdfde3bb | 13 | Maintainer: Miguel Luis, Gregory Cristian and Matthieu Verdy |
GregCr | 0:deaafdfde3bb | 14 | */ |
GregCr | 0:deaafdfde3bb | 15 | #include "mbed.h" |
GregCr | 1:35d34672a089 | 16 | #include "sx126x.h" |
GregCr | 1:35d34672a089 | 17 | #include "sx126x-hal.h" |
GregCr | 0:deaafdfde3bb | 18 | |
GregCr | 0:deaafdfde3bb | 19 | /*! |
GregCr | 0:deaafdfde3bb | 20 | * Radio registers definition |
GregCr | 0:deaafdfde3bb | 21 | * |
GregCr | 0:deaafdfde3bb | 22 | */ |
GregCr | 0:deaafdfde3bb | 23 | typedef struct |
GregCr | 0:deaafdfde3bb | 24 | { |
GregCr | 0:deaafdfde3bb | 25 | uint16_t Addr; //!< The address of the register |
GregCr | 0:deaafdfde3bb | 26 | uint8_t Value; //!< The value of the register |
GregCr | 0:deaafdfde3bb | 27 | }RadioRegisters_t; |
GregCr | 0:deaafdfde3bb | 28 | |
GregCr | 0:deaafdfde3bb | 29 | // [TODO] Is this also applicable for the V2 version of the chip |
GregCr | 0:deaafdfde3bb | 30 | /*! |
GregCr | 0:deaafdfde3bb | 31 | * \brief Radio hardware registers initialization definition |
GregCr | 0:deaafdfde3bb | 32 | */ |
GregCr | 0:deaafdfde3bb | 33 | // { Address, RegValue } |
GregCr | 0:deaafdfde3bb | 34 | #define RADIO_INIT_REGISTERS_VALUE \ |
GregCr | 0:deaafdfde3bb | 35 | { \ |
GregCr | 0:deaafdfde3bb | 36 | { 0x0722, 0x53 }, \ |
GregCr | 0:deaafdfde3bb | 37 | } |
GregCr | 0:deaafdfde3bb | 38 | |
GregCr | 0:deaafdfde3bb | 39 | /*! |
GregCr | 0:deaafdfde3bb | 40 | * \brief Radio hardware registers initialization |
GregCr | 0:deaafdfde3bb | 41 | */ |
GregCr | 0:deaafdfde3bb | 42 | const RadioRegisters_t RadioRegsInit[] = RADIO_INIT_REGISTERS_VALUE; |
GregCr | 0:deaafdfde3bb | 43 | |
GregCr | 2:4ff11ea92fbe | 44 | void SX126x::Init( void ) |
GregCr | 0:deaafdfde3bb | 45 | { |
GregCr | 0:deaafdfde3bb | 46 | Reset( ); |
GregCr | 0:deaafdfde3bb | 47 | IoIrqInit( dioIrq ); |
GregCr | 0:deaafdfde3bb | 48 | Wakeup( ); |
GregCr | 0:deaafdfde3bb | 49 | SetRegistersDefault( ); |
GregCr | 0:deaafdfde3bb | 50 | } |
GregCr | 0:deaafdfde3bb | 51 | |
GregCr | 2:4ff11ea92fbe | 52 | void SX126x::SetRegistersDefault( void ) |
GregCr | 0:deaafdfde3bb | 53 | { |
GregCr | 0:deaafdfde3bb | 54 | for( uint8_t i = 0; i < sizeof( RadioRegsInit ) / sizeof( RadioRegisters_t ); i++ ) |
GregCr | 0:deaafdfde3bb | 55 | { |
GregCr | 0:deaafdfde3bb | 56 | WriteRegister( RadioRegsInit[i].Addr, RadioRegsInit[i].Value ); |
GregCr | 0:deaafdfde3bb | 57 | } |
GregCr | 0:deaafdfde3bb | 58 | } |
GregCr | 0:deaafdfde3bb | 59 | |
GregCr | 2:4ff11ea92fbe | 60 | uint16_t SX126x::GetFirmwareVersion( void ) |
GregCr | 0:deaafdfde3bb | 61 | { |
GregCr | 0:deaafdfde3bb | 62 | return( ( ( ReadRegister( 0xA8 ) ) << 8 ) | ( ReadRegister( 0xA9 ) ) ); |
GregCr | 0:deaafdfde3bb | 63 | } |
GregCr | 0:deaafdfde3bb | 64 | |
GregCr | 2:4ff11ea92fbe | 65 | RadioStatus_t SX126x::GetStatus( void ) |
GregCr | 0:deaafdfde3bb | 66 | { |
GregCr | 0:deaafdfde3bb | 67 | uint8_t stat = 0; |
GregCr | 0:deaafdfde3bb | 68 | RadioStatus_t status; |
GregCr | 0:deaafdfde3bb | 69 | |
GregCr | 0:deaafdfde3bb | 70 | ReadCommand( RADIO_GET_STATUS, ( uint8_t * )&stat, 1 ); |
GregCr | 0:deaafdfde3bb | 71 | status.Value = stat; |
GregCr | 0:deaafdfde3bb | 72 | |
GregCr | 0:deaafdfde3bb | 73 | |
GregCr | 0:deaafdfde3bb | 74 | return( status ); |
GregCr | 0:deaafdfde3bb | 75 | } |
GregCr | 0:deaafdfde3bb | 76 | |
GregCr | 2:4ff11ea92fbe | 77 | void SX126x::SetSleep( SleepParams_t sleepConfig ) |
GregCr | 0:deaafdfde3bb | 78 | { |
GregCr | 0:deaafdfde3bb | 79 | |
GregCr | 0:deaafdfde3bb | 80 | WriteCommand( RADIO_SET_SLEEP, &sleepConfig.Value, 1 ); |
GregCr | 0:deaafdfde3bb | 81 | OperatingMode = MODE_SLEEP; |
GregCr | 0:deaafdfde3bb | 82 | } |
GregCr | 0:deaafdfde3bb | 83 | |
GregCr | 2:4ff11ea92fbe | 84 | void SX126x::SetStandby( RadioStandbyModes_t standbyConfig ) |
GregCr | 0:deaafdfde3bb | 85 | { |
GregCr | 0:deaafdfde3bb | 86 | WriteCommand( RADIO_SET_STANDBY, ( uint8_t* )&standbyConfig, 1 ); |
GregCr | 0:deaafdfde3bb | 87 | if( standbyConfig == STDBY_RC ) |
GregCr | 0:deaafdfde3bb | 88 | { |
GregCr | 0:deaafdfde3bb | 89 | OperatingMode = MODE_STDBY_RC; |
GregCr | 0:deaafdfde3bb | 90 | } |
GregCr | 0:deaafdfde3bb | 91 | else |
GregCr | 0:deaafdfde3bb | 92 | { |
GregCr | 0:deaafdfde3bb | 93 | OperatingMode = MODE_STDBY_XOSC; |
GregCr | 0:deaafdfde3bb | 94 | } |
GregCr | 0:deaafdfde3bb | 95 | } |
GregCr | 0:deaafdfde3bb | 96 | |
GregCr | 2:4ff11ea92fbe | 97 | void SX126x::SetFs( void ) |
GregCr | 0:deaafdfde3bb | 98 | { |
GregCr | 0:deaafdfde3bb | 99 | WriteCommand( RADIO_SET_FS, 0, 0 ); |
GregCr | 0:deaafdfde3bb | 100 | OperatingMode = MODE_FS; |
GregCr | 0:deaafdfde3bb | 101 | } |
GregCr | 0:deaafdfde3bb | 102 | |
GregCr | 2:4ff11ea92fbe | 103 | void SX126x::SetTx( uint32_t timeout ) |
GregCr | 0:deaafdfde3bb | 104 | { |
GregCr | 0:deaafdfde3bb | 105 | uint8_t buf[3]; |
GregCr | 0:deaafdfde3bb | 106 | buf[0] = ( uint8_t )( ( timeout >> 16 ) & 0xFF ); |
GregCr | 0:deaafdfde3bb | 107 | buf[1] = ( uint8_t )( ( timeout >> 8 ) & 0xFF ); |
GregCr | 0:deaafdfde3bb | 108 | buf[2] = ( uint8_t )( timeout & 0xFF ); |
GregCr | 0:deaafdfde3bb | 109 | WriteCommand( RADIO_SET_TX, buf, 3 ); |
GregCr | 0:deaafdfde3bb | 110 | OperatingMode = MODE_TX; |
GregCr | 0:deaafdfde3bb | 111 | } |
GregCr | 0:deaafdfde3bb | 112 | |
GregCr | 2:4ff11ea92fbe | 113 | void SX126x::SetRx( uint32_t timeout ) |
GregCr | 0:deaafdfde3bb | 114 | { |
GregCr | 0:deaafdfde3bb | 115 | uint8_t buf[3]; |
GregCr | 0:deaafdfde3bb | 116 | buf[0] = ( uint8_t )( ( timeout >> 16 ) & 0xFF ); |
GregCr | 0:deaafdfde3bb | 117 | buf[1] = ( uint8_t )( ( timeout >> 8 ) & 0xFF ); |
GregCr | 0:deaafdfde3bb | 118 | buf[2] = ( uint8_t )( timeout & 0xFF ); |
GregCr | 0:deaafdfde3bb | 119 | WriteCommand( RADIO_SET_RX, buf, 3 ); |
GregCr | 0:deaafdfde3bb | 120 | OperatingMode = MODE_RX; |
GregCr | 0:deaafdfde3bb | 121 | } |
GregCr | 0:deaafdfde3bb | 122 | |
GregCr | 2:4ff11ea92fbe | 123 | void SX126x::SetRxDutyCycle( uint32_t rxTime, uint32_t sleepTime ) |
GregCr | 0:deaafdfde3bb | 124 | { |
GregCr | 0:deaafdfde3bb | 125 | uint8_t buf[6]; |
GregCr | 0:deaafdfde3bb | 126 | |
GregCr | 0:deaafdfde3bb | 127 | buf[0] = ( uint8_t )( ( rxTime >> 16 ) & 0xFF ); |
GregCr | 0:deaafdfde3bb | 128 | buf[1] = ( uint8_t )( ( rxTime >> 8 ) & 0xFF ); |
GregCr | 0:deaafdfde3bb | 129 | buf[2] = ( uint8_t )( rxTime & 0xFF ); |
GregCr | 0:deaafdfde3bb | 130 | buf[0] = ( uint8_t )( ( sleepTime >> 16 ) & 0xFF ); |
GregCr | 0:deaafdfde3bb | 131 | buf[1] = ( uint8_t )( ( sleepTime >> 8 ) & 0xFF ); |
GregCr | 0:deaafdfde3bb | 132 | buf[2] = ( uint8_t )( sleepTime & 0xFF ); |
GregCr | 0:deaafdfde3bb | 133 | WriteCommand( RADIO_SET_RXDUTYCYCLE, buf, 6 ); |
GregCr | 0:deaafdfde3bb | 134 | OperatingMode = MODE_RX; |
GregCr | 0:deaafdfde3bb | 135 | } |
GregCr | 0:deaafdfde3bb | 136 | |
GregCr | 2:4ff11ea92fbe | 137 | void SX126x::SetCad( void ) |
GregCr | 0:deaafdfde3bb | 138 | { |
GregCr | 0:deaafdfde3bb | 139 | WriteCommand( RADIO_SET_CAD, 0, 0 ); |
GregCr | 0:deaafdfde3bb | 140 | OperatingMode = MODE_CAD; |
GregCr | 0:deaafdfde3bb | 141 | } |
GregCr | 0:deaafdfde3bb | 142 | |
GregCr | 2:4ff11ea92fbe | 143 | void SX126x::SetAutoTxRx( uint32_t time, uint8_t intMode, uint32_t timeout ) |
GregCr | 0:deaafdfde3bb | 144 | { |
GregCr | 0:deaafdfde3bb | 145 | uint32_t compensatedTime = time - ( uint16_t )AUTO_RX_TX_OFFSET; |
GregCr | 0:deaafdfde3bb | 146 | uint8_t buf[7]; |
GregCr | 0:deaafdfde3bb | 147 | |
GregCr | 0:deaafdfde3bb | 148 | buf[0] = ( uint8_t )( ( compensatedTime >> 16 ) & 0xFF ); |
GregCr | 0:deaafdfde3bb | 149 | buf[1] = ( uint8_t )( ( compensatedTime >> 8 ) & 0xFF ); |
GregCr | 0:deaafdfde3bb | 150 | buf[2] = ( uint8_t )( compensatedTime & 0xFF ); |
GregCr | 0:deaafdfde3bb | 151 | buf[3] = intMode; |
GregCr | 0:deaafdfde3bb | 152 | buf[4] = ( uint8_t )( ( timeout >> 16 ) & 0xFF ); |
GregCr | 0:deaafdfde3bb | 153 | buf[5] = ( uint8_t )( ( timeout >> 8 ) & 0xFF ); |
GregCr | 0:deaafdfde3bb | 154 | buf[6] = ( uint8_t )( timeout & 0xFF ); |
GregCr | 0:deaafdfde3bb | 155 | WriteCommand( RADIO_SET_AUTOTXRX, buf, 7 ); |
GregCr | 0:deaafdfde3bb | 156 | } |
GregCr | 0:deaafdfde3bb | 157 | |
GregCr | 0:deaafdfde3bb | 158 | |
GregCr | 2:4ff11ea92fbe | 159 | void SX126x::SetTxContinuousWave( void ) |
GregCr | 0:deaafdfde3bb | 160 | { |
GregCr | 0:deaafdfde3bb | 161 | WriteCommand( RADIO_SET_TXCONTINUOUSWAVE, 0, 0 ); |
GregCr | 0:deaafdfde3bb | 162 | } |
GregCr | 0:deaafdfde3bb | 163 | |
GregCr | 2:4ff11ea92fbe | 164 | void SX126x::SetTxContinuousPreamble( void ) |
GregCr | 0:deaafdfde3bb | 165 | { |
GregCr | 0:deaafdfde3bb | 166 | WriteCommand( RADIO_SET_TXCONTINUOUSPREAMBLE, 0, 0 ); |
GregCr | 0:deaafdfde3bb | 167 | } |
GregCr | 0:deaafdfde3bb | 168 | |
GregCr | 2:4ff11ea92fbe | 169 | void SX126x::SetPacketType( RadioPacketType_t packetType ) |
GregCr | 0:deaafdfde3bb | 170 | { |
GregCr | 0:deaafdfde3bb | 171 | // Save packet type internally to avoid questioning the radio |
GregCr | 0:deaafdfde3bb | 172 | this->PacketType = packetType; |
GregCr | 0:deaafdfde3bb | 173 | |
GregCr | 0:deaafdfde3bb | 174 | WriteCommand( RADIO_SET_PACKETTYPE, ( uint8_t* )&packetType, 1 ); |
GregCr | 0:deaafdfde3bb | 175 | } |
GregCr | 0:deaafdfde3bb | 176 | |
GregCr | 2:4ff11ea92fbe | 177 | RadioPacketType_t SX126x::GetPacketType( void ) |
GregCr | 0:deaafdfde3bb | 178 | { |
GregCr | 0:deaafdfde3bb | 179 | return this->PacketType; |
GregCr | 0:deaafdfde3bb | 180 | } |
GregCr | 0:deaafdfde3bb | 181 | |
GregCr | 2:4ff11ea92fbe | 182 | void SX126x::SetRfFrequency( uint32_t frequency ) |
GregCr | 0:deaafdfde3bb | 183 | { |
GregCr | 0:deaafdfde3bb | 184 | uint8_t buf[4]; |
GregCr | 0:deaafdfde3bb | 185 | uint32_t freq = 0; |
GregCr | 0:deaafdfde3bb | 186 | |
GregCr | 0:deaafdfde3bb | 187 | freq = ( uint32_t )( ( double )frequency / ( double )FREQ_STEP ); |
GregCr | 0:deaafdfde3bb | 188 | buf[0] = ( uint8_t )( ( freq >> 24 ) & 0xFF ); |
GregCr | 0:deaafdfde3bb | 189 | buf[1] = ( uint8_t )( ( freq >> 16 ) & 0xFF ); |
GregCr | 0:deaafdfde3bb | 190 | buf[2] = ( uint8_t )( ( freq >> 8 ) & 0xFF ); |
GregCr | 0:deaafdfde3bb | 191 | buf[3] = ( uint8_t )( freq & 0xFF ); |
GregCr | 0:deaafdfde3bb | 192 | WriteCommand( RADIO_SET_RFFREQUENCY, buf, 3 ); |
GregCr | 0:deaafdfde3bb | 193 | } |
GregCr | 0:deaafdfde3bb | 194 | |
GregCr | 2:4ff11ea92fbe | 195 | void SX126x::SetTxParams( int8_t power, RadioRampTimes_t rampTime ) |
GregCr | 0:deaafdfde3bb | 196 | { |
GregCr | 0:deaafdfde3bb | 197 | uint8_t buf[2]; |
GregCr | 0:deaafdfde3bb | 198 | |
GregCr | 0:deaafdfde3bb | 199 | buf[0] = power ; |
GregCr | 0:deaafdfde3bb | 200 | buf[1] = ( uint8_t )rampTime; |
GregCr | 0:deaafdfde3bb | 201 | WriteCommand( RADIO_SET_TXPARAMS, buf, 2 ); |
GregCr | 0:deaafdfde3bb | 202 | } |
GregCr | 0:deaafdfde3bb | 203 | |
GregCr | 2:4ff11ea92fbe | 204 | void SX126x::SetCadConfig( RadioLoRaCadSymbols_t cadSymbolNum , uint8_t cadExitMode, uint32_t cadRxTxTimeout) |
GregCr | 0:deaafdfde3bb | 205 | { |
GregCr | 0:deaafdfde3bb | 206 | uint8_t buf[5]; |
GregCr | 0:deaafdfde3bb | 207 | buf[0] = ( uint8_t )cadSymbolNum; |
GregCr | 0:deaafdfde3bb | 208 | buf[1] = cadExitMode; |
GregCr | 0:deaafdfde3bb | 209 | buf[2] = ( uint8_t )( ( cadRxTxTimeout >> 16 ) & 0xFF ); |
GregCr | 0:deaafdfde3bb | 210 | buf[3] = ( uint8_t )( ( cadRxTxTimeout >> 8 ) & 0xFF ); |
GregCr | 0:deaafdfde3bb | 211 | buf[4] = ( uint8_t )( cadRxTxTimeout & 0xFF ); |
GregCr | 0:deaafdfde3bb | 212 | WriteCommand( RADIO_SET_CADPARAMS, buf, 5 ); |
GregCr | 0:deaafdfde3bb | 213 | OperatingMode = MODE_CAD; |
GregCr | 0:deaafdfde3bb | 214 | } |
GregCr | 0:deaafdfde3bb | 215 | |
GregCr | 2:4ff11ea92fbe | 216 | void SX126x::SetBufferBaseAddresses( uint8_t txBaseAddress, uint8_t rxBaseAddress ) |
GregCr | 0:deaafdfde3bb | 217 | { |
GregCr | 0:deaafdfde3bb | 218 | uint8_t buf[2]; |
GregCr | 0:deaafdfde3bb | 219 | |
GregCr | 0:deaafdfde3bb | 220 | buf[0] = txBaseAddress; |
GregCr | 0:deaafdfde3bb | 221 | buf[1] = rxBaseAddress; |
GregCr | 0:deaafdfde3bb | 222 | WriteCommand( RADIO_SET_BUFFERBASEADDRESS, buf, 2 ); |
GregCr | 0:deaafdfde3bb | 223 | } |
GregCr | 0:deaafdfde3bb | 224 | |
GregCr | 2:4ff11ea92fbe | 225 | void SX126x::SetModulationParams( ModulationParams_t *modulationParams ) |
GregCr | 0:deaafdfde3bb | 226 | { |
GregCr | 0:deaafdfde3bb | 227 | uint8_t n; |
GregCr | 0:deaafdfde3bb | 228 | |
GregCr | 0:deaafdfde3bb | 229 | // Check if required configuration corresponds to the stored packet type |
GregCr | 0:deaafdfde3bb | 230 | // If not, silently update radio packet type |
GregCr | 0:deaafdfde3bb | 231 | if( this->PacketType != modulationParams->PacketType ) |
GregCr | 0:deaafdfde3bb | 232 | { |
GregCr | 0:deaafdfde3bb | 233 | this->SetPacketType( modulationParams->PacketType ); |
GregCr | 0:deaafdfde3bb | 234 | } |
GregCr | 0:deaafdfde3bb | 235 | |
GregCr | 0:deaafdfde3bb | 236 | switch( modulationParams->PacketType ) |
GregCr | 0:deaafdfde3bb | 237 | { |
GregCr | 0:deaafdfde3bb | 238 | case PACKET_TYPE_GFSK: |
GregCr | 0:deaafdfde3bb | 239 | n = 8; |
GregCr | 0:deaafdfde3bb | 240 | break; |
GregCr | 0:deaafdfde3bb | 241 | case PACKET_TYPE_GMSK: |
GregCr | 0:deaafdfde3bb | 242 | n = 8; |
GregCr | 0:deaafdfde3bb | 243 | break; |
GregCr | 0:deaafdfde3bb | 244 | case PACKET_TYPE_BPSK: |
GregCr | 0:deaafdfde3bb | 245 | n = 5; |
GregCr | 0:deaafdfde3bb | 246 | break; |
GregCr | 0:deaafdfde3bb | 247 | case PACKET_TYPE_LORA: |
GregCr | 0:deaafdfde3bb | 248 | case PACKET_TYPE_RANGING: |
GregCr | 0:deaafdfde3bb | 249 | n = 3; |
GregCr | 0:deaafdfde3bb | 250 | break; |
GregCr | 0:deaafdfde3bb | 251 | case PACKET_TYPE_NONE: |
GregCr | 0:deaafdfde3bb | 252 | return; |
GregCr | 0:deaafdfde3bb | 253 | } |
GregCr | 0:deaafdfde3bb | 254 | WriteCommand( RADIO_SET_MODULATIONPARAMS, modulationParams->Params.Buffer, n ); |
GregCr | 0:deaafdfde3bb | 255 | } |
GregCr | 0:deaafdfde3bb | 256 | |
GregCr | 2:4ff11ea92fbe | 257 | void SX126x::SetPacketParams( PacketParams_t *packetParams ) |
GregCr | 0:deaafdfde3bb | 258 | { |
GregCr | 0:deaafdfde3bb | 259 | uint8_t n; |
GregCr | 0:deaafdfde3bb | 260 | |
GregCr | 0:deaafdfde3bb | 261 | // Check if required configuration corresponds to the stored packet type |
GregCr | 0:deaafdfde3bb | 262 | // If not, silently update radio packet type |
GregCr | 0:deaafdfde3bb | 263 | if( this->PacketType != packetParams->PacketType ) |
GregCr | 0:deaafdfde3bb | 264 | { |
GregCr | 0:deaafdfde3bb | 265 | this->SetPacketType( packetParams->PacketType ); |
GregCr | 0:deaafdfde3bb | 266 | } |
GregCr | 0:deaafdfde3bb | 267 | |
GregCr | 0:deaafdfde3bb | 268 | switch( packetParams->PacketType ) |
GregCr | 0:deaafdfde3bb | 269 | { |
GregCr | 0:deaafdfde3bb | 270 | case PACKET_TYPE_GFSK: |
GregCr | 0:deaafdfde3bb | 271 | n = 8; |
GregCr | 0:deaafdfde3bb | 272 | break; |
GregCr | 0:deaafdfde3bb | 273 | case PACKET_TYPE_BPSK: |
GregCr | 0:deaafdfde3bb | 274 | n = 8; |
GregCr | 0:deaafdfde3bb | 275 | break; |
GregCr | 0:deaafdfde3bb | 276 | case PACKET_TYPE_LORA: |
GregCr | 0:deaafdfde3bb | 277 | case PACKET_TYPE_RANGING: |
GregCr | 0:deaafdfde3bb | 278 | n = 5; |
GregCr | 0:deaafdfde3bb | 279 | break; |
GregCr | 0:deaafdfde3bb | 280 | case PACKET_TYPE_NONE: |
GregCr | 0:deaafdfde3bb | 281 | return; |
GregCr | 0:deaafdfde3bb | 282 | } |
GregCr | 0:deaafdfde3bb | 283 | WriteCommand( RADIO_SET_PACKETPARAMS, packetParams->Params.Buffer, n ); |
GregCr | 0:deaafdfde3bb | 284 | } |
GregCr | 0:deaafdfde3bb | 285 | |
GregCr | 2:4ff11ea92fbe | 286 | void SX126x::GetRxBufferStatus( uint8_t *payloadLength, uint8_t *rxStartBufferPointer ) |
GregCr | 0:deaafdfde3bb | 287 | { |
GregCr | 0:deaafdfde3bb | 288 | uint8_t status[2]; |
GregCr | 0:deaafdfde3bb | 289 | |
GregCr | 0:deaafdfde3bb | 290 | ReadCommand( RADIO_GET_RXBUFFERSTATUS, status, 2 ); |
GregCr | 0:deaafdfde3bb | 291 | |
GregCr | 0:deaafdfde3bb | 292 | *payloadLength = status[0]; |
GregCr | 0:deaafdfde3bb | 293 | *rxStartBufferPointer = status[1]; |
GregCr | 0:deaafdfde3bb | 294 | } |
GregCr | 0:deaafdfde3bb | 295 | |
GregCr | 2:4ff11ea92fbe | 296 | void SX126x::GetPacketStatus( PacketStatus_t *pktStatus ) |
GregCr | 0:deaafdfde3bb | 297 | { |
GregCr | 0:deaafdfde3bb | 298 | uint8_t status[3]; |
GregCr | 0:deaafdfde3bb | 299 | |
GregCr | 0:deaafdfde3bb | 300 | |
GregCr | 0:deaafdfde3bb | 301 | ReadCommand( RADIO_GET_PACKETSTATUS, status, 3 ); |
GregCr | 0:deaafdfde3bb | 302 | |
GregCr | 0:deaafdfde3bb | 303 | pktStatus->packetType = this -> GetPacketType( ); |
GregCr | 0:deaafdfde3bb | 304 | switch( pktStatus->packetType ) |
GregCr | 0:deaafdfde3bb | 305 | { |
GregCr | 0:deaafdfde3bb | 306 | case PACKET_TYPE_GFSK: |
GregCr | 0:deaafdfde3bb | 307 | pktStatus->Gfsk.RxStatus = status[0]; |
GregCr | 0:deaafdfde3bb | 308 | pktStatus->Gfsk.RssiSync = -status[1] / 2; |
GregCr | 0:deaafdfde3bb | 309 | pktStatus->Gfsk.RssiAvg = -status[2] / 2; |
GregCr | 0:deaafdfde3bb | 310 | break; |
GregCr | 0:deaafdfde3bb | 311 | |
GregCr | 0:deaafdfde3bb | 312 | case PACKET_TYPE_LORA: |
GregCr | 0:deaafdfde3bb | 313 | case PACKET_TYPE_RANGING: |
GregCr | 0:deaafdfde3bb | 314 | pktStatus->LoRa.RssiPkt = -status[0] / 2; |
GregCr | 0:deaafdfde3bb | 315 | ( status[1] < 128 ) ? ( pktStatus->LoRa.SnrPkt = status[1] / 4 ) : ( pktStatus->LoRa.SnrPkt = ( ( status[1] - 256 ) /4 ) ); |
GregCr | 0:deaafdfde3bb | 316 | pktStatus->LoRa.SignalRssiPkt = -status[2] / 2; |
GregCr | 0:deaafdfde3bb | 317 | break; |
GregCr | 0:deaafdfde3bb | 318 | |
GregCr | 0:deaafdfde3bb | 319 | case PACKET_TYPE_NONE: |
GregCr | 0:deaafdfde3bb | 320 | // In that specific case, we set everything in the pktStatus to zeros |
GregCr | 0:deaafdfde3bb | 321 | // and reset the packet type accordingly |
GregCr | 0:deaafdfde3bb | 322 | memset( pktStatus, 0, sizeof( PacketStatus_t ) ); |
GregCr | 0:deaafdfde3bb | 323 | pktStatus->packetType = PACKET_TYPE_NONE; |
GregCr | 0:deaafdfde3bb | 324 | break; |
GregCr | 0:deaafdfde3bb | 325 | } |
GregCr | 0:deaafdfde3bb | 326 | } |
GregCr | 0:deaafdfde3bb | 327 | |
GregCr | 2:4ff11ea92fbe | 328 | int8_t SX126x::GetRssiInst( void ) |
GregCr | 0:deaafdfde3bb | 329 | { |
GregCr | 0:deaafdfde3bb | 330 | int8_t rssi; |
GregCr | 0:deaafdfde3bb | 331 | |
GregCr | 0:deaafdfde3bb | 332 | ReadCommand( RADIO_GET_RSSIINST, ( uint8_t* )&rssi, 1 ); |
GregCr | 0:deaafdfde3bb | 333 | return -rssi / 2; |
GregCr | 0:deaafdfde3bb | 334 | } |
GregCr | 0:deaafdfde3bb | 335 | |
GregCr | 2:4ff11ea92fbe | 336 | void SX126x::GetStats( RxCounter_t *rxCounter ) |
GregCr | 0:deaafdfde3bb | 337 | { |
GregCr | 0:deaafdfde3bb | 338 | uint8_t status[6]; |
GregCr | 0:deaafdfde3bb | 339 | |
GregCr | 0:deaafdfde3bb | 340 | |
GregCr | 0:deaafdfde3bb | 341 | rxCounter->packetType = this -> GetPacketType( ); |
GregCr | 0:deaafdfde3bb | 342 | ReadCommand( RADIO_GET_STATS, status, 6 ); |
GregCr | 0:deaafdfde3bb | 343 | rxCounter->NbPktReceived = ( status[0] << 8 ) | status[1]; |
GregCr | 0:deaafdfde3bb | 344 | rxCounter->NbPktCrcOk = ( status[2] << 8 ) | status[3]; |
GregCr | 0:deaafdfde3bb | 345 | rxCounter->NbPktLengthError = ( status[4] << 8 ) | status[4]; |
GregCr | 0:deaafdfde3bb | 346 | } |
GregCr | 0:deaafdfde3bb | 347 | |
GregCr | 2:4ff11ea92fbe | 348 | void SX126x::ResetStats( ) |
GregCr | 0:deaafdfde3bb | 349 | { |
GregCr | 0:deaafdfde3bb | 350 | uint8_t status[6]; |
GregCr | 0:deaafdfde3bb | 351 | |
GregCr | 0:deaafdfde3bb | 352 | memset( status, 0, sizeof( status ) ); |
GregCr | 0:deaafdfde3bb | 353 | WriteCommand( RADIO_RESET_STATS, status, 6 ); |
GregCr | 0:deaafdfde3bb | 354 | } |
GregCr | 0:deaafdfde3bb | 355 | |
GregCr | 2:4ff11ea92fbe | 356 | uint8_t SX126x::GetError() |
GregCr | 0:deaafdfde3bb | 357 | { |
GregCr | 0:deaafdfde3bb | 358 | uint8_t error; |
GregCr | 0:deaafdfde3bb | 359 | |
GregCr | 0:deaafdfde3bb | 360 | ReadCommand( RADIO_GET_ERROR, &error, 1 ); |
GregCr | 0:deaafdfde3bb | 361 | return error; |
GregCr | 0:deaafdfde3bb | 362 | } |
GregCr | 0:deaafdfde3bb | 363 | |
GregCr | 0:deaafdfde3bb | 364 | |
GregCr | 2:4ff11ea92fbe | 365 | void SX126x::SetDioIrqParams( uint16_t irqMask, uint16_t dio1Mask, uint16_t dio2Mask, uint16_t dio3Mask ) |
GregCr | 0:deaafdfde3bb | 366 | { |
GregCr | 0:deaafdfde3bb | 367 | uint8_t buf[8]; |
GregCr | 0:deaafdfde3bb | 368 | |
GregCr | 0:deaafdfde3bb | 369 | buf[0] = ( uint8_t )( ( irqMask >> 8 ) & 0x00FF ); |
GregCr | 0:deaafdfde3bb | 370 | buf[1] = ( uint8_t )( irqMask & 0x00FF ); |
GregCr | 0:deaafdfde3bb | 371 | buf[2] = ( uint8_t )( ( dio1Mask >> 8 ) & 0x00FF ); |
GregCr | 0:deaafdfde3bb | 372 | buf[3] = ( uint8_t )( dio1Mask & 0x00FF ); |
GregCr | 0:deaafdfde3bb | 373 | buf[4] = ( uint8_t )( ( dio2Mask >> 8 ) & 0x00FF ); |
GregCr | 0:deaafdfde3bb | 374 | buf[5] = ( uint8_t )( dio2Mask & 0x00FF ); |
GregCr | 0:deaafdfde3bb | 375 | buf[6] = ( uint8_t )( ( dio3Mask >> 8 ) & 0x00FF ); |
GregCr | 0:deaafdfde3bb | 376 | buf[7] = ( uint8_t )( dio3Mask & 0x00FF ); |
GregCr | 0:deaafdfde3bb | 377 | WriteCommand( RADIO_CFG_DIOIRQ, buf, 8 ); |
GregCr | 0:deaafdfde3bb | 378 | } |
GregCr | 0:deaafdfde3bb | 379 | |
GregCr | 2:4ff11ea92fbe | 380 | uint16_t SX126x::GetIrqStatus( void ) |
GregCr | 0:deaafdfde3bb | 381 | { |
GregCr | 0:deaafdfde3bb | 382 | uint8_t irqStatus[2]; |
GregCr | 0:deaafdfde3bb | 383 | ReadCommand( RADIO_GET_IRQSTATUS, irqStatus, 2 ); |
GregCr | 0:deaafdfde3bb | 384 | return ( irqStatus[0] << 8 ) | irqStatus[1]; |
GregCr | 0:deaafdfde3bb | 385 | } |
GregCr | 0:deaafdfde3bb | 386 | |
GregCr | 2:4ff11ea92fbe | 387 | void SX126x::ClearIrqStatus( uint16_t irq ) |
GregCr | 0:deaafdfde3bb | 388 | { |
GregCr | 0:deaafdfde3bb | 389 | uint8_t buf[2]; |
GregCr | 0:deaafdfde3bb | 390 | |
GregCr | 0:deaafdfde3bb | 391 | buf[0] = ( uint8_t )( ( ( uint16_t )irq >> 8 ) & 0x00FF ); |
GregCr | 0:deaafdfde3bb | 392 | buf[1] = ( uint8_t )( ( uint16_t )irq & 0x00FF ); |
GregCr | 0:deaafdfde3bb | 393 | WriteCommand( RADIO_CLR_IRQSTATUS, buf, 2 ); |
GregCr | 0:deaafdfde3bb | 394 | } |
GregCr | 0:deaafdfde3bb | 395 | |
GregCr | 2:4ff11ea92fbe | 396 | void SX126x::Calibrate( CalibrationParams_t calibParam ) |
GregCr | 0:deaafdfde3bb | 397 | { |
GregCr | 0:deaafdfde3bb | 398 | WriteCommand( RADIO_CALIBRATE, &calibParam.Value, 1 ); |
GregCr | 0:deaafdfde3bb | 399 | } |
GregCr | 0:deaafdfde3bb | 400 | |
GregCr | 2:4ff11ea92fbe | 401 | void SX126x::SetRegulatorMode( uint8_t mode ) |
GregCr | 0:deaafdfde3bb | 402 | { |
GregCr | 0:deaafdfde3bb | 403 | WriteCommand( RADIO_SET_REGULATORMODE, &mode, 1 ); |
GregCr | 0:deaafdfde3bb | 404 | } |
GregCr | 0:deaafdfde3bb | 405 | |
GregCr | 0:deaafdfde3bb | 406 | |
GregCr | 2:4ff11ea92fbe | 407 | void SX126x::SetLongPreamble( uint8_t enable ) |
GregCr | 0:deaafdfde3bb | 408 | { |
GregCr | 0:deaafdfde3bb | 409 | WriteCommand( RADIO_SET_LONGPREAMBLE, &enable, 1 ); |
GregCr | 0:deaafdfde3bb | 410 | } |
GregCr | 0:deaafdfde3bb | 411 | |
GregCr | 2:4ff11ea92fbe | 412 | void SX126x::SetPayload( uint8_t *buffer, uint8_t size ) |
GregCr | 0:deaafdfde3bb | 413 | { |
GregCr | 0:deaafdfde3bb | 414 | WriteBuffer( 0x00, buffer, size ); |
GregCr | 0:deaafdfde3bb | 415 | } |
GregCr | 0:deaafdfde3bb | 416 | |
GregCr | 2:4ff11ea92fbe | 417 | uint8_t SX126x::GetPayload( uint8_t *buffer, uint8_t *size, uint8_t maxSize ) |
GregCr | 0:deaafdfde3bb | 418 | { |
GregCr | 0:deaafdfde3bb | 419 | uint8_t offset; |
GregCr | 0:deaafdfde3bb | 420 | |
GregCr | 0:deaafdfde3bb | 421 | GetRxBufferStatus( size, &offset ); |
GregCr | 0:deaafdfde3bb | 422 | if(*size > maxSize) |
GregCr | 0:deaafdfde3bb | 423 | { |
GregCr | 0:deaafdfde3bb | 424 | return 1; |
GregCr | 0:deaafdfde3bb | 425 | } |
GregCr | 0:deaafdfde3bb | 426 | ReadBuffer( offset, buffer, *size ); |
GregCr | 0:deaafdfde3bb | 427 | return 0; |
GregCr | 0:deaafdfde3bb | 428 | } |
GregCr | 0:deaafdfde3bb | 429 | |
GregCr | 2:4ff11ea92fbe | 430 | void SX126x::SendPayload( uint8_t *payload, uint8_t size, uint32_t timeout ) |
GregCr | 0:deaafdfde3bb | 431 | { |
GregCr | 0:deaafdfde3bb | 432 | SetPayload( payload, size ); |
GregCr | 0:deaafdfde3bb | 433 | SetTx( timeout ); |
GregCr | 0:deaafdfde3bb | 434 | } |
GregCr | 0:deaafdfde3bb | 435 | |
GregCr | 2:4ff11ea92fbe | 436 | uint8_t SX126x::SetSyncWord( uint8_t *syncWord ) |
GregCr | 0:deaafdfde3bb | 437 | { |
GregCr | 0:deaafdfde3bb | 438 | uint8_t syncwordSize = 8; |
GregCr | 0:deaafdfde3bb | 439 | |
GregCr | 0:deaafdfde3bb | 440 | WriteRegister( REG_LR_SYNCWORDBASEADDRESS, syncWord, syncwordSize ); |
GregCr | 0:deaafdfde3bb | 441 | return 0; |
GregCr | 0:deaafdfde3bb | 442 | } |
GregCr | 0:deaafdfde3bb | 443 | |
GregCr | 2:4ff11ea92fbe | 444 | void SX126x::SetCrcSeed( uint8_t *seed ) |
GregCr | 0:deaafdfde3bb | 445 | { |
GregCr | 0:deaafdfde3bb | 446 | switch( GetPacketType( ) ) |
GregCr | 0:deaafdfde3bb | 447 | { |
GregCr | 0:deaafdfde3bb | 448 | case PACKET_TYPE_GFSK: |
GregCr | 0:deaafdfde3bb | 449 | WriteRegister( REG_LR_CRCSEEDBASEADDR, seed, 2 ); |
GregCr | 0:deaafdfde3bb | 450 | break; |
GregCr | 0:deaafdfde3bb | 451 | default: |
GregCr | 0:deaafdfde3bb | 452 | break; |
GregCr | 0:deaafdfde3bb | 453 | } |
GregCr | 0:deaafdfde3bb | 454 | } |
GregCr | 0:deaafdfde3bb | 455 | |
GregCr | 2:4ff11ea92fbe | 456 | void SX126x::SetCrcPolynomial( uint8_t *polynomial ) |
GregCr | 0:deaafdfde3bb | 457 | { |
GregCr | 0:deaafdfde3bb | 458 | switch( GetPacketType( ) ) |
GregCr | 0:deaafdfde3bb | 459 | { |
GregCr | 0:deaafdfde3bb | 460 | case PACKET_TYPE_GFSK: |
GregCr | 0:deaafdfde3bb | 461 | WriteRegister( REG_LR_CRCPOLYBASEADDR, polynomial, 2 ); |
GregCr | 0:deaafdfde3bb | 462 | break; |
GregCr | 0:deaafdfde3bb | 463 | default: |
GregCr | 0:deaafdfde3bb | 464 | break; |
GregCr | 0:deaafdfde3bb | 465 | } |
GregCr | 0:deaafdfde3bb | 466 | } |
GregCr | 0:deaafdfde3bb | 467 | |
GregCr | 2:4ff11ea92fbe | 468 | void SX126x::SetWhiteningSeed( uint8_t seed ) |
GregCr | 0:deaafdfde3bb | 469 | { |
GregCr | 0:deaafdfde3bb | 470 | switch( GetPacketType( ) ) |
GregCr | 0:deaafdfde3bb | 471 | { |
GregCr | 0:deaafdfde3bb | 472 | case PACKET_TYPE_GFSK: |
GregCr | 0:deaafdfde3bb | 473 | WriteRegister( REG_LR_WHITSEEDBASEADDR, seed ); |
GregCr | 0:deaafdfde3bb | 474 | break; |
GregCr | 0:deaafdfde3bb | 475 | default: |
GregCr | 0:deaafdfde3bb | 476 | break; |
GregCr | 0:deaafdfde3bb | 477 | } |
GregCr | 0:deaafdfde3bb | 478 | } |
GregCr | 0:deaafdfde3bb | 479 | |
GregCr | 2:4ff11ea92fbe | 480 | void SX126x::SetRangingIdLength( RadioRangingIdCheckLen_t length ) |
GregCr | 0:deaafdfde3bb | 481 | { |
GregCr | 0:deaafdfde3bb | 482 | switch( GetPacketType( ) ) |
GregCr | 0:deaafdfde3bb | 483 | { |
GregCr | 0:deaafdfde3bb | 484 | case PACKET_TYPE_RANGING: |
GregCr | 0:deaafdfde3bb | 485 | WriteRegister( REG_LR_RANGINGIDCHECKLENGTH, ( ( ( ( uint8_t )length ) & 0x03 ) << 6 ) | ( ReadRegister( REG_LR_RANGINGIDCHECKLENGTH ) & 0x3F ) ); |
GregCr | 0:deaafdfde3bb | 486 | break; |
GregCr | 0:deaafdfde3bb | 487 | default: |
GregCr | 0:deaafdfde3bb | 488 | break; |
GregCr | 0:deaafdfde3bb | 489 | } |
GregCr | 0:deaafdfde3bb | 490 | } |
GregCr | 0:deaafdfde3bb | 491 | |
GregCr | 2:4ff11ea92fbe | 492 | void SX126x::SetDeviceRangingAddress( uint32_t address ) |
GregCr | 0:deaafdfde3bb | 493 | { |
GregCr | 0:deaafdfde3bb | 494 | uint8_t addrArray[] = { ( uint8_t )( ( address >> 24 ) & 0xFF ) , |
GregCr | 0:deaafdfde3bb | 495 | ( uint8_t )( ( address >> 16 ) & 0xFF ), |
GregCr | 0:deaafdfde3bb | 496 | ( uint8_t )( ( address >> 8 ) & 0xFF ), |
GregCr | 0:deaafdfde3bb | 497 | ( uint8_t )( ( address >> 0 ) & 0xFF ) }; |
GregCr | 0:deaafdfde3bb | 498 | |
GregCr | 0:deaafdfde3bb | 499 | WriteRegister( REG_LR_DEVICERANGINGADDR, addrArray, 4 ); |
GregCr | 0:deaafdfde3bb | 500 | } |
GregCr | 0:deaafdfde3bb | 501 | |
GregCr | 2:4ff11ea92fbe | 502 | void SX126x::SetRangingRequestAddress( uint32_t address ) |
GregCr | 0:deaafdfde3bb | 503 | { |
GregCr | 0:deaafdfde3bb | 504 | uint8_t addrArray[] = { ( uint8_t )( ( address >> 24 ) & 0xFF ) , |
GregCr | 0:deaafdfde3bb | 505 | ( uint8_t )( ( address >> 16 ) & 0xFF ), |
GregCr | 0:deaafdfde3bb | 506 | ( uint8_t )( ( address >> 8 ) & 0xFF ), |
GregCr | 0:deaafdfde3bb | 507 | ( uint8_t )( ( address >> 0 ) & 0xFF ) }; |
GregCr | 0:deaafdfde3bb | 508 | |
GregCr | 0:deaafdfde3bb | 509 | WriteRegister( REG_LR_REQUESTRANGINGADDR, addrArray, 4 ); |
GregCr | 0:deaafdfde3bb | 510 | |
GregCr | 0:deaafdfde3bb | 511 | } |
GregCr | 0:deaafdfde3bb | 512 | |
GregCr | 2:4ff11ea92fbe | 513 | int32_t SX126x::GetRangingResult( RadioRangingResultType_t resultType ) |
GregCr | 0:deaafdfde3bb | 514 | { |
GregCr | 0:deaafdfde3bb | 515 | int32_t val = 0; |
GregCr | 0:deaafdfde3bb | 516 | uint32_t addr = REG_LR_RANGINGRESULTRAWBASEADDR + (uint8_t)resultType; |
GregCr | 0:deaafdfde3bb | 517 | //switch( GetPacketType( ) ) |
GregCr | 0:deaafdfde3bb | 518 | //{ |
GregCr | 0:deaafdfde3bb | 519 | // case PACKET_TYPE_RANGING: |
GregCr | 0:deaafdfde3bb | 520 | val = ( ( ReadRegister( addr ) << 16 ) | ( ReadRegister( addr + 1 ) << 8 ) | ( ReadRegister( addr + 2 ) ) ); |
GregCr | 0:deaafdfde3bb | 521 | if( ( val & 0x800000 ) == 0x800000 ) |
GregCr | 0:deaafdfde3bb | 522 | { |
GregCr | 0:deaafdfde3bb | 523 | val |= 0xFF000000; |
GregCr | 0:deaafdfde3bb | 524 | } |
GregCr | 0:deaafdfde3bb | 525 | // break; |
GregCr | 0:deaafdfde3bb | 526 | // default: |
GregCr | 0:deaafdfde3bb | 527 | // break; |
GregCr | 0:deaafdfde3bb | 528 | //} |
GregCr | 0:deaafdfde3bb | 529 | return val; |
GregCr | 0:deaafdfde3bb | 530 | } |
GregCr | 0:deaafdfde3bb | 531 | |
GregCr | 2:4ff11ea92fbe | 532 | void SX126x::SetRangingCalibration( uint16_t cal ) |
GregCr | 0:deaafdfde3bb | 533 | { |
GregCr | 0:deaafdfde3bb | 534 | WriteRegister( REG_LR_RANGINGRERXTXDELAYCAL, ( uint8_t )( ( cal >> 8 ) & 0xFF ) ); |
GregCr | 0:deaafdfde3bb | 535 | WriteRegister( REG_LR_RANGINGRERXTXDELAYCAL + 1, ( uint8_t )( ( cal ) & 0xFF ) ); |
GregCr | 0:deaafdfde3bb | 536 | } |
GregCr | 0:deaafdfde3bb | 537 | |
GregCr | 2:4ff11ea92fbe | 538 | int8_t SX126x::ParseHexFileLine( char* line ) |
GregCr | 0:deaafdfde3bb | 539 | { |
GregCr | 0:deaafdfde3bb | 540 | uint16_t addr; |
GregCr | 0:deaafdfde3bb | 541 | uint16_t n; |
GregCr | 0:deaafdfde3bb | 542 | uint8_t code; |
GregCr | 0:deaafdfde3bb | 543 | uint8_t bytes[256]; |
GregCr | 0:deaafdfde3bb | 544 | |
GregCr | 0:deaafdfde3bb | 545 | if( GetHexFileLineFields( line, bytes, &addr, &n, &code ) != 0 ) |
GregCr | 0:deaafdfde3bb | 546 | { |
GregCr | 0:deaafdfde3bb | 547 | if( code == 0 ) |
GregCr | 0:deaafdfde3bb | 548 | { |
GregCr | 0:deaafdfde3bb | 549 | WriteRegister( addr, bytes, n ); |
GregCr | 0:deaafdfde3bb | 550 | } |
GregCr | 0:deaafdfde3bb | 551 | if( code == 1 ) |
GregCr | 0:deaafdfde3bb | 552 | { // end of file |
GregCr | 0:deaafdfde3bb | 553 | //return 2; |
GregCr | 0:deaafdfde3bb | 554 | } |
GregCr | 0:deaafdfde3bb | 555 | if( code == 2 ) |
GregCr | 0:deaafdfde3bb | 556 | { // begin of file |
GregCr | 0:deaafdfde3bb | 557 | //return 3; |
GregCr | 0:deaafdfde3bb | 558 | } |
GregCr | 0:deaafdfde3bb | 559 | } |
GregCr | 0:deaafdfde3bb | 560 | else |
GregCr | 0:deaafdfde3bb | 561 | { |
GregCr | 0:deaafdfde3bb | 562 | return 0; |
GregCr | 0:deaafdfde3bb | 563 | } |
GregCr | 0:deaafdfde3bb | 564 | return 1; |
GregCr | 0:deaafdfde3bb | 565 | } |
GregCr | 0:deaafdfde3bb | 566 | |
GregCr | 2:4ff11ea92fbe | 567 | int8_t SX126x::GetHexFileLineFields( char* line, uint8_t *bytes, uint16_t *addr, uint16_t *num, uint8_t *code ) |
GregCr | 0:deaafdfde3bb | 568 | { |
GregCr | 0:deaafdfde3bb | 569 | uint16_t sum, len, cksum; |
GregCr | 0:deaafdfde3bb | 570 | char *ptr; |
GregCr | 0:deaafdfde3bb | 571 | |
GregCr | 0:deaafdfde3bb | 572 | *num = 0; |
GregCr | 0:deaafdfde3bb | 573 | if( line[0] != ':' ) |
GregCr | 0:deaafdfde3bb | 574 | { |
GregCr | 0:deaafdfde3bb | 575 | return 0; |
GregCr | 0:deaafdfde3bb | 576 | } |
GregCr | 0:deaafdfde3bb | 577 | if( strlen( line ) < 11 ) |
GregCr | 0:deaafdfde3bb | 578 | { |
GregCr | 0:deaafdfde3bb | 579 | return 0; |
GregCr | 0:deaafdfde3bb | 580 | } |
GregCr | 0:deaafdfde3bb | 581 | ptr = line + 1; |
GregCr | 0:deaafdfde3bb | 582 | if( !sscanf( ptr, "%02hx", &len ) ) |
GregCr | 0:deaafdfde3bb | 583 | { |
GregCr | 0:deaafdfde3bb | 584 | return 0; |
GregCr | 0:deaafdfde3bb | 585 | } |
GregCr | 0:deaafdfde3bb | 586 | ptr += 2; |
GregCr | 0:deaafdfde3bb | 587 | if( strlen( line ) < ( 11 + ( len * 2 ) ) ) |
GregCr | 0:deaafdfde3bb | 588 | { |
GregCr | 0:deaafdfde3bb | 589 | return 0; |
GregCr | 0:deaafdfde3bb | 590 | } |
GregCr | 0:deaafdfde3bb | 591 | if( !sscanf( ptr, "%04hx", addr ) ) |
GregCr | 0:deaafdfde3bb | 592 | { |
GregCr | 0:deaafdfde3bb | 593 | return 0; |
GregCr | 0:deaafdfde3bb | 594 | } |
GregCr | 0:deaafdfde3bb | 595 | ptr += 4; |
GregCr | 0:deaafdfde3bb | 596 | if( !sscanf( ptr, "%02hhx", code ) ) |
GregCr | 0:deaafdfde3bb | 597 | { |
GregCr | 0:deaafdfde3bb | 598 | return 0; |
GregCr | 0:deaafdfde3bb | 599 | } |
GregCr | 0:deaafdfde3bb | 600 | ptr += 2; |
GregCr | 0:deaafdfde3bb | 601 | sum = ( len & 255 ) + ( ( *addr >> 8 ) & 255 ) + ( *addr & 255 ) + ( ( *code >> 8 ) & 255 ) + ( *code & 255 ); |
GregCr | 0:deaafdfde3bb | 602 | while( *num != len ) |
GregCr | 0:deaafdfde3bb | 603 | { |
GregCr | 0:deaafdfde3bb | 604 | if( !sscanf( ptr, "%02hhx", &bytes[*num] ) ) |
GregCr | 0:deaafdfde3bb | 605 | { |
GregCr | 0:deaafdfde3bb | 606 | return 0; |
GregCr | 0:deaafdfde3bb | 607 | } |
GregCr | 0:deaafdfde3bb | 608 | ptr += 2; |
GregCr | 0:deaafdfde3bb | 609 | sum += bytes[*num] & 255; |
GregCr | 0:deaafdfde3bb | 610 | ( *num )++; |
GregCr | 0:deaafdfde3bb | 611 | if( *num >= 256 ) |
GregCr | 0:deaafdfde3bb | 612 | { |
GregCr | 0:deaafdfde3bb | 613 | return 0; |
GregCr | 0:deaafdfde3bb | 614 | } |
GregCr | 0:deaafdfde3bb | 615 | } |
GregCr | 0:deaafdfde3bb | 616 | if( !sscanf( ptr, "%02hx", &cksum ) ) |
GregCr | 0:deaafdfde3bb | 617 | { |
GregCr | 0:deaafdfde3bb | 618 | return 0; |
GregCr | 0:deaafdfde3bb | 619 | } |
GregCr | 0:deaafdfde3bb | 620 | if( ( ( sum & 255 ) + ( cksum & 255 ) ) & 255 ) |
GregCr | 0:deaafdfde3bb | 621 | { |
GregCr | 0:deaafdfde3bb | 622 | return 0; // checksum error |
GregCr | 0:deaafdfde3bb | 623 | } |
GregCr | 0:deaafdfde3bb | 624 | |
GregCr | 0:deaafdfde3bb | 625 | return 1; |
GregCr | 0:deaafdfde3bb | 626 | } |
GregCr | 0:deaafdfde3bb | 627 | |
GregCr | 2:4ff11ea92fbe | 628 | void SX126x::OnDioIrq( void ) |
GregCr | 0:deaafdfde3bb | 629 | { |
GregCr | 0:deaafdfde3bb | 630 | if(onCustomDioIrq != NULL) |
GregCr | 0:deaafdfde3bb | 631 | { |
GregCr | 0:deaafdfde3bb | 632 | onCustomDioIrq(); |
GregCr | 0:deaafdfde3bb | 633 | return; |
GregCr | 0:deaafdfde3bb | 634 | } |
GregCr | 0:deaafdfde3bb | 635 | |
GregCr | 0:deaafdfde3bb | 636 | uint16_t irqRegs = GetIrqStatus( ); |
GregCr | 0:deaafdfde3bb | 637 | LastIrqs = irqRegs; |
GregCr | 0:deaafdfde3bb | 638 | ClearIrqStatus( IRQ_RADIO_ALL ); |
GregCr | 0:deaafdfde3bb | 639 | |
GregCr | 0:deaafdfde3bb | 640 | |
GregCr | 2:4ff11ea92fbe | 641 | #if( SX126x_DEBUG == 1 ) |
GregCr | 0:deaafdfde3bb | 642 | DigitalOut TEST_PIN_1( D14 ); |
GregCr | 0:deaafdfde3bb | 643 | DigitalOut TEST_PIN_2( D15 ); |
GregCr | 0:deaafdfde3bb | 644 | for( int i = 0x8000; i != 0; i >>= 1 ) |
GregCr | 0:deaafdfde3bb | 645 | { |
GregCr | 0:deaafdfde3bb | 646 | TEST_PIN_2 = 0; |
GregCr | 0:deaafdfde3bb | 647 | TEST_PIN_1 = ( ( irqRegs & i ) != 0 ) ? 1 : 0; |
GregCr | 0:deaafdfde3bb | 648 | TEST_PIN_2 = 1; |
GregCr | 0:deaafdfde3bb | 649 | } |
GregCr | 0:deaafdfde3bb | 650 | TEST_PIN_1 = 0; |
GregCr | 0:deaafdfde3bb | 651 | TEST_PIN_2 = 0; |
GregCr | 0:deaafdfde3bb | 652 | #endif |
GregCr | 0:deaafdfde3bb | 653 | |
GregCr | 0:deaafdfde3bb | 654 | |
GregCr | 0:deaafdfde3bb | 655 | //IRQ_TX_DONE = 0x0001, |
GregCr | 0:deaafdfde3bb | 656 | if( irqRegs & IRQ_TX_DONE ) |
GregCr | 0:deaafdfde3bb | 657 | { |
GregCr | 0:deaafdfde3bb | 658 | if( txDone != NULL ) |
GregCr | 0:deaafdfde3bb | 659 | { |
GregCr | 0:deaafdfde3bb | 660 | txDone( ); |
GregCr | 0:deaafdfde3bb | 661 | } |
GregCr | 0:deaafdfde3bb | 662 | } |
GregCr | 0:deaafdfde3bb | 663 | |
GregCr | 0:deaafdfde3bb | 664 | //IRQ_RX_DONE = 0x0002, |
GregCr | 0:deaafdfde3bb | 665 | if( irqRegs & IRQ_RX_DONE ) |
GregCr | 0:deaafdfde3bb | 666 | { |
GregCr | 0:deaafdfde3bb | 667 | if( rxDone != NULL ) |
GregCr | 0:deaafdfde3bb | 668 | { |
GregCr | 0:deaafdfde3bb | 669 | rxDone( ); |
GregCr | 0:deaafdfde3bb | 670 | } |
GregCr | 0:deaafdfde3bb | 671 | } |
GregCr | 0:deaafdfde3bb | 672 | |
GregCr | 0:deaafdfde3bb | 673 | //IRQ_PREAMBLE_DETECTED = 0x0004, |
GregCr | 0:deaafdfde3bb | 674 | if( irqRegs & IRQ_PREAMBLE_DETECTED ) |
GregCr | 0:deaafdfde3bb | 675 | { |
GregCr | 0:deaafdfde3bb | 676 | if( rxPblSyncWordHeader != NULL ) |
GregCr | 0:deaafdfde3bb | 677 | { |
GregCr | 0:deaafdfde3bb | 678 | rxPblSyncWordHeader( IRQ_PBL_DETECT_CODE); |
GregCr | 0:deaafdfde3bb | 679 | } |
GregCr | 0:deaafdfde3bb | 680 | } |
GregCr | 0:deaafdfde3bb | 681 | |
GregCr | 0:deaafdfde3bb | 682 | //IRQ_SYNCWORD_VALID = 0x0008, |
GregCr | 0:deaafdfde3bb | 683 | if( irqRegs & IRQ_SYNCWORD_VALID ) |
GregCr | 0:deaafdfde3bb | 684 | { |
GregCr | 0:deaafdfde3bb | 685 | if( rxPblSyncWordHeader != NULL ) |
GregCr | 0:deaafdfde3bb | 686 | { |
GregCr | 0:deaafdfde3bb | 687 | rxPblSyncWordHeader( IRQ_SYNCWORD_VALID_CODE ); |
GregCr | 0:deaafdfde3bb | 688 | } |
GregCr | 0:deaafdfde3bb | 689 | } |
GregCr | 0:deaafdfde3bb | 690 | |
GregCr | 0:deaafdfde3bb | 691 | //IRQ_HEADER_VALID = 0x0010, |
GregCr | 0:deaafdfde3bb | 692 | if ( irqRegs & IRQ_HEADER_VALID ) |
GregCr | 0:deaafdfde3bb | 693 | { |
GregCr | 0:deaafdfde3bb | 694 | if( rxPblSyncWordHeader != NULL ) |
GregCr | 0:deaafdfde3bb | 695 | { |
GregCr | 0:deaafdfde3bb | 696 | rxPblSyncWordHeader( IRQ_hEADER_VALID_CODE ); |
GregCr | 0:deaafdfde3bb | 697 | } |
GregCr | 0:deaafdfde3bb | 698 | } |
GregCr | 0:deaafdfde3bb | 699 | |
GregCr | 0:deaafdfde3bb | 700 | //IRQ_HEADER_ERROR = 0x0020, |
GregCr | 0:deaafdfde3bb | 701 | if( irqRegs & IRQ_HEADER_ERROR ) |
GregCr | 0:deaafdfde3bb | 702 | { |
GregCr | 0:deaafdfde3bb | 703 | if( rxError != NULL ) |
GregCr | 0:deaafdfde3bb | 704 | { |
GregCr | 0:deaafdfde3bb | 705 | rxError( IRQ_HEADER_ERROR_CODE ); |
GregCr | 0:deaafdfde3bb | 706 | } |
GregCr | 0:deaafdfde3bb | 707 | } |
GregCr | 0:deaafdfde3bb | 708 | |
GregCr | 0:deaafdfde3bb | 709 | //IRQ_GFSK_ERROR = 0x0040, |
GregCr | 0:deaafdfde3bb | 710 | //IRQ_LORA_CRC_ERROR = 0x0040, //shared with IRQ_GFSK_ERROR |
GregCr | 0:deaafdfde3bb | 711 | if( irqRegs & IRQ_GFSK_ERROR ) // same as IRQ_LORA_CRC_ERROR |
GregCr | 0:deaafdfde3bb | 712 | { |
GregCr | 0:deaafdfde3bb | 713 | if( rxError != NULL ) |
GregCr | 0:deaafdfde3bb | 714 | { |
GregCr | 0:deaafdfde3bb | 715 | rxError( IRQ_GFSK_ERROR_CODE ); |
GregCr | 0:deaafdfde3bb | 716 | } |
GregCr | 0:deaafdfde3bb | 717 | } |
GregCr | 0:deaafdfde3bb | 718 | |
GregCr | 0:deaafdfde3bb | 719 | //IRQ_CAD_DONE = 0x0080, |
GregCr | 0:deaafdfde3bb | 720 | //IRQ_CAD_ACTIVITY_DETECTED = 0x0100, |
GregCr | 0:deaafdfde3bb | 721 | if( irqRegs & IRQ_CAD_DONE ) |
GregCr | 0:deaafdfde3bb | 722 | { |
GregCr | 0:deaafdfde3bb | 723 | bool detected = ( ( irqRegs & IRQ_CAD_ACTIVITY_DETECTED ) == IRQ_CAD_ACTIVITY_DETECTED ); |
GregCr | 0:deaafdfde3bb | 724 | |
GregCr | 0:deaafdfde3bb | 725 | if( cadDone != NULL ) |
GregCr | 0:deaafdfde3bb | 726 | { |
GregCr | 0:deaafdfde3bb | 727 | cadDone( detected ); |
GregCr | 0:deaafdfde3bb | 728 | } |
GregCr | 0:deaafdfde3bb | 729 | |
GregCr | 0:deaafdfde3bb | 730 | } |
GregCr | 0:deaafdfde3bb | 731 | |
GregCr | 0:deaafdfde3bb | 732 | //IRQ_RX_TX_TIMEOUT = 0x0200, |
GregCr | 0:deaafdfde3bb | 733 | if( ( irqRegs & IRQ_RX_TX_TIMEOUT ) == IRQ_RX_TX_TIMEOUT ) |
GregCr | 0:deaafdfde3bb | 734 | { |
GregCr | 0:deaafdfde3bb | 735 | if( rxTxTimeout != NULL ) |
GregCr | 0:deaafdfde3bb | 736 | { |
GregCr | 0:deaafdfde3bb | 737 | rxTxTimeout( ); |
GregCr | 0:deaafdfde3bb | 738 | } |
GregCr | 0:deaafdfde3bb | 739 | } |
GregCr | 0:deaafdfde3bb | 740 | |
GregCr | 0:deaafdfde3bb | 741 | |
GregCr | 0:deaafdfde3bb | 742 | //IRQ_RANGING_SLAVE_REQUEST_VALID = 0x0400, |
GregCr | 0:deaafdfde3bb | 743 | if( irqRegs & IRQ_RANGING_SLAVE_REQUEST_VALID) |
GregCr | 0:deaafdfde3bb | 744 | { |
GregCr | 0:deaafdfde3bb | 745 | if( rangingDone != NULL ) |
GregCr | 0:deaafdfde3bb | 746 | { |
GregCr | 0:deaafdfde3bb | 747 | rangingDone( IRQ_RANGING_SLAVE_VALID_CODE ); |
GregCr | 0:deaafdfde3bb | 748 | } |
GregCr | 0:deaafdfde3bb | 749 | } |
GregCr | 0:deaafdfde3bb | 750 | |
GregCr | 0:deaafdfde3bb | 751 | //IRQ_RANGING_SLAVE_REQUEST_DISCARDED = 0x0800, |
GregCr | 0:deaafdfde3bb | 752 | if( irqRegs & IRQ_RANGING_SLAVE_REQUEST_DISCARDED ) |
GregCr | 0:deaafdfde3bb | 753 | { |
GregCr | 0:deaafdfde3bb | 754 | if( rangingDone != NULL ) |
GregCr | 0:deaafdfde3bb | 755 | { |
GregCr | 0:deaafdfde3bb | 756 | rangingDone( IRQ_RANGING_SLAVE_ERROR_CODE ); |
GregCr | 0:deaafdfde3bb | 757 | } |
GregCr | 0:deaafdfde3bb | 758 | } |
GregCr | 0:deaafdfde3bb | 759 | |
GregCr | 0:deaafdfde3bb | 760 | //IRQ_RANGING_SLAVE_RESPONSE_DONE = 0x1000, |
GregCr | 0:deaafdfde3bb | 761 | if( irqRegs & IRQ_RANGING_SLAVE_RESPONSE_DONE ) |
GregCr | 0:deaafdfde3bb | 762 | { |
GregCr | 0:deaafdfde3bb | 763 | if( rangingDone != NULL ) |
GregCr | 0:deaafdfde3bb | 764 | { |
GregCr | 0:deaafdfde3bb | 765 | rangingDone( IRQ_RANGING_SLAVE_RESPONSE_DONE_CODE ); |
GregCr | 0:deaafdfde3bb | 766 | } |
GregCr | 0:deaafdfde3bb | 767 | } |
GregCr | 0:deaafdfde3bb | 768 | |
GregCr | 0:deaafdfde3bb | 769 | //IRQ_RANGING_MASTER_RESULT_VALID = 0x2000, |
GregCr | 0:deaafdfde3bb | 770 | if( irqRegs & IRQ_RANGING_MASTER_RESULT_VALID ) |
GregCr | 0:deaafdfde3bb | 771 | { |
GregCr | 0:deaafdfde3bb | 772 | if( rangingDone != NULL ) |
GregCr | 0:deaafdfde3bb | 773 | { |
GregCr | 0:deaafdfde3bb | 774 | rangingDone( IRQ_RANGING_MASTER_VALID_CODE ); |
GregCr | 0:deaafdfde3bb | 775 | } |
GregCr | 0:deaafdfde3bb | 776 | } |
GregCr | 0:deaafdfde3bb | 777 | |
GregCr | 0:deaafdfde3bb | 778 | //IRQ_RANGING_MASTER_RESULT_TIMEOUT = 0x4000, |
GregCr | 0:deaafdfde3bb | 779 | if( irqRegs & IRQ_RANGING_MASTER_RESULT_TIMEOUT ) |
GregCr | 0:deaafdfde3bb | 780 | { |
GregCr | 0:deaafdfde3bb | 781 | if( rangingDone != NULL ) |
GregCr | 0:deaafdfde3bb | 782 | { |
GregCr | 0:deaafdfde3bb | 783 | rangingDone( IRQ_RANGING_MASTER_TIMEOUT_CODE ); |
GregCr | 0:deaafdfde3bb | 784 | } |
GregCr | 0:deaafdfde3bb | 785 | } |
GregCr | 0:deaafdfde3bb | 786 | |
GregCr | 0:deaafdfde3bb | 787 | |
GregCr | 0:deaafdfde3bb | 788 | } |
GregCr | 0:deaafdfde3bb | 789 | |
GregCr | 0:deaafdfde3bb | 790 | |
GregCr | 0:deaafdfde3bb | 791 |