Library to handle the X-NUCLEO-PLC01A1 Programmable Logic Controller Expansion Board based on the VNI8200XP (solid state relay) and CLT01-38SQ7 (octal digital termination array) components.
Dependents: HelloWorld_PLC01A1
Programmable Logic Controller Library
Library to handle the X-NUCLEO-PLC01A1 Programmable Logic Controller Expansion Board based on the VNI8200XP (solid state relay) and CLT01-38SQ7 (octal digital termination array) components.
Information
For further details on VNI8200XP (Octal high side smart power solid state relay with serial/parallel selectable interface on chip) please refer to ST's web site.
For further details on CLT01-38SQ7 (High speed digital input current limiter) please refer to ST's web site.
SPI configuration
Pin D3
and D13
providing the SPI serial clock are short-circuited in the X-NUCLEO-PLC01A1 Expansion Board.
Please be aware that you may not drive the base board LED if it is connected to pin D13
(as it happens on STM32 Nucleo boards) or D3
, otherwise you will get a conflict.
Platform compatibility
- STM32 NUCLEO boards have been tested with the default configuration provided by the HelloWorld_PLC01A1 example.
- FRDM-K64F board has been tested with the following patch:
return DSPI_HAL_ReadData(spi_address[obj->instance]);
X-NUCLEO-PLC01A1 board powering and startup
The following steps must be followed to run the X-NUCLEO-PLC01A1:
- Plug the X-NUCLEO-PLC01A1 onto a base board
- Connect the base board to a PC via a standard Type A / mini (or micro) B USB cable
- Download the firmware on the MCU hosted on the base board
- Supply 24 V to the X-NUCLEO-PLC01A1 board through the J8 connector
- The HelloWorld_PLC01A1 demonstration firmware is ready to run: connect any of the 8 inputs on the J8 connector to see the corresponding output on the J10 connector capable of driving a load (i.e. short-circuit input “x” with the 24 V and connect the corresponding output “x” to a load).
BSP/x_nucleo_plc01a1_config.h@7:5d4336d0e372, 2021-07-12 (annotated)
- Committer:
- apalmieri
- Date:
- Mon Jul 12 10:09:44 2021 +0000
- Revision:
- 7:5d4336d0e372
- Parent:
- 6:de3fc5f5f065
Update to mbed-os 6 (mbed-os-6.12.0)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Davidroid | 6:de3fc5f5f065 | 1 | /** |
Davidroid | 6:de3fc5f5f065 | 2 | ****************************************************************************** |
Davidroid | 6:de3fc5f5f065 | 3 | * @file x_nucleo_plc01a1_config.h |
Davidroid | 6:de3fc5f5f065 | 4 | * @author AST / Software Platforms and Cloud |
Davidroid | 6:de3fc5f5f065 | 5 | * @version V1.0 |
Davidroid | 6:de3fc5f5f065 | 6 | * @date November 3rd, 2015 |
Davidroid | 6:de3fc5f5f065 | 7 | * @brief Configuration header file for the X_NUCLEO_PLC01A1 expansion board. |
Davidroid | 6:de3fc5f5f065 | 8 | ****************************************************************************** |
Davidroid | 6:de3fc5f5f065 | 9 | * @attention |
Davidroid | 6:de3fc5f5f065 | 10 | * |
Davidroid | 6:de3fc5f5f065 | 11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
Davidroid | 6:de3fc5f5f065 | 12 | * |
Davidroid | 6:de3fc5f5f065 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
Davidroid | 6:de3fc5f5f065 | 14 | * are permitted provided that the following conditions are met: |
Davidroid | 6:de3fc5f5f065 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
Davidroid | 6:de3fc5f5f065 | 16 | * this list of conditions and the following disclaimer. |
Davidroid | 6:de3fc5f5f065 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
Davidroid | 6:de3fc5f5f065 | 18 | * this list of conditions and the following disclaimer in the documentation |
Davidroid | 6:de3fc5f5f065 | 19 | * and/or other materials provided with the distribution. |
Davidroid | 6:de3fc5f5f065 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
Davidroid | 6:de3fc5f5f065 | 21 | * may be used to endorse or promote products derived from this software |
Davidroid | 6:de3fc5f5f065 | 22 | * without specific prior written permission. |
Davidroid | 6:de3fc5f5f065 | 23 | * |
Davidroid | 6:de3fc5f5f065 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
Davidroid | 6:de3fc5f5f065 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
Davidroid | 6:de3fc5f5f065 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
Davidroid | 6:de3fc5f5f065 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
Davidroid | 6:de3fc5f5f065 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
Davidroid | 6:de3fc5f5f065 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
Davidroid | 6:de3fc5f5f065 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
Davidroid | 6:de3fc5f5f065 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
Davidroid | 6:de3fc5f5f065 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
Davidroid | 6:de3fc5f5f065 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Davidroid | 6:de3fc5f5f065 | 34 | * |
Davidroid | 6:de3fc5f5f065 | 35 | ****************************************************************************** |
Davidroid | 6:de3fc5f5f065 | 36 | */ |
Davidroid | 6:de3fc5f5f065 | 37 | |
Davidroid | 6:de3fc5f5f065 | 38 | |
Davidroid | 6:de3fc5f5f065 | 39 | /* Generated with STM32CubeTOO -----------------------------------------------*/ |
Davidroid | 6:de3fc5f5f065 | 40 | |
Davidroid | 6:de3fc5f5f065 | 41 | |
Davidroid | 6:de3fc5f5f065 | 42 | /* Define to prevent recursive inclusion -------------------------------------*/ |
Davidroid | 6:de3fc5f5f065 | 43 | |
Davidroid | 6:de3fc5f5f065 | 44 | #ifndef __X_NUCLEO_PLC01A1_CONFIG_H |
Davidroid | 6:de3fc5f5f065 | 45 | #define __X_NUCLEO_PLC01A1_CONFIG_H |
Davidroid | 6:de3fc5f5f065 | 46 | |
Davidroid | 6:de3fc5f5f065 | 47 | |
Davidroid | 6:de3fc5f5f065 | 48 | /* Definitions ---------------------------------------------------------------*/ |
Davidroid | 6:de3fc5f5f065 | 49 | |
Davidroid | 6:de3fc5f5f065 | 50 | /* ACTION --------------------------------------------------------------------* |
Davidroid | 6:de3fc5f5f065 | 51 | * Specify here a configuration for I/O and interrupts' pins. * |
Davidroid | 6:de3fc5f5f065 | 52 | * * |
Davidroid | 6:de3fc5f5f065 | 53 | * Example: * |
Davidroid | 6:de3fc5f5f065 | 54 | * // I2C. * |
Davidroid | 6:de3fc5f5f065 | 55 | * #define EXPANSION_BOARD_PIN_I2C_SCL (D15) * |
Davidroid | 6:de3fc5f5f065 | 56 | * #define EXPANSION_BOARD_PIN_I2C_SDA (D14) * |
Davidroid | 6:de3fc5f5f065 | 57 | * * |
Davidroid | 6:de3fc5f5f065 | 58 | * // SPI. * |
Davidroid | 6:de3fc5f5f065 | 59 | * #define EXPANSION_BOARD_PIN_SPI_MOSI (D11) * |
Davidroid | 6:de3fc5f5f065 | 60 | * #define EXPANSION_BOARD_PIN_SPI_MISO (D12) * |
Davidroid | 6:de3fc5f5f065 | 61 | * #define EXPANSION_BOARD_PIN_SPI_SCLK (D13) * |
Davidroid | 6:de3fc5f5f065 | 62 | * * |
Davidroid | 6:de3fc5f5f065 | 63 | * // Interrupts. * |
Davidroid | 6:de3fc5f5f065 | 64 | * #define EXPANSION_BOARD_PIN_INT_1 (A2) * |
Davidroid | 6:de3fc5f5f065 | 65 | *----------------------------------------------------------------------------*/ |
Davidroid | 6:de3fc5f5f065 | 66 | /* I2C. */ |
Davidroid | 6:de3fc5f5f065 | 67 | #define X_NUCLEO_PLC01A1_PIN_I2C_SCL (D15) |
Davidroid | 6:de3fc5f5f065 | 68 | #define X_NUCLEO_PLC01A1_PIN_I2C_SDA (D14) |
Davidroid | 6:de3fc5f5f065 | 69 | |
Davidroid | 6:de3fc5f5f065 | 70 | /* Output channels enable pin. */ |
Davidroid | 6:de3fc5f5f065 | 71 | #define X_NUCLEO_PLC01A1_PIN_OUT_EN (D6) |
Davidroid | 6:de3fc5f5f065 | 72 | |
Davidroid | 6:de3fc5f5f065 | 73 | /* SPI. */ |
Davidroid | 6:de3fc5f5f065 | 74 | #define X_NUCLEO_PLC01A1_PIN_SPI_CS1 (D9) |
Davidroid | 6:de3fc5f5f065 | 75 | #define X_NUCLEO_PLC01A1_PIN_SPI_CS2 (D10) |
Davidroid | 6:de3fc5f5f065 | 76 | |
Davidroid | 6:de3fc5f5f065 | 77 | #define X_NUCLEO_PLC01A1_PIN_SPI_MOSI (D11) |
Davidroid | 6:de3fc5f5f065 | 78 | #define X_NUCLEO_PLC01A1_PIN_SPI_MISO (D12) |
Davidroid | 6:de3fc5f5f065 | 79 | #define X_NUCLEO_PLC01A1_PIN_SPI_SCLK (D13) |
Davidroid | 6:de3fc5f5f065 | 80 | |
Davidroid | 6:de3fc5f5f065 | 81 | #define X_NUCLEO_PLC01A1_PIN_SPI_BITS (16) |
Davidroid | 6:de3fc5f5f065 | 82 | |
Davidroid | 6:de3fc5f5f065 | 83 | /* Interrupts. */ |
Davidroid | 6:de3fc5f5f065 | 84 | #define X_NUCLEO_PLC01A1_PIN_INT_1 (A2) |
Davidroid | 6:de3fc5f5f065 | 85 | |
Davidroid | 6:de3fc5f5f065 | 86 | /* Maximum number of mounted "X-NUCLEO-PLC01A1" Expansion Boards. */ |
Davidroid | 6:de3fc5f5f065 | 87 | #define EXPBRD_MOUNTED_NR_MAX (4) |
Davidroid | 6:de3fc5f5f065 | 88 | |
Davidroid | 6:de3fc5f5f065 | 89 | #endif /* __X_NUCLEO_PLC01A1_CONFIG_H */ |