Class used to drive the IS42S16400J SDRAM memory mounted on STM32F429I-Discovery board.

Dependents:   DISCO-F429ZI_Gauge DISCO-F429ZI_SDRAM_demo WIRE-BANDING_FT810 WIRE-BANDING_copy

Committer:
Jerome Coutant
Date:
Wed May 17 12:53:57 2017 +0200
Revision:
1:d0070c48e1b9
Parent:
0:0a443e2fe92c
DISCO-F429ZI BSP update with Cube V1.16.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bcostm 0:0a443e2fe92c 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
bcostm 0:0a443e2fe92c 2 *
bcostm 0:0a443e2fe92c 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
bcostm 0:0a443e2fe92c 4 * and associated documentation files (the "Software"), to deal in the Software without
bcostm 0:0a443e2fe92c 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
bcostm 0:0a443e2fe92c 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
bcostm 0:0a443e2fe92c 7 * Software is furnished to do so, subject to the following conditions:
bcostm 0:0a443e2fe92c 8 *
bcostm 0:0a443e2fe92c 9 * The above copyright notice and this permission notice shall be included in all copies or
bcostm 0:0a443e2fe92c 10 * substantial portions of the Software.
bcostm 0:0a443e2fe92c 11 *
bcostm 0:0a443e2fe92c 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
bcostm 0:0a443e2fe92c 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
bcostm 0:0a443e2fe92c 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
bcostm 0:0a443e2fe92c 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
bcostm 0:0a443e2fe92c 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
bcostm 0:0a443e2fe92c 17 */
bcostm 0:0a443e2fe92c 18
bcostm 0:0a443e2fe92c 19 #ifndef __SDRAM_DISCO_F429ZI_H
bcostm 0:0a443e2fe92c 20 #define __SDRAM_DISCO_F429ZI_H
bcostm 0:0a443e2fe92c 21
bcostm 0:0a443e2fe92c 22 #ifdef TARGET_DISCO_F429ZI
bcostm 0:0a443e2fe92c 23
bcostm 0:0a443e2fe92c 24 #include "mbed.h"
bcostm 0:0a443e2fe92c 25 #include "stm32f429i_discovery_sdram.h"
bcostm 0:0a443e2fe92c 26
bcostm 0:0a443e2fe92c 27 /*
bcostm 0:0a443e2fe92c 28 Class used to drive the IS42S16400J SDRAM memory mounted on STM32F429I-Discovery board.
bcostm 0:0a443e2fe92c 29
bcostm 0:0a443e2fe92c 30 Usage:
bcostm 0:0a443e2fe92c 31
bcostm 0:0a443e2fe92c 32 #include "mbed.h"
bcostm 0:0a443e2fe92c 33 #include "SDRAM_DISCO_F429ZI.h"
bcostm 0:0a443e2fe92c 34
bcostm 0:0a443e2fe92c 35 SDRAM_DISCO_F429ZI sdram;
bcostm 0:0a443e2fe92c 36
bcostm 0:0a443e2fe92c 37 #define BUFFER_SIZE ((uint32_t)0x0100)
bcostm 0:0a443e2fe92c 38 #define WRITE_READ_ADDR ((uint32_t)0x0800)
bcostm 0:0a443e2fe92c 39
bcostm 0:0a443e2fe92c 40 int main()
bcostm 0:0a443e2fe92c 41 {
bcostm 0:0a443e2fe92c 42 uint32_t WriteBuffer[BUFFER_SIZE];
bcostm 0:0a443e2fe92c 43
bcostm 0:0a443e2fe92c 44 // Fill buffer...
bcostm 0:0a443e2fe92c 45
bcostm 0:0a443e2fe92c 46 // Write buffer
bcostm 0:0a443e2fe92c 47 sdram.WriteData(SDRAM_DEVICE_ADDR + WRITE_READ_ADDR, WriteBuffer, BUFFER_SIZE);
bcostm 0:0a443e2fe92c 48
bcostm 0:0a443e2fe92c 49 while(1)
bcostm 0:0a443e2fe92c 50 {
bcostm 0:0a443e2fe92c 51 }
bcostm 0:0a443e2fe92c 52 }
bcostm 0:0a443e2fe92c 53
bcostm 0:0a443e2fe92c 54 */
bcostm 0:0a443e2fe92c 55 class SDRAM_DISCO_F429ZI
bcostm 0:0a443e2fe92c 56 {
bcostm 0:0a443e2fe92c 57
bcostm 0:0a443e2fe92c 58 public:
bcostm 0:0a443e2fe92c 59 //! Constructor
bcostm 0:0a443e2fe92c 60 SDRAM_DISCO_F429ZI();
bcostm 0:0a443e2fe92c 61
bcostm 0:0a443e2fe92c 62 //! Destructor
bcostm 0:0a443e2fe92c 63 ~SDRAM_DISCO_F429ZI();
bcostm 0:0a443e2fe92c 64
bcostm 0:0a443e2fe92c 65 /**
bcostm 0:0a443e2fe92c 66 * @brief Initializes the SDRAM device.
bcostm 0:0a443e2fe92c 67 * @param None
bcostm 0:0a443e2fe92c 68 * @retval None
bcostm 0:0a443e2fe92c 69 */
bcostm 0:0a443e2fe92c 70 void Init(void);
bcostm 0:0a443e2fe92c 71
bcostm 0:0a443e2fe92c 72 /**
bcostm 0:0a443e2fe92c 73 * @brief Programs the SDRAM device.
bcostm 0:0a443e2fe92c 74 * @param RefreshCount: SDRAM refresh counter value
bcostm 0:0a443e2fe92c 75 * @retval None
bcostm 0:0a443e2fe92c 76 */
bcostm 0:0a443e2fe92c 77 void Initialization_sequence(uint32_t RefreshCount);
bcostm 0:0a443e2fe92c 78
bcostm 0:0a443e2fe92c 79 /**
bcostm 0:0a443e2fe92c 80 * @brief Reads an mount of data from the SDRAM memory in polling mode.
bcostm 0:0a443e2fe92c 81 * @param uwStartAddress : Read start address
bcostm 0:0a443e2fe92c 82 * @param pData : Pointer to data to be read
bcostm 0:0a443e2fe92c 83 * @param uwDataSize: Size of read data from the memory
bcostm 0:0a443e2fe92c 84 * @retval None
bcostm 0:0a443e2fe92c 85 */
bcostm 0:0a443e2fe92c 86 void ReadData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);
bcostm 0:0a443e2fe92c 87
bcostm 0:0a443e2fe92c 88 /**
bcostm 0:0a443e2fe92c 89 * @brief Reads an mount of data from the SDRAM memory in DMA mode.
bcostm 0:0a443e2fe92c 90 * @param uwStartAddress : Read start address
bcostm 0:0a443e2fe92c 91 * @param pData : Pointer to data to be read
bcostm 0:0a443e2fe92c 92 * @param uwDataSize: Size of read data from the memory
bcostm 0:0a443e2fe92c 93 * @retval None
bcostm 0:0a443e2fe92c 94 */
bcostm 0:0a443e2fe92c 95 void ReadData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);
bcostm 0:0a443e2fe92c 96
bcostm 0:0a443e2fe92c 97 /**
bcostm 0:0a443e2fe92c 98 * @brief Writes an mount of data to the SDRAM memory in polling mode.
bcostm 0:0a443e2fe92c 99 * @param uwStartAddress : Write start address
bcostm 0:0a443e2fe92c 100 * @param pData : Pointer to data to be written
bcostm 0:0a443e2fe92c 101 * @param uwDataSize: Size of written data from the memory
bcostm 0:0a443e2fe92c 102 * @retval None
bcostm 0:0a443e2fe92c 103 */
bcostm 0:0a443e2fe92c 104 void WriteData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);
bcostm 0:0a443e2fe92c 105
bcostm 0:0a443e2fe92c 106 /**
bcostm 0:0a443e2fe92c 107 * @brief Writes an mount of data to the SDRAM memory in DMA mode.
bcostm 0:0a443e2fe92c 108 * @param uwStartAddress : Write start address
bcostm 0:0a443e2fe92c 109 * @param pData : Pointer to data to be written
bcostm 0:0a443e2fe92c 110 * @param uwDataSize: Size of written data from the memory
bcostm 0:0a443e2fe92c 111 * @retval None
bcostm 0:0a443e2fe92c 112 */
bcostm 0:0a443e2fe92c 113 void WriteData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);
bcostm 0:0a443e2fe92c 114
bcostm 0:0a443e2fe92c 115 /**
bcostm 0:0a443e2fe92c 116 * @brief Sends command to the SDRAM bank.
bcostm 0:0a443e2fe92c 117 * @param SdramCmd: Pointer to SDRAM command structure
bcostm 0:0a443e2fe92c 118 * @retval HAL status
bcostm 0:0a443e2fe92c 119 */
Jerome Coutant 1:d0070c48e1b9 120 uint8_t Sendcmd(FMC_SDRAM_CommandTypeDef *SdramCmd);
bcostm 0:0a443e2fe92c 121
bcostm 0:0a443e2fe92c 122 private:
bcostm 0:0a443e2fe92c 123
bcostm 0:0a443e2fe92c 124 };
bcostm 0:0a443e2fe92c 125
bcostm 0:0a443e2fe92c 126 #else
bcostm 0:0a443e2fe92c 127 #error "This class must be used with DISCO_F429ZI board only."
bcostm 0:0a443e2fe92c 128 #endif // TARGET_DISCO_F429ZI
bcostm 0:0a443e2fe92c 129
bcostm 0:0a443e2fe92c 130 #endif