ST / LIS2MDL

3-axis MEMS ultra low power magnetometer

Dependencies:   X_NUCLEO_COMMON ST_INTERFACES

Dependents:   X_NUCLEO_IKS01A3 X_NUCLEO_IKS01A3

LIS2MDLSensor.h@0:671edf39d961, 2019-03-05 (annotated)

Committer:
cparata
Date:
Tue Mar 05 18:06:37 2019 +0000
Revision:
0:671edf39d961
Child:
1:8562ae1a0534
First version of LIS2MDL library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
cparata 0:671edf39d961 1 /**
cparata 0:671edf39d961 2 ******************************************************************************
cparata 0:671edf39d961 3 * @file LIS2MDLSensor.h
cparata 0:671edf39d961 4 * @author SRA
cparata 0:671edf39d961 5 * @version V1.0.0
cparata 0:671edf39d961 6 * @date February 2019
cparata 0:671edf39d961 7 * @brief Abstract Class of an LIS2MDL 3 axes magnetometer sensor.
cparata 0:671edf39d961 8 ******************************************************************************
cparata 0:671edf39d961 9 * @attention
cparata 0:671edf39d961 10 *
cparata 0:671edf39d961 11 * <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
cparata 0:671edf39d961 12 *
cparata 0:671edf39d961 13 * Redistribution and use in source and binary forms, with or without modification,
cparata 0:671edf39d961 14 * are permitted provided that the following conditions are met:
cparata 0:671edf39d961 15 * 1. Redistributions of source code must retain the above copyright notice,
cparata 0:671edf39d961 16 * this list of conditions and the following disclaimer.
cparata 0:671edf39d961 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
cparata 0:671edf39d961 18 * this list of conditions and the following disclaimer in the documentation
cparata 0:671edf39d961 19 * and/or other materials provided with the distribution.
cparata 0:671edf39d961 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
cparata 0:671edf39d961 21 * may be used to endorse or promote products derived from this software
cparata 0:671edf39d961 22 * without specific prior written permission.
cparata 0:671edf39d961 23 *
cparata 0:671edf39d961 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
cparata 0:671edf39d961 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
cparata 0:671edf39d961 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
cparata 0:671edf39d961 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
cparata 0:671edf39d961 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
cparata 0:671edf39d961 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
cparata 0:671edf39d961 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
cparata 0:671edf39d961 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
cparata 0:671edf39d961 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
cparata 0:671edf39d961 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
cparata 0:671edf39d961 34 *
cparata 0:671edf39d961 35 ******************************************************************************
cparata 0:671edf39d961 36 */
cparata 0:671edf39d961 37
cparata 0:671edf39d961 38
cparata 0:671edf39d961 39 /* Prevent recursive inclusion -----------------------------------------------*/
cparata 0:671edf39d961 40
cparata 0:671edf39d961 41 #ifndef __LIS2MDLSensor_H__
cparata 0:671edf39d961 42 #define __LIS2MDLSensor_H__
cparata 0:671edf39d961 43
cparata 0:671edf39d961 44
cparata 0:671edf39d961 45 /* Includes ------------------------------------------------------------------*/
cparata 0:671edf39d961 46
cparata 0:671edf39d961 47 #include "DevI2C.h"
cparata 0:671edf39d961 48 #include "lis2mdl_reg.h"
cparata 0:671edf39d961 49 #include "MagneticSensor.h"
cparata 0:671edf39d961 50 #include <assert.h>
cparata 0:671edf39d961 51
cparata 0:671edf39d961 52 /* Defines -------------------------------------------------------------------*/
cparata 0:671edf39d961 53
cparata 0:671edf39d961 54
cparata 0:671edf39d961 55 #define LIS2MDL_MAG_SENSITIVITY_FS_50GAUSS 1.500f /**< Sensitivity value for 50 gauss full scale [mgauss/LSB] */
cparata 0:671edf39d961 56
cparata 0:671edf39d961 57 /* Typedefs ------------------------------------------------------------------*/
cparata 0:671edf39d961 58
cparata 0:671edf39d961 59 typedef struct
cparata 0:671edf39d961 60 {
cparata 0:671edf39d961 61 int16_t x;
cparata 0:671edf39d961 62 int16_t y;
cparata 0:671edf39d961 63 int16_t z;
cparata 0:671edf39d961 64 } LIS2MDL_AxesRaw_t;
cparata 0:671edf39d961 65
cparata 0:671edf39d961 66 typedef struct
cparata 0:671edf39d961 67 {
cparata 0:671edf39d961 68 int32_t x;
cparata 0:671edf39d961 69 int32_t y;
cparata 0:671edf39d961 70 int32_t z;
cparata 0:671edf39d961 71 } LIS2MDL_Axes_t;
cparata 0:671edf39d961 72
cparata 0:671edf39d961 73
cparata 0:671edf39d961 74 /* Class Declaration ---------------------------------------------------------*/
cparata 0:671edf39d961 75
cparata 0:671edf39d961 76 /**
cparata 0:671edf39d961 77 * Abstract class of an LIS2MDL Inertial Measurement Unit (IMU) 3 axes
cparata 0:671edf39d961 78 * sensor.
cparata 0:671edf39d961 79 */
cparata 0:671edf39d961 80 class LIS2MDLSensor : public MagneticSensor
cparata 0:671edf39d961 81 {
cparata 0:671edf39d961 82 public:
cparata 0:671edf39d961 83 enum SPI_type_t {SPI3W, SPI4W};
cparata 0:671edf39d961 84 LIS2MDLSensor(SPI *spi, PinName cs_pin, PinName int_pin=NC, SPI_type_t spi_type=SPI4W);
cparata 0:671edf39d961 85 LIS2MDLSensor(DevI2C *i2c, uint8_t address=LIS2MDL_I2C_ADD, PinName int_pin=NC);
cparata 0:671edf39d961 86 virtual int init(void *init);
cparata 0:671edf39d961 87 virtual int read_id(uint8_t *id);
cparata 0:671edf39d961 88 virtual int get_m_axes(int32_t *magnetic_field);
cparata 0:671edf39d961 89 virtual int get_m_axes_raw(int16_t *value);
cparata 0:671edf39d961 90 int enable(void);
cparata 0:671edf39d961 91 int disable(void);
cparata 0:671edf39d961 92 int get_m_sensitivity(float *sensitivity);
cparata 0:671edf39d961 93 int get_m_odr(float *odr);
cparata 0:671edf39d961 94 int set_m_odr(float odr);
cparata 0:671edf39d961 95 int get_m_fs(float *full_scale);
cparata 0:671edf39d961 96 int set_m_fs(float full_scale);
cparata 0:671edf39d961 97 int read_reg(uint8_t reg, uint8_t *data);
cparata 0:671edf39d961 98 int write_reg(uint8_t reg, uint8_t data);
cparata 0:671edf39d961 99 int set_m_self_test(uint8_t status);
cparata 0:671edf39d961 100 int get_m_drdy_status(uint8_t *status);
cparata 0:671edf39d961 101
cparata 0:671edf39d961 102 /**
cparata 0:671edf39d961 103 * @brief Attaching an interrupt handler to the INT interrupt.
cparata 0:671edf39d961 104 * @param fptr An interrupt handler.
cparata 0:671edf39d961 105 * @retval None.
cparata 0:671edf39d961 106 */
cparata 0:671edf39d961 107 void attach_int_irq(void (*fptr)(void))
cparata 0:671edf39d961 108 {
cparata 0:671edf39d961 109 _int_irq.rise(fptr);
cparata 0:671edf39d961 110 }
cparata 0:671edf39d961 111
cparata 0:671edf39d961 112 /**
cparata 0:671edf39d961 113 * @brief Enabling the INT interrupt handling.
cparata 0:671edf39d961 114 * @param None.
cparata 0:671edf39d961 115 * @retval None.
cparata 0:671edf39d961 116 */
cparata 0:671edf39d961 117 void enable_int_irq(void)
cparata 0:671edf39d961 118 {
cparata 0:671edf39d961 119 _int_irq.enable_irq();
cparata 0:671edf39d961 120 }
cparata 0:671edf39d961 121
cparata 0:671edf39d961 122 /**
cparata 0:671edf39d961 123 * @brief Disabling the INT interrupt handling.
cparata 0:671edf39d961 124 * @param None.
cparata 0:671edf39d961 125 * @retval None.
cparata 0:671edf39d961 126 */
cparata 0:671edf39d961 127 void disable_int_irq(void)
cparata 0:671edf39d961 128 {
cparata 0:671edf39d961 129 _int_irq.disable_irq();
cparata 0:671edf39d961 130 }
cparata 0:671edf39d961 131
cparata 0:671edf39d961 132 /**
cparata 0:671edf39d961 133 * @brief Utility function to read data.
cparata 0:671edf39d961 134 * @param pBuffer: pointer to data to be read.
cparata 0:671edf39d961 135 * @param RegisterAddr: specifies internal address register to be read.
cparata 0:671edf39d961 136 * @param NumByteToRead: number of bytes to be read.
cparata 0:671edf39d961 137 * @retval 0 if ok, an error code otherwise.
cparata 0:671edf39d961 138 */
cparata 0:671edf39d961 139 uint8_t io_read(uint8_t* pBuffer, uint8_t RegisterAddr, uint16_t NumByteToRead)
cparata 0:671edf39d961 140 {
cparata 0:671edf39d961 141 if (_dev_spi) {
cparata 0:671edf39d961 142 /* Write Reg Address */
cparata 0:671edf39d961 143 _dev_spi->lock();
cparata 0:671edf39d961 144 _cs_pin = 0;
cparata 0:671edf39d961 145 if (_spi_type == SPI4W) {
cparata 0:671edf39d961 146 _dev_spi->write(RegisterAddr | 0x80);
cparata 0:671edf39d961 147 for (int i=0; i<NumByteToRead; i++) {
cparata 0:671edf39d961 148 *(pBuffer+i) = _dev_spi->write(0x00);
cparata 0:671edf39d961 149 }
cparata 0:671edf39d961 150 } else if (_spi_type == SPI3W){
cparata 0:671edf39d961 151 /* Write RD Reg Address with RD bit*/
cparata 0:671edf39d961 152 uint8_t TxByte = RegisterAddr | 0x80;
cparata 0:671edf39d961 153 _dev_spi->write((char *)&TxByte, 1, (char *)pBuffer, (int) NumByteToRead);
cparata 0:671edf39d961 154 }
cparata 0:671edf39d961 155 _cs_pin = 1;
cparata 0:671edf39d961 156 _dev_spi->unlock();
cparata 0:671edf39d961 157 return 0;
cparata 0:671edf39d961 158 }
cparata 0:671edf39d961 159 if (_dev_i2c) return (uint8_t) _dev_i2c->i2c_read(pBuffer, _address, RegisterAddr, NumByteToRead);
cparata 0:671edf39d961 160 return 1;
cparata 0:671edf39d961 161 }
cparata 0:671edf39d961 162
cparata 0:671edf39d961 163 /**
cparata 0:671edf39d961 164 * @brief Utility function to write data.
cparata 0:671edf39d961 165 * @param pBuffer: pointer to data to be written.
cparata 0:671edf39d961 166 * @param RegisterAddr: specifies internal address register to be written.
cparata 0:671edf39d961 167 * @param NumByteToWrite: number of bytes to write.
cparata 0:671edf39d961 168 * @retval 0 if ok, an error code otherwise.
cparata 0:671edf39d961 169 */
cparata 0:671edf39d961 170 uint8_t io_write(uint8_t* pBuffer, uint8_t RegisterAddr, uint16_t NumByteToWrite)
cparata 0:671edf39d961 171 {
cparata 0:671edf39d961 172 if (_dev_spi) {
cparata 0:671edf39d961 173 _dev_spi->lock();
cparata 0:671edf39d961 174 _cs_pin = 0;
cparata 0:671edf39d961 175 _dev_spi->write(RegisterAddr);
cparata 0:671edf39d961 176 _dev_spi->write((char *)pBuffer, (int) NumByteToWrite, NULL, 0);
cparata 0:671edf39d961 177 _cs_pin = 1;
cparata 0:671edf39d961 178 _dev_spi->unlock();
cparata 0:671edf39d961 179 return 0;
cparata 0:671edf39d961 180 }
cparata 0:671edf39d961 181 if (_dev_i2c) return (uint8_t) _dev_i2c->i2c_write(pBuffer, _address, RegisterAddr, NumByteToWrite);
cparata 0:671edf39d961 182 return 1;
cparata 0:671edf39d961 183 }
cparata 0:671edf39d961 184
cparata 0:671edf39d961 185 private:
cparata 0:671edf39d961 186
cparata 0:671edf39d961 187 /* Helper classes. */
cparata 0:671edf39d961 188 DevI2C *_dev_i2c;
cparata 0:671edf39d961 189 SPI *_dev_spi;
cparata 0:671edf39d961 190
cparata 0:671edf39d961 191 /* Configuration */
cparata 0:671edf39d961 192 uint8_t _address;
cparata 0:671edf39d961 193 DigitalOut _cs_pin;
cparata 0:671edf39d961 194 InterruptIn _int_irq;
cparata 0:671edf39d961 195 SPI_type_t _spi_type;
cparata 0:671edf39d961 196
cparata 0:671edf39d961 197 uint8_t _mag_is_enabled;
cparata 0:671edf39d961 198
cparata 0:671edf39d961 199 lis2mdl_ctx_t _reg_ctx;
cparata 0:671edf39d961 200
cparata 0:671edf39d961 201 };
cparata 0:671edf39d961 202
cparata 0:671edf39d961 203 #ifdef __cplusplus
cparata 0:671edf39d961 204 extern "C" {
cparata 0:671edf39d961 205 #endif
cparata 0:671edf39d961 206 int32_t LIS2MDL_io_write( void *handle, uint8_t WriteAddr, uint8_t *pBuffer, uint16_t nBytesToWrite );
cparata 0:671edf39d961 207 int32_t LIS2MDL_io_read( void *handle, uint8_t ReadAddr, uint8_t *pBuffer, uint16_t nBytesToRead );
cparata 0:671edf39d961 208 #ifdef __cplusplus
cparata 0:671edf39d961 209 }
cparata 0:671edf39d961 210 #endif
cparata 0:671edf39d961 211
cparata 0:671edf39d961 212 #endif