ST
3-axis MEMS ultra low power accelerometer
Dependencies: X_NUCLEO_COMMON ST_INTERFACES
Dependents: X_NUCLEO_IKS01A3 X_NUCLEO_IKS01A3
Revision 4:94c5d5546161, committed 2019-07-24
- Comitter:
- cparata
- Date:
- Wed Jul 24 14:18:07 2019 +0000
- Parent:
- 3:111317ba9301
- Commit message:
- Format with Astyle
Changed in this revision
--- a/LIS2DW12Sensor.cpp Wed Nov 21 15:43:22 2018 +0000
+++ b/LIS2DW12Sensor.cpp Wed Jul 24 14:18:07 2019 +0000
@@ -51,13 +51,13 @@
* @param int2_pin the interrupt 2 pin
*/
LIS2DW12Sensor::LIS2DW12Sensor(DevI2C *i2c, uint8_t address, PinName int1_pin, PinName int2_pin) :
- _dev_i2c(i2c), _address(address), _cs_pin(NC), _int1_irq(int1_pin), _int2_irq(int2_pin)
+ _dev_i2c(i2c), _address(address), _cs_pin(NC), _int1_irq(int1_pin), _int2_irq(int2_pin)
{
- assert (i2c);
- _dev_spi = NULL;
- _reg_ctx.write_reg = LIS2DW12_io_write;
- _reg_ctx.read_reg = LIS2DW12_io_read;
- _reg_ctx.handle = (void *)this;
+ assert(i2c);
+ _dev_spi = NULL;
+ _reg_ctx.write_reg = LIS2DW12_io_write;
+ _reg_ctx.read_reg = LIS2DW12_io_read;
+ _reg_ctx.handle = (void *)this;
}
/** Constructor
@@ -67,33 +67,31 @@
* @param int2_pin the interrupt 2 pin
* @param spi_type the SPI type (4-Wires or 3-Wires)
*/
-LIS2DW12Sensor::LIS2DW12Sensor(SPI *spi, PinName cs_pin, PinName int1_pin, PinName int2_pin, SPI_type_t spi_type ) :
- _dev_spi(spi), _cs_pin(cs_pin), _int1_irq(int1_pin), _int2_irq(int2_pin), _spi_type(spi_type)
+LIS2DW12Sensor::LIS2DW12Sensor(SPI *spi, PinName cs_pin, PinName int1_pin, PinName int2_pin, SPI_type_t spi_type) :
+ _dev_spi(spi), _cs_pin(cs_pin), _int1_irq(int1_pin), _int2_irq(int2_pin), _spi_type(spi_type)
{
- assert (spi);
- if (cs_pin == NC)
- {
- printf ("ERROR LPS22HBSensor CS MUST NOT BE NC\n\r");
- _dev_spi = NULL;
+ assert(spi);
+ if (cs_pin == NC) {
+ printf("ERROR LPS22HBSensor CS MUST NOT BE NC\n\r");
+ _dev_spi = NULL;
+ _dev_i2c = NULL;
+ return;
+ }
+ _reg_ctx.write_reg = LIS2DW12_io_write;
+ _reg_ctx.read_reg = LIS2DW12_io_read;
+ _reg_ctx.handle = (void *)this;
+ _cs_pin = 1;
_dev_i2c = NULL;
- return;
- }
- _reg_ctx.write_reg = LIS2DW12_io_write;
- _reg_ctx.read_reg = LIS2DW12_io_read;
- _reg_ctx.handle = (void *)this;
- _cs_pin = 1;
- _dev_i2c = NULL;
- _address = 0;
-
- if (_spi_type == SPI3W)
- {
- /* Enable SPI 3-Wires on the component */
- uint8_t data = 0x05;
- lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL2, &data, 1);
- }
+ _address = 0;
- /* Disable I2C on the component */
- lis2dw12_i2c_interface_set(&_reg_ctx, LIS2DW12_I2C_DISABLE);
+ if (_spi_type == SPI3W) {
+ /* Enable SPI 3-Wires on the component */
+ uint8_t data = 0x05;
+ lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL2, &data, 1);
+ }
+
+ /* Disable I2C on the component */
+ lis2dw12_i2c_interface_set(&_reg_ctx, LIS2DW12_I2C_DISABLE);
}
/**
@@ -103,53 +101,47 @@
*/
int LIS2DW12Sensor::init(void *init)
{
- /* Enable register address automatically incremented during a multiple byte
- access with a serial interface. */
- if (lis2dw12_auto_increment_set(&_reg_ctx, PROPERTY_ENABLE) != 0)
- {
- return 1;
- }
+ /* Enable register address automatically incremented during a multiple byte
+ access with a serial interface. */
+ if (lis2dw12_auto_increment_set(&_reg_ctx, PROPERTY_ENABLE) != 0) {
+ return 1;
+ }
- /* Enable BDU */
- if (lis2dw12_block_data_update_set(&_reg_ctx, PROPERTY_ENABLE) != 0)
- {
- return 1;
- }
+ /* Enable BDU */
+ if (lis2dw12_block_data_update_set(&_reg_ctx, PROPERTY_ENABLE) != 0) {
+ return 1;
+ }
- /* FIFO mode selection */
- if (lis2dw12_fifo_mode_set(&_reg_ctx, LIS2DW12_BYPASS_MODE) != 0)
- {
- return 1;
- }
+ /* FIFO mode selection */
+ if (lis2dw12_fifo_mode_set(&_reg_ctx, LIS2DW12_BYPASS_MODE) != 0) {
+ return 1;
+ }
+
+ /* Power mode selection */
+ if (lis2dw12_power_mode_set(&_reg_ctx, LIS2DW12_HIGH_PERFORMANCE) != 0) {
+ return 1;
+ }
- /* Power mode selection */
- if (lis2dw12_power_mode_set(&_reg_ctx, LIS2DW12_HIGH_PERFORMANCE) != 0)
- {
- return 1;
- }
+ /* Output data rate selection - power down. */
+ if (lis2dw12_data_rate_set(&_reg_ctx, LIS2DW12_XL_ODR_OFF) != 0) {
+ return 1;
+ }
- /* Output data rate selection - power down. */
- if (lis2dw12_data_rate_set(&_reg_ctx, LIS2DW12_XL_ODR_OFF) != 0)
- {
- return 1;
- }
+ /* Full scale selection. */
+ if (lis2dw12_full_scale_set(&_reg_ctx, LIS2DW12_2g) != 0) {
+ return 1;
+ }
- /* Full scale selection. */
- if (lis2dw12_full_scale_set(&_reg_ctx, LIS2DW12_2g) != 0)
- {
- return 1;
- }
+ /* Select default output data rate. */
+ _x_last_odr = 100.0f;
+
+ _x_last_operating_mode = LIS2DW12_HIGH_PERFORMANCE_MODE;
- /* Select default output data rate. */
- _x_last_odr = 100.0f;
-
- _x_last_operating_mode = LIS2DW12_HIGH_PERFORMANCE_MODE;
+ _x_last_noise = LIS2DW12_LOW_NOISE_DISABLE;
- _x_last_noise = LIS2DW12_LOW_NOISE_DISABLE;
+ _x_is_enabled = 0;
- _x_is_enabled = 0;
-
- return 0;
+ return 0;
}
/**
@@ -157,22 +149,20 @@
* @retval 0 in case of success, an error code otherwise
*/
int LIS2DW12Sensor::enable_x(void)
-{
- /* Check if the component is already enabled */
- if ( _x_is_enabled == 1 )
- {
+{
+ /* Check if the component is already enabled */
+ if (_x_is_enabled == 1) {
+ return 0;
+ }
+
+ /* Output data rate selection. */
+ if (set_x_odr_when_enabled(_x_last_odr, _x_last_operating_mode, _x_last_noise) == 1) {
+ return 1;
+ }
+
+ _x_is_enabled = 1;
+
return 0;
- }
-
- /* Output data rate selection. */
- if ( set_x_odr_when_enabled( _x_last_odr, _x_last_operating_mode, _x_last_noise ) == 1 )
- {
- return 1;
- }
-
- _x_is_enabled = 1;
-
- return 0;
}
/**
@@ -180,22 +170,20 @@
* @retval 0 in case of success, an error code otherwise
*/
int LIS2DW12Sensor::disable_x(void)
-{
- /* Check if the component is already disabled */
- if ( _x_is_enabled == 0 )
- {
- return 0;
- }
+{
+ /* Check if the component is already disabled */
+ if (_x_is_enabled == 0) {
+ return 0;
+ }
- /* Output data rate selection - power down. */
- if (lis2dw12_data_rate_set(&_reg_ctx, LIS2DW12_XL_ODR_OFF) != 0)
- {
- return 1;
- }
-
- _x_is_enabled = 0;
-
- return 0;
+ /* Output data rate selection - power down. */
+ if (lis2dw12_data_rate_set(&_reg_ctx, LIS2DW12_XL_ODR_OFF) != 0) {
+ return 1;
+ }
+
+ _x_is_enabled = 0;
+
+ return 0;
}
/**
@@ -205,18 +193,16 @@
*/
int LIS2DW12Sensor::read_id(uint8_t *id)
{
- if(!id)
- {
- return 1;
- }
+ if (!id) {
+ return 1;
+ }
- /* Read WHO AM I register */
- if (lis2dw12_device_id_get(&_reg_ctx, id) != 0)
- {
- return 1;
- }
+ /* Read WHO AM I register */
+ if (lis2dw12_device_id_get(&_reg_ctx, id) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -226,27 +212,25 @@
*/
int LIS2DW12Sensor::get_x_axes(int32_t *acceleration)
{
- int16_t data_raw[3];
- float sensitivity = 0;
-
- /* Read raw data from LIS2DW12 output register. */
- if ( get_x_axes_raw( data_raw ) == 1 )
- {
- return 1;
- }
-
- /* Get LIS2DW12 actual sensitivity. */
- if ( get_x_sensitivity( &sensitivity ) == 1 )
- {
- return 1;
- }
-
- /* Calculate the data. */
- acceleration[0] = ( int32_t )( data_raw[0] * sensitivity );
- acceleration[1] = ( int32_t )( data_raw[1] * sensitivity );
- acceleration[2] = ( int32_t )( data_raw[2] * sensitivity );
-
- return 0;
+ int16_t data_raw[3];
+ float sensitivity = 0;
+
+ /* Read raw data from LIS2DW12 output register. */
+ if (get_x_axes_raw(data_raw) == 1) {
+ return 1;
+ }
+
+ /* Get LIS2DW12 actual sensitivity. */
+ if (get_x_sensitivity(&sensitivity) == 1) {
+ return 1;
+ }
+
+ /* Calculate the data. */
+ acceleration[0] = (int32_t)(data_raw[0] * sensitivity);
+ acceleration[1] = (int32_t)(data_raw[1] * sensitivity);
+ acceleration[2] = (int32_t)(data_raw[2] * sensitivity);
+
+ return 0;
}
/**
@@ -256,99 +240,94 @@
*/
int LIS2DW12Sensor::get_x_sensitivity(float *sensitivity)
{
- int32_t ret = 0;
- lis2dw12_fs_t full_scale;
- lis2dw12_mode_t mode;
+ int32_t ret = 0;
+ lis2dw12_fs_t full_scale;
+ lis2dw12_mode_t mode;
+
+ /* Read actual full scale selection from sensor. */
+ if (lis2dw12_full_scale_get(&_reg_ctx, &full_scale) != 0) {
+ return 1;
+ }
+
+ /* Read actual power mode selection from sensor. */
+ if (lis2dw12_power_mode_get(&_reg_ctx, &mode) != 0) {
+ return 1;
+ }
- /* Read actual full scale selection from sensor. */
- if (lis2dw12_full_scale_get(&_reg_ctx, &full_scale) != 0)
- {
- return 1;
- }
+ switch (mode) {
+ case LIS2DW12_CONT_LOW_PWR_12bit:
+ case LIS2DW12_SINGLE_LOW_PWR_12bit:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
+ case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
+ switch (full_scale) {
+ case LIS2DW12_2g:
+ *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_2G_LOPOW1_MODE;
+ break;
- /* Read actual power mode selection from sensor. */
- if (lis2dw12_power_mode_get(&_reg_ctx, &mode) != 0)
- {
- return 1;
- }
+ case LIS2DW12_4g:
+ *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_4G_LOPOW1_MODE;
+ break;
+
+ case LIS2DW12_8g:
+ *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_8G_LOPOW1_MODE;
+ break;
+
+ case LIS2DW12_16g:
+ *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_16G_LOPOW1_MODE;
+ break;
- switch(mode)
- {
- case LIS2DW12_CONT_LOW_PWR_12bit:
- case LIS2DW12_SINGLE_LOW_PWR_12bit:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
- case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
- switch (full_scale)
- {
- case LIS2DW12_2g:
- *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_2G_LOPOW1_MODE;
- break;
+ default:
+ *sensitivity = -1.0f;
+ ret = 1;
+ break;
+ }
+ break;
- case LIS2DW12_4g:
- *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_4G_LOPOW1_MODE;
- break;
+ case LIS2DW12_HIGH_PERFORMANCE:
+ case LIS2DW12_CONT_LOW_PWR_4:
+ case LIS2DW12_CONT_LOW_PWR_3:
+ case LIS2DW12_CONT_LOW_PWR_2:
+ case LIS2DW12_SINGLE_LOW_PWR_4:
+ case LIS2DW12_SINGLE_LOW_PWR_3:
+ case LIS2DW12_SINGLE_LOW_PWR_2:
+ case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
+ switch (full_scale) {
+ case LIS2DW12_2g:
+ *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_2G_OTHER_MODES;
+ break;
- case LIS2DW12_8g:
- *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_8G_LOPOW1_MODE;
- break;
+ case LIS2DW12_4g:
+ *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_4G_OTHER_MODES;
+ break;
+
+ case LIS2DW12_8g:
+ *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_8G_OTHER_MODES;
+ break;
- case LIS2DW12_16g:
- *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_16G_LOPOW1_MODE;
- break;
+ case LIS2DW12_16g:
+ *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_16G_OTHER_MODES;
+ break;
+
+ default:
+ *sensitivity = -1.0f;
+ ret = 1;
+ break;
+ }
+ break;
default:
- *sensitivity = -1.0f;
- ret = 1;
- break;
- }
- break;
-
- case LIS2DW12_HIGH_PERFORMANCE:
- case LIS2DW12_CONT_LOW_PWR_4:
- case LIS2DW12_CONT_LOW_PWR_3:
- case LIS2DW12_CONT_LOW_PWR_2:
- case LIS2DW12_SINGLE_LOW_PWR_4:
- case LIS2DW12_SINGLE_LOW_PWR_3:
- case LIS2DW12_SINGLE_LOW_PWR_2:
- case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
- switch (full_scale)
- {
- case LIS2DW12_2g:
- *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_2G_OTHER_MODES;
- break;
+ *sensitivity = -1.0f;
+ ret = 1;
+ break;
+ }
- case LIS2DW12_4g:
- *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_4G_OTHER_MODES;
- break;
-
- case LIS2DW12_8g:
- *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_8G_OTHER_MODES;
- break;
-
- case LIS2DW12_16g:
- *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_16G_OTHER_MODES;
- break;
-
- default:
- *sensitivity = -1.0f;
- ret = 1;
- break;
- }
- break;
-
- default:
- *sensitivity = -1.0f;
- ret = 1;
- break;
- }
-
- return ret;
+ return ret;
}
/**
@@ -358,60 +337,57 @@
*/
int LIS2DW12Sensor::get_x_axes_raw(int16_t *value)
{
- axis3bit16_t data_raw;
- lis2dw12_mode_t mode;
- int32_t ret = 0;
+ axis3bit16_t data_raw;
+ lis2dw12_mode_t mode;
+ int32_t ret = 0;
+
+ /* Read actual power mode selection from sensor. */
+ if (lis2dw12_power_mode_get(&_reg_ctx, &mode) != 0) {
+ return 1;
+ }
- /* Read actual power mode selection from sensor. */
- if (lis2dw12_power_mode_get(&_reg_ctx, &mode) != 0)
- {
- return 1;
- }
+ /* Read raw data values. */
+ if (lis2dw12_acceleration_raw_get(&_reg_ctx, data_raw.u8bit) != 0) {
+ return 1;
+ }
- /* Read raw data values. */
- if (lis2dw12_acceleration_raw_get(&_reg_ctx, data_raw.u8bit) != 0)
- {
- return 1;
- }
+ switch (mode) {
+ case LIS2DW12_CONT_LOW_PWR_12bit:
+ case LIS2DW12_SINGLE_LOW_PWR_12bit:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
+ case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
+ /* Data format 12 bits. */
+ value[0] = (data_raw.i16bit[0] / 16);
+ value[1] = (data_raw.i16bit[1] / 16);
+ value[2] = (data_raw.i16bit[2] / 16);
+ break;
- switch(mode)
- {
- case LIS2DW12_CONT_LOW_PWR_12bit:
- case LIS2DW12_SINGLE_LOW_PWR_12bit:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
- case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
- /* Data format 12 bits. */
- value[0] = (data_raw.i16bit[0] / 16);
- value[1] = (data_raw.i16bit[1] / 16);
- value[2] = (data_raw.i16bit[2] / 16);
- break;
+ case LIS2DW12_HIGH_PERFORMANCE:
+ case LIS2DW12_CONT_LOW_PWR_4:
+ case LIS2DW12_CONT_LOW_PWR_3:
+ case LIS2DW12_CONT_LOW_PWR_2:
+ case LIS2DW12_SINGLE_LOW_PWR_4:
+ case LIS2DW12_SINGLE_LOW_PWR_3:
+ case LIS2DW12_SINGLE_LOW_PWR_2:
+ case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
+ /* Data format 14 bits. */
+ value[0] = (data_raw.i16bit[0] / 4);
+ value[1] = (data_raw.i16bit[1] / 4);
+ value[2] = (data_raw.i16bit[2] / 4);
+ break;
- case LIS2DW12_HIGH_PERFORMANCE:
- case LIS2DW12_CONT_LOW_PWR_4:
- case LIS2DW12_CONT_LOW_PWR_3:
- case LIS2DW12_CONT_LOW_PWR_2:
- case LIS2DW12_SINGLE_LOW_PWR_4:
- case LIS2DW12_SINGLE_LOW_PWR_3:
- case LIS2DW12_SINGLE_LOW_PWR_2:
- case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
- /* Data format 14 bits. */
- value[0] = (data_raw.i16bit[0] / 4);
- value[1] = (data_raw.i16bit[1] / 4);
- value[2] = (data_raw.i16bit[2] / 4);
- break;
+ default:
+ ret = 1;
+ break;
+ }
- default:
- ret = 1;
- break;
- }
-
- return ret;
+ return ret;
}
/**
@@ -419,195 +395,188 @@
* @param odr the pointer to the output data rate
* @retval 0 in case of success, an error code otherwise
*/
-int LIS2DW12Sensor::get_x_odr(float* odr)
+int LIS2DW12Sensor::get_x_odr(float *odr)
{
- int32_t ret = 0;
- lis2dw12_odr_t odr_low_level;
- lis2dw12_mode_t mode;
+ int32_t ret = 0;
+ lis2dw12_odr_t odr_low_level;
+ lis2dw12_mode_t mode;
+
+ /* Get current output data rate. */
+ if (lis2dw12_data_rate_get(&_reg_ctx, &odr_low_level) != 0) {
+ return 1;
+ }
- /* Get current output data rate. */
- if (lis2dw12_data_rate_get(&_reg_ctx, &odr_low_level) != 0)
- {
- return 1;
- }
+ /* Read actual power mode selection from sensor. */
+ if (lis2dw12_power_mode_get(&_reg_ctx, &mode) != 0) {
+ return 1;
+ }
+
+ switch (odr_low_level) {
+ case LIS2DW12_XL_ODR_OFF:
+ case LIS2DW12_XL_SET_SW_TRIG:
+ case LIS2DW12_XL_SET_PIN_TRIG:
+ *odr = 0.0f;
+ break;
+
+ case LIS2DW12_XL_ODR_1Hz6_LP_ONLY:
+ switch (mode) {
+ case LIS2DW12_HIGH_PERFORMANCE:
+ case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
+ *odr = 12.5f;
+ break;
- /* Read actual power mode selection from sensor. */
- if (lis2dw12_power_mode_get(&_reg_ctx, &mode) != 0)
- {
- return 1;
- }
+ case LIS2DW12_CONT_LOW_PWR_4:
+ case LIS2DW12_CONT_LOW_PWR_3:
+ case LIS2DW12_CONT_LOW_PWR_2:
+ case LIS2DW12_CONT_LOW_PWR_12bit:
+ case LIS2DW12_SINGLE_LOW_PWR_4:
+ case LIS2DW12_SINGLE_LOW_PWR_3:
+ case LIS2DW12_SINGLE_LOW_PWR_2:
+ case LIS2DW12_SINGLE_LOW_PWR_12bit:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
+ case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
+ *odr = 1.6f;
+ break;
+
+ default:
+ *odr = -1.0f;
+ ret = 1;
+ break;
+ }
+ break;
- switch (odr_low_level)
- {
- case LIS2DW12_XL_ODR_OFF:
- case LIS2DW12_XL_SET_SW_TRIG:
- case LIS2DW12_XL_SET_PIN_TRIG:
- *odr = 0.0f;
- break;
+ case LIS2DW12_XL_ODR_12Hz5:
+ *odr = 12.5f;
+ break;
+
+ case LIS2DW12_XL_ODR_25Hz:
+ *odr = 25.0f;
+ break;
+
+ case LIS2DW12_XL_ODR_50Hz:
+ *odr = 50.0f;
+ break;
+
+ case LIS2DW12_XL_ODR_100Hz:
+ *odr = 100.0f;
+ break;
+
+ case LIS2DW12_XL_ODR_200Hz:
+ *odr = 200.0f;
+ break;
+
+ case LIS2DW12_XL_ODR_400Hz:
+ switch (mode) {
+ case LIS2DW12_HIGH_PERFORMANCE:
+ case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
+ *odr = 400.0f;
+ break;
- case LIS2DW12_XL_ODR_1Hz6_LP_ONLY:
- switch (mode)
- {
- case LIS2DW12_HIGH_PERFORMANCE:
- case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
- *odr = 12.5f;
- break;
+ case LIS2DW12_CONT_LOW_PWR_4:
+ case LIS2DW12_CONT_LOW_PWR_3:
+ case LIS2DW12_CONT_LOW_PWR_2:
+ case LIS2DW12_CONT_LOW_PWR_12bit:
+ case LIS2DW12_SINGLE_LOW_PWR_4:
+ case LIS2DW12_SINGLE_LOW_PWR_3:
+ case LIS2DW12_SINGLE_LOW_PWR_2:
+ case LIS2DW12_SINGLE_LOW_PWR_12bit:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
+ case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
+ *odr = 200.0f;
+ break;
+
+ default:
+ *odr = -1.0f;
+ ret = 1;
+ break;
+ }
+ break;
+
+ case LIS2DW12_XL_ODR_800Hz:
+ switch (mode) {
+ case LIS2DW12_HIGH_PERFORMANCE:
+ case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
+ *odr = 800.0f;
+ break;
- case LIS2DW12_CONT_LOW_PWR_4:
- case LIS2DW12_CONT_LOW_PWR_3:
- case LIS2DW12_CONT_LOW_PWR_2:
- case LIS2DW12_CONT_LOW_PWR_12bit:
- case LIS2DW12_SINGLE_LOW_PWR_4:
- case LIS2DW12_SINGLE_LOW_PWR_3:
- case LIS2DW12_SINGLE_LOW_PWR_2:
- case LIS2DW12_SINGLE_LOW_PWR_12bit:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
- case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
- *odr = 1.6f;
- break;
+ case LIS2DW12_CONT_LOW_PWR_4:
+ case LIS2DW12_CONT_LOW_PWR_3:
+ case LIS2DW12_CONT_LOW_PWR_2:
+ case LIS2DW12_CONT_LOW_PWR_12bit:
+ case LIS2DW12_SINGLE_LOW_PWR_4:
+ case LIS2DW12_SINGLE_LOW_PWR_3:
+ case LIS2DW12_SINGLE_LOW_PWR_2:
+ case LIS2DW12_SINGLE_LOW_PWR_12bit:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
+ case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
+ *odr = 200.0f;
+ break;
+
+ default:
+ *odr = -1.0f;
+ ret = 1;
+ break;
+ }
+ break;
+
+ case LIS2DW12_XL_ODR_1k6Hz:
+ switch (mode) {
+ case LIS2DW12_HIGH_PERFORMANCE:
+ case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
+ *odr = 1600.0f;
+ break;
+
+ case LIS2DW12_CONT_LOW_PWR_4:
+ case LIS2DW12_CONT_LOW_PWR_3:
+ case LIS2DW12_CONT_LOW_PWR_2:
+ case LIS2DW12_CONT_LOW_PWR_12bit:
+ case LIS2DW12_SINGLE_LOW_PWR_4:
+ case LIS2DW12_SINGLE_LOW_PWR_3:
+ case LIS2DW12_SINGLE_LOW_PWR_2:
+ case LIS2DW12_SINGLE_LOW_PWR_12bit:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
+ case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
+ *odr = 200.0f;
+ break;
+
+ default:
+ *odr = -1.0f;
+ ret = 1;
+ break;
+ }
+ break;
default:
- *odr = -1.0f;
- ret = 1;
- break;
- }
- break;
-
- case LIS2DW12_XL_ODR_12Hz5:
- *odr = 12.5f;
- break;
-
- case LIS2DW12_XL_ODR_25Hz:
- *odr = 25.0f;
- break;
-
- case LIS2DW12_XL_ODR_50Hz:
- *odr = 50.0f;
- break;
-
- case LIS2DW12_XL_ODR_100Hz:
- *odr = 100.0f;
- break;
-
- case LIS2DW12_XL_ODR_200Hz:
- *odr = 200.0f;
- break;
-
- case LIS2DW12_XL_ODR_400Hz:
- switch (mode)
- {
- case LIS2DW12_HIGH_PERFORMANCE:
- case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
- *odr = 400.0f;
- break;
-
- case LIS2DW12_CONT_LOW_PWR_4:
- case LIS2DW12_CONT_LOW_PWR_3:
- case LIS2DW12_CONT_LOW_PWR_2:
- case LIS2DW12_CONT_LOW_PWR_12bit:
- case LIS2DW12_SINGLE_LOW_PWR_4:
- case LIS2DW12_SINGLE_LOW_PWR_3:
- case LIS2DW12_SINGLE_LOW_PWR_2:
- case LIS2DW12_SINGLE_LOW_PWR_12bit:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
- case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
- *odr = 200.0f;
- break;
-
- default:
- *odr = -1.0f;
- ret = 1;
- break;
- }
- break;
-
- case LIS2DW12_XL_ODR_800Hz:
- switch (mode)
- {
- case LIS2DW12_HIGH_PERFORMANCE:
- case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
- *odr = 800.0f;
- break;
+ *odr = -1.0f;
+ ret = 1;
+ break;
+ }
- case LIS2DW12_CONT_LOW_PWR_4:
- case LIS2DW12_CONT_LOW_PWR_3:
- case LIS2DW12_CONT_LOW_PWR_2:
- case LIS2DW12_CONT_LOW_PWR_12bit:
- case LIS2DW12_SINGLE_LOW_PWR_4:
- case LIS2DW12_SINGLE_LOW_PWR_3:
- case LIS2DW12_SINGLE_LOW_PWR_2:
- case LIS2DW12_SINGLE_LOW_PWR_12bit:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
- case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
- *odr = 200.0f;
- break;
-
- default:
- *odr = -1.0f;
- ret = 1;
- break;
- }
- break;
-
- case LIS2DW12_XL_ODR_1k6Hz:
- switch (mode)
- {
- case LIS2DW12_HIGH_PERFORMANCE:
- case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
- *odr = 1600.0f;
- break;
-
- case LIS2DW12_CONT_LOW_PWR_4:
- case LIS2DW12_CONT_LOW_PWR_3:
- case LIS2DW12_CONT_LOW_PWR_2:
- case LIS2DW12_CONT_LOW_PWR_12bit:
- case LIS2DW12_SINGLE_LOW_PWR_4:
- case LIS2DW12_SINGLE_LOW_PWR_3:
- case LIS2DW12_SINGLE_LOW_PWR_2:
- case LIS2DW12_SINGLE_LOW_PWR_12bit:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
- case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
- *odr = 200.0f;
- break;
-
- default:
- *odr = -1.0f;
- ret = 1;
- break;
- }
- break;
-
- default:
- *odr = -1.0f;
- ret = 1;
- break;
- }
-
- return ret;
+ return ret;
}
/**
@@ -616,8 +585,8 @@
* @retval 0 in case of success, an error code otherwise
*/
int LIS2DW12Sensor::set_x_odr(float odr)
-{
- return set_x_odr_with_mode(odr, LIS2DW12_HIGH_PERFORMANCE_MODE, LIS2DW12_LOW_NOISE_DISABLE);
+{
+ return set_x_odr_with_mode(odr, LIS2DW12_HIGH_PERFORMANCE_MODE, LIS2DW12_LOW_NOISE_DISABLE);
}
/**
@@ -629,22 +598,17 @@
*/
int LIS2DW12Sensor::set_x_odr_with_mode(float odr, LIS2DW12_Operating_Mode_t mode, LIS2DW12_Low_Noise_t noise)
{
- if(_x_is_enabled == 1)
- {
- if(set_x_odr_when_enabled(odr, mode, noise) != 0)
- {
- return 1;
+ if (_x_is_enabled == 1) {
+ if (set_x_odr_when_enabled(odr, mode, noise) != 0) {
+ return 1;
+ }
+ } else {
+ if (set_x_odr_when_disabled(odr, mode, noise) != 0) {
+ return 1;
+ }
}
- }
- else
- {
- if(set_x_odr_when_disabled(odr, mode, noise) != 0)
- {
- return 1;
- }
- }
-
- return 0;
+
+ return 0;
}
/**
@@ -656,133 +620,120 @@
*/
int LIS2DW12Sensor::set_x_odr_when_enabled(float odr, LIS2DW12_Operating_Mode_t mode, LIS2DW12_Low_Noise_t noise)
{
- lis2dw12_odr_t new_odr;
- lis2dw12_mode_t new_power_mode;
+ lis2dw12_odr_t new_odr;
+ lis2dw12_mode_t new_power_mode;
- switch (mode)
- {
- case LIS2DW12_HIGH_PERFORMANCE_MODE:
- default:
- switch (noise)
- {
- case LIS2DW12_LOW_NOISE_DISABLE:
+ switch (mode) {
+ case LIS2DW12_HIGH_PERFORMANCE_MODE:
default:
- new_power_mode = LIS2DW12_HIGH_PERFORMANCE;
- break;
- case LIS2DW12_LOW_NOISE_ENABLE:
- new_power_mode = LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE;
- break;
- }
+ switch (noise) {
+ case LIS2DW12_LOW_NOISE_DISABLE:
+ default:
+ new_power_mode = LIS2DW12_HIGH_PERFORMANCE;
+ break;
+ case LIS2DW12_LOW_NOISE_ENABLE:
+ new_power_mode = LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE;
+ break;
+ }
- /* If High Performance mode minimum ODR is 12.5Hz */
- if(odr < 12.5f)
- {
- odr = 12.5f;
- }
- break;
- case LIS2DW12_LOW_POWER_MODE4:
- switch (noise)
- {
- case LIS2DW12_LOW_NOISE_DISABLE:
- default:
- new_power_mode = LIS2DW12_CONT_LOW_PWR_4;
- break;
- case LIS2DW12_LOW_NOISE_ENABLE:
- new_power_mode = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4;
- break;
- }
+ /* If High Performance mode minimum ODR is 12.5Hz */
+ if (odr < 12.5f) {
+ odr = 12.5f;
+ }
+ break;
+ case LIS2DW12_LOW_POWER_MODE4:
+ switch (noise) {
+ case LIS2DW12_LOW_NOISE_DISABLE:
+ default:
+ new_power_mode = LIS2DW12_CONT_LOW_PWR_4;
+ break;
+ case LIS2DW12_LOW_NOISE_ENABLE:
+ new_power_mode = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4;
+ break;
+ }
- /* If Low Power mode maximum ODR is 200Hz */
- if(odr > 200.0f)
- {
- odr = 200.0f;
- }
- break;
- case LIS2DW12_LOW_POWER_MODE3:
- switch (noise)
- {
- case LIS2DW12_LOW_NOISE_DISABLE:
- default:
- new_power_mode = LIS2DW12_CONT_LOW_PWR_3;
- break;
- case LIS2DW12_LOW_NOISE_ENABLE:
- new_power_mode = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3;
- break;
- }
+ /* If Low Power mode maximum ODR is 200Hz */
+ if (odr > 200.0f) {
+ odr = 200.0f;
+ }
+ break;
+ case LIS2DW12_LOW_POWER_MODE3:
+ switch (noise) {
+ case LIS2DW12_LOW_NOISE_DISABLE:
+ default:
+ new_power_mode = LIS2DW12_CONT_LOW_PWR_3;
+ break;
+ case LIS2DW12_LOW_NOISE_ENABLE:
+ new_power_mode = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3;
+ break;
+ }
- /* If Low Power mode maximum ODR is 200Hz */
- if(odr > 200.0f)
- {
- odr = 200.0f;
- }
- break;
- case LIS2DW12_LOW_POWER_MODE2:
- switch (noise)
- {
- case LIS2DW12_LOW_NOISE_DISABLE:
- default:
- new_power_mode = LIS2DW12_CONT_LOW_PWR_2;
- break;
- case LIS2DW12_LOW_NOISE_ENABLE:
- new_power_mode = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2;
- break;
- }
+ /* If Low Power mode maximum ODR is 200Hz */
+ if (odr > 200.0f) {
+ odr = 200.0f;
+ }
+ break;
+ case LIS2DW12_LOW_POWER_MODE2:
+ switch (noise) {
+ case LIS2DW12_LOW_NOISE_DISABLE:
+ default:
+ new_power_mode = LIS2DW12_CONT_LOW_PWR_2;
+ break;
+ case LIS2DW12_LOW_NOISE_ENABLE:
+ new_power_mode = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2;
+ break;
+ }
- /* If Low Power mode maximum ODR is 200Hz */
- if(odr > 200.0f)
- {
- odr = 200.0f;
- }
- break;
- case LIS2DW12_LOW_POWER_MODE1:
- switch (noise)
- {
- case LIS2DW12_LOW_NOISE_DISABLE:
- default:
- new_power_mode = LIS2DW12_CONT_LOW_PWR_12bit;
- break;
- case LIS2DW12_LOW_NOISE_ENABLE:
- new_power_mode = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit;
- break;
- }
+ /* If Low Power mode maximum ODR is 200Hz */
+ if (odr > 200.0f) {
+ odr = 200.0f;
+ }
+ break;
+ case LIS2DW12_LOW_POWER_MODE1:
+ switch (noise) {
+ case LIS2DW12_LOW_NOISE_DISABLE:
+ default:
+ new_power_mode = LIS2DW12_CONT_LOW_PWR_12bit;
+ break;
+ case LIS2DW12_LOW_NOISE_ENABLE:
+ new_power_mode = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit;
+ break;
+ }
- /* If Low Power mode maximum ODR is 200Hz */
- if(odr > 200.0f)
- {
- odr = 200.0f;
- }
- break;
- }
-
+ /* If Low Power mode maximum ODR is 200Hz */
+ if (odr > 200.0f) {
+ odr = 200.0f;
+ }
+ break;
+ }
- new_odr = (odr <= 1.6f) ? LIS2DW12_XL_ODR_1Hz6_LP_ONLY
- : (odr <= 12.5f) ? LIS2DW12_XL_ODR_12Hz5
- : (odr <= 25.0f) ? LIS2DW12_XL_ODR_25Hz
- : (odr <= 50.0f) ? LIS2DW12_XL_ODR_50Hz
- : (odr <= 100.0f) ? LIS2DW12_XL_ODR_100Hz
- : (odr <= 200.0f) ? LIS2DW12_XL_ODR_200Hz
- : (odr <= 400.0f) ? LIS2DW12_XL_ODR_400Hz
- : (odr <= 800.0f) ? LIS2DW12_XL_ODR_800Hz
- : LIS2DW12_XL_ODR_1k6Hz;
- /* Output data rate selection. */
- if (lis2dw12_data_rate_set(&_reg_ctx, new_odr) != 0)
- {
- return 1;
- }
+ new_odr = (odr <= 1.6f) ? LIS2DW12_XL_ODR_1Hz6_LP_ONLY
+ : (odr <= 12.5f) ? LIS2DW12_XL_ODR_12Hz5
+ : (odr <= 25.0f) ? LIS2DW12_XL_ODR_25Hz
+ : (odr <= 50.0f) ? LIS2DW12_XL_ODR_50Hz
+ : (odr <= 100.0f) ? LIS2DW12_XL_ODR_100Hz
+ : (odr <= 200.0f) ? LIS2DW12_XL_ODR_200Hz
+ : (odr <= 400.0f) ? LIS2DW12_XL_ODR_400Hz
+ : (odr <= 800.0f) ? LIS2DW12_XL_ODR_800Hz
+ : LIS2DW12_XL_ODR_1k6Hz;
- /* Power mode selection. */
- if (lis2dw12_power_mode_set(&_reg_ctx, new_power_mode) != 0)
- {
- return 1;
- }
+ /* Output data rate selection. */
+ if (lis2dw12_data_rate_set(&_reg_ctx, new_odr) != 0) {
+ return 1;
+ }
- /* Store actual output data rate, operating mode and low noise. */
- _x_last_odr = odr;
- _x_last_operating_mode = mode;
- _x_last_noise = noise;
+ /* Power mode selection. */
+ if (lis2dw12_power_mode_set(&_reg_ctx, new_power_mode) != 0) {
+ return 1;
+ }
- return 0;
+ /* Store actual output data rate, operating mode and low noise. */
+ _x_last_odr = odr;
+ _x_last_operating_mode = mode;
+ _x_last_noise = noise;
+
+ return 0;
}
/**
@@ -794,20 +745,20 @@
*/
int LIS2DW12Sensor::set_x_odr_when_disabled(float odr, LIS2DW12_Operating_Mode_t mode, LIS2DW12_Low_Noise_t noise)
{
- _x_last_operating_mode = mode;
- _x_last_noise = noise;
+ _x_last_operating_mode = mode;
+ _x_last_noise = noise;
- _x_last_odr = (odr <= 1.6f) ? 1.6f
- : (odr <= 12.5f) ? 12.5f
- : (odr <= 25.0f) ? 25.0f
- : (odr <= 50.0f) ? 50.0f
- : (odr <= 100.0f) ? 100.0f
- : (odr <= 200.0f) ? 200.0f
- : (odr <= 400.0f) ? 400.0f
- : (odr <= 800.0f) ? 800.0f
- : 1600.0f;
-
- return 0;
+ _x_last_odr = (odr <= 1.6f) ? 1.6f
+ : (odr <= 12.5f) ? 12.5f
+ : (odr <= 25.0f) ? 25.0f
+ : (odr <= 50.0f) ? 50.0f
+ : (odr <= 100.0f) ? 100.0f
+ : (odr <= 200.0f) ? 200.0f
+ : (odr <= 400.0f) ? 400.0f
+ : (odr <= 800.0f) ? 800.0f
+ : 1600.0f;
+
+ return 0;
}
/**
@@ -815,42 +766,40 @@
* @param full_scale the pointer to the full scale
* @retval 0 in case of success, an error code otherwise
*/
-int LIS2DW12Sensor::get_x_fs(float* full_scale)
+int LIS2DW12Sensor::get_x_fs(float *full_scale)
{
- int32_t ret = 0;
- lis2dw12_fs_t fs_low_level;
+ int32_t ret = 0;
+ lis2dw12_fs_t fs_low_level;
- /* Read actual full scale selection from sensor. */
- if (lis2dw12_full_scale_get(&_reg_ctx, &fs_low_level) != 0)
- {
- return 1;
- }
+ /* Read actual full scale selection from sensor. */
+ if (lis2dw12_full_scale_get(&_reg_ctx, &fs_low_level) != 0) {
+ return 1;
+ }
- switch (fs_low_level)
- {
- case LIS2DW12_2g:
- *full_scale = 2;
- break;
+ switch (fs_low_level) {
+ case LIS2DW12_2g:
+ *full_scale = 2;
+ break;
- case LIS2DW12_4g:
- *full_scale = 4;
- break;
+ case LIS2DW12_4g:
+ *full_scale = 4;
+ break;
- case LIS2DW12_8g:
- *full_scale = 8;
- break;
+ case LIS2DW12_8g:
+ *full_scale = 8;
+ break;
- case LIS2DW12_16g:
- *full_scale = 16;
- break;
+ case LIS2DW12_16g:
+ *full_scale = 16;
+ break;
- default:
- *full_scale = -1;
- ret = 1;
- break;
- }
+ default:
+ *full_scale = -1;
+ ret = 1;
+ break;
+ }
- return ret;
+ return ret;
}
/**
@@ -860,21 +809,20 @@
*/
int LIS2DW12Sensor::set_x_fs(float full_scale)
{
- lis2dw12_fs_t new_fs;
+ lis2dw12_fs_t new_fs;
- /* Seems like MISRA C-2012 rule 14.3a violation but only from single file statical analysis point of view because
- the parameter passed to the function is not known at the moment of analysis */
- new_fs = (full_scale <= 2) ? LIS2DW12_2g
- : (full_scale <= 4) ? LIS2DW12_4g
- : (full_scale <= 8) ? LIS2DW12_8g
- : LIS2DW12_16g;
+ /* Seems like MISRA C-2012 rule 14.3a violation but only from single file statical analysis point of view because
+ the parameter passed to the function is not known at the moment of analysis */
+ new_fs = (full_scale <= 2) ? LIS2DW12_2g
+ : (full_scale <= 4) ? LIS2DW12_4g
+ : (full_scale <= 8) ? LIS2DW12_8g
+ : LIS2DW12_16g;
- if (lis2dw12_full_scale_set(&_reg_ctx, new_fs) != 0)
- {
- return 1;
- }
+ if (lis2dw12_full_scale_set(&_reg_ctx, new_fs) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -884,46 +832,40 @@
*/
int LIS2DW12Sensor::enable_wake_up_detection(void)
{
- int32_t ret = 0;
- lis2dw12_ctrl4_int1_pad_ctrl_t val;
+ int32_t ret = 0;
+ lis2dw12_ctrl4_int1_pad_ctrl_t val;
- /* Output Data Rate selection */
- if (set_x_odr(200.0f) != 0)
- {
- return 1;
- }
+ /* Output Data Rate selection */
+ if (set_x_odr(200.0f) != 0) {
+ return 1;
+ }
- /* Full scale selection */
- if (set_x_fs(2) != 0)
- {
- return 1;
- }
+ /* Full scale selection */
+ if (set_x_fs(2) != 0) {
+ return 1;
+ }
- /* WAKE_DUR setting */
- if (lis2dw12_wkup_dur_set(&_reg_ctx, 0x00) != 0)
- {
- return 1;
- }
+ /* WAKE_DUR setting */
+ if (lis2dw12_wkup_dur_set(&_reg_ctx, 0x00) != 0) {
+ return 1;
+ }
- /* Set wake up threshold. */
- if (lis2dw12_wkup_threshold_set(&_reg_ctx, 0x02) != 0)
- {
- return 1;
- }
+ /* Set wake up threshold. */
+ if (lis2dw12_wkup_threshold_set(&_reg_ctx, 0x02) != 0) {
+ return 1;
+ }
- if (lis2dw12_pin_int1_route_get(&_reg_ctx, &val) != 0)
- {
- return 1;
- }
+ if (lis2dw12_pin_int1_route_get(&_reg_ctx, &val) != 0) {
+ return 1;
+ }
- val.int1_wu = PROPERTY_ENABLE;
+ val.int1_wu = PROPERTY_ENABLE;
- if (lis2dw12_pin_int1_route_set(&_reg_ctx, &val) != 0)
- {
- return 1;
- }
+ if (lis2dw12_pin_int1_route_set(&_reg_ctx, &val) != 0) {
+ return 1;
+ }
- return ret;
+ return ret;
}
/**
@@ -932,58 +874,50 @@
*/
int LIS2DW12Sensor::disable_wake_up_detection(void)
{
- lis2dw12_ctrl4_int1_pad_ctrl_t ctrl4_int1_reg;
- lis2dw12_ctrl5_int2_pad_ctrl_t ctrl5_int2_reg;
- lis2dw12_ctrl_reg7_t ctrl_reg7;
+ lis2dw12_ctrl4_int1_pad_ctrl_t ctrl4_int1_reg;
+ lis2dw12_ctrl5_int2_pad_ctrl_t ctrl5_int2_reg;
+ lis2dw12_ctrl_reg7_t ctrl_reg7;
- /* Disable wake up event on INT1 pin. */
- if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL, (uint8_t *)&ctrl4_int1_reg, 1) != 0)
- {
- return 1;
- }
-
- ctrl4_int1_reg.int1_wu = PROPERTY_DISABLE;
+ /* Disable wake up event on INT1 pin. */
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL, (uint8_t *)&ctrl4_int1_reg, 1) != 0) {
+ return 1;
+ }
- if (lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL, (uint8_t *)&ctrl4_int1_reg, 1) != 0)
- {
- return 1;
- }
+ ctrl4_int1_reg.int1_wu = PROPERTY_DISABLE;
- /* Read INT2 Sleep Change */
- if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL, (uint8_t *)&ctrl5_int2_reg, 1) != 0)
- {
- return 1;
- }
+ if (lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL, (uint8_t *)&ctrl4_int1_reg, 1) != 0) {
+ return 1;
+ }
- /*Disable Interrupts bit if none event is still enabled */
- if(ctrl5_int2_reg.int2_sleep_chg == 0 && ctrl4_int1_reg.int1_wu == 0 && ctrl4_int1_reg.int1_6d == 0)
- {
- if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL_REG7, (uint8_t *)&ctrl_reg7, 1) != 0)
- {
- return 1;
+ /* Read INT2 Sleep Change */
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL, (uint8_t *)&ctrl5_int2_reg, 1) != 0) {
+ return 1;
}
- ctrl_reg7.interrupts_enable = PROPERTY_DISABLE;
+ /*Disable Interrupts bit if none event is still enabled */
+ if (ctrl5_int2_reg.int2_sleep_chg == 0 && ctrl4_int1_reg.int1_wu == 0 && ctrl4_int1_reg.int1_6d == 0) {
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL_REG7, (uint8_t *)&ctrl_reg7, 1) != 0) {
+ return 1;
+ }
- if (lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL_REG7, (uint8_t *)&ctrl_reg7, 1) != 0)
- {
- return 1;
- }
- }
+ ctrl_reg7.interrupts_enable = PROPERTY_DISABLE;
- /* Reset wake up threshold. */
- if (lis2dw12_wkup_threshold_set(&_reg_ctx, 0x00) != 0)
- {
- return 1;
- }
+ if (lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL_REG7, (uint8_t *)&ctrl_reg7, 1) != 0) {
+ return 1;
+ }
+ }
- /* WAKE_DUR setting */
- if (lis2dw12_wkup_dur_set(&_reg_ctx, 0x00) != 0)
- {
- return 1;
- }
+ /* Reset wake up threshold. */
+ if (lis2dw12_wkup_threshold_set(&_reg_ctx, 0x00) != 0) {
+ return 1;
+ }
- return 0;
+ /* WAKE_DUR setting */
+ if (lis2dw12_wkup_dur_set(&_reg_ctx, 0x00) != 0) {
+ return 1;
+ }
+
+ return 0;
}
/**
@@ -993,13 +927,12 @@
*/
int LIS2DW12Sensor::set_wake_up_threshold(uint8_t thr)
{
- /* Set wake up threshold. */
- if (lis2dw12_wkup_threshold_set(&_reg_ctx, thr) != 0)
- {
- return 1;
- }
+ /* Set wake up threshold. */
+ if (lis2dw12_wkup_threshold_set(&_reg_ctx, thr) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -1009,13 +942,12 @@
*/
int LIS2DW12Sensor::set_wake_up_duration(uint8_t dur)
{
- /* Set wake up duration. */
- if (lis2dw12_wkup_dur_set(&_reg_ctx, dur) != 0)
- {
- return 1;
- }
+ /* Set wake up duration. */
+ if (lis2dw12_wkup_dur_set(&_reg_ctx, dur) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -1024,42 +956,37 @@
*/
int LIS2DW12Sensor::enable_inactivity_detection(void)
{
- int32_t ret = 0;
- lis2dw12_ctrl5_int2_pad_ctrl_t val;
+ int32_t ret = 0;
+ lis2dw12_ctrl5_int2_pad_ctrl_t val;
- /* Output Data Rate and Full scale must be selected externally */
+ /* Output Data Rate and Full scale must be selected externally */
- /* SLEEP_DUR setting */
- if (lis2dw12_act_sleep_dur_set(&_reg_ctx, 0x01) != 0)
- {
- return 1;
- }
+ /* SLEEP_DUR setting */
+ if (lis2dw12_act_sleep_dur_set(&_reg_ctx, 0x01) != 0) {
+ return 1;
+ }
- /* Set wake up threshold. */
- if (lis2dw12_wkup_threshold_set(&_reg_ctx, 0x02) != 0)
- {
- return 1;
- }
+ /* Set wake up threshold. */
+ if (lis2dw12_wkup_threshold_set(&_reg_ctx, 0x02) != 0) {
+ return 1;
+ }
- /* Enable inactivity detection. */
- if (lis2dw12_act_mode_set(&_reg_ctx, LIS2DW12_DETECT_ACT_INACT) != 0)
- {
- return 1;
- }
+ /* Enable inactivity detection. */
+ if (lis2dw12_act_mode_set(&_reg_ctx, LIS2DW12_DETECT_ACT_INACT) != 0) {
+ return 1;
+ }
- if (lis2dw12_pin_int2_route_get(&_reg_ctx, &val) != 0)
- {
- return 1;
- }
+ if (lis2dw12_pin_int2_route_get(&_reg_ctx, &val) != 0) {
+ return 1;
+ }
- val.int2_sleep_chg = PROPERTY_ENABLE;
+ val.int2_sleep_chg = PROPERTY_ENABLE;
- if (lis2dw12_pin_int2_route_set(&_reg_ctx, &val) != 0)
- {
- return 1;
- }
+ if (lis2dw12_pin_int2_route_set(&_reg_ctx, &val) != 0) {
+ return 1;
+ }
- return ret;
+ return ret;
}
/**
@@ -1068,64 +995,55 @@
*/
int LIS2DW12Sensor::disable_inactivity_detection(void)
{
- lis2dw12_ctrl4_int1_pad_ctrl_t ctrl4_int1_reg;
- lis2dw12_ctrl5_int2_pad_ctrl_t ctrl5_int2_reg;
- lis2dw12_ctrl_reg7_t ctrl_reg7;
+ lis2dw12_ctrl4_int1_pad_ctrl_t ctrl4_int1_reg;
+ lis2dw12_ctrl5_int2_pad_ctrl_t ctrl5_int2_reg;
+ lis2dw12_ctrl_reg7_t ctrl_reg7;
- /* Disable inactivity event on INT2 pin */
- if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL, (uint8_t *)&ctrl5_int2_reg, 1) != 0)
- {
- return 1;
- }
-
- ctrl5_int2_reg.int2_sleep_chg = PROPERTY_DISABLE;
+ /* Disable inactivity event on INT2 pin */
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL, (uint8_t *)&ctrl5_int2_reg, 1) != 0) {
+ return 1;
+ }
- if (lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL, (uint8_t *)&ctrl5_int2_reg, 1) != 0)
- {
- return 1;
- }
+ ctrl5_int2_reg.int2_sleep_chg = PROPERTY_DISABLE;
- /* Read INT1 Wake Up event and INT1 6D Orientation event */
- if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL, (uint8_t *)&ctrl4_int1_reg, 1) != 0)
- {
- return 1;
- }
+ if (lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL, (uint8_t *)&ctrl5_int2_reg, 1) != 0) {
+ return 1;
+ }
- /*Disable Interrupts bit if none event is still enabled */
- if(ctrl5_int2_reg.int2_sleep_chg == 0 && ctrl4_int1_reg.int1_wu == 0 && ctrl4_int1_reg.int1_6d == 0)
- {
- if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL_REG7, (uint8_t *)&ctrl_reg7, 1) != 0)
- {
- return 1;
+ /* Read INT1 Wake Up event and INT1 6D Orientation event */
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL, (uint8_t *)&ctrl4_int1_reg, 1) != 0) {
+ return 1;
}
- ctrl_reg7.interrupts_enable = PROPERTY_DISABLE;
+ /*Disable Interrupts bit if none event is still enabled */
+ if (ctrl5_int2_reg.int2_sleep_chg == 0 && ctrl4_int1_reg.int1_wu == 0 && ctrl4_int1_reg.int1_6d == 0) {
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL_REG7, (uint8_t *)&ctrl_reg7, 1) != 0) {
+ return 1;
+ }
- if (lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL_REG7, (uint8_t *)&ctrl_reg7, 1) != 0)
- {
- return 1;
+ ctrl_reg7.interrupts_enable = PROPERTY_DISABLE;
+
+ if (lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL_REG7, (uint8_t *)&ctrl_reg7, 1) != 0) {
+ return 1;
+ }
}
- }
-
- /* Disable inactivity detection. */
- if (lis2dw12_act_mode_set(&_reg_ctx, LIS2DW12_NO_DETECTION) != 0)
- {
- return 1;
- }
- /* Reset wake up threshold. */
- if (lis2dw12_wkup_threshold_set(&_reg_ctx, 0x00) != 0)
- {
- return 1;
- }
+ /* Disable inactivity detection. */
+ if (lis2dw12_act_mode_set(&_reg_ctx, LIS2DW12_NO_DETECTION) != 0) {
+ return 1;
+ }
- /* SLEEP_DUR setting */
- if (lis2dw12_act_sleep_dur_set(&_reg_ctx, 0x00) != 0)
- {
- return 1;
- }
+ /* Reset wake up threshold. */
+ if (lis2dw12_wkup_threshold_set(&_reg_ctx, 0x00) != 0) {
+ return 1;
+ }
- return 0;
+ /* SLEEP_DUR setting */
+ if (lis2dw12_act_sleep_dur_set(&_reg_ctx, 0x00) != 0) {
+ return 1;
+ }
+
+ return 0;
}
/**
@@ -1135,13 +1053,12 @@
*/
int LIS2DW12Sensor::set_sleep_duration(uint8_t dur)
{
- /* Set sleep duration. */
- if (lis2dw12_act_sleep_dur_set(&_reg_ctx, dur) != 0)
- {
- return 1;
- }
+ /* Set sleep duration. */
+ if (lis2dw12_act_sleep_dur_set(&_reg_ctx, dur) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -1151,41 +1068,36 @@
*/
int LIS2DW12Sensor::enable_6d_orientation(void)
{
- int32_t ret = 0;
- lis2dw12_ctrl4_int1_pad_ctrl_t val;
+ int32_t ret = 0;
+ lis2dw12_ctrl4_int1_pad_ctrl_t val;
- /* Output Data Rate selection */
- if(set_x_odr(200.0f) == 1)
- {
- return 1;
- }
-
- /* Full scale selection. */
- if(set_x_fs(2.0f) == 1)
- {
- return 1;
- }
+ /* Output Data Rate selection */
+ if (set_x_odr(200.0f) == 1) {
+ return 1;
+ }
+
+ /* Full scale selection. */
+ if (set_x_fs(2.0f) == 1) {
+ return 1;
+ }
- /* 6D orientation threshold. */
- if (lis2dw12_6d_threshold_set(&_reg_ctx, 2) != 0) /* 60 degrees */
- {
- return 1;
- }
+ /* 6D orientation threshold. */
+ if (lis2dw12_6d_threshold_set(&_reg_ctx, 2) != 0) { /* 60 degrees */
+ return 1;
+ }
- /* Enable 6D orientation event on INT1 pin */
- if (lis2dw12_pin_int1_route_get(&_reg_ctx, &val) != 0)
- {
- return 1;
- }
+ /* Enable 6D orientation event on INT1 pin */
+ if (lis2dw12_pin_int1_route_get(&_reg_ctx, &val) != 0) {
+ return 1;
+ }
- val.int1_6d = PROPERTY_ENABLE;
+ val.int1_6d = PROPERTY_ENABLE;
- if (lis2dw12_pin_int1_route_set(&_reg_ctx, &val) != 0)
- {
- return 1;
- }
+ if (lis2dw12_pin_int1_route_set(&_reg_ctx, &val) != 0) {
+ return 1;
+ }
- return ret;
+ return ret;
}
/**
@@ -1194,52 +1106,45 @@
*/
int LIS2DW12Sensor::disable_6d_orientation(void)
{
- lis2dw12_ctrl4_int1_pad_ctrl_t ctrl4_int1_reg;
- lis2dw12_ctrl5_int2_pad_ctrl_t ctrl5_int2_reg;
- lis2dw12_ctrl_reg7_t ctrl_reg7;
+ lis2dw12_ctrl4_int1_pad_ctrl_t ctrl4_int1_reg;
+ lis2dw12_ctrl5_int2_pad_ctrl_t ctrl5_int2_reg;
+ lis2dw12_ctrl_reg7_t ctrl_reg7;
- /* Disable 6D orientation event on INT1 pin */
- if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL, (uint8_t *)&ctrl4_int1_reg, 1) != 0)
- {
- return 1;
- }
-
- ctrl4_int1_reg.int1_6d = PROPERTY_DISABLE;
+ /* Disable 6D orientation event on INT1 pin */
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL, (uint8_t *)&ctrl4_int1_reg, 1) != 0) {
+ return 1;
+ }
- if (lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL, (uint8_t *)&ctrl4_int1_reg, 1) != 0)
- {
- return 1;
- }
+ ctrl4_int1_reg.int1_6d = PROPERTY_DISABLE;
- /* Read INT2 Sleep Change */
- if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL, (uint8_t *)&ctrl5_int2_reg, 1) != 0)
- {
- return 1;
- }
+ if (lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL, (uint8_t *)&ctrl4_int1_reg, 1) != 0) {
+ return 1;
+ }
- /*Disable Interrupts bit if none event is still enabled */
- if(ctrl5_int2_reg.int2_sleep_chg == 0 && ctrl4_int1_reg.int1_wu == 0 && ctrl4_int1_reg.int1_6d == 0)
- {
- if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL_REG7, (uint8_t *)&ctrl_reg7, 1) != 0)
- {
- return 1;
+ /* Read INT2 Sleep Change */
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL, (uint8_t *)&ctrl5_int2_reg, 1) != 0) {
+ return 1;
}
- ctrl_reg7.interrupts_enable = PROPERTY_DISABLE;
+ /*Disable Interrupts bit if none event is still enabled */
+ if (ctrl5_int2_reg.int2_sleep_chg == 0 && ctrl4_int1_reg.int1_wu == 0 && ctrl4_int1_reg.int1_6d == 0) {
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL_REG7, (uint8_t *)&ctrl_reg7, 1) != 0) {
+ return 1;
+ }
- if (lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL_REG7, (uint8_t *)&ctrl_reg7, 1) != 0)
- {
- return 1;
- }
- }
+ ctrl_reg7.interrupts_enable = PROPERTY_DISABLE;
- /* Reset 6D orientation threshold. */
- if (lis2dw12_6d_threshold_set(&_reg_ctx, 0) != 0)
- {
- return 1;
- }
+ if (lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL_REG7, (uint8_t *)&ctrl_reg7, 1) != 0) {
+ return 1;
+ }
+ }
- return 0;
+ /* Reset 6D orientation threshold. */
+ if (lis2dw12_6d_threshold_set(&_reg_ctx, 0) != 0) {
+ return 1;
+ }
+
+ return 0;
}
/**
@@ -1249,17 +1154,15 @@
*/
int LIS2DW12Sensor::set_6d_orientation_threshold(uint8_t thr)
{
- if(thr > 3)
- {
- return 1;
- }
+ if (thr > 3) {
+ return 1;
+ }
- if (lis2dw12_6d_threshold_set(&_reg_ctx, thr) != 0)
- {
- return 1;
- }
+ if (lis2dw12_6d_threshold_set(&_reg_ctx, thr) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -1269,16 +1172,15 @@
*/
int LIS2DW12Sensor::get_6d_orientation_xl(uint8_t *xl)
{
- lis2dw12_sixd_src_t data;
+ lis2dw12_sixd_src_t data;
- if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_SIXD_SRC, (uint8_t *)&data, 1) != 0)
- {
- return 1;
- }
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_SIXD_SRC, (uint8_t *)&data, 1) != 0) {
+ return 1;
+ }
- *xl = data.xl;
+ *xl = data.xl;
- return 0;
+ return 0;
}
/**
@@ -1288,16 +1190,15 @@
*/
int LIS2DW12Sensor::get_6d_orientation_xh(uint8_t *xh)
{
- lis2dw12_sixd_src_t data;
+ lis2dw12_sixd_src_t data;
- if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_SIXD_SRC, (uint8_t *)&data, 1) != 0)
- {
- return 1;
- }
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_SIXD_SRC, (uint8_t *)&data, 1) != 0) {
+ return 1;
+ }
- *xh = data.xh;
+ *xh = data.xh;
- return 0;
+ return 0;
}
/**
@@ -1307,16 +1208,15 @@
*/
int LIS2DW12Sensor::get_6d_orientation_yl(uint8_t *yl)
{
- lis2dw12_sixd_src_t data;
+ lis2dw12_sixd_src_t data;
- if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_SIXD_SRC, (uint8_t *)&data, 1) != 0)
- {
- return 1;
- }
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_SIXD_SRC, (uint8_t *)&data, 1) != 0) {
+ return 1;
+ }
- *yl = data.yl;
+ *yl = data.yl;
- return 0;
+ return 0;
}
/**
@@ -1326,16 +1226,15 @@
*/
int LIS2DW12Sensor::get_6d_orientation_yh(uint8_t *yh)
{
- lis2dw12_sixd_src_t data;
+ lis2dw12_sixd_src_t data;
- if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_SIXD_SRC, (uint8_t *)&data, 1) != 0)
- {
- return 1;
- }
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_SIXD_SRC, (uint8_t *)&data, 1) != 0) {
+ return 1;
+ }
- *yh = data.yh;
+ *yh = data.yh;
- return 0;
+ return 0;
}
/**
@@ -1345,16 +1244,15 @@
*/
int LIS2DW12Sensor::get_6d_orientation_zl(uint8_t *zl)
{
- lis2dw12_sixd_src_t data;
+ lis2dw12_sixd_src_t data;
- if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_SIXD_SRC, (uint8_t *)&data, 1) != 0)
- {
- return 1;
- }
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_SIXD_SRC, (uint8_t *)&data, 1) != 0) {
+ return 1;
+ }
- *zl = data.zl;
+ *zl = data.zl;
- return 0;
+ return 0;
}
/**
@@ -1364,16 +1262,15 @@
*/
int LIS2DW12Sensor::get_6d_orientation_zh(uint8_t *zh)
{
- lis2dw12_sixd_src_t data;
+ lis2dw12_sixd_src_t data;
- if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_SIXD_SRC, (uint8_t *)&data, 1) != 0)
- {
- return 1;
- }
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_SIXD_SRC, (uint8_t *)&data, 1) != 0) {
+ return 1;
+ }
- *zh = data.zh;
+ *zh = data.zh;
- return 0;
+ return 0;
}
/**
@@ -1383,52 +1280,43 @@
*/
int LIS2DW12Sensor::get_event_status(LIS2DW12_Event_Status_t *status)
{
- lis2dw12_status_t status_reg;
- lis2dw12_ctrl4_int1_pad_ctrl_t ctrl4_int1_reg;
- lis2dw12_ctrl5_int2_pad_ctrl_t ctrl5_int2_reg;
+ lis2dw12_status_t status_reg;
+ lis2dw12_ctrl4_int1_pad_ctrl_t ctrl4_int1_reg;
+ lis2dw12_ctrl5_int2_pad_ctrl_t ctrl5_int2_reg;
- (void)memset((void *)status, 0x0, sizeof(LIS2DW12_Event_Status_t));
+ (void)memset((void *)status, 0x0, sizeof(LIS2DW12_Event_Status_t));
- if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_STATUS, (uint8_t *)&status_reg, 1) != 0)
- {
- return 1;
- }
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_STATUS, (uint8_t *)&status_reg, 1) != 0) {
+ return 1;
+ }
- if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL, (uint8_t *)&ctrl4_int1_reg, 1) != 0)
- {
- return 1;
- }
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL, (uint8_t *)&ctrl4_int1_reg, 1) != 0) {
+ return 1;
+ }
- if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL, (uint8_t *)&ctrl5_int2_reg, 1) != 0)
- {
- return 1;
- }
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL, (uint8_t *)&ctrl5_int2_reg, 1) != 0) {
+ return 1;
+ }
- if (ctrl4_int1_reg.int1_wu == 1U)
- {
- if (status_reg.wu_ia == 1U)
- {
- status->WakeUpStatus = 1;
+ if (ctrl4_int1_reg.int1_wu == 1U) {
+ if (status_reg.wu_ia == 1U) {
+ status->WakeUpStatus = 1;
+ }
}
- }
- if (ctrl4_int1_reg.int1_6d == 1U)
- {
- if (status_reg._6d_ia == 1U)
- {
- status->D6DOrientationStatus = 1;
+ if (ctrl4_int1_reg.int1_6d == 1U) {
+ if (status_reg._6d_ia == 1U) {
+ status->D6DOrientationStatus = 1;
+ }
}
- }
- if (ctrl5_int2_reg.int2_sleep_chg == 1U)
- {
- if (status_reg.sleep_state == 1U)
- {
- status->SleepStatus = 1;
+ if (ctrl5_int2_reg.int2_sleep_chg == 1U) {
+ if (status_reg.sleep_state == 1U) {
+ status->SleepStatus = 1;
+ }
}
- }
- return 0;
+ return 0;
}
/**
@@ -1438,23 +1326,19 @@
*/
int LIS2DW12Sensor::get_fifo_num_samples(uint16_t *num_samples)
{
- lis2dw12_fifo_samples_t fifo_samples;
+ lis2dw12_fifo_samples_t fifo_samples;
- if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_FIFO_SAMPLES, (uint8_t *)&fifo_samples, 1) != 0)
- {
- return 1;
- }
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_FIFO_SAMPLES, (uint8_t *)&fifo_samples, 1) != 0) {
+ return 1;
+ }
- if(fifo_samples.diff == 0x20)
- {
- *num_samples = 32;
- }
- else
- {
- *num_samples = fifo_samples.diff;
- }
+ if (fifo_samples.diff == 0x20) {
+ *num_samples = 32;
+ } else {
+ *num_samples = fifo_samples.diff;
+ }
- return 0;
+ return 0;
}
/**
@@ -1464,34 +1348,31 @@
*/
int LIS2DW12Sensor::set_fifo_mode(uint8_t mode)
{
- int32_t ret = 0;
+ int32_t ret = 0;
- /* Verify that the passed parameter contains one of the valid values. */
- switch ((lis2dw12_fmode_t)mode)
- {
- case LIS2DW12_BYPASS_MODE:
- case LIS2DW12_FIFO_MODE:
- case LIS2DW12_STREAM_TO_FIFO_MODE:
- case LIS2DW12_BYPASS_TO_STREAM_MODE:
- case LIS2DW12_STREAM_MODE:
- break;
+ /* Verify that the passed parameter contains one of the valid values. */
+ switch ((lis2dw12_fmode_t)mode) {
+ case LIS2DW12_BYPASS_MODE:
+ case LIS2DW12_FIFO_MODE:
+ case LIS2DW12_STREAM_TO_FIFO_MODE:
+ case LIS2DW12_BYPASS_TO_STREAM_MODE:
+ case LIS2DW12_STREAM_MODE:
+ break;
- default:
- ret = 1;
- break;
- }
+ default:
+ ret = 1;
+ break;
+ }
- if (ret == 1)
- {
+ if (ret == 1) {
+ return ret;
+ }
+
+ if (lis2dw12_fifo_mode_set(&_reg_ctx, (lis2dw12_fmode_t)mode) != 0) {
+ return 1;
+ }
+
return ret;
- }
-
- if (lis2dw12_fifo_mode_set(&_reg_ctx, (lis2dw12_fmode_t)mode) != 0)
- {
- return 1;
- }
-
- return ret;
}
/**
@@ -1503,12 +1384,11 @@
int LIS2DW12Sensor::read_reg(uint8_t reg, uint8_t *data)
{
- if (lis2dw12_read_reg(&_reg_ctx, reg, data, 1) != 0)
- {
- return 1;
- }
+ if (lis2dw12_read_reg(&_reg_ctx, reg, data, 1) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -1520,21 +1400,20 @@
int LIS2DW12Sensor::write_reg(uint8_t reg, uint8_t data)
{
- if (lis2dw12_write_reg(&_reg_ctx, reg, &data, 1) != 0)
- {
- return 1;
- }
+ if (lis2dw12_write_reg(&_reg_ctx, reg, &data, 1) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
int32_t LIS2DW12_io_write(void *handle, uint8_t WriteAddr, uint8_t *pBuffer, uint16_t nBytesToWrite)
{
- return ((LIS2DW12Sensor *)handle)->io_write(pBuffer, WriteAddr, nBytesToWrite);
+ return ((LIS2DW12Sensor *)handle)->io_write(pBuffer, WriteAddr, nBytesToWrite);
}
int32_t LIS2DW12_io_read(void *handle, uint8_t ReadAddr, uint8_t *pBuffer, uint16_t nBytesToRead)
{
- return ((LIS2DW12Sensor *)handle)->io_read(pBuffer, ReadAddr, nBytesToRead);
+ return ((LIS2DW12Sensor *)handle)->io_read(pBuffer, ReadAddr, nBytesToRead);
}
--- a/LIS2DW12Sensor.h Wed Nov 21 15:43:22 2018 +0000
+++ b/LIS2DW12Sensor.h Wed Jul 24 14:18:07 2019 +0000
@@ -66,40 +66,36 @@
/* Typedefs ------------------------------------------------------------------*/
-typedef struct
-{
- unsigned int WakeUpStatus : 1;
- unsigned int D6DOrientationStatus : 1;
- unsigned int SleepStatus : 1;
+typedef struct {
+ unsigned int WakeUpStatus : 1;
+ unsigned int D6DOrientationStatus : 1;
+ unsigned int SleepStatus : 1;
} LIS2DW12_Event_Status_t;
-typedef enum
-{
- LIS2DW12_HIGH_PERFORMANCE_MODE,
- LIS2DW12_LOW_POWER_MODE4,
- LIS2DW12_LOW_POWER_MODE3,
- LIS2DW12_LOW_POWER_MODE2,
- LIS2DW12_LOW_POWER_MODE1
+typedef enum {
+ LIS2DW12_HIGH_PERFORMANCE_MODE,
+ LIS2DW12_LOW_POWER_MODE4,
+ LIS2DW12_LOW_POWER_MODE3,
+ LIS2DW12_LOW_POWER_MODE2,
+ LIS2DW12_LOW_POWER_MODE1
} LIS2DW12_Operating_Mode_t;
-typedef enum
-{
- LIS2DW12_LOW_NOISE_DISABLE,
- LIS2DW12_LOW_NOISE_ENABLE
+typedef enum {
+ LIS2DW12_LOW_NOISE_DISABLE,
+ LIS2DW12_LOW_NOISE_ENABLE
} LIS2DW12_Low_Noise_t;
/* Class Declaration ---------------------------------------------------------*/
-
+
/**
* Abstract class of an LIS2DW12 Inertial Measurement Unit (IMU) 3 axes
* sensor.
*/
-class LIS2DW12Sensor : public MotionSensor
-{
- public:
+class LIS2DW12Sensor : public MotionSensor {
+public:
enum SPI_type_t {SPI3W, SPI4W};
- LIS2DW12Sensor(DevI2C *i2c, uint8_t address=LIS2DW12_I2C_ADD_H, PinName int1_pin=NC, PinName int2_pin=NC);
- LIS2DW12Sensor(SPI *spi, PinName cs_pin, PinName int1_pin=NC, PinName int2_pin=NC, SPI_type_t spi_type=SPI4W);
+ LIS2DW12Sensor(DevI2C *i2c, uint8_t address = LIS2DW12_I2C_ADD_H, PinName int1_pin = NC, PinName int2_pin = NC);
+ LIS2DW12Sensor(SPI *spi, PinName cs_pin, PinName int1_pin = NC, PinName int2_pin = NC, SPI_type_t spi_type = SPI4W);
virtual int init(void *init);
virtual int read_id(uint8_t *id);
virtual int get_x_axes(int32_t *pData);
@@ -109,7 +105,7 @@
virtual int set_x_odr(float odr);
virtual int get_x_fs(float *fullScale);
virtual int set_x_fs(float fullScale);
- int set_x_odr_with_mode(float odr, LIS2DW12_Operating_Mode_t mode=LIS2DW12_HIGH_PERFORMANCE_MODE, LIS2DW12_Low_Noise_t noise=LIS2DW12_LOW_NOISE_DISABLE);
+ int set_x_odr_with_mode(float odr, LIS2DW12_Operating_Mode_t mode = LIS2DW12_HIGH_PERFORMANCE_MODE, LIS2DW12_Low_Noise_t noise = LIS2DW12_LOW_NOISE_DISABLE);
int enable_x(void);
int disable_x(void);
int enable_wake_up_detection(void);
@@ -133,7 +129,7 @@
int set_fifo_mode(uint8_t mode);
int read_reg(uint8_t reg, uint8_t *data);
int write_reg(uint8_t reg, uint8_t data);
-
+
/**
* @brief Attaching an interrupt handler to the INT1 interrupt.
* @param fptr An interrupt handler.
@@ -153,7 +149,7 @@
{
_int1_irq.enable_irq();
}
-
+
/**
* @brief Disabling the INT1 interrupt handling.
* @param None.
@@ -163,7 +159,7 @@
{
_int1_irq.disable_irq();
}
-
+
/**
* @brief Attaching an interrupt handler to the INT2 interrupt.
* @param fptr An interrupt handler.
@@ -183,7 +179,7 @@
{
_int2_irq.enable_irq();
}
-
+
/**
* @brief Disabling the INT2 interrupt handling.
* @param None.
@@ -193,7 +189,7 @@
{
_int2_irq.disable_irq();
}
-
+
/**
* @brief Utility function to read data.
* @param pBuffer: pointer to data to be read.
@@ -201,30 +197,32 @@
* @param NumByteToRead: number of bytes to be read.
* @retval 0 if ok, an error code otherwise.
*/
- uint8_t io_read(uint8_t* pBuffer, uint8_t RegisterAddr, uint16_t NumByteToRead)
- {
+ uint8_t io_read(uint8_t *pBuffer, uint8_t RegisterAddr, uint16_t NumByteToRead)
+ {
if (_dev_spi) {
- /* Write Reg Address */
+ /* Write Reg Address */
_dev_spi->lock();
- _cs_pin = 0;
- if (_spi_type == SPI4W) {
+ _cs_pin = 0;
+ if (_spi_type == SPI4W) {
_dev_spi->write(RegisterAddr | 0x80);
- for (int i=0; i<NumByteToRead; i++) {
- *(pBuffer+i) = _dev_spi->write(0x00);
+ for (int i = 0; i < NumByteToRead; i++) {
+ *(pBuffer + i) = _dev_spi->write(0x00);
}
- } else if (_spi_type == SPI3W){
+ } else if (_spi_type == SPI3W) {
/* Write RD Reg Address with RD bit*/
- uint8_t TxByte = RegisterAddr | 0x80;
+ uint8_t TxByte = RegisterAddr | 0x80;
_dev_spi->write((char *)&TxByte, 1, (char *)pBuffer, (int) NumByteToRead);
- }
+ }
_cs_pin = 1;
- _dev_spi->unlock();
+ _dev_spi->unlock();
return 0;
- }
- if (_dev_i2c) return (uint8_t) _dev_i2c->i2c_read(pBuffer, _address, RegisterAddr, NumByteToRead);
+ }
+ if (_dev_i2c) {
+ return (uint8_t) _dev_i2c->i2c_read(pBuffer, _address, RegisterAddr, NumByteToRead);
+ }
return 1;
}
-
+
/**
* @brief Utility function to write data.
* @param pBuffer: pointer to data to be written.
@@ -232,36 +230,38 @@
* @param NumByteToWrite: number of bytes to write.
* @retval 0 if ok, an error code otherwise.
*/
- uint8_t io_write(uint8_t* pBuffer, uint8_t RegisterAddr, uint16_t NumByteToWrite)
- {
- if (_dev_spi) {
+ uint8_t io_write(uint8_t *pBuffer, uint8_t RegisterAddr, uint16_t NumByteToWrite)
+ {
+ if (_dev_spi) {
_dev_spi->lock();
_cs_pin = 0;
- _dev_spi->write(RegisterAddr);
- _dev_spi->write((char *)pBuffer, (int) NumByteToWrite, NULL, 0);
- _cs_pin = 1;
+ _dev_spi->write(RegisterAddr);
+ _dev_spi->write((char *)pBuffer, (int) NumByteToWrite, NULL, 0);
+ _cs_pin = 1;
_dev_spi->unlock();
- return 0;
- }
- if (_dev_i2c) return (uint8_t) _dev_i2c->i2c_write(pBuffer, _address, RegisterAddr, NumByteToWrite);
+ return 0;
+ }
+ if (_dev_i2c) {
+ return (uint8_t) _dev_i2c->i2c_write(pBuffer, _address, RegisterAddr, NumByteToWrite);
+ }
return 1;
}
- private:
+private:
int set_x_odr_when_enabled(float odr, LIS2DW12_Operating_Mode_t mode, LIS2DW12_Low_Noise_t noise);
int set_x_odr_when_disabled(float odr, LIS2DW12_Operating_Mode_t mode, LIS2DW12_Low_Noise_t noise);
/* Helper classes. */
DevI2C *_dev_i2c;
SPI *_dev_spi;
-
+
/* Configuration */
uint8_t _address;
- DigitalOut _cs_pin;
+ DigitalOut _cs_pin;
InterruptIn _int1_irq;
InterruptIn _int2_irq;
SPI_type_t _spi_type;
-
+
uint8_t _x_is_enabled;
float _x_last_odr;
LIS2DW12_Operating_Mode_t _x_last_operating_mode;
@@ -271,12 +271,12 @@
};
#ifdef __cplusplus
- extern "C" {
+extern "C" {
#endif
-int32_t LIS2DW12_io_write( void *handle, uint8_t WriteAddr, uint8_t *pBuffer, uint16_t nBytesToWrite );
-int32_t LIS2DW12_io_read( void *handle, uint8_t ReadAddr, uint8_t *pBuffer, uint16_t nBytesToRead );
+int32_t LIS2DW12_io_write(void *handle, uint8_t WriteAddr, uint8_t *pBuffer, uint16_t nBytesToWrite);
+int32_t LIS2DW12_io_read(void *handle, uint8_t ReadAddr, uint8_t *pBuffer, uint16_t nBytesToRead);
#ifdef __cplusplus
- }
+}
#endif
#endif
--- a/lis2dw12_reg.c Wed Nov 21 15:43:22 2018 +0000
+++ b/lis2dw12_reg.c Wed Jul 24 14:18:07 2019 +0000
@@ -64,12 +64,12 @@
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
-int32_t lis2dw12_read_reg(lis2dw12_ctx_t* ctx, uint8_t reg, uint8_t* data,
+int32_t lis2dw12_read_reg(lis2dw12_ctx_t *ctx, uint8_t reg, uint8_t *data,
uint16_t len)
{
- int32_t ret;
- ret = ctx->read_reg(ctx->handle, reg, data, len);
- return ret;
+ int32_t ret;
+ ret = ctx->read_reg(ctx->handle, reg, data, len);
+ return ret;
}
/**
@@ -82,19 +82,19 @@
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
-int32_t lis2dw12_write_reg(lis2dw12_ctx_t* ctx, uint8_t reg, uint8_t* data,
+int32_t lis2dw12_write_reg(lis2dw12_ctx_t *ctx, uint8_t reg, uint8_t *data,
uint16_t len)
{
- int32_t ret;
- ret = ctx->write_reg(ctx->handle, reg, data, len);
- return ret;
+ int32_t ret;
+ ret = ctx->write_reg(ctx->handle, reg, data, len);
+ return ret;
}
/**
* @}
*
*/
-
+
/**
* @defgroup LIS2DW12_Sensitivity
* @brief These functions convert raw-data into engineering units.
@@ -104,47 +104,47 @@
float lis2dw12_from_fs2_to_mg(int16_t lsb)
{
- return ((float)lsb) * 0.061f;
+ return ((float)lsb) * 0.061f;
}
float lis2dw12_from_fs4_to_mg(int16_t lsb)
{
- return ((float)lsb) * 0.122f;
+ return ((float)lsb) * 0.122f;
}
float lis2dw12_from_fs8_to_mg(int16_t lsb)
{
- return ((float)lsb) * 0.244f;
+ return ((float)lsb) * 0.244f;
}
float lis2dw12_from_fs16_to_mg(int16_t lsb)
{
- return ((float)lsb) *0.488f;
+ return ((float)lsb) * 0.488f;
}
float lis2dw12_from_fs2_lp1_to_mg(int16_t lsb)
{
- return ((float)lsb) * 0.061f;
+ return ((float)lsb) * 0.061f;
}
float lis2dw12_from_fs4_lp1_to_mg(int16_t lsb)
{
- return ((float)lsb) * 0.122f;
+ return ((float)lsb) * 0.122f;
}
float lis2dw12_from_fs8_lp1_to_mg(int16_t lsb)
{
- return ((float)lsb) * 0.244f;
+ return ((float)lsb) * 0.244f;
}
float lis2dw12_from_fs16_lp1_to_mg(int16_t lsb)
{
- return ((float)lsb) * 0.488f;
+ return ((float)lsb) * 0.488f;
}
float lis2dw12_from_lsb_to_celsius(int16_t lsb)
{
- return (((float)lsb / 16.0f) + 25.0f);
+ return (((float)lsb / 16.0f) + 25.0f);
}
/**
@@ -154,7 +154,7 @@
/**
* @defgroup LIS2DW12_Data_Generation
- * @brief This section groups all the functions concerning
+ * @brief This section groups all the functions concerning
* data generation
* @{
*
@@ -171,24 +171,24 @@
*/
int32_t lis2dw12_power_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_mode_t val)
{
- lis2dw12_ctrl1_t ctrl1;
- lis2dw12_ctrl6_t ctrl6;
- int32_t ret;
+ lis2dw12_ctrl1_t ctrl1;
+ lis2dw12_ctrl6_t ctrl6;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL1,(uint8_t*) &ctrl1, 1);
- if (ret == 0) {
- ctrl1.mode = ( (uint8_t) val & 0x0CU ) >> 2;
- ctrl1.lp_mode = (uint8_t) val & 0x03U ;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL1,(uint8_t*) &ctrl1, 1);
- }
- if (ret == 0) {
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) &ctrl6, 1);
- }
- if (ret == 0) {
- ctrl6.low_noise = ( (uint8_t) val & 0x10U ) >> 4;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) &ctrl6, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL1, (uint8_t *) &ctrl1, 1);
+ if (ret == 0) {
+ ctrl1.mode = ((uint8_t) val & 0x0CU) >> 2;
+ ctrl1.lp_mode = (uint8_t) val & 0x03U ;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL1, (uint8_t *) &ctrl1, 1);
+ }
+ if (ret == 0) {
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) &ctrl6, 1);
+ }
+ if (ret == 0) {
+ ctrl6.low_noise = ((uint8_t) val & 0x10U) >> 4;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) &ctrl6, 1);
+ }
+ return ret;
}
/**
@@ -202,76 +202,76 @@
*/
int32_t lis2dw12_power_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_mode_t *val)
{
- lis2dw12_ctrl1_t ctrl1;
- lis2dw12_ctrl6_t ctrl6;
- int32_t ret;
+ lis2dw12_ctrl1_t ctrl1;
+ lis2dw12_ctrl6_t ctrl6;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL1,(uint8_t*) &ctrl1, 1);
- if (ret == 0) {
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) &ctrl6, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL1, (uint8_t *) &ctrl1, 1);
+ if (ret == 0) {
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) &ctrl6, 1);
- switch (((ctrl6.low_noise << 4) + (ctrl1.mode << 2) +
- ctrl1.lp_mode)) {
- case LIS2DW12_HIGH_PERFORMANCE:
- *val = LIS2DW12_HIGH_PERFORMANCE;
- break;
- case LIS2DW12_CONT_LOW_PWR_4:
- *val = LIS2DW12_CONT_LOW_PWR_4;
- break;
- case LIS2DW12_CONT_LOW_PWR_3:
- *val = LIS2DW12_CONT_LOW_PWR_3;
- break;
- case LIS2DW12_CONT_LOW_PWR_2:
- *val = LIS2DW12_CONT_LOW_PWR_2;
- break;
- case LIS2DW12_CONT_LOW_PWR_12bit:
- *val = LIS2DW12_CONT_LOW_PWR_12bit;
- break;
- case LIS2DW12_SINGLE_LOW_PWR_4:
- *val = LIS2DW12_SINGLE_LOW_PWR_4;
- break;
- case LIS2DW12_SINGLE_LOW_PWR_3:
- *val = LIS2DW12_SINGLE_LOW_PWR_3;
- break;
- case LIS2DW12_SINGLE_LOW_PWR_2:
- *val = LIS2DW12_SINGLE_LOW_PWR_2;
- break;
- case LIS2DW12_SINGLE_LOW_PWR_12bit:
- *val = LIS2DW12_SINGLE_LOW_PWR_12bit;
- break;
- case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
- *val = LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE;
- break;
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
- *val = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4;
- break;
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
- *val = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3;
- break;
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
- *val = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2;
- break;
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
- *val = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit;
- break;
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
- *val = LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4;
- break;
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
- *val = LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3;
- break;
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
- *val = LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2;
- break;
- case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
- *val = LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit;
- break;
- default:
- *val = LIS2DW12_HIGH_PERFORMANCE;
- break;
+ switch (((ctrl6.low_noise << 4) + (ctrl1.mode << 2) +
+ ctrl1.lp_mode)) {
+ case LIS2DW12_HIGH_PERFORMANCE:
+ *val = LIS2DW12_HIGH_PERFORMANCE;
+ break;
+ case LIS2DW12_CONT_LOW_PWR_4:
+ *val = LIS2DW12_CONT_LOW_PWR_4;
+ break;
+ case LIS2DW12_CONT_LOW_PWR_3:
+ *val = LIS2DW12_CONT_LOW_PWR_3;
+ break;
+ case LIS2DW12_CONT_LOW_PWR_2:
+ *val = LIS2DW12_CONT_LOW_PWR_2;
+ break;
+ case LIS2DW12_CONT_LOW_PWR_12bit:
+ *val = LIS2DW12_CONT_LOW_PWR_12bit;
+ break;
+ case LIS2DW12_SINGLE_LOW_PWR_4:
+ *val = LIS2DW12_SINGLE_LOW_PWR_4;
+ break;
+ case LIS2DW12_SINGLE_LOW_PWR_3:
+ *val = LIS2DW12_SINGLE_LOW_PWR_3;
+ break;
+ case LIS2DW12_SINGLE_LOW_PWR_2:
+ *val = LIS2DW12_SINGLE_LOW_PWR_2;
+ break;
+ case LIS2DW12_SINGLE_LOW_PWR_12bit:
+ *val = LIS2DW12_SINGLE_LOW_PWR_12bit;
+ break;
+ case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
+ *val = LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE;
+ break;
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
+ *val = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4;
+ break;
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
+ *val = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3;
+ break;
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
+ *val = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2;
+ break;
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
+ *val = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit;
+ break;
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
+ *val = LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4;
+ break;
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
+ *val = LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3;
+ break;
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
+ *val = LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2;
+ break;
+ case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
+ *val = LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit;
+ break;
+ default:
+ *val = LIS2DW12_HIGH_PERFORMANCE;
+ break;
+ }
}
- }
- return ret;
+ return ret;
}
/**
@@ -284,23 +284,23 @@
*/
int32_t lis2dw12_data_rate_set(lis2dw12_ctx_t *ctx, lis2dw12_odr_t val)
{
- lis2dw12_ctrl1_t ctrl1;
- lis2dw12_ctrl3_t ctrl3;
- int32_t ret;
+ lis2dw12_ctrl1_t ctrl1;
+ lis2dw12_ctrl3_t ctrl3;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL1,(uint8_t*) &ctrl1, 1);
- if (ret == 0) {
- ctrl1.odr = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL1,(uint8_t*) &ctrl1, 1);
- }
- if (ret == 0) {
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) &ctrl3, 1);
- }
- if (ret == 0) {
- ctrl3.slp_mode = ( (uint8_t) val & 0x30U ) >> 4;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) &ctrl3, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL1, (uint8_t *) &ctrl1, 1);
+ if (ret == 0) {
+ ctrl1.odr = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL1, (uint8_t *) &ctrl1, 1);
+ }
+ if (ret == 0) {
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) &ctrl3, 1);
+ }
+ if (ret == 0) {
+ ctrl3.slp_mode = ((uint8_t) val & 0x30U) >> 4;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) &ctrl3, 1);
+ }
+ return ret;
}
/**
@@ -313,61 +313,61 @@
*/
int32_t lis2dw12_data_rate_get(lis2dw12_ctx_t *ctx, lis2dw12_odr_t *val)
{
- lis2dw12_ctrl1_t ctrl1;
- lis2dw12_ctrl3_t ctrl3;
- int32_t ret;
+ lis2dw12_ctrl1_t ctrl1;
+ lis2dw12_ctrl3_t ctrl3;
+ int32_t ret;
+
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL1, (uint8_t *) &ctrl1, 1);
+ if (ret == 0) {
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) &ctrl3, 1);
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL1,(uint8_t*) &ctrl1, 1);
- if (ret == 0) {
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) &ctrl3, 1);
-
- switch ((ctrl3.slp_mode << 4) + ctrl1.odr) {
- case LIS2DW12_XL_ODR_OFF:
- *val = LIS2DW12_XL_ODR_OFF;
- break;
- case LIS2DW12_XL_ODR_1Hz6_LP_ONLY:
- *val = LIS2DW12_XL_ODR_1Hz6_LP_ONLY;
- break;
- case LIS2DW12_XL_ODR_12Hz5:
- *val = LIS2DW12_XL_ODR_12Hz5;
- break;
- case LIS2DW12_XL_ODR_25Hz:
- *val = LIS2DW12_XL_ODR_25Hz;
- break;
- case LIS2DW12_XL_ODR_50Hz:
- *val = LIS2DW12_XL_ODR_50Hz;
- break;
- case LIS2DW12_XL_ODR_100Hz:
- *val = LIS2DW12_XL_ODR_100Hz;
- break;
- case LIS2DW12_XL_ODR_200Hz:
- *val = LIS2DW12_XL_ODR_200Hz;
- break;
- case LIS2DW12_XL_ODR_400Hz:
- *val = LIS2DW12_XL_ODR_400Hz;
- break;
- case LIS2DW12_XL_ODR_800Hz:
- *val = LIS2DW12_XL_ODR_800Hz;
- break;
- case LIS2DW12_XL_ODR_1k6Hz:
- *val = LIS2DW12_XL_ODR_1k6Hz;
- break;
- case LIS2DW12_XL_SET_SW_TRIG:
- *val = LIS2DW12_XL_SET_SW_TRIG;
- break;
- case LIS2DW12_XL_SET_PIN_TRIG:
- *val = LIS2DW12_XL_SET_PIN_TRIG;
- break;
- default:
- *val = LIS2DW12_XL_ODR_OFF;
- break;
+ switch ((ctrl3.slp_mode << 4) + ctrl1.odr) {
+ case LIS2DW12_XL_ODR_OFF:
+ *val = LIS2DW12_XL_ODR_OFF;
+ break;
+ case LIS2DW12_XL_ODR_1Hz6_LP_ONLY:
+ *val = LIS2DW12_XL_ODR_1Hz6_LP_ONLY;
+ break;
+ case LIS2DW12_XL_ODR_12Hz5:
+ *val = LIS2DW12_XL_ODR_12Hz5;
+ break;
+ case LIS2DW12_XL_ODR_25Hz:
+ *val = LIS2DW12_XL_ODR_25Hz;
+ break;
+ case LIS2DW12_XL_ODR_50Hz:
+ *val = LIS2DW12_XL_ODR_50Hz;
+ break;
+ case LIS2DW12_XL_ODR_100Hz:
+ *val = LIS2DW12_XL_ODR_100Hz;
+ break;
+ case LIS2DW12_XL_ODR_200Hz:
+ *val = LIS2DW12_XL_ODR_200Hz;
+ break;
+ case LIS2DW12_XL_ODR_400Hz:
+ *val = LIS2DW12_XL_ODR_400Hz;
+ break;
+ case LIS2DW12_XL_ODR_800Hz:
+ *val = LIS2DW12_XL_ODR_800Hz;
+ break;
+ case LIS2DW12_XL_ODR_1k6Hz:
+ *val = LIS2DW12_XL_ODR_1k6Hz;
+ break;
+ case LIS2DW12_XL_SET_SW_TRIG:
+ *val = LIS2DW12_XL_SET_SW_TRIG;
+ break;
+ case LIS2DW12_XL_SET_PIN_TRIG:
+ *val = LIS2DW12_XL_SET_PIN_TRIG;
+ break;
+ default:
+ *val = LIS2DW12_XL_ODR_OFF;
+ break;
+ }
}
- }
- return ret;
+ return ret;
}
/**
- * @brief Block data update.[set]
+ * @brief Block data update.[set]
*
* @param ctx read / write interface definitions
* @param val change the values of bdu in reg CTRL2
@@ -376,15 +376,15 @@
*/
int32_t lis2dw12_block_data_update_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.bdu = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.bdu = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -397,13 +397,13 @@
*/
int32_t lis2dw12_block_data_update_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- *val = reg.bdu;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ *val = reg.bdu;
- return ret;
+ return ret;
}
/**
@@ -416,15 +416,15 @@
*/
int32_t lis2dw12_full_scale_set(lis2dw12_ctx_t *ctx, lis2dw12_fs_t val)
{
- lis2dw12_ctrl6_t reg;
- int32_t ret;
+ lis2dw12_ctrl6_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.fs = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.fs = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -437,44 +437,44 @@
*/
int32_t lis2dw12_full_scale_get(lis2dw12_ctx_t *ctx, lis2dw12_fs_t *val)
{
- lis2dw12_ctrl6_t reg;
- int32_t ret;
+ lis2dw12_ctrl6_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) ®, 1);
- switch (reg.fs) {
- case LIS2DW12_2g:
- *val = LIS2DW12_2g;
- break;
- case LIS2DW12_4g:
- *val = LIS2DW12_4g;
- break;
- case LIS2DW12_8g:
- *val = LIS2DW12_8g;
- break;
- case LIS2DW12_16g:
- *val = LIS2DW12_16g;
- break;
- default:
- *val = LIS2DW12_2g;
- break;
- }
- return ret;
+ switch (reg.fs) {
+ case LIS2DW12_2g:
+ *val = LIS2DW12_2g;
+ break;
+ case LIS2DW12_4g:
+ *val = LIS2DW12_4g;
+ break;
+ case LIS2DW12_8g:
+ *val = LIS2DW12_8g;
+ break;
+ case LIS2DW12_16g:
+ *val = LIS2DW12_16g;
+ break;
+ default:
+ *val = LIS2DW12_2g;
+ break;
+ }
+ return ret;
}
/**
* @brief The STATUS_REG register of the device.[get]
*
* @param ctx read / write interface definitions
- * @param val union of registers from STATUS to
+ * @param val union of registers from STATUS to
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lis2dw12_status_reg_get(lis2dw12_ctx_t *ctx, lis2dw12_status_t *val)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_STATUS, (uint8_t*) val, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_STATUS, (uint8_t *) val, 1);
+ return ret;
}
/**
@@ -487,17 +487,17 @@
*/
int32_t lis2dw12_flag_data_ready_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_status_t reg;
- int32_t ret;
+ lis2dw12_status_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_STATUS,(uint8_t*) ®, 1);
- *val = reg.drdy;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_STATUS, (uint8_t *) ®, 1);
+ *val = reg.drdy;
- return ret;
+ return ret;
}
/**
* @brief Read all the interrupt/status flag of the device.[get]
- *
+ *
* @param ctx read / write interface definitions
* @param val registers STATUS_DUP, WAKE_UP_SRC,
* TAP_SRC, SIXD_SRC, ALL_INT_SRC
@@ -507,15 +507,15 @@
int32_t lis2dw12_all_sources_get(lis2dw12_ctx_t *ctx,
lis2dw12_all_sources_t *val)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_STATUS_DUP, (uint8_t*) val, 5);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_STATUS_DUP, (uint8_t *) val, 5);
+ return ret;
}
/**
- * @brief Accelerometer X-axis user offset correction expressed in two’s
+ * @brief Accelerometer X-axis user offset correction expressed in two’s
* complement, weight depends on bit USR_OFF_W. The value must be
- * in the range [-127 127].[set]
+ * in the range [-127 127].[set]
*
* @param ctx read / write interface definitions
* @param buff buffer that contains data to write
@@ -524,15 +524,15 @@
*/
int32_t lis2dw12_usr_offset_x_set(lis2dw12_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_X_OFS_USR, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_X_OFS_USR, buff, 1);
+ return ret;
}
/**
- * @brief Accelerometer X-axis user offset correction expressed in two’s
+ * @brief Accelerometer X-axis user offset correction expressed in two’s
* complement, weight depends on bit USR_OFF_W. The value must be
- * in the range [-127 127].[get]
+ * in the range [-127 127].[get]
*
* @param ctx read / write interface definitions
* @param buff buffer that stores data read
@@ -541,15 +541,15 @@
*/
int32_t lis2dw12_usr_offset_x_get(lis2dw12_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_X_OFS_USR, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_X_OFS_USR, buff, 1);
+ return ret;
}
/**
- * @brief Accelerometer Y-axis user offset correction expressed in two’s
+ * @brief Accelerometer Y-axis user offset correction expressed in two’s
* complement, weight depends on bit USR_OFF_W. The value must be
- * in the range [-127 127].[set]
+ * in the range [-127 127].[set]
*
* @param ctx read / write interface definitions
* @param buff buffer that contains data to write
@@ -558,15 +558,15 @@
*/
int32_t lis2dw12_usr_offset_y_set(lis2dw12_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_Y_OFS_USR, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_Y_OFS_USR, buff, 1);
+ return ret;
}
/**
- * @brief Accelerometer Y-axis user offset correction expressed in two’s
+ * @brief Accelerometer Y-axis user offset correction expressed in two’s
* complement, weight depends on bit USR_OFF_W. The value must be
- * in the range [-127 127].[get]
+ * in the range [-127 127].[get]
*
* @param ctx read / write interface definitions
* @param buff buffer that stores data read
@@ -575,15 +575,15 @@
*/
int32_t lis2dw12_usr_offset_y_get(lis2dw12_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_Y_OFS_USR, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_Y_OFS_USR, buff, 1);
+ return ret;
}
/**
- * @brief Accelerometer Z-axis user offset correction expressed in two’s
+ * @brief Accelerometer Z-axis user offset correction expressed in two’s
* complement, weight depends on bit USR_OFF_W. The value must be
- * in the range [-127 127].[set]
+ * in the range [-127 127].[set]
*
* @param ctx read / write interface definitions
* @param buff buffer that contains data to write
@@ -592,15 +592,15 @@
*/
int32_t lis2dw12_usr_offset_z_set(lis2dw12_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_Z_OFS_USR, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_Z_OFS_USR, buff, 1);
+ return ret;
}
/**
- * @brief Accelerometer Z-axis user offset correction expressed in two’s
+ * @brief Accelerometer Z-axis user offset correction expressed in two’s
* complement, weight depends on bit USR_OFF_W. The value must be
- * in the range [-127 127].[get]
+ * in the range [-127 127].[get]
*
* @param ctx read / write interface definitions
* @param buff buffer that stores data read
@@ -609,13 +609,13 @@
*/
int32_t lis2dw12_usr_offset_z_get(lis2dw12_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_Z_OFS_USR, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_Z_OFS_USR, buff, 1);
+ return ret;
}
/**
- * @brief Weight of XL user offset bits of registers X_OFS_USR,
+ * @brief Weight of XL user offset bits of registers X_OFS_USR,
* Y_OFS_USR, Z_OFS_USR.[set]
*
* @param ctx read / write interface definitions
@@ -627,19 +627,19 @@
int32_t lis2dw12_offset_weight_set(lis2dw12_ctx_t *ctx,
lis2dw12_usr_off_w_t val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.usr_off_w = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.usr_off_w = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
- * @brief Weight of XL user offset bits of registers X_OFS_USR,
+ * @brief Weight of XL user offset bits of registers X_OFS_USR,
* Y_OFS_USR, Z_OFS_USR.[get]
*
* @param ctx read / write interface definitions
@@ -650,22 +650,22 @@
int32_t lis2dw12_offset_weight_get(lis2dw12_ctx_t *ctx,
lis2dw12_usr_off_w_t *val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- switch (reg.usr_off_w) {
- case LIS2DW12_LSb_977ug:
- *val = LIS2DW12_LSb_977ug;
- break;
- case LIS2DW12_LSb_15mg6:
- *val = LIS2DW12_LSb_15mg6;
- break;
- default:
- *val = LIS2DW12_LSb_977ug;
- break;
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ switch (reg.usr_off_w) {
+ case LIS2DW12_LSb_977ug:
+ *val = LIS2DW12_LSb_977ug;
+ break;
+ case LIS2DW12_LSb_15mg6:
+ *val = LIS2DW12_LSb_15mg6;
+ break;
+ default:
+ *val = LIS2DW12_LSb_977ug;
+ break;
+ }
+ return ret;
}
/**
@@ -681,7 +681,7 @@
*/
/**
- * @brief Temperature data output register (r). L and H registers
+ * @brief Temperature data output register (r). L and H registers
* together express a 16-bit word in two’s complement.[get]
*
* @param ctx read / write interface definitions
@@ -691,13 +691,13 @@
*/
int32_t lis2dw12_temperature_raw_get(lis2dw12_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_OUT_T_L, buff, 2);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_OUT_T_L, buff, 2);
+ return ret;
}
/**
- * @brief Linear acceleration output register. The value is expressed as
+ * @brief Linear acceleration output register. The value is expressed as
* a 16-bit word in two’s complement.[get]
*
* @param ctx read / write interface definitions
@@ -707,9 +707,9 @@
*/
int32_t lis2dw12_acceleration_raw_get(lis2dw12_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_OUT_X_L, buff, 6);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_OUT_X_L, buff, 6);
+ return ret;
}
/**
@@ -734,13 +734,13 @@
*/
int32_t lis2dw12_device_id_get(lis2dw12_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WHO_AM_I, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WHO_AM_I, buff, 1);
+ return ret;
}
/**
- * @brief Register address automatically incremented during multiple byte
+ * @brief Register address automatically incremented during multiple byte
* access with a serial interface.[set]
*
* @param ctx read / write interface definitions
@@ -750,19 +750,19 @@
*/
int32_t lis2dw12_auto_increment_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.if_add_inc = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.if_add_inc = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
- * @brief Register address automatically incremented during multiple
+ * @brief Register address automatically incremented during multiple
* byte access with a serial interface.[get]
*
* @param ctx read / write interface definitions
@@ -772,13 +772,13 @@
*/
int32_t lis2dw12_auto_increment_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- *val = reg.if_add_inc;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ *val = reg.if_add_inc;
- return ret;
+ return ret;
}
/**
@@ -791,16 +791,16 @@
*/
int32_t lis2dw12_reset_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.soft_reset = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- }
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.soft_reset = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ }
- return ret;
+ return ret;
}
/**
@@ -813,13 +813,13 @@
*/
int32_t lis2dw12_reset_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- *val = reg.soft_reset;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ *val = reg.soft_reset;
- return ret;
+ return ret;
}
/**
@@ -832,15 +832,15 @@
*/
int32_t lis2dw12_boot_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.boot = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.boot = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -853,17 +853,17 @@
*/
int32_t lis2dw12_boot_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- *val = reg.boot;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ *val = reg.boot;
- return ret;
+ return ret;
}
/**
- * @brief Sensor self-test enable.[set]
+ * @brief Sensor self-test enable.[set]
*
* @param ctx read / write interface definitions
* @param val change the values of st in reg CTRL3
@@ -872,16 +872,16 @@
*/
int32_t lis2dw12_self_test_set(lis2dw12_ctx_t *ctx, lis2dw12_st_t val)
{
- lis2dw12_ctrl3_t reg;
- int32_t ret;
+ lis2dw12_ctrl3_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.st = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
- }
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.st = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
+ }
- return ret;
+ return ret;
}
/**
@@ -894,26 +894,26 @@
*/
int32_t lis2dw12_self_test_get(lis2dw12_ctx_t *ctx, lis2dw12_st_t *val)
{
- lis2dw12_ctrl3_t reg;
- int32_t ret;
+ lis2dw12_ctrl3_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
- switch (reg.st) {
- case LIS2DW12_XL_ST_DISABLE:
- *val = LIS2DW12_XL_ST_DISABLE;
- break;
- case LIS2DW12_XL_ST_POSITIVE:
- *val = LIS2DW12_XL_ST_POSITIVE;
- break;
- case LIS2DW12_XL_ST_NEGATIVE:
- *val = LIS2DW12_XL_ST_NEGATIVE;
- break;
- default:
- *val = LIS2DW12_XL_ST_DISABLE;
- break;
- }
- return ret;
+ switch (reg.st) {
+ case LIS2DW12_XL_ST_DISABLE:
+ *val = LIS2DW12_XL_ST_DISABLE;
+ break;
+ case LIS2DW12_XL_ST_POSITIVE:
+ *val = LIS2DW12_XL_ST_POSITIVE;
+ break;
+ case LIS2DW12_XL_ST_NEGATIVE:
+ *val = LIS2DW12_XL_ST_NEGATIVE;
+ break;
+ default:
+ *val = LIS2DW12_XL_ST_DISABLE;
+ break;
+ }
+ return ret;
}
/**
@@ -927,16 +927,16 @@
int32_t lis2dw12_data_ready_mode_set(lis2dw12_ctx_t *ctx,
lis2dw12_drdy_pulsed_t val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.drdy_pulsed = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- }
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.drdy_pulsed = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ }
- return ret;
+ return ret;
}
/**
@@ -950,23 +950,23 @@
int32_t lis2dw12_data_ready_mode_get(lis2dw12_ctx_t *ctx,
lis2dw12_drdy_pulsed_t *val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
- switch (reg.drdy_pulsed) {
- case LIS2DW12_DRDY_LATCHED:
- *val = LIS2DW12_DRDY_LATCHED;
- break;
- case LIS2DW12_DRDY_PULSED:
- *val = LIS2DW12_DRDY_PULSED;
- break;
- default:
- *val = LIS2DW12_DRDY_LATCHED;
- break;
- }
- return ret;
+ switch (reg.drdy_pulsed) {
+ case LIS2DW12_DRDY_LATCHED:
+ *val = LIS2DW12_DRDY_LATCHED;
+ break;
+ case LIS2DW12_DRDY_PULSED:
+ *val = LIS2DW12_DRDY_PULSED;
+ break;
+ default:
+ *val = LIS2DW12_DRDY_LATCHED;
+ break;
+ }
+ return ret;
}
/**
@@ -992,24 +992,24 @@
*/
int32_t lis2dw12_filter_path_set(lis2dw12_ctx_t *ctx, lis2dw12_fds_t val)
{
- lis2dw12_ctrl6_t ctrl6;
- lis2dw12_ctrl_reg7_t ctrl_reg7;
- int32_t ret;
+ lis2dw12_ctrl6_t ctrl6;
+ lis2dw12_ctrl_reg7_t ctrl_reg7;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) &ctrl6, 1);
- if (ret == 0) {
- ctrl6.fds = ( (uint8_t) val & 0x10U ) >> 4;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) &ctrl6, 1);
- }
- if (ret == 0) {
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) &ctrl_reg7, 1);
- }
- if (ret == 0) {
- ctrl_reg7.usr_off_on_out = (uint8_t) val & 0x01U;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) &ctrl_reg7, 1);
- }
-
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) &ctrl6, 1);
+ if (ret == 0) {
+ ctrl6.fds = ((uint8_t) val & 0x10U) >> 4;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) &ctrl6, 1);
+ }
+ if (ret == 0) {
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) &ctrl_reg7, 1);
+ }
+ if (ret == 0) {
+ ctrl_reg7.usr_off_on_out = (uint8_t) val & 0x01U;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) &ctrl_reg7, 1);
+ }
+
+ return ret;
}
/**
@@ -1022,34 +1022,34 @@
*/
int32_t lis2dw12_filter_path_get(lis2dw12_ctx_t *ctx, lis2dw12_fds_t *val)
{
- lis2dw12_ctrl6_t ctrl6;
- lis2dw12_ctrl_reg7_t ctrl_reg7;
- int32_t ret;
+ lis2dw12_ctrl6_t ctrl6;
+ lis2dw12_ctrl_reg7_t ctrl_reg7;
+ int32_t ret;
+
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) &ctrl6, 1);
+ if (ret == 0) {
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) &ctrl_reg7, 1);
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) &ctrl6, 1);
- if (ret == 0) {
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) &ctrl_reg7, 1);
-
- switch ((ctrl6.fds << 4 ) + ctrl_reg7.usr_off_on_out) {
- case LIS2DW12_LPF_ON_OUT:
- *val = LIS2DW12_LPF_ON_OUT;
- break;
- case LIS2DW12_USER_OFFSET_ON_OUT:
- *val = LIS2DW12_USER_OFFSET_ON_OUT;
- break;
- case LIS2DW12_HIGH_PASS_ON_OUT:
- *val = LIS2DW12_HIGH_PASS_ON_OUT;
- break;
- default:
- *val = LIS2DW12_LPF_ON_OUT;
- break;
+ switch ((ctrl6.fds << 4) + ctrl_reg7.usr_off_on_out) {
+ case LIS2DW12_LPF_ON_OUT:
+ *val = LIS2DW12_LPF_ON_OUT;
+ break;
+ case LIS2DW12_USER_OFFSET_ON_OUT:
+ *val = LIS2DW12_USER_OFFSET_ON_OUT;
+ break;
+ case LIS2DW12_HIGH_PASS_ON_OUT:
+ *val = LIS2DW12_HIGH_PASS_ON_OUT;
+ break;
+ default:
+ *val = LIS2DW12_LPF_ON_OUT;
+ break;
+ }
}
- }
- return ret;
+ return ret;
}
/**
- * @brief Accelerometer cutoff filter frequency. Valid for low and high
+ * @brief Accelerometer cutoff filter frequency. Valid for low and high
* pass filter.[set]
*
* @param ctx read / write interface definitions
@@ -1058,22 +1058,22 @@
*
*/
int32_t lis2dw12_filter_bandwidth_set(lis2dw12_ctx_t *ctx,
- lis2dw12_bw_filt_t val)
+ lis2dw12_bw_filt_t val)
{
- lis2dw12_ctrl6_t reg;
- int32_t ret;
+ lis2dw12_ctrl6_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.bw_filt = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) ®, 1);
- }
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.bw_filt = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) ®, 1);
+ }
- return ret;
+ return ret;
}
/**
- * @brief Accelerometer cutoff filter frequency. Valid for low and
+ * @brief Accelerometer cutoff filter frequency. Valid for low and
* high pass filter.[get]
*
* @param ctx read / write interface definitions
@@ -1082,31 +1082,31 @@
*
*/
int32_t lis2dw12_filter_bandwidth_get(lis2dw12_ctx_t *ctx,
- lis2dw12_bw_filt_t *val)
+ lis2dw12_bw_filt_t *val)
{
- lis2dw12_ctrl6_t reg;
- int32_t ret;
+ lis2dw12_ctrl6_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) ®, 1);
- switch (reg.bw_filt) {
- case LIS2DW12_ODR_DIV_2:
- *val = LIS2DW12_ODR_DIV_2;
- break;
- case LIS2DW12_ODR_DIV_4:
- *val = LIS2DW12_ODR_DIV_4;
- break;
- case LIS2DW12_ODR_DIV_10:
- *val = LIS2DW12_ODR_DIV_10;
- break;
- case LIS2DW12_ODR_DIV_20:
- *val = LIS2DW12_ODR_DIV_20;
- break;
- default:
- *val = LIS2DW12_ODR_DIV_2;
- break;
- }
- return ret;
+ switch (reg.bw_filt) {
+ case LIS2DW12_ODR_DIV_2:
+ *val = LIS2DW12_ODR_DIV_2;
+ break;
+ case LIS2DW12_ODR_DIV_4:
+ *val = LIS2DW12_ODR_DIV_4;
+ break;
+ case LIS2DW12_ODR_DIV_10:
+ *val = LIS2DW12_ODR_DIV_10;
+ break;
+ case LIS2DW12_ODR_DIV_20:
+ *val = LIS2DW12_ODR_DIV_20;
+ break;
+ default:
+ *val = LIS2DW12_ODR_DIV_2;
+ break;
+ }
+ return ret;
}
/**
@@ -1119,15 +1119,15 @@
*/
int32_t lis2dw12_reference_mode_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.hp_ref_mode = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.hp_ref_mode = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1140,13 +1140,13 @@
*/
int32_t lis2dw12_reference_mode_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- *val = reg.hp_ref_mode;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ *val = reg.hp_ref_mode;
- return ret;
+ return ret;
}
/**
@@ -1172,19 +1172,19 @@
*/
int32_t lis2dw12_spi_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_sim_t val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.sim = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.sim = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
- * @brief SPI Serial Interface Mode selection.[get]
+ * @brief SPI Serial Interface Mode selection.[get]
*
* @param ctx read / write interface definitions
* @param val Get the values of sim in reg CTRL2
@@ -1193,23 +1193,23 @@
*/
int32_t lis2dw12_spi_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_sim_t *val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
- switch (reg.sim) {
- case LIS2DW12_SPI_4_WIRE:
- *val = LIS2DW12_SPI_4_WIRE;
- break;
- case LIS2DW12_SPI_3_WIRE:
- *val = LIS2DW12_SPI_3_WIRE;
- break;
- default:
- *val = LIS2DW12_SPI_4_WIRE;
- break;
- }
- return ret;
+ switch (reg.sim) {
+ case LIS2DW12_SPI_4_WIRE:
+ *val = LIS2DW12_SPI_4_WIRE;
+ break;
+ case LIS2DW12_SPI_3_WIRE:
+ *val = LIS2DW12_SPI_3_WIRE;
+ break;
+ default:
+ *val = LIS2DW12_SPI_4_WIRE;
+ break;
+ }
+ return ret;
}
/**
@@ -1224,19 +1224,19 @@
int32_t lis2dw12_i2c_interface_set(lis2dw12_ctx_t *ctx,
lis2dw12_i2c_disable_t val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.i2c_disable = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.i2c_disable = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
- * @brief Disable / Enable I2C interface.[get]
+ * @brief Disable / Enable I2C interface.[get]
*
* @param ctx read / write interface definitions
* @param val Get the values of i2c_disable in reg CTRL2
@@ -1246,23 +1246,23 @@
int32_t lis2dw12_i2c_interface_get(lis2dw12_ctx_t *ctx,
lis2dw12_i2c_disable_t *val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
- switch (reg.i2c_disable) {
- case LIS2DW12_I2C_ENABLE:
- *val = LIS2DW12_I2C_ENABLE;
- break;
- case LIS2DW12_I2C_DISABLE:
- *val = LIS2DW12_I2C_DISABLE;
- break;
- default:
- *val = LIS2DW12_I2C_ENABLE;
- break;
- }
- return ret;
+ switch (reg.i2c_disable) {
+ case LIS2DW12_I2C_ENABLE:
+ *val = LIS2DW12_I2C_ENABLE;
+ break;
+ case LIS2DW12_I2C_DISABLE:
+ *val = LIS2DW12_I2C_DISABLE;
+ break;
+ default:
+ *val = LIS2DW12_I2C_ENABLE;
+ break;
+ }
+ return ret;
}
/**
@@ -1275,15 +1275,15 @@
*/
int32_t lis2dw12_cs_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_cs_pu_disc_t val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.cs_pu_disc = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.cs_pu_disc = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1296,23 +1296,23 @@
*/
int32_t lis2dw12_cs_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_cs_pu_disc_t *val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
- switch (reg.cs_pu_disc) {
- case LIS2DW12_PULL_UP_CONNECT:
- *val = LIS2DW12_PULL_UP_CONNECT;
- break;
- case LIS2DW12_PULL_UP_DISCONNECT:
- *val = LIS2DW12_PULL_UP_DISCONNECT;
- break;
- default:
- *val = LIS2DW12_PULL_UP_CONNECT;
- break;
- }
- return ret;
+ switch (reg.cs_pu_disc) {
+ case LIS2DW12_PULL_UP_CONNECT:
+ *val = LIS2DW12_PULL_UP_CONNECT;
+ break;
+ case LIS2DW12_PULL_UP_DISCONNECT:
+ *val = LIS2DW12_PULL_UP_DISCONNECT;
+ break;
+ default:
+ *val = LIS2DW12_PULL_UP_CONNECT;
+ break;
+ }
+ return ret;
}
/**
@@ -1338,15 +1338,15 @@
int32_t lis2dw12_pin_polarity_set(lis2dw12_ctx_t *ctx,
lis2dw12_h_lactive_t val)
{
- lis2dw12_ctrl3_t reg;
- int32_t ret;
+ lis2dw12_ctrl3_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.h_lactive = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.h_lactive = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1360,27 +1360,27 @@
int32_t lis2dw12_pin_polarity_get(lis2dw12_ctx_t *ctx,
lis2dw12_h_lactive_t *val)
{
- lis2dw12_ctrl3_t reg;
- int32_t ret;
+ lis2dw12_ctrl3_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
- switch (reg.h_lactive) {
- case LIS2DW12_ACTIVE_HIGH:
- *val = LIS2DW12_ACTIVE_HIGH;
- break;
- case LIS2DW12_ACTIVE_LOW:
- *val = LIS2DW12_ACTIVE_LOW;
- break;
- default:
- *val = LIS2DW12_ACTIVE_HIGH;
- break;
- }
- return ret;
+ switch (reg.h_lactive) {
+ case LIS2DW12_ACTIVE_HIGH:
+ *val = LIS2DW12_ACTIVE_HIGH;
+ break;
+ case LIS2DW12_ACTIVE_LOW:
+ *val = LIS2DW12_ACTIVE_LOW;
+ break;
+ default:
+ *val = LIS2DW12_ACTIVE_HIGH;
+ break;
+ }
+ return ret;
}
/**
- * @brief Latched/pulsed interrupt.[set]
+ * @brief Latched/pulsed interrupt.[set]
*
* @param ctx read / write interface definitions
* @param val change the values of lir in reg CTRL3
@@ -1390,15 +1390,15 @@
int32_t lis2dw12_int_notification_set(lis2dw12_ctx_t *ctx,
lis2dw12_lir_t val)
{
- lis2dw12_ctrl3_t reg;
- int32_t ret;
+ lis2dw12_ctrl3_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.lir = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.lir = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1412,23 +1412,23 @@
int32_t lis2dw12_int_notification_get(lis2dw12_ctx_t *ctx,
lis2dw12_lir_t *val)
{
- lis2dw12_ctrl3_t reg;
- int32_t ret;
+ lis2dw12_ctrl3_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
- switch (reg.lir) {
- case LIS2DW12_INT_PULSED:
- *val = LIS2DW12_INT_PULSED;
- break;
- case LIS2DW12_INT_LATCHED:
- *val = LIS2DW12_INT_LATCHED;
- break;
- default:
- *val = LIS2DW12_INT_PULSED;
- break;
- }
- return ret;
+ switch (reg.lir) {
+ case LIS2DW12_INT_PULSED:
+ *val = LIS2DW12_INT_PULSED;
+ break;
+ case LIS2DW12_INT_LATCHED:
+ *val = LIS2DW12_INT_LATCHED;
+ break;
+ default:
+ *val = LIS2DW12_INT_PULSED;
+ break;
+ }
+ return ret;
}
/**
@@ -1441,15 +1441,15 @@
*/
int32_t lis2dw12_pin_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_pp_od_t val)
{
- lis2dw12_ctrl3_t reg;
- int32_t ret;
+ lis2dw12_ctrl3_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.pp_od = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.pp_od = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1462,23 +1462,23 @@
*/
int32_t lis2dw12_pin_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_pp_od_t *val)
{
- lis2dw12_ctrl3_t reg;
- int32_t ret;
+ lis2dw12_ctrl3_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
- switch (reg.pp_od) {
- case LIS2DW12_PUSH_PULL:
- *val = LIS2DW12_PUSH_PULL;
- break;
- case LIS2DW12_OPEN_DRAIN:
- *val = LIS2DW12_OPEN_DRAIN;
- break;
- default:
- *val = LIS2DW12_PUSH_PULL;
- break;
- }
- return ret;
+ switch (reg.pp_od) {
+ case LIS2DW12_PUSH_PULL:
+ *val = LIS2DW12_PUSH_PULL;
+ break;
+ case LIS2DW12_OPEN_DRAIN:
+ *val = LIS2DW12_OPEN_DRAIN;
+ break;
+ default:
+ *val = LIS2DW12_PUSH_PULL;
+ break;
+ }
+ return ret;
}
/**
@@ -1492,25 +1492,25 @@
int32_t lis2dw12_pin_int1_route_set(lis2dw12_ctx_t *ctx,
lis2dw12_ctrl4_int1_pad_ctrl_t *val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
-
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- if (ret == 0) {
- if ((val->int1_tap | val->int1_ff | val->int1_wu | val->int1_single_tap |
- val->int1_6d) != PROPERTY_DISABLE){
- reg.interrupts_enable = PROPERTY_ENABLE;
- }
- else{
- reg.interrupts_enable = PROPERTY_DISABLE;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
+
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ if ((val->int1_tap | val->int1_ff | val->int1_wu | val->int1_single_tap |
+ val->int1_6d) != PROPERTY_DISABLE) {
+ reg.interrupts_enable = PROPERTY_ENABLE;
+ } else {
+ reg.interrupts_enable = PROPERTY_DISABLE;
+ }
+
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL,
+ (uint8_t *) val, 1);
}
-
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL,
- (uint8_t*) val, 1);
- } if (ret == 0) {
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- }
- return ret;
+ if (ret == 0) {
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1524,14 +1524,14 @@
int32_t lis2dw12_pin_int1_route_get(lis2dw12_ctx_t *ctx,
lis2dw12_ctrl4_int1_pad_ctrl_t *val)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL,
- (uint8_t*) val, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL,
+ (uint8_t *) val, 1);
+ return ret;
}
/**
- * @brief Select the signal that need to route on int2 pad.[set]
+ * @brief Select the signal that need to route on int2 pad.[set]
*
* @param ctx read / write interface definitions
* @param val register CTRL5_INT2_PAD_CTRL.
@@ -1541,26 +1541,25 @@
int32_t lis2dw12_pin_int2_route_set(lis2dw12_ctx_t *ctx,
lis2dw12_ctrl5_int2_pad_ctrl_t *val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
-
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- if (ret == 0) {
- if ((val->int2_sleep_state | val->int2_sleep_chg ) != PROPERTY_DISABLE) {
- reg.interrupts_enable = PROPERTY_ENABLE;
- }
- else{
- reg.interrupts_enable = PROPERTY_DISABLE;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
+
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ if ((val->int2_sleep_state | val->int2_sleep_chg) != PROPERTY_DISABLE) {
+ reg.interrupts_enable = PROPERTY_ENABLE;
+ } else {
+ reg.interrupts_enable = PROPERTY_DISABLE;
+ }
+
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL,
+ (uint8_t *) val, 1);
}
-
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL,
- (uint8_t*) val, 1);
- }
- if (ret == 0) {
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- }
-
- return ret;
+ if (ret == 0) {
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ }
+
+ return ret;
}
/**
@@ -1574,13 +1573,13 @@
int32_t lis2dw12_pin_int2_route_get(lis2dw12_ctx_t *ctx,
lis2dw12_ctrl5_int2_pad_ctrl_t *val)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL,
- (uint8_t*) val, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL,
+ (uint8_t *) val, 1);
+ return ret;
}
/**
- * @brief All interrupt signals become available on INT1 pin.[set]
+ * @brief All interrupt signals become available on INT1 pin.[set]
*
* @param ctx read / write interface definitions
* @param val change the values of int2_on_int1 in reg CTRL_REG7
@@ -1589,15 +1588,15 @@
*/
int32_t lis2dw12_all_on_int1_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.int2_on_int1 = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.int2_on_int1 = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1610,13 +1609,13 @@
*/
int32_t lis2dw12_all_on_int1_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- *val = reg.int2_on_int1;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ *val = reg.int2_on_int1;
- return ret;
+ return ret;
}
/**
@@ -1642,15 +1641,15 @@
*/
int32_t lis2dw12_wkup_threshold_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_wake_up_ths_t reg;
- int32_t ret;
+ lis2dw12_wake_up_ths_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.wk_ths = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_THS,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.wk_ths = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_THS, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1663,13 +1662,13 @@
*/
int32_t lis2dw12_wkup_threshold_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_wake_up_ths_t reg;
- int32_t ret;
+ lis2dw12_wake_up_ths_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS,(uint8_t*) ®, 1);
- *val = reg.wk_ths;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS, (uint8_t *) ®, 1);
+ *val = reg.wk_ths;
- return ret;
+ return ret;
}
/**
@@ -1682,15 +1681,15 @@
*/
int32_t lis2dw12_wkup_dur_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_wake_up_dur_t reg;
- int32_t ret;
+ lis2dw12_wake_up_dur_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.wake_dur = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.wake_dur = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1703,13 +1702,13 @@
*/
int32_t lis2dw12_wkup_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_wake_up_dur_t reg;
- int32_t ret;
+ lis2dw12_wake_up_dur_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) ®, 1);
- *val = reg.wake_dur;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) ®, 1);
+ *val = reg.wake_dur;
- return ret;
+ return ret;
}
/**
@@ -1723,15 +1722,15 @@
int32_t lis2dw12_wkup_feed_data_set(lis2dw12_ctx_t *ctx,
lis2dw12_usr_off_on_wu_t val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.usr_off_on_wu = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.usr_off_on_wu = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1745,23 +1744,23 @@
int32_t lis2dw12_wkup_feed_data_get(lis2dw12_ctx_t *ctx,
lis2dw12_usr_off_on_wu_t *val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
- switch (reg.usr_off_on_wu) {
- case LIS2DW12_HP_FEED:
- *val = LIS2DW12_HP_FEED;
- break;
- case LIS2DW12_USER_OFFSET_FEED:
- *val = LIS2DW12_USER_OFFSET_FEED;
- break;
- default:
- *val = LIS2DW12_HP_FEED;
- break;
- }
- return ret;
+ switch (reg.usr_off_on_wu) {
+ case LIS2DW12_HP_FEED:
+ *val = LIS2DW12_HP_FEED;
+ break;
+ case LIS2DW12_USER_OFFSET_FEED:
+ *val = LIS2DW12_USER_OFFSET_FEED;
+ break;
+ default:
+ *val = LIS2DW12_HP_FEED;
+ break;
+ }
+ return ret;
}
/**
@@ -1778,7 +1777,7 @@
*/
/**
- * @brief Config activity / inactivity or
+ * @brief Config activity / inactivity or
* stationary / motion detection.[set]
*
* @param ctx read / write interface definitions
@@ -1789,28 +1788,28 @@
*/
int32_t lis2dw12_act_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_sleep_on_t val)
{
- lis2dw12_wake_up_ths_t wake_up_ths;
- lis2dw12_wake_up_dur_t wake_up_dur;
- int32_t ret;
-
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS,(uint8_t*) &wake_up_ths, 1);
- if (ret == 0) {
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) &wake_up_dur, 1);
- }
- if (ret == 0) {
- wake_up_ths.sleep_on = (uint8_t) val & 0x01U;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_THS,(uint8_t*) &wake_up_ths, 1);
- }
- if (ret == 0) {
- wake_up_dur.stationary = ((uint8_t)val & 0x02U) >> 1;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) &wake_up_dur, 1);
- }
-
- return ret;
+ lis2dw12_wake_up_ths_t wake_up_ths;
+ lis2dw12_wake_up_dur_t wake_up_dur;
+ int32_t ret;
+
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS, (uint8_t *) &wake_up_ths, 1);
+ if (ret == 0) {
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) &wake_up_dur, 1);
+ }
+ if (ret == 0) {
+ wake_up_ths.sleep_on = (uint8_t) val & 0x01U;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_THS, (uint8_t *) &wake_up_ths, 1);
+ }
+ if (ret == 0) {
+ wake_up_dur.stationary = ((uint8_t)val & 0x02U) >> 1;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) &wake_up_dur, 1);
+ }
+
+ return ret;
}
/**
- * @brief Config activity / inactivity or
+ * @brief Config activity / inactivity or
* stationary / motion detection. [get]
*
* @param ctx read / write interface definitions
@@ -1820,30 +1819,30 @@
*/
int32_t lis2dw12_act_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_sleep_on_t *val)
{
- lis2dw12_wake_up_ths_t wake_up_ths;
- lis2dw12_wake_up_dur_t wake_up_dur;;
- int32_t ret;
+ lis2dw12_wake_up_ths_t wake_up_ths;
+ lis2dw12_wake_up_dur_t wake_up_dur;;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS,(uint8_t*) &wake_up_ths, 1);
- if (ret == 0) {
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) &wake_up_dur, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS, (uint8_t *) &wake_up_ths, 1);
+ if (ret == 0) {
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) &wake_up_dur, 1);
- switch ((wake_up_dur.stationary << 1) + wake_up_ths.sleep_on){
- case LIS2DW12_NO_DETECTION:
- *val = LIS2DW12_NO_DETECTION;
- break;
- case LIS2DW12_DETECT_ACT_INACT:
- *val = LIS2DW12_DETECT_ACT_INACT;
- break;
- case LIS2DW12_DETECT_STAT_MOTION:
- *val = LIS2DW12_DETECT_STAT_MOTION;
- break;
- default:
- *val = LIS2DW12_NO_DETECTION;
- break;
+ switch ((wake_up_dur.stationary << 1) + wake_up_ths.sleep_on) {
+ case LIS2DW12_NO_DETECTION:
+ *val = LIS2DW12_NO_DETECTION;
+ break;
+ case LIS2DW12_DETECT_ACT_INACT:
+ *val = LIS2DW12_DETECT_ACT_INACT;
+ break;
+ case LIS2DW12_DETECT_STAT_MOTION:
+ *val = LIS2DW12_DETECT_STAT_MOTION;
+ break;
+ default:
+ *val = LIS2DW12_NO_DETECTION;
+ break;
+ }
}
- }
- return ret;
+ return ret;
}
/**
@@ -1856,15 +1855,15 @@
*/
int32_t lis2dw12_act_sleep_dur_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_wake_up_dur_t reg;
- int32_t ret;
+ lis2dw12_wake_up_dur_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.sleep_dur = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.sleep_dur = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1877,13 +1876,13 @@
*/
int32_t lis2dw12_act_sleep_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_wake_up_dur_t reg;
- int32_t ret;
+ lis2dw12_wake_up_dur_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) ®, 1);
- *val = reg.sleep_dur;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) ®, 1);
+ *val = reg.sleep_dur;
- return ret;
+ return ret;
}
/**
@@ -1909,15 +1908,15 @@
*/
int32_t lis2dw12_tap_threshold_x_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_tap_ths_x_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_x_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.tap_thsx = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_X,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.tap_thsx = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_X, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1930,13 +1929,13 @@
*/
int32_t lis2dw12_tap_threshold_x_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_tap_ths_x_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_x_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X,(uint8_t*) ®, 1);
- *val = reg.tap_thsx;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X, (uint8_t *) ®, 1);
+ *val = reg.tap_thsx;
- return ret;
+ return ret;
}
/**
@@ -1949,15 +1948,15 @@
*/
int32_t lis2dw12_tap_threshold_y_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_tap_ths_y_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_y_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Y,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.tap_thsy = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Y,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Y, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.tap_thsy = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Y, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1970,13 +1969,13 @@
*/
int32_t lis2dw12_tap_threshold_y_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_tap_ths_y_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_y_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Y,(uint8_t*) ®, 1);
- *val = reg.tap_thsy;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Y, (uint8_t *) ®, 1);
+ *val = reg.tap_thsy;
- return ret;
+ return ret;
}
/**
@@ -1990,15 +1989,15 @@
int32_t lis2dw12_tap_axis_priority_set(lis2dw12_ctx_t *ctx,
lis2dw12_tap_prior_t val)
{
- lis2dw12_tap_ths_y_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_y_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Y,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.tap_prior = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Y,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Y, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.tap_prior = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Y, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -2012,35 +2011,35 @@
int32_t lis2dw12_tap_axis_priority_get(lis2dw12_ctx_t *ctx,
lis2dw12_tap_prior_t *val)
{
- lis2dw12_tap_ths_y_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_y_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Y,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Y, (uint8_t *) ®, 1);
- switch (reg.tap_prior) {
- case LIS2DW12_XYZ:
- *val = LIS2DW12_XYZ;
- break;
- case LIS2DW12_YXZ:
- *val = LIS2DW12_YXZ;
- break;
- case LIS2DW12_XZY:
- *val = LIS2DW12_XZY;
- break;
- case LIS2DW12_ZYX:
- *val = LIS2DW12_ZYX;
- break;
- case LIS2DW12_YZX:
- *val = LIS2DW12_YZX;
- break;
- case LIS2DW12_ZXY:
- *val = LIS2DW12_ZXY;
- break;
- default:
- *val = LIS2DW12_XYZ;
- break;
- }
- return ret;
+ switch (reg.tap_prior) {
+ case LIS2DW12_XYZ:
+ *val = LIS2DW12_XYZ;
+ break;
+ case LIS2DW12_YXZ:
+ *val = LIS2DW12_YXZ;
+ break;
+ case LIS2DW12_XZY:
+ *val = LIS2DW12_XZY;
+ break;
+ case LIS2DW12_ZYX:
+ *val = LIS2DW12_ZYX;
+ break;
+ case LIS2DW12_YZX:
+ *val = LIS2DW12_YZX;
+ break;
+ case LIS2DW12_ZXY:
+ *val = LIS2DW12_ZXY;
+ break;
+ default:
+ *val = LIS2DW12_XYZ;
+ break;
+ }
+ return ret;
}
/**
@@ -2053,16 +2052,16 @@
*/
int32_t lis2dw12_tap_threshold_z_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_tap_ths_z_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_z_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.tap_thsz = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- }
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.tap_thsz = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ }
- return ret;
+ return ret;
}
/**
@@ -2075,13 +2074,13 @@
*/
int32_t lis2dw12_tap_threshold_z_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_tap_ths_z_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_z_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- *val = reg.tap_thsz;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ *val = reg.tap_thsz;
- return ret;
+ return ret;
}
/**
@@ -2094,15 +2093,15 @@
*/
int32_t lis2dw12_tap_detection_on_z_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_tap_ths_z_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_z_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.tap_z_en = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.tap_z_en = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -2115,13 +2114,13 @@
*/
int32_t lis2dw12_tap_detection_on_z_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_tap_ths_z_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_z_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- *val = reg.tap_z_en;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ *val = reg.tap_z_en;
- return ret;
+ return ret;
}
/**
@@ -2134,15 +2133,15 @@
*/
int32_t lis2dw12_tap_detection_on_y_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_tap_ths_z_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_z_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.tap_y_en = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.tap_y_en = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -2155,13 +2154,13 @@
*/
int32_t lis2dw12_tap_detection_on_y_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_tap_ths_z_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_z_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- *val = reg.tap_y_en;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ *val = reg.tap_y_en;
- return ret;
+ return ret;
}
/**
@@ -2174,15 +2173,15 @@
*/
int32_t lis2dw12_tap_detection_on_x_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_tap_ths_z_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_z_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.tap_x_en = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.tap_x_en = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -2195,13 +2194,13 @@
*/
int32_t lis2dw12_tap_detection_on_x_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_tap_ths_z_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_z_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- *val = reg.tap_x_en;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ *val = reg.tap_x_en;
- return ret;
+ return ret;
}
/**
@@ -2218,16 +2217,16 @@
*/
int32_t lis2dw12_tap_shock_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_int_dur_t reg;
- int32_t ret;
+ lis2dw12_int_dur_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.shock = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_INT_DUR,(uint8_t*) ®, 1);
- }
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.shock = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_INT_DUR, (uint8_t *) ®, 1);
+ }
- return ret;
+ return ret;
}
/**
@@ -2244,19 +2243,19 @@
*/
int32_t lis2dw12_tap_shock_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_int_dur_t reg;
- int32_t ret;
+ lis2dw12_int_dur_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR,(uint8_t*) ®, 1);
- *val = reg.shock;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR, (uint8_t *) ®, 1);
+ *val = reg.shock;
- return ret;
+ return ret;
}
/**
- * @brief Quiet time is the time after the first detected tap in which
+ * @brief Quiet time is the time after the first detected tap in which
* there must not be any overthreshold event.
- * The default value of these bits is 00b which corresponds
+ * The default value of these bits is 00b which corresponds
* to 2*ODR_XL time. If the QUIET[1:0] bits are set to a different
* value, 1LSB corresponds to 4*ODR_XL time.[set]
*
@@ -2267,21 +2266,21 @@
*/
int32_t lis2dw12_tap_quiet_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_int_dur_t reg;
- int32_t ret;
+ lis2dw12_int_dur_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.quiet = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_INT_DUR,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.quiet = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_INT_DUR, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
- * @brief Quiet time is the time after the first detected tap in which
+ * @brief Quiet time is the time after the first detected tap in which
* there must not be any overthreshold event.
- * The default value of these bits is 00b which corresponds
+ * The default value of these bits is 00b which corresponds
* to 2*ODR_XL time. If the QUIET[1:0] bits are set to a different
* value, 1LSB corresponds to 4*ODR_XL time.[get]
*
@@ -2292,21 +2291,21 @@
*/
int32_t lis2dw12_tap_quiet_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_int_dur_t reg;
- int32_t ret;
+ lis2dw12_int_dur_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR,(uint8_t*) ®, 1);
- *val = reg.quiet;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR, (uint8_t *) ®, 1);
+ *val = reg.quiet;
- return ret;
+ return ret;
}
/**
- * @brief When double tap recognition is enabled, this register expresses
- * the maximum time between two consecutive detected taps to
+ * @brief When double tap recognition is enabled, this register expresses
+ * the maximum time between two consecutive detected taps to
* determine a double tap event.
- * The default value of these bits is 0000b which corresponds
- * to 16*ODR_XL time. If the DUR[3:0] bits are set to a different
+ * The default value of these bits is 0000b which corresponds
+ * to 16*ODR_XL time. If the DUR[3:0] bits are set to a different
* value, 1LSB corresponds to 32*ODR_XL time.[set]
*
* @param ctx read / write interface definitions
@@ -2316,23 +2315,23 @@
*/
int32_t lis2dw12_tap_dur_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_int_dur_t reg;
- int32_t ret;
+ lis2dw12_int_dur_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.latency = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_INT_DUR,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.latency = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_INT_DUR, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
- * @brief When double tap recognition is enabled, this register expresses
- * the maximum time between two consecutive detected taps to
+ * @brief When double tap recognition is enabled, this register expresses
+ * the maximum time between two consecutive detected taps to
* determine a double tap event.
- * The default value of these bits is 0000b which corresponds
- * to 16*ODR_XL time. If the DUR[3:0] bits are set to a different
+ * The default value of these bits is 0000b which corresponds
+ * to 16*ODR_XL time. If the DUR[3:0] bits are set to a different
* value, 1LSB corresponds to 32*ODR_XL time.[get]
*
* @param ctx read / write interface definitions
@@ -2342,13 +2341,13 @@
*/
int32_t lis2dw12_tap_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_int_dur_t reg;
- int32_t ret;
+ lis2dw12_int_dur_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR,(uint8_t*) ®, 1);
- *val = reg.latency;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR, (uint8_t *) ®, 1);
+ *val = reg.latency;
- return ret;
+ return ret;
}
/**
@@ -2362,15 +2361,15 @@
int32_t lis2dw12_tap_mode_set(lis2dw12_ctx_t *ctx,
lis2dw12_single_double_tap_t val)
{
- lis2dw12_wake_up_ths_t reg;
- int32_t ret;
+ lis2dw12_wake_up_ths_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.single_double_tap = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_THS,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.single_double_tap = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_THS, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -2384,39 +2383,39 @@
int32_t lis2dw12_tap_mode_get(lis2dw12_ctx_t *ctx,
lis2dw12_single_double_tap_t *val)
{
- lis2dw12_wake_up_ths_t reg;
- int32_t ret;
+ lis2dw12_wake_up_ths_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS, (uint8_t *) ®, 1);
- switch (reg.single_double_tap) {
- case LIS2DW12_ONLY_SINGLE:
- *val = LIS2DW12_ONLY_SINGLE;
- break;
- case LIS2DW12_BOTH_SINGLE_DOUBLE:
- *val = LIS2DW12_BOTH_SINGLE_DOUBLE;
- break;
- default:
- *val = LIS2DW12_ONLY_SINGLE;
- break;
- }
+ switch (reg.single_double_tap) {
+ case LIS2DW12_ONLY_SINGLE:
+ *val = LIS2DW12_ONLY_SINGLE;
+ break;
+ case LIS2DW12_BOTH_SINGLE_DOUBLE:
+ *val = LIS2DW12_BOTH_SINGLE_DOUBLE;
+ break;
+ default:
+ *val = LIS2DW12_ONLY_SINGLE;
+ break;
+ }
- return ret;
+ return ret;
}
/**
* @brief Read the tap / double tap source register.[get]
*
* @param ctx read / write interface definitions
- * @param lis2dw12_tap_src: union of registers from TAP_SRC to
+ * @param lis2dw12_tap_src: union of registers from TAP_SRC to
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lis2dw12_tap_src_get(lis2dw12_ctx_t *ctx, lis2dw12_tap_src_t *val)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_SRC, (uint8_t*) val, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_SRC, (uint8_t *) val, 1);
+ return ret;
}
/**
@@ -2433,7 +2432,7 @@
*/
/**
- * @brief Threshold for 4D/6D function.[set]
+ * @brief Threshold for 4D/6D function.[set]
*
* @param ctx read / write interface definitions
* @param val change the values of 6d_ths in reg TAP_THS_X
@@ -2442,15 +2441,15 @@
*/
int32_t lis2dw12_6d_threshold_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_tap_ths_x_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_x_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg._6d_ths = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_X,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg._6d_ths = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_X, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -2463,13 +2462,13 @@
*/
int32_t lis2dw12_6d_threshold_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_tap_ths_x_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_x_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X,(uint8_t*) ®, 1);
- *val = reg._6d_ths;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X, (uint8_t *) ®, 1);
+ *val = reg._6d_ths;
- return ret;
+ return ret;
}
/**
@@ -2482,16 +2481,16 @@
*/
int32_t lis2dw12_4d_mode_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_tap_ths_x_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_x_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg._4d_en = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_X,(uint8_t*) ®, 1);
- }
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg._4d_en = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_X, (uint8_t *) ®, 1);
+ }
- return ret;
+ return ret;
}
/**
@@ -2504,13 +2503,13 @@
*/
int32_t lis2dw12_4d_mode_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_tap_ths_x_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_x_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X,(uint8_t*) ®, 1);
- *val = reg._4d_en;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X, (uint8_t *) ®, 1);
+ *val = reg._4d_en;
- return ret;
+ return ret;
}
/**
@@ -2523,9 +2522,9 @@
*/
int32_t lis2dw12_6d_src_get(lis2dw12_ctx_t *ctx, lis2dw12_sixd_src_t *val)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_SIXD_SRC, (uint8_t*) val, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_SIXD_SRC, (uint8_t *) val, 1);
+ return ret;
}
/**
* @brief Data sent to 6D interrupt function.[set]
@@ -2538,15 +2537,15 @@
int32_t lis2dw12_6d_feed_data_set(lis2dw12_ctx_t *ctx,
lis2dw12_lpass_on6d_t val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.lpass_on6d = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.lpass_on6d = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -2560,23 +2559,23 @@
int32_t lis2dw12_6d_feed_data_get(lis2dw12_ctx_t *ctx,
lis2dw12_lpass_on6d_t *val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
- switch (reg.lpass_on6d) {
- case LIS2DW12_ODR_DIV_2_FEED:
- *val = LIS2DW12_ODR_DIV_2_FEED;
- break;
- case LIS2DW12_LPF2_FEED:
- *val = LIS2DW12_LPF2_FEED;
- break;
- default:
- *val = LIS2DW12_ODR_DIV_2_FEED;
- break;
- }
- return ret;
+ switch (reg.lpass_on6d) {
+ case LIS2DW12_ODR_DIV_2_FEED:
+ *val = LIS2DW12_ODR_DIV_2_FEED;
+ break;
+ case LIS2DW12_LPF2_FEED:
+ *val = LIS2DW12_LPF2_FEED;
+ break;
+ default:
+ *val = LIS2DW12_ODR_DIV_2_FEED;
+ break;
+ }
+ return ret;
}
/**
@@ -2603,24 +2602,24 @@
*/
int32_t lis2dw12_ff_dur_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_wake_up_dur_t wake_up_dur;
- lis2dw12_free_fall_t free_fall;
- int32_t ret;
+ lis2dw12_wake_up_dur_t wake_up_dur;
+ lis2dw12_free_fall_t free_fall;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) &wake_up_dur, 1);
- if (ret == 0) {
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FREE_FALL,(uint8_t*) &free_fall, 1);
- }
- if(ret == 0) {
- wake_up_dur.ff_dur = ( (uint8_t) val & 0x20U) >> 5;
- free_fall.ff_dur = (uint8_t) val & 0x1FU;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) &wake_up_dur, 1);
- }
- if(ret == 0) {
- ret = lis2dw12_write_reg(ctx, LIS2DW12_FREE_FALL,(uint8_t*) &free_fall, 1);
- }
-
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) &wake_up_dur, 1);
+ if (ret == 0) {
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FREE_FALL, (uint8_t *) &free_fall, 1);
+ }
+ if (ret == 0) {
+ wake_up_dur.ff_dur = ((uint8_t) val & 0x20U) >> 5;
+ free_fall.ff_dur = (uint8_t) val & 0x1FU;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) &wake_up_dur, 1);
+ }
+ if (ret == 0) {
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_FREE_FALL, (uint8_t *) &free_fall, 1);
+ }
+
+ return ret;
}
/**
@@ -2628,22 +2627,22 @@
*
* @param ctx read / write interface definitions
* @param val change the values of ff_dur in
- * reg WAKE_UP_DUR /F REE_FALL
+ * reg WAKE_UP_DUR /F REE_FALL
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lis2dw12_ff_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_wake_up_dur_t wake_up_dur;
- lis2dw12_free_fall_t free_fall;
- int32_t ret;
-
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) &wake_up_dur, 1);
- if (ret == 0) {
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FREE_FALL,(uint8_t*) &free_fall, 1);
- *val = (wake_up_dur.ff_dur << 5) + free_fall.ff_dur;
- }
- return ret;
+ lis2dw12_wake_up_dur_t wake_up_dur;
+ lis2dw12_free_fall_t free_fall;
+ int32_t ret;
+
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) &wake_up_dur, 1);
+ if (ret == 0) {
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FREE_FALL, (uint8_t *) &free_fall, 1);
+ *val = (wake_up_dur.ff_dur << 5) + free_fall.ff_dur;
+ }
+ return ret;
}
/**
@@ -2656,16 +2655,16 @@
*/
int32_t lis2dw12_ff_threshold_set(lis2dw12_ctx_t *ctx, lis2dw12_ff_ths_t val)
{
- lis2dw12_free_fall_t reg;
- int32_t ret;
+ lis2dw12_free_fall_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FREE_FALL,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.ff_ths = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_FREE_FALL,(uint8_t*) ®, 1);
- }
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FREE_FALL, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.ff_ths = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_FREE_FALL, (uint8_t *) ®, 1);
+ }
- return ret;
+ return ret;
}
/**
@@ -2679,41 +2678,41 @@
int32_t lis2dw12_ff_threshold_get(lis2dw12_ctx_t *ctx,
lis2dw12_ff_ths_t *val)
{
- lis2dw12_free_fall_t reg;
- int32_t ret;
+ lis2dw12_free_fall_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FREE_FALL,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FREE_FALL, (uint8_t *) ®, 1);
- switch (reg.ff_ths) {
- case LIS2DW12_FF_TSH_5LSb_FS2g:
- *val = LIS2DW12_FF_TSH_5LSb_FS2g;
- break;
- case LIS2DW12_FF_TSH_7LSb_FS2g:
- *val = LIS2DW12_FF_TSH_7LSb_FS2g;
- break;
- case LIS2DW12_FF_TSH_8LSb_FS2g:
- *val = LIS2DW12_FF_TSH_8LSb_FS2g;
- break;
- case LIS2DW12_FF_TSH_10LSb_FS2g:
- *val = LIS2DW12_FF_TSH_10LSb_FS2g;
- break;
- case LIS2DW12_FF_TSH_11LSb_FS2g:
- *val = LIS2DW12_FF_TSH_11LSb_FS2g;
- break;
- case LIS2DW12_FF_TSH_13LSb_FS2g:
- *val = LIS2DW12_FF_TSH_13LSb_FS2g;
- break;
- case LIS2DW12_FF_TSH_15LSb_FS2g:
- *val = LIS2DW12_FF_TSH_15LSb_FS2g;
- break;
- case LIS2DW12_FF_TSH_16LSb_FS2g:
- *val = LIS2DW12_FF_TSH_16LSb_FS2g;
- break;
- default:
- *val = LIS2DW12_FF_TSH_5LSb_FS2g;
- break;
- }
- return ret;
+ switch (reg.ff_ths) {
+ case LIS2DW12_FF_TSH_5LSb_FS2g:
+ *val = LIS2DW12_FF_TSH_5LSb_FS2g;
+ break;
+ case LIS2DW12_FF_TSH_7LSb_FS2g:
+ *val = LIS2DW12_FF_TSH_7LSb_FS2g;
+ break;
+ case LIS2DW12_FF_TSH_8LSb_FS2g:
+ *val = LIS2DW12_FF_TSH_8LSb_FS2g;
+ break;
+ case LIS2DW12_FF_TSH_10LSb_FS2g:
+ *val = LIS2DW12_FF_TSH_10LSb_FS2g;
+ break;
+ case LIS2DW12_FF_TSH_11LSb_FS2g:
+ *val = LIS2DW12_FF_TSH_11LSb_FS2g;
+ break;
+ case LIS2DW12_FF_TSH_13LSb_FS2g:
+ *val = LIS2DW12_FF_TSH_13LSb_FS2g;
+ break;
+ case LIS2DW12_FF_TSH_15LSb_FS2g:
+ *val = LIS2DW12_FF_TSH_15LSb_FS2g;
+ break;
+ case LIS2DW12_FF_TSH_16LSb_FS2g:
+ *val = LIS2DW12_FF_TSH_16LSb_FS2g;
+ break;
+ default:
+ *val = LIS2DW12_FF_TSH_5LSb_FS2g;
+ break;
+ }
+ return ret;
}
/**
@@ -2738,20 +2737,20 @@
*/
int32_t lis2dw12_fifo_watermark_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_fifo_ctrl_t reg;
- int32_t ret;
+ lis2dw12_fifo_ctrl_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_CTRL,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.fth = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_FIFO_CTRL,(uint8_t*) ®, 1);
- }
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_CTRL, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.fth = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_FIFO_CTRL, (uint8_t *) ®, 1);
+ }
- return ret;
+ return ret;
}
/**
- * @brief FIFO watermark level selection.[get]
+ * @brief FIFO watermark level selection.[get]
*
* @param ctx read / write interface definitions
* @param val change the values of fth in reg FIFO_CTRL
@@ -2760,13 +2759,13 @@
*/
int32_t lis2dw12_fifo_watermark_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_fifo_ctrl_t reg;
- int32_t ret;
+ lis2dw12_fifo_ctrl_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_CTRL,(uint8_t*) ®, 1);
- *val = reg.fth;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_CTRL, (uint8_t *) ®, 1);
+ *val = reg.fth;
- return ret;
+ return ret;
}
/**
@@ -2779,15 +2778,15 @@
*/
int32_t lis2dw12_fifo_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_fmode_t val)
{
- lis2dw12_fifo_ctrl_t reg;
- int32_t ret;
+ lis2dw12_fifo_ctrl_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_CTRL,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.fmode = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_FIFO_CTRL,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_CTRL, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.fmode = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_FIFO_CTRL, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -2800,32 +2799,32 @@
*/
int32_t lis2dw12_fifo_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_fmode_t *val)
{
- lis2dw12_fifo_ctrl_t reg;
- int32_t ret;
+ lis2dw12_fifo_ctrl_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_CTRL,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_CTRL, (uint8_t *) ®, 1);
- switch (reg.fmode) {
- case LIS2DW12_BYPASS_MODE:
- *val = LIS2DW12_BYPASS_MODE;
- break;
- case LIS2DW12_FIFO_MODE:
- *val = LIS2DW12_FIFO_MODE;
- break;
- case LIS2DW12_STREAM_TO_FIFO_MODE:
- *val = LIS2DW12_STREAM_TO_FIFO_MODE;
- break;
- case LIS2DW12_BYPASS_TO_STREAM_MODE:
- *val = LIS2DW12_BYPASS_TO_STREAM_MODE;
- break;
- case LIS2DW12_STREAM_MODE:
- *val = LIS2DW12_STREAM_MODE;
- break;
- default:
- *val = LIS2DW12_BYPASS_MODE;
- break;
- }
- return ret;
+ switch (reg.fmode) {
+ case LIS2DW12_BYPASS_MODE:
+ *val = LIS2DW12_BYPASS_MODE;
+ break;
+ case LIS2DW12_FIFO_MODE:
+ *val = LIS2DW12_FIFO_MODE;
+ break;
+ case LIS2DW12_STREAM_TO_FIFO_MODE:
+ *val = LIS2DW12_STREAM_TO_FIFO_MODE;
+ break;
+ case LIS2DW12_BYPASS_TO_STREAM_MODE:
+ *val = LIS2DW12_BYPASS_TO_STREAM_MODE;
+ break;
+ case LIS2DW12_STREAM_MODE:
+ *val = LIS2DW12_STREAM_MODE;
+ break;
+ default:
+ *val = LIS2DW12_BYPASS_MODE;
+ break;
+ }
+ return ret;
}
/**
@@ -2838,13 +2837,13 @@
*/
int32_t lis2dw12_fifo_data_level_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_fifo_samples_t reg;
- int32_t ret;
+ lis2dw12_fifo_samples_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_SAMPLES,(uint8_t*) ®, 1);
- *val = reg.diff;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_SAMPLES, (uint8_t *) ®, 1);
+ *val = reg.diff;
- return ret;
+ return ret;
}
/**
* @brief FIFO overrun status.[get]
@@ -2856,13 +2855,13 @@
*/
int32_t lis2dw12_fifo_ovr_flag_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_fifo_samples_t reg;
- int32_t ret;
+ lis2dw12_fifo_samples_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_SAMPLES,(uint8_t*) ®, 1);
- *val = reg.fifo_ovr;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_SAMPLES, (uint8_t *) ®, 1);
+ *val = reg.fifo_ovr;
- return ret;
+ return ret;
}
/**
* @brief FIFO threshold status flag.[get]
@@ -2874,17 +2873,17 @@
*/
int32_t lis2dw12_fifo_wtm_flag_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_fifo_samples_t reg;
- int32_t ret;
+ lis2dw12_fifo_samples_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_SAMPLES,(uint8_t*) ®, 1);
- *val = reg.fifo_fth;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_SAMPLES, (uint8_t *) ®, 1);
+ *val = reg.fifo_fth;
- return ret;
+ return ret;
}
/**
* @}
- *
+ *
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/lis2dw12_reg.h Wed Nov 21 15:43:22 2018 +0000
+++ b/lis2dw12_reg.h Wed Jul 24 14:18:07 2019 +0000
@@ -2,7 +2,7 @@
******************************************************************************
* @file lis2dw12_reg.h
* @author Sensors Software Solution Team
- * @brief This file contains all the functions prototypes for the
+ * @brief This file contains all the functions prototypes for the
* lis2dw12_reg.c driver.
******************************************************************************
* @attention
@@ -35,13 +35,13 @@
*
******************************************************************************
*/
-
+
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef LIS2DW12_REGS_H
#define LIS2DW12_REGS_H
#ifdef __cplusplus
- extern "C" {
+extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
@@ -73,24 +73,24 @@
*
*/
-typedef union{
- int16_t i16bit[3];
- uint8_t u8bit[6];
+typedef union {
+ int16_t i16bit[3];
+ uint8_t u8bit[6];
} axis3bit16_t;
-typedef union{
- int16_t i16bit;
- uint8_t u8bit[2];
+typedef union {
+ int16_t i16bit;
+ uint8_t u8bit[2];
} axis1bit16_t;
-typedef union{
- int32_t i32bit[3];
- uint8_t u8bit[12];
+typedef union {
+ int32_t i32bit[3];
+ uint8_t u8bit[12];
} axis3bit32_t;
-typedef union{
- int32_t i32bit;
- uint8_t u8bit[4];
+typedef union {
+ int32_t i32bit;
+ uint8_t u8bit[4];
} axis1bit32_t;
/**
@@ -98,15 +98,15 @@
*
*/
-typedef struct{
- uint8_t bit0 : 1;
- uint8_t bit1 : 1;
- uint8_t bit2 : 1;
- uint8_t bit3 : 1;
- uint8_t bit4 : 1;
- uint8_t bit5 : 1;
- uint8_t bit6 : 1;
- uint8_t bit7 : 1;
+typedef struct {
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
} bitwise_t;
#define PROPERTY_DISABLE (0U)
@@ -125,17 +125,17 @@
* MANDATORY: return 0 -> no Error.
* @{
*
- */
+ */
-typedef int32_t (*lis2dw12_write_ptr)(void *, uint8_t, uint8_t*, uint16_t);
-typedef int32_t (*lis2dw12_read_ptr) (void *, uint8_t, uint8_t*, uint16_t);
+typedef int32_t (*lis2dw12_write_ptr)(void *, uint8_t, uint8_t *, uint16_t);
+typedef int32_t (*lis2dw12_read_ptr)(void *, uint8_t, uint8_t *, uint16_t);
typedef struct {
- /** Component mandatory fields **/
- lis2dw12_write_ptr write_reg;
- lis2dw12_read_ptr read_reg;
- /** Customizable optional pointer **/
- void *handle;
+ /** Component mandatory fields **/
+ lis2dw12_write_ptr write_reg;
+ lis2dw12_read_ptr read_reg;
+ /** Customizable optional pointer **/
+ void *handle;
} lis2dw12_ctx_t;
/**
@@ -147,7 +147,7 @@
* @{
*
*/
-
+
/** I2C Device Address 8 bit format if SA0=0 -> 31 if SA0=1 -> 33 **/
#define LIS2DW12_I2C_ADD_L 0x31U
#define LIS2DW12_I2C_ADD_H 0x33U
@@ -172,7 +172,7 @@
* -> _from_fs2_lp1_to_mg(int16_t lsb);
* -> _from_fs4_lp1_to_mg(int16_t lsb);
* -> _from_fs8_lp1_to_mg(int16_t lsb);
- * -> _from_fs16_lp1_to_mg(int16_t lsb);
+ * -> _from_fs16_lp1_to_mg(int16_t lsb);
* -> _from_lsb_to_celsius(int16_t lsb);
*
* REMOVING the MACRO you are compliant with:
@@ -203,77 +203,77 @@
#define LIS2DW12_WHO_AM_I 0x0FU
#define LIS2DW12_CTRL1 0x20U
typedef struct {
- uint8_t lp_mode : 2;
- uint8_t mode : 2;
- uint8_t odr : 4;
+ uint8_t lp_mode : 2;
+ uint8_t mode : 2;
+ uint8_t odr : 4;
} lis2dw12_ctrl1_t;
#define LIS2DW12_CTRL2 0x21U
typedef struct {
- uint8_t sim : 1;
- uint8_t i2c_disable : 1;
- uint8_t if_add_inc : 1;
- uint8_t bdu : 1;
- uint8_t cs_pu_disc : 1;
- uint8_t not_used_01 : 1;
- uint8_t soft_reset : 1;
- uint8_t boot : 1;
+ uint8_t sim : 1;
+ uint8_t i2c_disable : 1;
+ uint8_t if_add_inc : 1;
+ uint8_t bdu : 1;
+ uint8_t cs_pu_disc : 1;
+ uint8_t not_used_01 : 1;
+ uint8_t soft_reset : 1;
+ uint8_t boot : 1;
} lis2dw12_ctrl2_t;
#define LIS2DW12_CTRL3 0x22U
typedef struct {
- uint8_t slp_mode : 2; /* slp_mode_sel + slp_mode_1 */
- uint8_t not_used_01 : 1;
- uint8_t h_lactive : 1;
- uint8_t lir : 1;
- uint8_t pp_od : 1;
- uint8_t st : 2;
+ uint8_t slp_mode : 2; /* slp_mode_sel + slp_mode_1 */
+ uint8_t not_used_01 : 1;
+ uint8_t h_lactive : 1;
+ uint8_t lir : 1;
+ uint8_t pp_od : 1;
+ uint8_t st : 2;
} lis2dw12_ctrl3_t;
#define LIS2DW12_CTRL4_INT1_PAD_CTRL 0x23U
typedef struct {
- uint8_t int1_drdy : 1;
- uint8_t int1_fth : 1;
- uint8_t int1_diff5 : 1;
- uint8_t int1_tap : 1;
- uint8_t int1_ff : 1;
- uint8_t int1_wu : 1;
- uint8_t int1_single_tap : 1;
- uint8_t int1_6d : 1;
+ uint8_t int1_drdy : 1;
+ uint8_t int1_fth : 1;
+ uint8_t int1_diff5 : 1;
+ uint8_t int1_tap : 1;
+ uint8_t int1_ff : 1;
+ uint8_t int1_wu : 1;
+ uint8_t int1_single_tap : 1;
+ uint8_t int1_6d : 1;
} lis2dw12_ctrl4_int1_pad_ctrl_t;
#define LIS2DW12_CTRL5_INT2_PAD_CTRL 0x24U
typedef struct {
- uint8_t int2_drdy : 1;
- uint8_t int2_fth : 1;
- uint8_t int2_diff5 : 1;
- uint8_t int2_ovr : 1;
- uint8_t int2_drdy_t : 1;
- uint8_t int2_boot : 1;
- uint8_t int2_sleep_chg : 1;
- uint8_t int2_sleep_state : 1;
+ uint8_t int2_drdy : 1;
+ uint8_t int2_fth : 1;
+ uint8_t int2_diff5 : 1;
+ uint8_t int2_ovr : 1;
+ uint8_t int2_drdy_t : 1;
+ uint8_t int2_boot : 1;
+ uint8_t int2_sleep_chg : 1;
+ uint8_t int2_sleep_state : 1;
} lis2dw12_ctrl5_int2_pad_ctrl_t;
#define LIS2DW12_CTRL6 0x25U
typedef struct {
- uint8_t not_used_01 : 2;
- uint8_t low_noise : 1;
- uint8_t fds : 1;
- uint8_t fs : 2;
- uint8_t bw_filt : 2;
+ uint8_t not_used_01 : 2;
+ uint8_t low_noise : 1;
+ uint8_t fds : 1;
+ uint8_t fs : 2;
+ uint8_t bw_filt : 2;
} lis2dw12_ctrl6_t;
#define LIS2DW12_OUT_T 0x26U
#define LIS2DW12_STATUS 0x27U
typedef struct {
- uint8_t drdy : 1;
- uint8_t ff_ia : 1;
- uint8_t _6d_ia : 1;
- uint8_t single_tap : 1;
- uint8_t double_tap : 1;
- uint8_t sleep_state : 1;
- uint8_t wu_ia : 1;
- uint8_t fifo_ths : 1;
+ uint8_t drdy : 1;
+ uint8_t ff_ia : 1;
+ uint8_t _6d_ia : 1;
+ uint8_t single_tap : 1;
+ uint8_t double_tap : 1;
+ uint8_t sleep_state : 1;
+ uint8_t wu_ia : 1;
+ uint8_t fifo_ths : 1;
} lis2dw12_status_t;
#define LIS2DW12_OUT_X_L 0x28U
@@ -284,122 +284,122 @@
#define LIS2DW12_OUT_Z_H 0x2DU
#define LIS2DW12_FIFO_CTRL 0x2EU
typedef struct {
- uint8_t fth : 5;
- uint8_t fmode : 3;
+ uint8_t fth : 5;
+ uint8_t fmode : 3;
} lis2dw12_fifo_ctrl_t;
#define LIS2DW12_FIFO_SAMPLES 0x2FU
typedef struct {
- uint8_t diff : 6;
- uint8_t fifo_ovr : 1;
- uint8_t fifo_fth : 1;
+ uint8_t diff : 6;
+ uint8_t fifo_ovr : 1;
+ uint8_t fifo_fth : 1;
} lis2dw12_fifo_samples_t;
#define LIS2DW12_TAP_THS_X 0x30U
typedef struct {
- uint8_t tap_thsx : 5;
- uint8_t _6d_ths : 2;
- uint8_t _4d_en : 1;
+ uint8_t tap_thsx : 5;
+ uint8_t _6d_ths : 2;
+ uint8_t _4d_en : 1;
} lis2dw12_tap_ths_x_t;
#define LIS2DW12_TAP_THS_Y 0x31U
typedef struct {
- uint8_t tap_thsy : 5;
- uint8_t tap_prior : 3;
+ uint8_t tap_thsy : 5;
+ uint8_t tap_prior : 3;
} lis2dw12_tap_ths_y_t;
#define LIS2DW12_TAP_THS_Z 0x32U
typedef struct {
- uint8_t tap_thsz : 5;
- uint8_t tap_z_en : 1;
- uint8_t tap_y_en : 1;
- uint8_t tap_x_en : 1;
+ uint8_t tap_thsz : 5;
+ uint8_t tap_z_en : 1;
+ uint8_t tap_y_en : 1;
+ uint8_t tap_x_en : 1;
} lis2dw12_tap_ths_z_t;
#define LIS2DW12_INT_DUR 0x33U
typedef struct {
- uint8_t shock : 2;
- uint8_t quiet : 2;
- uint8_t latency : 4;
+ uint8_t shock : 2;
+ uint8_t quiet : 2;
+ uint8_t latency : 4;
} lis2dw12_int_dur_t;
#define LIS2DW12_WAKE_UP_THS 0x34U
typedef struct {
- uint8_t wk_ths : 6;
- uint8_t sleep_on : 1;
- uint8_t single_double_tap : 1;
+ uint8_t wk_ths : 6;
+ uint8_t sleep_on : 1;
+ uint8_t single_double_tap : 1;
} lis2dw12_wake_up_ths_t;
#define LIS2DW12_WAKE_UP_DUR 0x35U
typedef struct {
- uint8_t sleep_dur : 4;
- uint8_t stationary : 1;
- uint8_t wake_dur : 2;
- uint8_t ff_dur : 1;
+ uint8_t sleep_dur : 4;
+ uint8_t stationary : 1;
+ uint8_t wake_dur : 2;
+ uint8_t ff_dur : 1;
} lis2dw12_wake_up_dur_t;
#define LIS2DW12_FREE_FALL 0x36U
typedef struct {
- uint8_t ff_ths : 3;
- uint8_t ff_dur : 5;
+ uint8_t ff_ths : 3;
+ uint8_t ff_dur : 5;
} lis2dw12_free_fall_t;
#define LIS2DW12_STATUS_DUP 0x37U
typedef struct {
- uint8_t drdy : 1;
- uint8_t ff_ia : 1;
- uint8_t _6d_ia : 1;
- uint8_t single_tap : 1;
- uint8_t double_tap : 1;
- uint8_t sleep_state_ia : 1;
- uint8_t drdy_t : 1;
- uint8_t ovr : 1;
+ uint8_t drdy : 1;
+ uint8_t ff_ia : 1;
+ uint8_t _6d_ia : 1;
+ uint8_t single_tap : 1;
+ uint8_t double_tap : 1;
+ uint8_t sleep_state_ia : 1;
+ uint8_t drdy_t : 1;
+ uint8_t ovr : 1;
} lis2dw12_status_dup_t;
#define LIS2DW12_WAKE_UP_SRC 0x38U
typedef struct {
- uint8_t z_wu : 1;
- uint8_t y_wu : 1;
- uint8_t x_wu : 1;
- uint8_t wu_ia : 1;
- uint8_t sleep_state_ia : 1;
- uint8_t ff_ia : 1;
- uint8_t not_used_01 : 2;
+ uint8_t z_wu : 1;
+ uint8_t y_wu : 1;
+ uint8_t x_wu : 1;
+ uint8_t wu_ia : 1;
+ uint8_t sleep_state_ia : 1;
+ uint8_t ff_ia : 1;
+ uint8_t not_used_01 : 2;
} lis2dw12_wake_up_src_t;
#define LIS2DW12_TAP_SRC 0x39U
typedef struct {
- uint8_t z_tap : 1;
- uint8_t y_tap : 1;
- uint8_t x_tap : 1;
- uint8_t tap_sign : 1;
- uint8_t double_tap : 1;
- uint8_t single_tap : 1;
- uint8_t tap_ia : 1;
- uint8_t not_used_01 : 1;
+ uint8_t z_tap : 1;
+ uint8_t y_tap : 1;
+ uint8_t x_tap : 1;
+ uint8_t tap_sign : 1;
+ uint8_t double_tap : 1;
+ uint8_t single_tap : 1;
+ uint8_t tap_ia : 1;
+ uint8_t not_used_01 : 1;
} lis2dw12_tap_src_t;
#define LIS2DW12_SIXD_SRC 0x3AU
typedef struct {
- uint8_t xl : 1;
- uint8_t xh : 1;
- uint8_t yl : 1;
- uint8_t yh : 1;
- uint8_t zl : 1;
- uint8_t zh : 1;
- uint8_t _6d_ia : 1;
- uint8_t not_used_01 : 1;
+ uint8_t xl : 1;
+ uint8_t xh : 1;
+ uint8_t yl : 1;
+ uint8_t yh : 1;
+ uint8_t zl : 1;
+ uint8_t zh : 1;
+ uint8_t _6d_ia : 1;
+ uint8_t not_used_01 : 1;
} lis2dw12_sixd_src_t;
#define LIS2DW12_ALL_INT_SRC 0x3BU
typedef struct {
- uint8_t ff_ia : 1;
- uint8_t wu_ia : 1;
- uint8_t single_tap : 1;
- uint8_t double_tap : 1;
- uint8_t _6d_ia : 1;
- uint8_t sleep_change_ia : 1;
- uint8_t not_used_01 : 2;
+ uint8_t ff_ia : 1;
+ uint8_t wu_ia : 1;
+ uint8_t single_tap : 1;
+ uint8_t double_tap : 1;
+ uint8_t _6d_ia : 1;
+ uint8_t sleep_change_ia : 1;
+ uint8_t not_used_01 : 2;
} lis2dw12_all_int_src_t;
#define LIS2DW12_X_OFS_USR 0x3CU
@@ -407,14 +407,14 @@
#define LIS2DW12_Z_OFS_USR 0x3EU
#define LIS2DW12_CTRL_REG7 0x3FU
typedef struct {
- uint8_t lpass_on6d : 1;
- uint8_t hp_ref_mode : 1;
- uint8_t usr_off_w : 1;
- uint8_t usr_off_on_wu : 1;
- uint8_t usr_off_on_out : 1;
- uint8_t interrupts_enable : 1;
- uint8_t int2_on_int1 : 1;
- uint8_t drdy_pulsed : 1;
+ uint8_t lpass_on6d : 1;
+ uint8_t hp_ref_mode : 1;
+ uint8_t usr_off_w : 1;
+ uint8_t usr_off_on_wu : 1;
+ uint8_t usr_off_on_out : 1;
+ uint8_t interrupts_enable : 1;
+ uint8_t int2_on_int1 : 1;
+ uint8_t drdy_pulsed : 1;
} lis2dw12_ctrl_reg7_t;
/**
@@ -429,31 +429,31 @@
* @{
*
*/
-typedef union{
- lis2dw12_ctrl1_t ctrl1;
- lis2dw12_ctrl2_t ctrl2;
- lis2dw12_ctrl3_t ctrl3;
- lis2dw12_ctrl4_int1_pad_ctrl_t ctrl4_int1_pad_ctrl;
- lis2dw12_ctrl5_int2_pad_ctrl_t ctrl5_int2_pad_ctrl;
- lis2dw12_ctrl6_t ctrl6;
- lis2dw12_status_t status;
- lis2dw12_fifo_ctrl_t fifo_ctrl;
- lis2dw12_fifo_samples_t fifo_samples;
- lis2dw12_tap_ths_x_t tap_ths_x;
- lis2dw12_tap_ths_y_t tap_ths_y;
- lis2dw12_tap_ths_z_t tap_ths_z;
- lis2dw12_int_dur_t int_dur;
- lis2dw12_wake_up_ths_t wake_up_ths;
- lis2dw12_wake_up_dur_t wake_up_dur;
- lis2dw12_free_fall_t free_fall;
- lis2dw12_status_dup_t status_dup;
- lis2dw12_wake_up_src_t wake_up_src;
- lis2dw12_tap_src_t tap_src;
- lis2dw12_sixd_src_t sixd_src;
- lis2dw12_all_int_src_t all_int_src;
- lis2dw12_ctrl_reg7_t ctrl_reg7;
- bitwise_t bitwise;
- uint8_t byte;
+typedef union {
+ lis2dw12_ctrl1_t ctrl1;
+ lis2dw12_ctrl2_t ctrl2;
+ lis2dw12_ctrl3_t ctrl3;
+ lis2dw12_ctrl4_int1_pad_ctrl_t ctrl4_int1_pad_ctrl;
+ lis2dw12_ctrl5_int2_pad_ctrl_t ctrl5_int2_pad_ctrl;
+ lis2dw12_ctrl6_t ctrl6;
+ lis2dw12_status_t status;
+ lis2dw12_fifo_ctrl_t fifo_ctrl;
+ lis2dw12_fifo_samples_t fifo_samples;
+ lis2dw12_tap_ths_x_t tap_ths_x;
+ lis2dw12_tap_ths_y_t tap_ths_y;
+ lis2dw12_tap_ths_z_t tap_ths_z;
+ lis2dw12_int_dur_t int_dur;
+ lis2dw12_wake_up_ths_t wake_up_ths;
+ lis2dw12_wake_up_dur_t wake_up_dur;
+ lis2dw12_free_fall_t free_fall;
+ lis2dw12_status_dup_t status_dup;
+ lis2dw12_wake_up_src_t wake_up_src;
+ lis2dw12_tap_src_t tap_src;
+ lis2dw12_sixd_src_t sixd_src;
+ lis2dw12_all_int_src_t all_int_src;
+ lis2dw12_ctrl_reg7_t ctrl_reg7;
+ bitwise_t bitwise;
+ uint8_t byte;
} lis2dw12_reg_t;
/**
@@ -461,11 +461,11 @@
*
*/
-int32_t lis2dw12_read_reg(lis2dw12_ctx_t *ctx, uint8_t reg, uint8_t* data,
+int32_t lis2dw12_read_reg(lis2dw12_ctx_t *ctx, uint8_t reg, uint8_t *data,
uint16_t len);
-int32_t lis2dw12_write_reg(lis2dw12_ctx_t *ctx, uint8_t reg, uint8_t* data,
+int32_t lis2dw12_write_reg(lis2dw12_ctx_t *ctx, uint8_t reg, uint8_t *data,
uint16_t len);
-
+
extern float lis2dw12_from_fs2_to_mg(int16_t lsb);
extern float lis2dw12_from_fs4_to_mg(int16_t lsb);
extern float lis2dw12_from_fs8_to_mg(int16_t lsb);
@@ -477,41 +477,41 @@
extern float lis2dw12_from_lsb_to_celsius(int16_t lsb);
typedef enum {
- LIS2DW12_HIGH_PERFORMANCE = 0x04,
- LIS2DW12_CONT_LOW_PWR_4 = 0x03,
- LIS2DW12_CONT_LOW_PWR_3 = 0x02,
- LIS2DW12_CONT_LOW_PWR_2 = 0x01,
- LIS2DW12_CONT_LOW_PWR_12bit = 0x00,
- LIS2DW12_SINGLE_LOW_PWR_4 = 0x0B,
- LIS2DW12_SINGLE_LOW_PWR_3 = 0x0A,
- LIS2DW12_SINGLE_LOW_PWR_2 = 0x09,
- LIS2DW12_SINGLE_LOW_PWR_12bit = 0x08,
- LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE = 0x14,
- LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4 = 0x13,
- LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3 = 0x12,
- LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2 = 0x11,
- LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit = 0x10,
- LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4 = 0x1B,
- LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3 = 0x1A,
- LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2 = 0x19,
- LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit = 0x18,
+ LIS2DW12_HIGH_PERFORMANCE = 0x04,
+ LIS2DW12_CONT_LOW_PWR_4 = 0x03,
+ LIS2DW12_CONT_LOW_PWR_3 = 0x02,
+ LIS2DW12_CONT_LOW_PWR_2 = 0x01,
+ LIS2DW12_CONT_LOW_PWR_12bit = 0x00,
+ LIS2DW12_SINGLE_LOW_PWR_4 = 0x0B,
+ LIS2DW12_SINGLE_LOW_PWR_3 = 0x0A,
+ LIS2DW12_SINGLE_LOW_PWR_2 = 0x09,
+ LIS2DW12_SINGLE_LOW_PWR_12bit = 0x08,
+ LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE = 0x14,
+ LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4 = 0x13,
+ LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3 = 0x12,
+ LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2 = 0x11,
+ LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit = 0x10,
+ LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4 = 0x1B,
+ LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3 = 0x1A,
+ LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2 = 0x19,
+ LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit = 0x18,
} lis2dw12_mode_t;
int32_t lis2dw12_power_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_mode_t val);
int32_t lis2dw12_power_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_mode_t *val);
typedef enum {
- LIS2DW12_XL_ODR_OFF = 0x00,
- LIS2DW12_XL_ODR_1Hz6_LP_ONLY = 0x01,
- LIS2DW12_XL_ODR_12Hz5 = 0x02,
- LIS2DW12_XL_ODR_25Hz = 0x03,
- LIS2DW12_XL_ODR_50Hz = 0x04,
- LIS2DW12_XL_ODR_100Hz = 0x05,
- LIS2DW12_XL_ODR_200Hz = 0x06,
- LIS2DW12_XL_ODR_400Hz = 0x07,
- LIS2DW12_XL_ODR_800Hz = 0x08,
- LIS2DW12_XL_ODR_1k6Hz = 0x09,
- LIS2DW12_XL_SET_SW_TRIG = 0x10, /* Use this only in SINGLE mode */
- LIS2DW12_XL_SET_PIN_TRIG = 0x20, /* Use this only in SINGLE mode */
+ LIS2DW12_XL_ODR_OFF = 0x00,
+ LIS2DW12_XL_ODR_1Hz6_LP_ONLY = 0x01,
+ LIS2DW12_XL_ODR_12Hz5 = 0x02,
+ LIS2DW12_XL_ODR_25Hz = 0x03,
+ LIS2DW12_XL_ODR_50Hz = 0x04,
+ LIS2DW12_XL_ODR_100Hz = 0x05,
+ LIS2DW12_XL_ODR_200Hz = 0x06,
+ LIS2DW12_XL_ODR_400Hz = 0x07,
+ LIS2DW12_XL_ODR_800Hz = 0x08,
+ LIS2DW12_XL_ODR_1k6Hz = 0x09,
+ LIS2DW12_XL_SET_SW_TRIG = 0x10, /* Use this only in SINGLE mode */
+ LIS2DW12_XL_SET_PIN_TRIG = 0x20, /* Use this only in SINGLE mode */
} lis2dw12_odr_t;
int32_t lis2dw12_data_rate_set(lis2dw12_ctx_t *ctx, lis2dw12_odr_t val);
int32_t lis2dw12_data_rate_get(lis2dw12_ctx_t *ctx, lis2dw12_odr_t *val);
@@ -520,10 +520,10 @@
int32_t lis2dw12_block_data_update_get(lis2dw12_ctx_t *ctx, uint8_t *val);
typedef enum {
- LIS2DW12_2g = 0,
- LIS2DW12_4g = 1,
- LIS2DW12_8g = 2,
- LIS2DW12_16g = 3,
+ LIS2DW12_2g = 0,
+ LIS2DW12_4g = 1,
+ LIS2DW12_8g = 2,
+ LIS2DW12_16g = 3,
} lis2dw12_fs_t;
int32_t lis2dw12_full_scale_set(lis2dw12_ctx_t *ctx, lis2dw12_fs_t val);
int32_t lis2dw12_full_scale_get(lis2dw12_ctx_t *ctx, lis2dw12_fs_t *val);
@@ -532,12 +532,12 @@
int32_t lis2dw12_flag_data_ready_get(lis2dw12_ctx_t *ctx, uint8_t *val);
-typedef struct{
- lis2dw12_status_dup_t status_dup;
- lis2dw12_wake_up_src_t wake_up_src;
- lis2dw12_tap_src_t tap_src;
- lis2dw12_sixd_src_t sixd_src;
- lis2dw12_all_int_src_t all_int_src;
+typedef struct {
+ lis2dw12_status_dup_t status_dup;
+ lis2dw12_wake_up_src_t wake_up_src;
+ lis2dw12_tap_src_t tap_src;
+ lis2dw12_sixd_src_t sixd_src;
+ lis2dw12_all_int_src_t all_int_src;
} lis2dw12_all_sources_t;
int32_t lis2dw12_all_sources_get(lis2dw12_ctx_t *ctx,
lis2dw12_all_sources_t *val);
@@ -552,13 +552,13 @@
int32_t lis2dw12_usr_offset_z_get(lis2dw12_ctx_t *ctx, uint8_t *buff);
typedef enum {
- LIS2DW12_LSb_977ug = 0,
- LIS2DW12_LSb_15mg6 = 1,
+ LIS2DW12_LSb_977ug = 0,
+ LIS2DW12_LSb_15mg6 = 1,
} lis2dw12_usr_off_w_t;
int32_t lis2dw12_offset_weight_set(lis2dw12_ctx_t *ctx,
- lis2dw12_usr_off_w_t val);
+ lis2dw12_usr_off_w_t val);
int32_t lis2dw12_offset_weight_get(lis2dw12_ctx_t *ctx,
- lis2dw12_usr_off_w_t *val);
+ lis2dw12_usr_off_w_t *val);
int32_t lis2dw12_temperature_raw_get(lis2dw12_ctx_t *ctx, uint8_t *buff);
@@ -576,16 +576,16 @@
int32_t lis2dw12_boot_get(lis2dw12_ctx_t *ctx, uint8_t *val);
typedef enum {
- LIS2DW12_XL_ST_DISABLE = 0,
- LIS2DW12_XL_ST_POSITIVE = 1,
- LIS2DW12_XL_ST_NEGATIVE = 2,
+ LIS2DW12_XL_ST_DISABLE = 0,
+ LIS2DW12_XL_ST_POSITIVE = 1,
+ LIS2DW12_XL_ST_NEGATIVE = 2,
} lis2dw12_st_t;
int32_t lis2dw12_self_test_set(lis2dw12_ctx_t *ctx, lis2dw12_st_t val);
int32_t lis2dw12_self_test_get(lis2dw12_ctx_t *ctx, lis2dw12_st_t *val);
typedef enum {
- LIS2DW12_DRDY_LATCHED = 0,
- LIS2DW12_DRDY_PULSED = 1,
+ LIS2DW12_DRDY_LATCHED = 0,
+ LIS2DW12_DRDY_PULSED = 1,
} lis2dw12_drdy_pulsed_t;
int32_t lis2dw12_data_ready_mode_set(lis2dw12_ctx_t *ctx,
lis2dw12_drdy_pulsed_t val);
@@ -593,37 +593,37 @@
lis2dw12_drdy_pulsed_t *val);
typedef enum {
- LIS2DW12_LPF_ON_OUT = 0x00,
- LIS2DW12_USER_OFFSET_ON_OUT = 0x01,
- LIS2DW12_HIGH_PASS_ON_OUT = 0x10,
+ LIS2DW12_LPF_ON_OUT = 0x00,
+ LIS2DW12_USER_OFFSET_ON_OUT = 0x01,
+ LIS2DW12_HIGH_PASS_ON_OUT = 0x10,
} lis2dw12_fds_t;
int32_t lis2dw12_filter_path_set(lis2dw12_ctx_t *ctx, lis2dw12_fds_t val);
int32_t lis2dw12_filter_path_get(lis2dw12_ctx_t *ctx, lis2dw12_fds_t *val);
typedef enum {
- LIS2DW12_ODR_DIV_2 = 0,
- LIS2DW12_ODR_DIV_4 = 1,
- LIS2DW12_ODR_DIV_10 = 2,
- LIS2DW12_ODR_DIV_20 = 3,
+ LIS2DW12_ODR_DIV_2 = 0,
+ LIS2DW12_ODR_DIV_4 = 1,
+ LIS2DW12_ODR_DIV_10 = 2,
+ LIS2DW12_ODR_DIV_20 = 3,
} lis2dw12_bw_filt_t;
int32_t lis2dw12_filter_bandwidth_set(lis2dw12_ctx_t *ctx,
- lis2dw12_bw_filt_t val);
+ lis2dw12_bw_filt_t val);
int32_t lis2dw12_filter_bandwidth_get(lis2dw12_ctx_t *ctx,
- lis2dw12_bw_filt_t *val);
+ lis2dw12_bw_filt_t *val);
int32_t lis2dw12_reference_mode_set(lis2dw12_ctx_t *ctx, uint8_t val);
int32_t lis2dw12_reference_mode_get(lis2dw12_ctx_t *ctx, uint8_t *val);
typedef enum {
- LIS2DW12_SPI_4_WIRE = 0,
- LIS2DW12_SPI_3_WIRE = 1,
+ LIS2DW12_SPI_4_WIRE = 0,
+ LIS2DW12_SPI_3_WIRE = 1,
} lis2dw12_sim_t;
int32_t lis2dw12_spi_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_sim_t val);
int32_t lis2dw12_spi_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_sim_t *val);
typedef enum {
- LIS2DW12_I2C_ENABLE = 0,
- LIS2DW12_I2C_DISABLE = 1,
+ LIS2DW12_I2C_ENABLE = 0,
+ LIS2DW12_I2C_DISABLE = 1,
} lis2dw12_i2c_disable_t;
int32_t lis2dw12_i2c_interface_set(lis2dw12_ctx_t *ctx,
lis2dw12_i2c_disable_t val);
@@ -631,15 +631,15 @@
lis2dw12_i2c_disable_t *val);
typedef enum {
- LIS2DW12_PULL_UP_CONNECT = 0,
- LIS2DW12_PULL_UP_DISCONNECT = 1,
+ LIS2DW12_PULL_UP_CONNECT = 0,
+ LIS2DW12_PULL_UP_DISCONNECT = 1,
} lis2dw12_cs_pu_disc_t;
int32_t lis2dw12_cs_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_cs_pu_disc_t val);
int32_t lis2dw12_cs_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_cs_pu_disc_t *val);
typedef enum {
- LIS2DW12_ACTIVE_HIGH = 0,
- LIS2DW12_ACTIVE_LOW = 1,
+ LIS2DW12_ACTIVE_HIGH = 0,
+ LIS2DW12_ACTIVE_LOW = 1,
} lis2dw12_h_lactive_t;
int32_t lis2dw12_pin_polarity_set(lis2dw12_ctx_t *ctx,
lis2dw12_h_lactive_t val);
@@ -647,8 +647,8 @@
lis2dw12_h_lactive_t *val);
typedef enum {
- LIS2DW12_INT_PULSED = 0,
- LIS2DW12_INT_LATCHED = 1,
+ LIS2DW12_INT_PULSED = 0,
+ LIS2DW12_INT_LATCHED = 1,
} lis2dw12_lir_t;
int32_t lis2dw12_int_notification_set(lis2dw12_ctx_t *ctx,
lis2dw12_lir_t val);
@@ -656,13 +656,13 @@
lis2dw12_lir_t *val);
typedef enum {
- LIS2DW12_PUSH_PULL = 0,
- LIS2DW12_OPEN_DRAIN = 1,
+ LIS2DW12_PUSH_PULL = 0,
+ LIS2DW12_OPEN_DRAIN = 1,
} lis2dw12_pp_od_t;
int32_t lis2dw12_pin_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_pp_od_t val);
int32_t lis2dw12_pin_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_pp_od_t *val);
-int32_t lis2dw12_pin_int1_route_set(lis2dw12_ctx_t *ctx,
+int32_t lis2dw12_pin_int1_route_set(lis2dw12_ctx_t *ctx,
lis2dw12_ctrl4_int1_pad_ctrl_t *val);
int32_t lis2dw12_pin_int1_route_get(lis2dw12_ctx_t *ctx,
lis2dw12_ctrl4_int1_pad_ctrl_t *val);
@@ -682,8 +682,8 @@
int32_t lis2dw12_wkup_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val);
typedef enum {
- LIS2DW12_HP_FEED = 0,
- LIS2DW12_USER_OFFSET_FEED = 1,
+ LIS2DW12_HP_FEED = 0,
+ LIS2DW12_USER_OFFSET_FEED = 1,
} lis2dw12_usr_off_on_wu_t;
int32_t lis2dw12_wkup_feed_data_set(lis2dw12_ctx_t *ctx,
lis2dw12_usr_off_on_wu_t val);
@@ -691,9 +691,9 @@
lis2dw12_usr_off_on_wu_t *val);
typedef enum {
- LIS2DW12_NO_DETECTION = 0,
- LIS2DW12_DETECT_ACT_INACT = 1,
- LIS2DW12_DETECT_STAT_MOTION = 3,
+ LIS2DW12_NO_DETECTION = 0,
+ LIS2DW12_DETECT_ACT_INACT = 1,
+ LIS2DW12_DETECT_STAT_MOTION = 3,
} lis2dw12_sleep_on_t;
int32_t lis2dw12_act_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_sleep_on_t val);
int32_t lis2dw12_act_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_sleep_on_t *val);
@@ -708,12 +708,12 @@
int32_t lis2dw12_tap_threshold_y_get(lis2dw12_ctx_t *ctx, uint8_t *val);
typedef enum {
- LIS2DW12_XYZ = 0,
- LIS2DW12_YXZ = 1,
- LIS2DW12_XZY = 2,
- LIS2DW12_ZYX = 3,
- LIS2DW12_YZX = 5,
- LIS2DW12_ZXY = 6,
+ LIS2DW12_XYZ = 0,
+ LIS2DW12_YXZ = 1,
+ LIS2DW12_XZY = 2,
+ LIS2DW12_ZYX = 3,
+ LIS2DW12_YZX = 5,
+ LIS2DW12_ZXY = 6,
} lis2dw12_tap_prior_t;
int32_t lis2dw12_tap_axis_priority_set(lis2dw12_ctx_t *ctx,
lis2dw12_tap_prior_t val);
@@ -742,8 +742,8 @@
int32_t lis2dw12_tap_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val);
typedef enum {
- LIS2DW12_ONLY_SINGLE = 0,
- LIS2DW12_BOTH_SINGLE_DOUBLE = 1,
+ LIS2DW12_ONLY_SINGLE = 0,
+ LIS2DW12_BOTH_SINGLE_DOUBLE = 1,
} lis2dw12_single_double_tap_t;
int32_t lis2dw12_tap_mode_set(lis2dw12_ctx_t *ctx,
lis2dw12_single_double_tap_t val);
@@ -761,8 +761,8 @@
int32_t lis2dw12_6d_src_get(lis2dw12_ctx_t *ctx, lis2dw12_sixd_src_t *val);
typedef enum {
- LIS2DW12_ODR_DIV_2_FEED = 0,
- LIS2DW12_LPF2_FEED = 1,
+ LIS2DW12_ODR_DIV_2_FEED = 0,
+ LIS2DW12_LPF2_FEED = 1,
} lis2dw12_lpass_on6d_t;
int32_t lis2dw12_6d_feed_data_set(lis2dw12_ctx_t *ctx,
lis2dw12_lpass_on6d_t val);
@@ -773,14 +773,14 @@
int32_t lis2dw12_ff_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val);
typedef enum {
- LIS2DW12_FF_TSH_5LSb_FS2g = 0,
- LIS2DW12_FF_TSH_7LSb_FS2g = 1,
- LIS2DW12_FF_TSH_8LSb_FS2g = 2,
- LIS2DW12_FF_TSH_10LSb_FS2g = 3,
- LIS2DW12_FF_TSH_11LSb_FS2g = 4,
- LIS2DW12_FF_TSH_13LSb_FS2g = 5,
- LIS2DW12_FF_TSH_15LSb_FS2g = 6,
- LIS2DW12_FF_TSH_16LSb_FS2g = 7,
+ LIS2DW12_FF_TSH_5LSb_FS2g = 0,
+ LIS2DW12_FF_TSH_7LSb_FS2g = 1,
+ LIS2DW12_FF_TSH_8LSb_FS2g = 2,
+ LIS2DW12_FF_TSH_10LSb_FS2g = 3,
+ LIS2DW12_FF_TSH_11LSb_FS2g = 4,
+ LIS2DW12_FF_TSH_13LSb_FS2g = 5,
+ LIS2DW12_FF_TSH_15LSb_FS2g = 6,
+ LIS2DW12_FF_TSH_16LSb_FS2g = 7,
} lis2dw12_ff_ths_t;
int32_t lis2dw12_ff_threshold_set(lis2dw12_ctx_t *ctx,
lis2dw12_ff_ths_t val);
@@ -791,11 +791,11 @@
int32_t lis2dw12_fifo_watermark_get(lis2dw12_ctx_t *ctx, uint8_t *val);
typedef enum {
- LIS2DW12_BYPASS_MODE = 0,
- LIS2DW12_FIFO_MODE = 1,
- LIS2DW12_STREAM_TO_FIFO_MODE = 3,
- LIS2DW12_BYPASS_TO_STREAM_MODE = 4,
- LIS2DW12_STREAM_MODE = 6,
+ LIS2DW12_BYPASS_MODE = 0,
+ LIS2DW12_FIFO_MODE = 1,
+ LIS2DW12_STREAM_TO_FIFO_MODE = 3,
+ LIS2DW12_BYPASS_TO_STREAM_MODE = 4,
+ LIS2DW12_STREAM_MODE = 6,
} lis2dw12_fmode_t;
int32_t lis2dw12_fifo_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_fmode_t val);
int32_t lis2dw12_fifo_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_fmode_t *val);