ST / LIS2DW12

3-axis MEMS ultra low power accelerometer

Dependencies:   X_NUCLEO_COMMON ST_INTERFACES

Dependents:   X_NUCLEO_IKS01A3 X_NUCLEO_IKS01A3

lis2dw12_reg.h@1:94e908301953, 2018-11-19 (annotated)

Committer:
cparata
Date:
Mon Nov 19 14:35:00 2018 +0000
Revision:
1:94e908301953
Parent:
0:dff8803aace7
Child:
2:a94816b14e3d
Fix header file

Who changed what in which revision?

UserRevisionLine numberNew contents of line
cparata 1:94e908301953 1 /**
cparata 0:dff8803aace7 2 ******************************************************************************
cparata 0:dff8803aace7 3 * @file lis2dw12_reg.h
cparata 0:dff8803aace7 4 * @author MEMS Software Solution Team
cparata 0:dff8803aace7 5 * @date 25-January-2018
cparata 0:dff8803aace7 6 * @brief This file contains all the functions prototypes for the
cparata 0:dff8803aace7 7 * lis2dw12_reg.c driver.
cparata 0:dff8803aace7 8 ******************************************************************************
cparata 0:dff8803aace7 9 * @attention
cparata 0:dff8803aace7 10 *
cparata 0:dff8803aace7 11 * <h2><center>&copy; COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
cparata 0:dff8803aace7 12 *
cparata 0:dff8803aace7 13 * Redistribution and use in source and binary forms, with or without modification,
cparata 0:dff8803aace7 14 * are permitted provided that the following conditions are met:
cparata 0:dff8803aace7 15 * 1. Redistributions of source code must retain the above copyright notice,
cparata 0:dff8803aace7 16 * this list of conditions and the following disclaimer.
cparata 0:dff8803aace7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
cparata 0:dff8803aace7 18 * this list of conditions and the following disclaimer in the documentation
cparata 0:dff8803aace7 19 * and/or other materials provided with the distribution.
cparata 0:dff8803aace7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
cparata 0:dff8803aace7 21 * may be used to endorse or promote products derived from this software
cparata 0:dff8803aace7 22 * without specific prior written permission.
cparata 0:dff8803aace7 23 *
cparata 0:dff8803aace7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
cparata 0:dff8803aace7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
cparata 0:dff8803aace7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
cparata 0:dff8803aace7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
cparata 0:dff8803aace7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
cparata 0:dff8803aace7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
cparata 0:dff8803aace7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
cparata 0:dff8803aace7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
cparata 0:dff8803aace7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
cparata 0:dff8803aace7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
cparata 0:dff8803aace7 34 *
cparata 1:94e908301953 35 ******************************************************************************
cparata 0:dff8803aace7 36 */
cparata 0:dff8803aace7 37
cparata 0:dff8803aace7 38 /* Define to prevent recursive inclusion -------------------------------------*/
cparata 0:dff8803aace7 39 #ifndef __LIS2DW12_DRIVER__H
cparata 0:dff8803aace7 40 #define __LIS2DW12_DRIVER__H
cparata 0:dff8803aace7 41
cparata 0:dff8803aace7 42 #ifdef __cplusplus
cparata 0:dff8803aace7 43 extern "C" {
cparata 0:dff8803aace7 44 #endif
cparata 0:dff8803aace7 45
cparata 0:dff8803aace7 46 /* Includes ------------------------------------------------------------------*/
cparata 0:dff8803aace7 47 #include <stdint.h>
cparata 0:dff8803aace7 48
cparata 0:dff8803aace7 49 /** @addtogroup lis2dw12
cparata 0:dff8803aace7 50 * @{
cparata 0:dff8803aace7 51 */
cparata 0:dff8803aace7 52
cparata 0:dff8803aace7 53 #ifndef MEMS_SHARED_TYPES
cparata 0:dff8803aace7 54 #define MEMS_SHARED_TYPES
cparata 0:dff8803aace7 55
cparata 0:dff8803aace7 56 /** @defgroup ST_MEMS_common_types
cparata 0:dff8803aace7 57 * @{
cparata 0:dff8803aace7 58 */
cparata 0:dff8803aace7 59
cparata 0:dff8803aace7 60 /**
cparata 0:dff8803aace7 61 * Float typedef definition for compliance with:
cparata 0:dff8803aace7 62 * MISRA-C 2012 [Dir 4.6a] -> " Basic type used without typedef "
cparata 0:dff8803aace7 63 *
cparata 0:dff8803aace7 64 */
cparata 0:dff8803aace7 65 typedef float float32_t;
cparata 0:dff8803aace7 66
cparata 0:dff8803aace7 67 typedef union
cparata 0:dff8803aace7 68 {
cparata 0:dff8803aace7 69 int16_t i16bit[3];
cparata 0:dff8803aace7 70 uint8_t u8bit[6];
cparata 0:dff8803aace7 71 } axis3bit16_t;
cparata 0:dff8803aace7 72
cparata 0:dff8803aace7 73 typedef union
cparata 0:dff8803aace7 74 {
cparata 0:dff8803aace7 75 int16_t i16bit;
cparata 0:dff8803aace7 76 uint8_t u8bit[2];
cparata 0:dff8803aace7 77 } axis1bit16_t;
cparata 0:dff8803aace7 78
cparata 0:dff8803aace7 79 typedef union
cparata 0:dff8803aace7 80 {
cparata 0:dff8803aace7 81 int32_t i32bit[3];
cparata 0:dff8803aace7 82 uint8_t u8bit[12];
cparata 0:dff8803aace7 83 } axis3bit32_t;
cparata 0:dff8803aace7 84
cparata 0:dff8803aace7 85 typedef union
cparata 0:dff8803aace7 86 {
cparata 0:dff8803aace7 87 int32_t i32bit;
cparata 0:dff8803aace7 88 uint8_t u8bit[4];
cparata 0:dff8803aace7 89 } axis1bit32_t;
cparata 0:dff8803aace7 90
cparata 0:dff8803aace7 91 typedef struct
cparata 0:dff8803aace7 92 {
cparata 0:dff8803aace7 93 uint8_t bit0 : 1;
cparata 0:dff8803aace7 94 uint8_t bit1 : 1;
cparata 0:dff8803aace7 95 uint8_t bit2 : 1;
cparata 0:dff8803aace7 96 uint8_t bit3 : 1;
cparata 0:dff8803aace7 97 uint8_t bit4 : 1;
cparata 0:dff8803aace7 98 uint8_t bit5 : 1;
cparata 0:dff8803aace7 99 uint8_t bit6 : 1;
cparata 0:dff8803aace7 100 uint8_t bit7 : 1;
cparata 0:dff8803aace7 101 } bitwise_t;
cparata 0:dff8803aace7 102
cparata 0:dff8803aace7 103 #define PROPERTY_DISABLE (0)
cparata 0:dff8803aace7 104 #define PROPERTY_ENABLE (1)
cparata 0:dff8803aace7 105
cparata 0:dff8803aace7 106 #endif /* MEMS_SHARED_TYPES*/
cparata 0:dff8803aace7 107
cparata 0:dff8803aace7 108 /**
cparata 0:dff8803aace7 109 * @}
cparata 0:dff8803aace7 110 */
cparata 0:dff8803aace7 111
cparata 0:dff8803aace7 112 /** @defgroup lis2dw12_interface
cparata 0:dff8803aace7 113 * @{
cparata 0:dff8803aace7 114 */
cparata 0:dff8803aace7 115
cparata 0:dff8803aace7 116 typedef int32_t (*lis2dw12_write_ptr)(void *, uint8_t, uint8_t*, uint16_t);
cparata 0:dff8803aace7 117 typedef int32_t (*lis2dw12_read_ptr) (void *, uint8_t, uint8_t*, uint16_t);
cparata 0:dff8803aace7 118
cparata 0:dff8803aace7 119 typedef struct {
cparata 0:dff8803aace7 120 /** Component mandatory fields **/
cparata 0:dff8803aace7 121 lis2dw12_write_ptr write_reg;
cparata 0:dff8803aace7 122 lis2dw12_read_ptr read_reg;
cparata 0:dff8803aace7 123 /** Customizable optional pointer **/
cparata 0:dff8803aace7 124 void *handle;
cparata 0:dff8803aace7 125 } lis2dw12_ctx_t;
cparata 0:dff8803aace7 126
cparata 0:dff8803aace7 127 /**
cparata 0:dff8803aace7 128 * @}
cparata 0:dff8803aace7 129 */
cparata 0:dff8803aace7 130
cparata 0:dff8803aace7 131
cparata 0:dff8803aace7 132 /** @defgroup lis2dw12_Infos
cparata 0:dff8803aace7 133 * @{
cparata 0:dff8803aace7 134 */
cparata 0:dff8803aace7 135 /** I2C Device Address 8 bit format if SA0=0 -> 31 if SA0=1 -> 33 **/
cparata 0:dff8803aace7 136 #define LIS2DW12_I2C_ADD_L 0x31
cparata 0:dff8803aace7 137 #define LIS2DW12_I2C_ADD_H 0x33
cparata 0:dff8803aace7 138
cparata 0:dff8803aace7 139 /** Device Identification (Who am I) **/
cparata 0:dff8803aace7 140 #define LIS2DW12_ID 0x44
cparata 0:dff8803aace7 141
cparata 0:dff8803aace7 142 /**
cparata 0:dff8803aace7 143 * @}
cparata 0:dff8803aace7 144 */
cparata 0:dff8803aace7 145
cparata 0:dff8803aace7 146 /**
cparata 0:dff8803aace7 147 * @defgroup lis2dw12_Sensitivity
cparata 0:dff8803aace7 148 * @{
cparata 0:dff8803aace7 149 */
cparata 0:dff8803aace7 150
cparata 0:dff8803aace7 151 #define LIS2DW12_FROM_FS_2g_TO_mg(lsb) (float)((int16_t)lsb >> 2) * 0.244f
cparata 0:dff8803aace7 152 #define LIS2DW12_FROM_FS_4g_TO_mg(lsb) (float)((int16_t)lsb >> 2) * 0.488f
cparata 0:dff8803aace7 153 #define LIS2DW12_FROM_FS_8g_TO_mg(lsb) (float)((int16_t)lsb >> 2) * 0.976f
cparata 0:dff8803aace7 154 #define LIS2DW12_FROM_FS_16g_TO_mg(lsb) (float)((int16_t)lsb >> 2) * 1.952f
cparata 0:dff8803aace7 155
cparata 0:dff8803aace7 156 #define LIS2DW12_FROM_FS_2g_LP1_TO_mg(lsb) (float)((int16_t)lsb>>4)* 0.9760f
cparata 0:dff8803aace7 157 #define LIS2DW12_FROM_FS_4g_LP1_TO_mg(lsb) (float)((int16_t)lsb>>4)* 1.9520f
cparata 0:dff8803aace7 158 #define LIS2DW12_FROM_FS_8g_LP1_TO_mg(lsb) (float)((int16_t)lsb>>4)* 3.904f
cparata 0:dff8803aace7 159 #define LIS2DW12_FROM_FS_16g_LP1_TO_mg(lsb) (float)((int16_t)lsb>>4)* 7.808f
cparata 0:dff8803aace7 160
cparata 0:dff8803aace7 161 #define LIS2DW12_FROM_LSB_TO_degC(lsb) (float)((int16_t)lsb) / 16.0f+25.0f
cparata 0:dff8803aace7 162
cparata 0:dff8803aace7 163 /**
cparata 0:dff8803aace7 164 * @}
cparata 0:dff8803aace7 165 */
cparata 0:dff8803aace7 166
cparata 0:dff8803aace7 167 #define LIS2DW12_OUT_T_L 0x0D
cparata 0:dff8803aace7 168 #define LIS2DW12_OUT_T_H 0x0E
cparata 0:dff8803aace7 169 #define LIS2DW12_WHO_AM_I 0x0F
cparata 0:dff8803aace7 170 #define LIS2DW12_CTRL1 0x20
cparata 0:dff8803aace7 171 typedef struct {
cparata 0:dff8803aace7 172 uint8_t lp_mode : 2;
cparata 0:dff8803aace7 173 uint8_t mode : 2;
cparata 0:dff8803aace7 174 uint8_t odr : 4;
cparata 0:dff8803aace7 175 } lis2dw12_ctrl1_t;
cparata 0:dff8803aace7 176
cparata 0:dff8803aace7 177 #define LIS2DW12_CTRL2 0x21
cparata 0:dff8803aace7 178 typedef struct {
cparata 0:dff8803aace7 179 uint8_t sim : 1;
cparata 0:dff8803aace7 180 uint8_t i2c_disable : 1;
cparata 0:dff8803aace7 181 uint8_t if_add_inc : 1;
cparata 0:dff8803aace7 182 uint8_t bdu : 1;
cparata 0:dff8803aace7 183 uint8_t cs_pu_disc : 1;
cparata 0:dff8803aace7 184 uint8_t not_used_01 : 1;
cparata 0:dff8803aace7 185 uint8_t soft_reset : 1;
cparata 0:dff8803aace7 186 uint8_t boot : 1;
cparata 0:dff8803aace7 187 } lis2dw12_ctrl2_t;
cparata 0:dff8803aace7 188
cparata 0:dff8803aace7 189 #define LIS2DW12_CTRL3 0x22
cparata 0:dff8803aace7 190 typedef struct {
cparata 0:dff8803aace7 191 uint8_t slp_mode : 2; /* slp_mode_sel + slp_mode_1 */
cparata 0:dff8803aace7 192 uint8_t not_used_01 : 1;
cparata 0:dff8803aace7 193 uint8_t h_lactive : 1;
cparata 0:dff8803aace7 194 uint8_t lir : 1;
cparata 0:dff8803aace7 195 uint8_t pp_od : 1;
cparata 0:dff8803aace7 196 uint8_t st : 2;
cparata 0:dff8803aace7 197 } lis2dw12_ctrl3_t;
cparata 0:dff8803aace7 198
cparata 0:dff8803aace7 199 #define LIS2DW12_CTRL4_INT1_PAD_CTRL 0x23
cparata 0:dff8803aace7 200 typedef struct {
cparata 0:dff8803aace7 201 uint8_t int1_drdy : 1;
cparata 0:dff8803aace7 202 uint8_t int1_fth : 1;
cparata 0:dff8803aace7 203 uint8_t int1_diff5 : 1;
cparata 0:dff8803aace7 204 uint8_t int1_tap : 1;
cparata 0:dff8803aace7 205 uint8_t int1_ff : 1;
cparata 0:dff8803aace7 206 uint8_t int1_wu : 1;
cparata 0:dff8803aace7 207 uint8_t int1_single_tap : 1;
cparata 0:dff8803aace7 208 uint8_t int1_6d : 1;
cparata 0:dff8803aace7 209 } lis2dw12_ctrl4_int1_pad_ctrl_t;
cparata 0:dff8803aace7 210
cparata 0:dff8803aace7 211 #define LIS2DW12_CTRL5_INT2_PAD_CTRL 0x24
cparata 0:dff8803aace7 212 typedef struct {
cparata 0:dff8803aace7 213 uint8_t int2_drdy : 1;
cparata 0:dff8803aace7 214 uint8_t int2_fth : 1;
cparata 0:dff8803aace7 215 uint8_t int2_diff5 : 1;
cparata 0:dff8803aace7 216 uint8_t int2_ovr : 1;
cparata 0:dff8803aace7 217 uint8_t int2_drdy_t : 1;
cparata 0:dff8803aace7 218 uint8_t int2_boot : 1;
cparata 0:dff8803aace7 219 uint8_t int2_sleep_chg : 1;
cparata 0:dff8803aace7 220 uint8_t int2_sleep_state : 1;
cparata 0:dff8803aace7 221 } lis2dw12_ctrl5_int2_pad_ctrl_t;
cparata 0:dff8803aace7 222
cparata 0:dff8803aace7 223 #define LIS2DW12_CTRL6 0x25
cparata 0:dff8803aace7 224 typedef struct {
cparata 0:dff8803aace7 225 uint8_t not_used_01 : 2;
cparata 0:dff8803aace7 226 uint8_t low_noise : 1;
cparata 0:dff8803aace7 227 uint8_t fds : 1;
cparata 0:dff8803aace7 228 uint8_t fs : 2;
cparata 0:dff8803aace7 229 uint8_t bw_filt : 2;
cparata 0:dff8803aace7 230 } lis2dw12_ctrl6_t;
cparata 0:dff8803aace7 231
cparata 0:dff8803aace7 232 #define LIS2DW12_OUT_T 0x26
cparata 0:dff8803aace7 233 #define LIS2DW12_STATUS 0x27
cparata 0:dff8803aace7 234 typedef struct {
cparata 0:dff8803aace7 235 uint8_t drdy : 1;
cparata 0:dff8803aace7 236 uint8_t ff_ia : 1;
cparata 0:dff8803aace7 237 uint8_t _6d_ia : 1;
cparata 0:dff8803aace7 238 uint8_t single_tap : 1;
cparata 0:dff8803aace7 239 uint8_t double_tap : 1;
cparata 0:dff8803aace7 240 uint8_t sleep_state : 1;
cparata 0:dff8803aace7 241 uint8_t wu_ia : 1;
cparata 0:dff8803aace7 242 uint8_t fifo_ths : 1;
cparata 0:dff8803aace7 243 } lis2dw12_status_t;
cparata 0:dff8803aace7 244
cparata 0:dff8803aace7 245 #define LIS2DW12_OUT_X_L 0x28
cparata 0:dff8803aace7 246 #define LIS2DW12_OUT_X_H 0x29
cparata 0:dff8803aace7 247 #define LIS2DW12_OUT_Y_L 0x2A
cparata 0:dff8803aace7 248 #define LIS2DW12_OUT_Y_H 0x2B
cparata 0:dff8803aace7 249 #define LIS2DW12_OUT_Z_L 0x2C
cparata 0:dff8803aace7 250 #define LIS2DW12_OUT_Z_H 0x2D
cparata 0:dff8803aace7 251 #define LIS2DW12_FIFO_CTRL 0x2E
cparata 0:dff8803aace7 252 typedef struct {
cparata 0:dff8803aace7 253 uint8_t fth : 5;
cparata 0:dff8803aace7 254 uint8_t fmode : 3;
cparata 0:dff8803aace7 255 } lis2dw12_fifo_ctrl_t;
cparata 0:dff8803aace7 256
cparata 0:dff8803aace7 257 #define LIS2DW12_FIFO_SAMPLES 0x2F
cparata 0:dff8803aace7 258 typedef struct {
cparata 0:dff8803aace7 259 uint8_t diff : 6;
cparata 0:dff8803aace7 260 uint8_t fifo_ovr : 1;
cparata 0:dff8803aace7 261 uint8_t fifo_fth : 1;
cparata 0:dff8803aace7 262 } lis2dw12_fifo_samples_t;
cparata 0:dff8803aace7 263
cparata 0:dff8803aace7 264 #define LIS2DW12_TAP_THS_X 0x30
cparata 0:dff8803aace7 265 typedef struct {
cparata 0:dff8803aace7 266 uint8_t tap_thsx : 5;
cparata 0:dff8803aace7 267 uint8_t _6d_ths : 2;
cparata 0:dff8803aace7 268 uint8_t _4d_en : 1;
cparata 0:dff8803aace7 269 } lis2dw12_tap_ths_x_t;
cparata 0:dff8803aace7 270
cparata 0:dff8803aace7 271 #define LIS2DW12_TAP_THS_Y 0x31
cparata 0:dff8803aace7 272 typedef struct {
cparata 0:dff8803aace7 273 uint8_t tap_thsy : 5;
cparata 0:dff8803aace7 274 uint8_t tap_prior : 3;
cparata 0:dff8803aace7 275 } lis2dw12_tap_ths_y_t;
cparata 0:dff8803aace7 276
cparata 0:dff8803aace7 277 #define LIS2DW12_TAP_THS_Z 0x32
cparata 0:dff8803aace7 278 typedef struct {
cparata 0:dff8803aace7 279 uint8_t tap_thsz : 5;
cparata 0:dff8803aace7 280 uint8_t tap_z_en : 1;
cparata 0:dff8803aace7 281 uint8_t tap_y_en : 1;
cparata 0:dff8803aace7 282 uint8_t tap_x_en : 1;
cparata 0:dff8803aace7 283 } lis2dw12_tap_ths_z_t;
cparata 0:dff8803aace7 284
cparata 0:dff8803aace7 285 #define LIS2DW12_INT_DUR 0x33
cparata 0:dff8803aace7 286 typedef struct {
cparata 0:dff8803aace7 287 uint8_t shock : 2;
cparata 0:dff8803aace7 288 uint8_t quiet : 2;
cparata 0:dff8803aace7 289 uint8_t latency : 4;
cparata 0:dff8803aace7 290 } lis2dw12_int_dur_t;
cparata 0:dff8803aace7 291
cparata 0:dff8803aace7 292 #define LIS2DW12_WAKE_UP_THS 0x34
cparata 0:dff8803aace7 293 typedef struct {
cparata 0:dff8803aace7 294 uint8_t wk_ths : 6;
cparata 0:dff8803aace7 295 uint8_t sleep_on : 1;
cparata 0:dff8803aace7 296 uint8_t single_double_tap : 1;
cparata 0:dff8803aace7 297 } lis2dw12_wake_up_ths_t;
cparata 0:dff8803aace7 298
cparata 0:dff8803aace7 299 #define LIS2DW12_WAKE_UP_DUR 0x35
cparata 0:dff8803aace7 300 typedef struct {
cparata 0:dff8803aace7 301 uint8_t sleep_dur : 4;
cparata 0:dff8803aace7 302 uint8_t stationary : 1;
cparata 0:dff8803aace7 303 uint8_t wake_dur : 2;
cparata 0:dff8803aace7 304 uint8_t ff_dur : 1;
cparata 0:dff8803aace7 305 } lis2dw12_wake_up_dur_t;
cparata 0:dff8803aace7 306
cparata 0:dff8803aace7 307 #define LIS2DW12_FREE_FALL 0x36
cparata 0:dff8803aace7 308 typedef struct {
cparata 0:dff8803aace7 309 uint8_t ff_ths : 3;
cparata 0:dff8803aace7 310 uint8_t ff_dur : 5;
cparata 0:dff8803aace7 311 } lis2dw12_free_fall_t;
cparata 0:dff8803aace7 312
cparata 0:dff8803aace7 313 #define LIS2DW12_STATUS_DUP 0x37
cparata 0:dff8803aace7 314 typedef struct {
cparata 0:dff8803aace7 315 uint8_t drdy : 1;
cparata 0:dff8803aace7 316 uint8_t ff_ia : 1;
cparata 0:dff8803aace7 317 uint8_t _6d_ia : 1;
cparata 0:dff8803aace7 318 uint8_t single_tap : 1;
cparata 0:dff8803aace7 319 uint8_t double_tap : 1;
cparata 0:dff8803aace7 320 uint8_t sleep_state_ia : 1;
cparata 0:dff8803aace7 321 uint8_t drdy_t : 1;
cparata 0:dff8803aace7 322 uint8_t ovr : 1;
cparata 0:dff8803aace7 323 } lis2dw12_status_dup_t;
cparata 0:dff8803aace7 324
cparata 0:dff8803aace7 325 #define LIS2DW12_WAKE_UP_SRC 0x38
cparata 0:dff8803aace7 326 typedef struct {
cparata 0:dff8803aace7 327 uint8_t z_wu : 1;
cparata 0:dff8803aace7 328 uint8_t y_wu : 1;
cparata 0:dff8803aace7 329 uint8_t x_wu : 1;
cparata 0:dff8803aace7 330 uint8_t wu_ia : 1;
cparata 0:dff8803aace7 331 uint8_t sleep_state_ia : 1;
cparata 0:dff8803aace7 332 uint8_t ff_ia : 1;
cparata 0:dff8803aace7 333 uint8_t not_used_01 : 2;
cparata 0:dff8803aace7 334 } lis2dw12_wake_up_src_t;
cparata 0:dff8803aace7 335
cparata 0:dff8803aace7 336 #define LIS2DW12_TAP_SRC 0x39
cparata 0:dff8803aace7 337 typedef struct {
cparata 0:dff8803aace7 338 uint8_t z_tap : 1;
cparata 0:dff8803aace7 339 uint8_t y_tap : 1;
cparata 0:dff8803aace7 340 uint8_t x_tap : 1;
cparata 0:dff8803aace7 341 uint8_t tap_sign : 1;
cparata 0:dff8803aace7 342 uint8_t double_tap : 1;
cparata 0:dff8803aace7 343 uint8_t single_tap : 1;
cparata 0:dff8803aace7 344 uint8_t tap_ia : 1;
cparata 0:dff8803aace7 345 uint8_t not_used_01 : 1;
cparata 0:dff8803aace7 346 } lis2dw12_tap_src_t;
cparata 0:dff8803aace7 347
cparata 0:dff8803aace7 348 #define LIS2DW12_SIXD_SRC 0x3A
cparata 0:dff8803aace7 349 typedef struct {
cparata 0:dff8803aace7 350 uint8_t xl : 1;
cparata 0:dff8803aace7 351 uint8_t xh : 1;
cparata 0:dff8803aace7 352 uint8_t yl : 1;
cparata 0:dff8803aace7 353 uint8_t yh : 1;
cparata 0:dff8803aace7 354 uint8_t zl : 1;
cparata 0:dff8803aace7 355 uint8_t zh : 1;
cparata 0:dff8803aace7 356 uint8_t _6d_ia : 1;
cparata 0:dff8803aace7 357 uint8_t not_used_01 : 1;
cparata 0:dff8803aace7 358 } lis2dw12_sixd_src_t;
cparata 0:dff8803aace7 359
cparata 0:dff8803aace7 360 #define LIS2DW12_ALL_INT_SRC 0x3B
cparata 0:dff8803aace7 361 typedef struct {
cparata 0:dff8803aace7 362 uint8_t ff_ia : 1;
cparata 0:dff8803aace7 363 uint8_t wu_ia : 1;
cparata 0:dff8803aace7 364 uint8_t single_tap : 1;
cparata 0:dff8803aace7 365 uint8_t double_tap : 1;
cparata 0:dff8803aace7 366 uint8_t _6d_ia : 1;
cparata 0:dff8803aace7 367 uint8_t sleep_change_ia : 1;
cparata 0:dff8803aace7 368 uint8_t not_used_01 : 2;
cparata 0:dff8803aace7 369 } lis2dw12_all_int_src_t;
cparata 0:dff8803aace7 370
cparata 0:dff8803aace7 371 #define LIS2DW12_X_OFS_USR 0x3C
cparata 0:dff8803aace7 372 #define LIS2DW12_Y_OFS_USR 0x3D
cparata 0:dff8803aace7 373 #define LIS2DW12_Z_OFS_USR 0x3E
cparata 0:dff8803aace7 374 #define LIS2DW12_CTRL_REG7 0x3F
cparata 0:dff8803aace7 375 typedef struct {
cparata 0:dff8803aace7 376 uint8_t lpass_on6d : 1;
cparata 0:dff8803aace7 377 uint8_t hp_ref_mode : 1;
cparata 0:dff8803aace7 378 uint8_t usr_off_w : 1;
cparata 0:dff8803aace7 379 uint8_t usr_off_on_wu : 1;
cparata 0:dff8803aace7 380 uint8_t usr_off_on_out : 1;
cparata 0:dff8803aace7 381 uint8_t interrupts_enable : 1;
cparata 0:dff8803aace7 382 uint8_t int2_on_int1 : 1;
cparata 0:dff8803aace7 383 uint8_t drdy_pulsed : 1;
cparata 0:dff8803aace7 384 } lis2dw12_ctrl_reg7_t;
cparata 0:dff8803aace7 385
cparata 0:dff8803aace7 386 typedef union{
cparata 0:dff8803aace7 387 lis2dw12_ctrl1_t ctrl1;
cparata 0:dff8803aace7 388 lis2dw12_ctrl2_t ctrl2;
cparata 0:dff8803aace7 389 lis2dw12_ctrl3_t ctrl3;
cparata 0:dff8803aace7 390 lis2dw12_ctrl4_int1_pad_ctrl_t ctrl4_int1_pad_ctrl;
cparata 0:dff8803aace7 391 lis2dw12_ctrl5_int2_pad_ctrl_t ctrl5_int2_pad_ctrl;
cparata 0:dff8803aace7 392 lis2dw12_ctrl6_t ctrl6;
cparata 0:dff8803aace7 393 lis2dw12_status_t status;
cparata 0:dff8803aace7 394 lis2dw12_fifo_ctrl_t fifo_ctrl;
cparata 0:dff8803aace7 395 lis2dw12_fifo_samples_t fifo_samples;
cparata 0:dff8803aace7 396 lis2dw12_tap_ths_x_t tap_ths_x;
cparata 0:dff8803aace7 397 lis2dw12_tap_ths_y_t tap_ths_y;
cparata 0:dff8803aace7 398 lis2dw12_tap_ths_z_t tap_ths_z;
cparata 0:dff8803aace7 399 lis2dw12_int_dur_t int_dur;
cparata 0:dff8803aace7 400 lis2dw12_wake_up_ths_t wake_up_ths;
cparata 0:dff8803aace7 401 lis2dw12_wake_up_dur_t wake_up_dur;
cparata 0:dff8803aace7 402 lis2dw12_free_fall_t free_fall;
cparata 0:dff8803aace7 403 lis2dw12_status_dup_t status_dup;
cparata 0:dff8803aace7 404 lis2dw12_wake_up_src_t wake_up_src;
cparata 0:dff8803aace7 405 lis2dw12_tap_src_t tap_src;
cparata 0:dff8803aace7 406 lis2dw12_sixd_src_t sixd_src;
cparata 0:dff8803aace7 407 lis2dw12_all_int_src_t all_int_src;
cparata 0:dff8803aace7 408 lis2dw12_ctrl_reg7_t ctrl_reg7;
cparata 0:dff8803aace7 409 bitwise_t bitwise;
cparata 0:dff8803aace7 410 uint8_t byte;
cparata 0:dff8803aace7 411 } lis2dw12_reg_t;
cparata 0:dff8803aace7 412
cparata 0:dff8803aace7 413 int32_t lis2dw12_read_reg(lis2dw12_ctx_t *ctx, uint8_t reg, uint8_t* data,
cparata 0:dff8803aace7 414 uint16_t len);
cparata 0:dff8803aace7 415 int32_t lis2dw12_write_reg(lis2dw12_ctx_t *ctx, uint8_t reg, uint8_t* data,
cparata 0:dff8803aace7 416 uint16_t len);
cparata 0:dff8803aace7 417
cparata 0:dff8803aace7 418 typedef enum {
cparata 0:dff8803aace7 419 LIS2DW12_HIGH_PERFORMANCE = 0x04,
cparata 0:dff8803aace7 420 LIS2DW12_CONT_LOW_PWR_4 = 0x03,
cparata 0:dff8803aace7 421 LIS2DW12_CONT_LOW_PWR_3 = 0x02,
cparata 0:dff8803aace7 422 LIS2DW12_CONT_LOW_PWR_2 = 0x01,
cparata 0:dff8803aace7 423 LIS2DW12_CONT_LOW_PWR_12bit = 0x00,
cparata 0:dff8803aace7 424 LIS2DW12_SINGLE_LOW_PWR_4 = 0x0B,
cparata 0:dff8803aace7 425 LIS2DW12_SINGLE_LOW_PWR_3 = 0x0A,
cparata 0:dff8803aace7 426 LIS2DW12_SINGLE_LOW_PWR_2 = 0x09,
cparata 0:dff8803aace7 427 LIS2DW12_SINGLE_LOW_PWR_12bit = 0x08,
cparata 0:dff8803aace7 428 LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE = 0x14,
cparata 0:dff8803aace7 429 LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4 = 0x13,
cparata 0:dff8803aace7 430 LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3 = 0x12,
cparata 0:dff8803aace7 431 LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2 = 0x11,
cparata 0:dff8803aace7 432 LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit = 0x10,
cparata 0:dff8803aace7 433 LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4 = 0x1B,
cparata 0:dff8803aace7 434 LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3 = 0x1A,
cparata 0:dff8803aace7 435 LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2 = 0x19,
cparata 0:dff8803aace7 436 LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit = 0x18,
cparata 0:dff8803aace7 437 } lis2dw12_mode_t;
cparata 0:dff8803aace7 438 int32_t lis2dw12_power_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_mode_t val);
cparata 0:dff8803aace7 439 int32_t lis2dw12_power_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_mode_t *val);
cparata 0:dff8803aace7 440
cparata 0:dff8803aace7 441 typedef enum {
cparata 0:dff8803aace7 442 LIS2DW12_XL_ODR_OFF = 0x00,
cparata 0:dff8803aace7 443 LIS2DW12_XL_ODR_1Hz6_LP_ONLY = 0x01,
cparata 0:dff8803aace7 444 LIS2DW12_XL_ODR_12Hz5 = 0x02,
cparata 0:dff8803aace7 445 LIS2DW12_XL_ODR_25Hz = 0x03,
cparata 0:dff8803aace7 446 LIS2DW12_XL_ODR_50Hz = 0x04,
cparata 0:dff8803aace7 447 LIS2DW12_XL_ODR_100Hz = 0x05,
cparata 0:dff8803aace7 448 LIS2DW12_XL_ODR_200Hz = 0x06,
cparata 0:dff8803aace7 449 LIS2DW12_XL_ODR_400Hz = 0x07,
cparata 0:dff8803aace7 450 LIS2DW12_XL_ODR_800Hz = 0x08,
cparata 0:dff8803aace7 451 LIS2DW12_XL_ODR_1k6Hz = 0x09,
cparata 0:dff8803aace7 452 LIS2DW12_XL_SET_SW_TRIG = 0x10, /* Use this only in SINGLE mode */
cparata 0:dff8803aace7 453 LIS2DW12_XL_SET_PIN_TRIG = 0x20, /* Use this only in SINGLE mode */
cparata 0:dff8803aace7 454 } lis2dw12_odr_t;
cparata 0:dff8803aace7 455 int32_t lis2dw12_data_rate_set(lis2dw12_ctx_t *ctx, lis2dw12_odr_t val);
cparata 0:dff8803aace7 456 int32_t lis2dw12_data_rate_get(lis2dw12_ctx_t *ctx, lis2dw12_odr_t *val);
cparata 0:dff8803aace7 457
cparata 0:dff8803aace7 458 int32_t lis2dw12_block_data_update_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 459 int32_t lis2dw12_block_data_update_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 460
cparata 0:dff8803aace7 461 typedef enum {
cparata 0:dff8803aace7 462 LIS2DW12_2g = 0,
cparata 0:dff8803aace7 463 LIS2DW12_4g = 1,
cparata 0:dff8803aace7 464 LIS2DW12_8g = 2,
cparata 0:dff8803aace7 465 LIS2DW12_16g = 3,
cparata 0:dff8803aace7 466 } lis2dw12_fs_t;
cparata 0:dff8803aace7 467 int32_t lis2dw12_full_scale_set(lis2dw12_ctx_t *ctx, lis2dw12_fs_t val);
cparata 0:dff8803aace7 468 int32_t lis2dw12_full_scale_get(lis2dw12_ctx_t *ctx, lis2dw12_fs_t *val);
cparata 0:dff8803aace7 469
cparata 0:dff8803aace7 470 int32_t lis2dw12_status_reg_get(lis2dw12_ctx_t *ctx, lis2dw12_status_t *val);
cparata 0:dff8803aace7 471
cparata 0:dff8803aace7 472 int32_t lis2dw12_flag_data_ready_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 473
cparata 0:dff8803aace7 474 typedef struct{
cparata 0:dff8803aace7 475 lis2dw12_status_dup_t status_dup;
cparata 0:dff8803aace7 476 lis2dw12_wake_up_src_t wake_up_src;
cparata 0:dff8803aace7 477 lis2dw12_tap_src_t tap_src;
cparata 0:dff8803aace7 478 lis2dw12_sixd_src_t sixd_src;
cparata 0:dff8803aace7 479 lis2dw12_all_int_src_t all_int_src;
cparata 0:dff8803aace7 480 } lis2dw12_all_sources_t;
cparata 0:dff8803aace7 481 int32_t lis2dw12_all_sources_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 482 lis2dw12_all_sources_t *val);
cparata 0:dff8803aace7 483
cparata 0:dff8803aace7 484 int32_t lis2dw12_usr_offset_x_set(lis2dw12_ctx_t *ctx, uint8_t *buff);
cparata 0:dff8803aace7 485 int32_t lis2dw12_usr_offset_x_get(lis2dw12_ctx_t *ctx, uint8_t *buff);
cparata 0:dff8803aace7 486
cparata 0:dff8803aace7 487 int32_t lis2dw12_usr_offset_y_set(lis2dw12_ctx_t *ctx, uint8_t *buff);
cparata 0:dff8803aace7 488 int32_t lis2dw12_usr_offset_y_get(lis2dw12_ctx_t *ctx, uint8_t *buff);
cparata 0:dff8803aace7 489
cparata 0:dff8803aace7 490 int32_t lis2dw12_usr_offset_z_set(lis2dw12_ctx_t *ctx, uint8_t *buff);
cparata 0:dff8803aace7 491 int32_t lis2dw12_usr_offset_z_get(lis2dw12_ctx_t *ctx, uint8_t *buff);
cparata 0:dff8803aace7 492
cparata 0:dff8803aace7 493 typedef enum {
cparata 0:dff8803aace7 494 LIS2DW12_LSb_977ug = 0,
cparata 0:dff8803aace7 495 LIS2DW12_LSb_15mg6 = 1,
cparata 0:dff8803aace7 496 } lis2dw12_usr_off_w_t;
cparata 0:dff8803aace7 497 int32_t lis2dw12_offset_weight_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 498 lis2dw12_usr_off_w_t val);
cparata 0:dff8803aace7 499 int32_t lis2dw12_offset_weight_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 500 lis2dw12_usr_off_w_t *val);
cparata 0:dff8803aace7 501
cparata 0:dff8803aace7 502 int32_t lis2dw12_temperature_raw_get(lis2dw12_ctx_t *ctx, uint8_t *buff);
cparata 0:dff8803aace7 503
cparata 0:dff8803aace7 504 int32_t lis2dw12_acceleration_raw_get(lis2dw12_ctx_t *ctx, uint8_t *buff);
cparata 0:dff8803aace7 505
cparata 0:dff8803aace7 506 int32_t lis2dw12_device_id_get(lis2dw12_ctx_t *ctx, uint8_t *buff);
cparata 0:dff8803aace7 507
cparata 0:dff8803aace7 508 int32_t lis2dw12_auto_increment_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 509 int32_t lis2dw12_auto_increment_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 510
cparata 0:dff8803aace7 511 int32_t lis2dw12_reset_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 512 int32_t lis2dw12_reset_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 513
cparata 0:dff8803aace7 514 int32_t lis2dw12_boot_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 515 int32_t lis2dw12_boot_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 516
cparata 0:dff8803aace7 517 typedef enum {
cparata 0:dff8803aace7 518 LIS2DW12_XL_ST_DISABLE = 0,
cparata 0:dff8803aace7 519 LIS2DW12_XL_ST_POSITIVE = 1,
cparata 0:dff8803aace7 520 LIS2DW12_XL_ST_NEGATIVE = 2,
cparata 0:dff8803aace7 521 } lis2dw12_st_t;
cparata 0:dff8803aace7 522 int32_t lis2dw12_self_test_set(lis2dw12_ctx_t *ctx, lis2dw12_st_t val);
cparata 0:dff8803aace7 523 int32_t lis2dw12_self_test_get(lis2dw12_ctx_t *ctx, lis2dw12_st_t *val);
cparata 0:dff8803aace7 524
cparata 0:dff8803aace7 525 typedef enum {
cparata 0:dff8803aace7 526 LIS2DW12_DRDY_LATCHED = 0,
cparata 0:dff8803aace7 527 LIS2DW12_DRDY_PULSED = 1,
cparata 0:dff8803aace7 528 } lis2dw12_drdy_pulsed_t;
cparata 0:dff8803aace7 529 int32_t lis2dw12_data_ready_mode_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 530 lis2dw12_drdy_pulsed_t val);
cparata 0:dff8803aace7 531 int32_t lis2dw12_data_ready_mode_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 532 lis2dw12_drdy_pulsed_t *val);
cparata 0:dff8803aace7 533
cparata 0:dff8803aace7 534 typedef enum {
cparata 0:dff8803aace7 535 LIS2DW12_LPF_ON_OUT = 0x00,
cparata 0:dff8803aace7 536 LIS2DW12_USER_OFFSET_ON_OUT = 0x01,
cparata 0:dff8803aace7 537 LIS2DW12_HIGH_PASS_ON_OUT = 0x10,
cparata 0:dff8803aace7 538 } lis2dw12_fds_t;
cparata 0:dff8803aace7 539 int32_t lis2dw12_filter_path_set(lis2dw12_ctx_t *ctx, lis2dw12_fds_t val);
cparata 0:dff8803aace7 540 int32_t lis2dw12_filter_path_get(lis2dw12_ctx_t *ctx, lis2dw12_fds_t *val);
cparata 0:dff8803aace7 541
cparata 0:dff8803aace7 542 typedef enum {
cparata 0:dff8803aace7 543 LIS2DW12_ODR_DIV_2 = 0,
cparata 0:dff8803aace7 544 LIS2DW12_ODR_DIV_4 = 1,
cparata 0:dff8803aace7 545 LIS2DW12_ODR_DIV_10 = 2,
cparata 0:dff8803aace7 546 LIS2DW12_ODR_DIV_20 = 3,
cparata 0:dff8803aace7 547 } lis2dw12_bw_filt_t;
cparata 0:dff8803aace7 548 int32_t lis2dw12_filter_bandwidth_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 549 lis2dw12_bw_filt_t val);
cparata 0:dff8803aace7 550 int32_t lis2dw12_filter_bandwidth_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 551 lis2dw12_bw_filt_t *val);
cparata 0:dff8803aace7 552
cparata 0:dff8803aace7 553 int32_t lis2dw12_reference_mode_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 554 int32_t lis2dw12_reference_mode_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 555
cparata 0:dff8803aace7 556 typedef enum {
cparata 0:dff8803aace7 557 LIS2DW12_SPI_4_WIRE = 0,
cparata 0:dff8803aace7 558 LIS2DW12_SPI_3_WIRE = 1,
cparata 0:dff8803aace7 559 } lis2dw12_sim_t;
cparata 0:dff8803aace7 560 int32_t lis2dw12_spi_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_sim_t val);
cparata 0:dff8803aace7 561 int32_t lis2dw12_spi_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_sim_t *val);
cparata 0:dff8803aace7 562
cparata 0:dff8803aace7 563 typedef enum {
cparata 0:dff8803aace7 564 LIS2DW12_I2C_ENABLE = 0,
cparata 0:dff8803aace7 565 LIS2DW12_I2C_DISABLE = 1,
cparata 0:dff8803aace7 566 } lis2dw12_i2c_disable_t;
cparata 0:dff8803aace7 567 int32_t lis2dw12_i2c_interface_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 568 lis2dw12_i2c_disable_t val);
cparata 0:dff8803aace7 569 int32_t lis2dw12_i2c_interface_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 570 lis2dw12_i2c_disable_t *val);
cparata 0:dff8803aace7 571
cparata 0:dff8803aace7 572 typedef enum {
cparata 0:dff8803aace7 573 LIS2DW12_PULL_UP_CONNECT = 0,
cparata 0:dff8803aace7 574 LIS2DW12_PULL_UP_DISCONNECT = 1,
cparata 0:dff8803aace7 575 } lis2dw12_cs_pu_disc_t;
cparata 0:dff8803aace7 576 int32_t lis2dw12_cs_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_cs_pu_disc_t val);
cparata 0:dff8803aace7 577 int32_t lis2dw12_cs_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_cs_pu_disc_t *val);
cparata 0:dff8803aace7 578
cparata 0:dff8803aace7 579 typedef enum {
cparata 0:dff8803aace7 580 LIS2DW12_ACTIVE_HIGH = 0,
cparata 0:dff8803aace7 581 LIS2DW12_ACTIVE_LOW = 1,
cparata 0:dff8803aace7 582 } lis2dw12_h_lactive_t;
cparata 0:dff8803aace7 583 int32_t lis2dw12_pin_polarity_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 584 lis2dw12_h_lactive_t val);
cparata 0:dff8803aace7 585 int32_t lis2dw12_pin_polarity_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 586 lis2dw12_h_lactive_t *val);
cparata 0:dff8803aace7 587
cparata 0:dff8803aace7 588 typedef enum {
cparata 0:dff8803aace7 589 LIS2DW12_INT_PULSED = 0,
cparata 0:dff8803aace7 590 LIS2DW12_INT_LATCHED = 1,
cparata 0:dff8803aace7 591 } lis2dw12_lir_t;
cparata 0:dff8803aace7 592 int32_t lis2dw12_int_notification_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 593 lis2dw12_lir_t val);
cparata 0:dff8803aace7 594 int32_t lis2dw12_int_notification_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 595 lis2dw12_lir_t *val);
cparata 0:dff8803aace7 596
cparata 0:dff8803aace7 597 typedef enum {
cparata 0:dff8803aace7 598 LIS2DW12_PUSH_PULL = 0,
cparata 0:dff8803aace7 599 LIS2DW12_OPEN_DRAIN = 1,
cparata 0:dff8803aace7 600 } lis2dw12_pp_od_t;
cparata 0:dff8803aace7 601 int32_t lis2dw12_pin_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_pp_od_t val);
cparata 0:dff8803aace7 602 int32_t lis2dw12_pin_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_pp_od_t *val);
cparata 0:dff8803aace7 603
cparata 0:dff8803aace7 604 int32_t lis2dw12_pin_int1_route_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 605 lis2dw12_ctrl4_int1_pad_ctrl_t *val);
cparata 0:dff8803aace7 606 int32_t lis2dw12_pin_int1_route_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 607 lis2dw12_ctrl4_int1_pad_ctrl_t *val);
cparata 0:dff8803aace7 608
cparata 0:dff8803aace7 609 int32_t lis2dw12_pin_int2_route_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 610 lis2dw12_ctrl5_int2_pad_ctrl_t *val);
cparata 0:dff8803aace7 611 int32_t lis2dw12_pin_int2_route_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 612 lis2dw12_ctrl5_int2_pad_ctrl_t *val);
cparata 0:dff8803aace7 613
cparata 0:dff8803aace7 614 int32_t lis2dw12_all_on_int1_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 615 int32_t lis2dw12_all_on_int1_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 616
cparata 0:dff8803aace7 617 int32_t lis2dw12_wkup_threshold_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 618 int32_t lis2dw12_wkup_threshold_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 619
cparata 0:dff8803aace7 620 int32_t lis2dw12_wkup_dur_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 621 int32_t lis2dw12_wkup_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 622
cparata 0:dff8803aace7 623 typedef enum {
cparata 0:dff8803aace7 624 LIS2DW12_HP_FEED = 0,
cparata 0:dff8803aace7 625 LIS2DW12_USER_OFFSET_FEED = 1,
cparata 0:dff8803aace7 626 } lis2dw12_usr_off_on_wu_t;
cparata 0:dff8803aace7 627 int32_t lis2dw12_wkup_feed_data_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 628 lis2dw12_usr_off_on_wu_t val);
cparata 0:dff8803aace7 629 int32_t lis2dw12_wkup_feed_data_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 630 lis2dw12_usr_off_on_wu_t *val);
cparata 0:dff8803aace7 631
cparata 0:dff8803aace7 632 typedef enum {
cparata 0:dff8803aace7 633 LIS2DW12_NO_DETECTION = 0,
cparata 0:dff8803aace7 634 LIS2DW12_DETECT_ACT_INACT = 1,
cparata 0:dff8803aace7 635 LIS2DW12_DETECT_STAT_MOTION = 3,
cparata 0:dff8803aace7 636 } lis2dw12_sleep_on_t;
cparata 0:dff8803aace7 637 int32_t lis2dw12_act_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_sleep_on_t val);
cparata 0:dff8803aace7 638 int32_t lis2dw12_act_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_sleep_on_t *val);
cparata 0:dff8803aace7 639
cparata 0:dff8803aace7 640 int32_t lis2dw12_act_sleep_dur_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 641 int32_t lis2dw12_act_sleep_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 642
cparata 0:dff8803aace7 643 int32_t lis2dw12_tap_threshold_x_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 644 int32_t lis2dw12_tap_threshold_x_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 645
cparata 0:dff8803aace7 646 int32_t lis2dw12_tap_threshold_y_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 647 int32_t lis2dw12_tap_threshold_y_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 648
cparata 0:dff8803aace7 649 typedef enum {
cparata 0:dff8803aace7 650 LIS2DW12_XYZ = 0,
cparata 0:dff8803aace7 651 LIS2DW12_YXZ = 1,
cparata 0:dff8803aace7 652 LIS2DW12_XZY = 2,
cparata 0:dff8803aace7 653 LIS2DW12_ZYX = 3,
cparata 0:dff8803aace7 654 LIS2DW12_YZX = 5,
cparata 0:dff8803aace7 655 LIS2DW12_ZXY = 6,
cparata 0:dff8803aace7 656 } lis2dw12_tap_prior_t;
cparata 0:dff8803aace7 657 int32_t lis2dw12_tap_axis_priority_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 658 lis2dw12_tap_prior_t val);
cparata 0:dff8803aace7 659 int32_t lis2dw12_tap_axis_priority_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 660 lis2dw12_tap_prior_t *val);
cparata 0:dff8803aace7 661
cparata 0:dff8803aace7 662 int32_t lis2dw12_tap_threshold_z_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 663 int32_t lis2dw12_tap_threshold_z_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 664
cparata 0:dff8803aace7 665 int32_t lis2dw12_tap_detection_on_z_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 666 int32_t lis2dw12_tap_detection_on_z_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 667
cparata 0:dff8803aace7 668 int32_t lis2dw12_tap_detection_on_y_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 669 int32_t lis2dw12_tap_detection_on_y_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 670
cparata 0:dff8803aace7 671 int32_t lis2dw12_tap_detection_on_x_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 672 int32_t lis2dw12_tap_detection_on_x_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 673
cparata 0:dff8803aace7 674 int32_t lis2dw12_tap_shock_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 675 int32_t lis2dw12_tap_shock_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 676
cparata 0:dff8803aace7 677 int32_t lis2dw12_tap_quiet_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 678 int32_t lis2dw12_tap_quiet_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 679
cparata 0:dff8803aace7 680 int32_t lis2dw12_tap_dur_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 681 int32_t lis2dw12_tap_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 682
cparata 0:dff8803aace7 683 typedef enum {
cparata 0:dff8803aace7 684 LIS2DW12_ONLY_SINGLE = 0,
cparata 0:dff8803aace7 685 LIS2DW12_BOTH_SINGLE_DOUBLE = 1,
cparata 0:dff8803aace7 686 } lis2dw12_single_double_tap_t;
cparata 0:dff8803aace7 687 int32_t lis2dw12_tap_mode_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 688 lis2dw12_single_double_tap_t val);
cparata 0:dff8803aace7 689 int32_t lis2dw12_tap_mode_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 690 lis2dw12_single_double_tap_t *val);
cparata 0:dff8803aace7 691
cparata 0:dff8803aace7 692 int32_t lis2dw12_tap_src_get(lis2dw12_ctx_t *ctx, lis2dw12_tap_src_t *val);
cparata 0:dff8803aace7 693
cparata 0:dff8803aace7 694 int32_t lis2dw12_6d_threshold_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 695 int32_t lis2dw12_6d_threshold_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 696
cparata 0:dff8803aace7 697 int32_t lis2dw12_4d_mode_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 698 int32_t lis2dw12_4d_mode_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 699
cparata 0:dff8803aace7 700 int32_t lis2dw12_6d_src_get(lis2dw12_ctx_t *ctx, lis2dw12_sixd_src_t *val);
cparata 0:dff8803aace7 701
cparata 0:dff8803aace7 702 typedef enum {
cparata 0:dff8803aace7 703 LIS2DW12_ODR_DIV_2_FEED = 0,
cparata 0:dff8803aace7 704 LIS2DW12_LPF2_FEED = 1,
cparata 0:dff8803aace7 705 } lis2dw12_lpass_on6d_t;
cparata 0:dff8803aace7 706 int32_t lis2dw12_6d_feed_data_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 707 lis2dw12_lpass_on6d_t val);
cparata 0:dff8803aace7 708 int32_t lis2dw12_6d_feed_data_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 709 lis2dw12_lpass_on6d_t *val);
cparata 0:dff8803aace7 710
cparata 0:dff8803aace7 711 int32_t lis2dw12_ff_dur_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 712 int32_t lis2dw12_ff_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 713
cparata 0:dff8803aace7 714 typedef enum {
cparata 0:dff8803aace7 715 LIS2DW12_FF_TSH_5LSb_FS2g = 0,
cparata 0:dff8803aace7 716 LIS2DW12_FF_TSH_7LSb_FS2g = 1,
cparata 0:dff8803aace7 717 LIS2DW12_FF_TSH_8LSb_FS2g = 2,
cparata 0:dff8803aace7 718 LIS2DW12_FF_TSH_10LSb_FS2g = 3,
cparata 0:dff8803aace7 719 LIS2DW12_FF_TSH_11LSb_FS2g = 4,
cparata 0:dff8803aace7 720 LIS2DW12_FF_TSH_13LSb_FS2g = 5,
cparata 0:dff8803aace7 721 LIS2DW12_FF_TSH_15LSb_FS2g = 6,
cparata 0:dff8803aace7 722 LIS2DW12_FF_TSH_16LSb_FS2g = 7,
cparata 0:dff8803aace7 723 } lis2dw12_ff_ths_t;
cparata 0:dff8803aace7 724 int32_t lis2dw12_ff_threshold_set(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 725 lis2dw12_ff_ths_t val);
cparata 0:dff8803aace7 726 int32_t lis2dw12_ff_threshold_get(lis2dw12_ctx_t *ctx,
cparata 0:dff8803aace7 727 lis2dw12_ff_ths_t *val);
cparata 0:dff8803aace7 728
cparata 0:dff8803aace7 729 int32_t lis2dw12_fifo_watermark_set(lis2dw12_ctx_t *ctx, uint8_t val);
cparata 0:dff8803aace7 730 int32_t lis2dw12_fifo_watermark_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 731
cparata 0:dff8803aace7 732 typedef enum {
cparata 0:dff8803aace7 733 LIS2DW12_BYPASS_MODE = 0,
cparata 0:dff8803aace7 734 LIS2DW12_FIFO_MODE = 1,
cparata 0:dff8803aace7 735 LIS2DW12_STREAM_TO_FIFO_MODE = 3,
cparata 0:dff8803aace7 736 LIS2DW12_BYPASS_TO_STREAM_MODE = 4,
cparata 0:dff8803aace7 737 LIS2DW12_STREAM_MODE = 6,
cparata 0:dff8803aace7 738 } lis2dw12_fmode_t;
cparata 0:dff8803aace7 739 int32_t lis2dw12_fifo_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_fmode_t val);
cparata 0:dff8803aace7 740 int32_t lis2dw12_fifo_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_fmode_t *val);
cparata 0:dff8803aace7 741
cparata 0:dff8803aace7 742 int32_t lis2dw12_fifo_data_level_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 743
cparata 0:dff8803aace7 744 int32_t lis2dw12_fifo_ovr_flag_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 745
cparata 0:dff8803aace7 746 int32_t lis2dw12_fifo_wtm_flag_get(lis2dw12_ctx_t *ctx, uint8_t *val);
cparata 0:dff8803aace7 747
cparata 0:dff8803aace7 748 /**
cparata 0:dff8803aace7 749 * @}
cparata 0:dff8803aace7 750 */
cparata 0:dff8803aace7 751
cparata 0:dff8803aace7 752 #ifdef __cplusplus
cparata 0:dff8803aace7 753 }
cparata 0:dff8803aace7 754 #endif
cparata 0:dff8803aace7 755
cparata 0:dff8803aace7 756 #endif /*__LIS2DW12_DRIVER__H */
cparata 0:dff8803aace7 757
cparata 0:dff8803aace7 758 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/