BSP driver for DISCO_L496AG

Dependents:   DISCO_L496AG-LCD-prova_1 DISCO_L496AG-LCD-prova_2 DISCO_L496AG-LCD-demo DISCO_L496AG-SRAM-demo

Committer:
Jerome Coutant
Date:
Wed Nov 20 16:48:24 2019 +0100
Revision:
2:106c7b82e064
Parent:
0:d83f1c8ca282
Update BSP files with CubeL4 V1.14.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bcostm 0:d83f1c8ca282 1 /**
bcostm 0:d83f1c8ca282 2 ******************************************************************************
bcostm 0:d83f1c8ca282 3 * @file stm32l496g_discovery_io.c
bcostm 0:d83f1c8ca282 4 * @author MCD Application Team
bcostm 0:d83f1c8ca282 5 * @brief This file provides a set of functions needed to manage the IO pins
bcostm 0:d83f1c8ca282 6 * on STM32L496G-DISCO evaluation board.
bcostm 0:d83f1c8ca282 7 ******************************************************************************
bcostm 0:d83f1c8ca282 8 * @attention
bcostm 0:d83f1c8ca282 9 *
Jerome Coutant 2:106c7b82e064 10 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
Jerome Coutant 2:106c7b82e064 11 * All rights reserved.</center></h2>
bcostm 0:d83f1c8ca282 12 *
Jerome Coutant 2:106c7b82e064 13 * This software component is licensed by ST under BSD 3-Clause license,
Jerome Coutant 2:106c7b82e064 14 * the "License"; You may not use this file except in compliance with the
Jerome Coutant 2:106c7b82e064 15 * License. You may obtain a copy of the License at:
Jerome Coutant 2:106c7b82e064 16 * opensource.org/licenses/BSD-3-Clause
bcostm 0:d83f1c8ca282 17 *
bcostm 0:d83f1c8ca282 18 ******************************************************************************
bcostm 0:d83f1c8ca282 19 */
bcostm 0:d83f1c8ca282 20
bcostm 0:d83f1c8ca282 21 /* File Info : -----------------------------------------------------------------
bcostm 0:d83f1c8ca282 22 User NOTES
bcostm 0:d83f1c8ca282 23 1. How To use this driver:
bcostm 0:d83f1c8ca282 24 --------------------------
bcostm 0:d83f1c8ca282 25 - This driver is used to drive the IO module of the STM32L496G-DISCO evaluation
bcostm 0:d83f1c8ca282 26 board.
bcostm 0:d83f1c8ca282 27 - The STMPE811 and STMPE1600 IO expander device component driver must be included with this
bcostm 0:d83f1c8ca282 28 driver in order to run the IO functionalities commanded by the IO expander
bcostm 0:d83f1c8ca282 29 device mounted on the evaluation board.
bcostm 0:d83f1c8ca282 30
bcostm 0:d83f1c8ca282 31 2. Driver description:
bcostm 0:d83f1c8ca282 32 ---------------------
bcostm 0:d83f1c8ca282 33 + Initialization steps:
bcostm 0:d83f1c8ca282 34 o Initialize the IO module using the BSP_IO_Init() function. This
bcostm 0:d83f1c8ca282 35 function includes the MSP layer hardware resources initialization and the
bcostm 0:d83f1c8ca282 36 communication layer configuration to start the IO functionalities use.
bcostm 0:d83f1c8ca282 37
bcostm 0:d83f1c8ca282 38 + IO functionalities use
bcostm 0:d83f1c8ca282 39 o The IO pin mode is configured when calling the function BSP_IO_ConfigPin(), you
bcostm 0:d83f1c8ca282 40 must specify the desired IO mode by choosing the "IO_ModeTypedef" parameter
bcostm 0:d83f1c8ca282 41 predefined value.
bcostm 0:d83f1c8ca282 42 o If an IO pin is used in interrupt mode, the function BSP_IO_ITGetStatus() is
bcostm 0:d83f1c8ca282 43 needed to get the interrupt status. To clear the IT pending bits, you should
bcostm 0:d83f1c8ca282 44 call the function BSP_IO_ITClear() with specifying the IO pending bit to clear.
bcostm 0:d83f1c8ca282 45 o The IT is handled using the corresponding external interrupt IRQ handler,
bcostm 0:d83f1c8ca282 46 the user IT callback treatment is implemented on the same external interrupt
bcostm 0:d83f1c8ca282 47 callback.
bcostm 0:d83f1c8ca282 48 o To get/set an IO pin combination state you can use the functions
bcostm 0:d83f1c8ca282 49 BSP_IO_ReadPin()/BSP_IO_WritePin() or the function BSP_IO_TogglePin() to toggle the pin
bcostm 0:d83f1c8ca282 50 state.
bcostm 0:d83f1c8ca282 51
bcostm 0:d83f1c8ca282 52 ------------------------------------------------------------------------------*/
bcostm 0:d83f1c8ca282 53
bcostm 0:d83f1c8ca282 54 /* Includes ------------------------------------------------------------------*/
bcostm 0:d83f1c8ca282 55 #include "stm32l496g_discovery_io.h"
bcostm 0:d83f1c8ca282 56
bcostm 0:d83f1c8ca282 57 /** @addtogroup BSP
bcostm 0:d83f1c8ca282 58 * @{
bcostm 0:d83f1c8ca282 59 */
bcostm 0:d83f1c8ca282 60
bcostm 0:d83f1c8ca282 61 /** @addtogroup STM32L496G-DISCO
bcostm 0:d83f1c8ca282 62 * @{
bcostm 0:d83f1c8ca282 63 */
bcostm 0:d83f1c8ca282 64
bcostm 0:d83f1c8ca282 65 /** @defgroup STM32L496G-DISCO_IO STM32L496G-DISCO IO
bcostm 0:d83f1c8ca282 66 * @{
bcostm 0:d83f1c8ca282 67 */
bcostm 0:d83f1c8ca282 68
bcostm 0:d83f1c8ca282 69 /* Private constants ---------------------------------------------------------*/
bcostm 0:d83f1c8ca282 70
bcostm 0:d83f1c8ca282 71 /** @defgroup STM32L496G-DISCO_IO_Private_Constants Private Constants
bcostm 0:d83f1c8ca282 72 * @{
bcostm 0:d83f1c8ca282 73 */
bcostm 0:d83f1c8ca282 74
bcostm 0:d83f1c8ca282 75 /**
bcostm 0:d83f1c8ca282 76 * @}
bcostm 0:d83f1c8ca282 77 */
bcostm 0:d83f1c8ca282 78
bcostm 0:d83f1c8ca282 79 /* Private macros -------------------------------------------------------------*/
bcostm 0:d83f1c8ca282 80
bcostm 0:d83f1c8ca282 81 /** @defgroup STM32L496G-DISCO_IO_Private_Macros Private Macros
bcostm 0:d83f1c8ca282 82 * @{
bcostm 0:d83f1c8ca282 83 */
bcostm 0:d83f1c8ca282 84
bcostm 0:d83f1c8ca282 85 /**
bcostm 0:d83f1c8ca282 86 * @}
bcostm 0:d83f1c8ca282 87 */
bcostm 0:d83f1c8ca282 88
bcostm 0:d83f1c8ca282 89 /* Private variables ---------------------------------------------------------*/
bcostm 0:d83f1c8ca282 90
bcostm 0:d83f1c8ca282 91 /** @defgroup STM32L496G-DISCO_IO_Private_Variables Private Variables
bcostm 0:d83f1c8ca282 92 * @{
bcostm 0:d83f1c8ca282 93 */
bcostm 0:d83f1c8ca282 94 static IO_DrvTypeDef *io1_driver;
bcostm 0:d83f1c8ca282 95
bcostm 0:d83f1c8ca282 96 /**
bcostm 0:d83f1c8ca282 97 * @}
bcostm 0:d83f1c8ca282 98 */
bcostm 0:d83f1c8ca282 99
bcostm 0:d83f1c8ca282 100 /* Private function prototypes -----------------------------------------------*/
bcostm 0:d83f1c8ca282 101
bcostm 0:d83f1c8ca282 102 /** @defgroup STM32L496G-DISCO_IO_Private_Functions Private Functions
bcostm 0:d83f1c8ca282 103 * @{
bcostm 0:d83f1c8ca282 104 */
bcostm 0:d83f1c8ca282 105
bcostm 0:d83f1c8ca282 106 /**
bcostm 0:d83f1c8ca282 107 * @}
bcostm 0:d83f1c8ca282 108 */
bcostm 0:d83f1c8ca282 109
bcostm 0:d83f1c8ca282 110 /* Private functions ---------------------------------------------------------*/
bcostm 0:d83f1c8ca282 111
bcostm 0:d83f1c8ca282 112 /** @addtogroup STM32L496G-DISCO_IO_Exported_Functions
bcostm 0:d83f1c8ca282 113 * @{
bcostm 0:d83f1c8ca282 114 */
bcostm 0:d83f1c8ca282 115
bcostm 0:d83f1c8ca282 116 /**
bcostm 0:d83f1c8ca282 117 * @brief Initializes and configures the IO functionalities and configures all
bcostm 0:d83f1c8ca282 118 * necessary hardware resources (GPIOs, clocks..).
bcostm 0:d83f1c8ca282 119 * @note BSP_IO_Init() is using HAL_Delay() function to ensure that stmpe811
bcostm 0:d83f1c8ca282 120 * IO Expander is correctly reset. HAL_Delay() function provides accurate
bcostm 0:d83f1c8ca282 121 * delay (in milliseconds) based on variable incremented in SysTick ISR.
bcostm 0:d83f1c8ca282 122 * This implies that if BSP_IO_Init() is called from a peripheral ISR process,
bcostm 0:d83f1c8ca282 123 * then the SysTick interrupt must have higher priority (numerically lower)
bcostm 0:d83f1c8ca282 124 * than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
bcostm 0:d83f1c8ca282 125 * @retval IO_OK: if all initializations are OK. Other value if error.
bcostm 0:d83f1c8ca282 126 */
bcostm 0:d83f1c8ca282 127 uint8_t BSP_IO_Init(void)
bcostm 0:d83f1c8ca282 128 {
bcostm 0:d83f1c8ca282 129 uint8_t ret = IO_ERROR;
bcostm 0:d83f1c8ca282 130 uint8_t mfxstm32l152_id = 0;
bcostm 0:d83f1c8ca282 131
bcostm 0:d83f1c8ca282 132 if (io1_driver == NULL) /* Checks if MFX initialization has been already done */
bcostm 0:d83f1c8ca282 133 {
bcostm 0:d83f1c8ca282 134 mfxstm32l152_idd_drv.WakeUp(IO1_I2C_ADDRESS);
bcostm 0:d83f1c8ca282 135
bcostm 0:d83f1c8ca282 136 HAL_Delay(10);
bcostm 0:d83f1c8ca282 137
bcostm 0:d83f1c8ca282 138 /* Read ID and verify the IO expander is ready */
bcostm 0:d83f1c8ca282 139 mfxstm32l152_id = mfxstm32l152_io_drv.ReadID(IO1_I2C_ADDRESS);
bcostm 0:d83f1c8ca282 140
bcostm 0:d83f1c8ca282 141 if ((mfxstm32l152_id == MFXSTM32L152_ID_1) || (mfxstm32l152_id == MFXSTM32L152_ID_2))
bcostm 0:d83f1c8ca282 142 {
bcostm 0:d83f1c8ca282 143 /* Initialize the MFX */
bcostm 0:d83f1c8ca282 144 io1_driver = &mfxstm32l152_io_drv;
bcostm 0:d83f1c8ca282 145
bcostm 0:d83f1c8ca282 146 /* Initialize the MFX IO driver structure */
bcostm 0:d83f1c8ca282 147 if (io1_driver->Init != NULL)
bcostm 0:d83f1c8ca282 148 {
bcostm 0:d83f1c8ca282 149 io1_driver->Init(IO1_I2C_ADDRESS);
bcostm 0:d83f1c8ca282 150 io1_driver->Start(IO1_I2C_ADDRESS, IO1_PIN_ALL >> IO1_PIN_OFFSET);
bcostm 0:d83f1c8ca282 151
bcostm 0:d83f1c8ca282 152 ret = IO_OK;
bcostm 0:d83f1c8ca282 153 }
bcostm 0:d83f1c8ca282 154 }
bcostm 0:d83f1c8ca282 155 }
bcostm 0:d83f1c8ca282 156 else
bcostm 0:d83f1c8ca282 157 {
bcostm 0:d83f1c8ca282 158 ret = IO_ALREADY_INITIALIZED;
bcostm 0:d83f1c8ca282 159 }
bcostm 0:d83f1c8ca282 160
bcostm 0:d83f1c8ca282 161 return ret;
bcostm 0:d83f1c8ca282 162 }
bcostm 0:d83f1c8ca282 163
bcostm 0:d83f1c8ca282 164 /**
bcostm 0:d83f1c8ca282 165 * @brief Gets the selected pins IT status.
bcostm 0:d83f1c8ca282 166 * @param IO_Pin: Selected pins to check the status.
bcostm 0:d83f1c8ca282 167 * This parameter can be any combination of the IO pins.
bcostm 0:d83f1c8ca282 168 * @retval Status of the checked IO pin(s).
bcostm 0:d83f1c8ca282 169 */
bcostm 0:d83f1c8ca282 170 uint32_t BSP_IO_ITGetStatus(uint32_t IO_Pin)
bcostm 0:d83f1c8ca282 171 {
bcostm 0:d83f1c8ca282 172 uint32_t status = 0;
bcostm 0:d83f1c8ca282 173 uint32_t io1_pin = 0;
bcostm 0:d83f1c8ca282 174
bcostm 0:d83f1c8ca282 175 io1_pin = (IO_Pin & IO1_PIN_ALL) >> IO1_PIN_OFFSET;
bcostm 0:d83f1c8ca282 176
bcostm 0:d83f1c8ca282 177 /* Return the MFX Pin IT status */
bcostm 0:d83f1c8ca282 178 status |= (io1_driver->ITStatus(IO1_I2C_ADDRESS, io1_pin)) << IO1_PIN_OFFSET;
bcostm 0:d83f1c8ca282 179
bcostm 0:d83f1c8ca282 180 return status;
bcostm 0:d83f1c8ca282 181 }
bcostm 0:d83f1c8ca282 182
bcostm 0:d83f1c8ca282 183 /**
bcostm 0:d83f1c8ca282 184 * @brief Clears the selected IO IT pending bit.
bcostm 0:d83f1c8ca282 185 * @param IO_Pin: Selected pins to check the status.
bcostm 0:d83f1c8ca282 186 * This parameter can be any combination of the IO pins.
bcostm 0:d83f1c8ca282 187 * @retval None
bcostm 0:d83f1c8ca282 188 */
bcostm 0:d83f1c8ca282 189 void BSP_IO_ITClear(uint32_t IO_Pin)
bcostm 0:d83f1c8ca282 190 {
bcostm 0:d83f1c8ca282 191 uint32_t io1_pin = 0;
bcostm 0:d83f1c8ca282 192
bcostm 0:d83f1c8ca282 193 io1_pin = (IO_Pin & IO1_PIN_ALL) >> IO1_PIN_OFFSET;
bcostm 0:d83f1c8ca282 194
bcostm 0:d83f1c8ca282 195 /* Clears the selected IO Expander 1 pin(s) mode */
bcostm 0:d83f1c8ca282 196 io1_driver->ClearIT(IO1_I2C_ADDRESS, io1_pin);
bcostm 0:d83f1c8ca282 197
bcostm 0:d83f1c8ca282 198 }
bcostm 0:d83f1c8ca282 199
bcostm 0:d83f1c8ca282 200 /**
bcostm 0:d83f1c8ca282 201 * @brief Configures the IO pin(s) according to IO mode structure value.
bcostm 0:d83f1c8ca282 202 * @param IO_Pin: Output pin to be set or reset.
bcostm 0:d83f1c8ca282 203 * This parameter can be any combination of the IO pins.
bcostm 0:d83f1c8ca282 204 * @param IO_Mode: IO pin mode to configure
bcostm 0:d83f1c8ca282 205 * This parameter can be one of the following values:
bcostm 0:d83f1c8ca282 206 * @arg IO_MODE_INPUT
bcostm 0:d83f1c8ca282 207 * @arg IO_MODE_OUTPUT
bcostm 0:d83f1c8ca282 208 * @arg IO_MODE_IT_RISING_EDGE
bcostm 0:d83f1c8ca282 209 * @arg IO_MODE_IT_FALLING_EDGE
bcostm 0:d83f1c8ca282 210 * @arg IO_MODE_IT_LOW_LEVEL
bcostm 0:d83f1c8ca282 211 * @arg IO_MODE_IT_HIGH_LEVEL
bcostm 0:d83f1c8ca282 212 * @retval IO_OK: if all initializations are OK. Other value if error.
bcostm 0:d83f1c8ca282 213 */
bcostm 0:d83f1c8ca282 214 uint8_t BSP_IO_ConfigPin(uint32_t IO_Pin, IO_ModeTypedef IO_Mode)
bcostm 0:d83f1c8ca282 215 {
bcostm 0:d83f1c8ca282 216 uint32_t io1_pin = 0;
bcostm 0:d83f1c8ca282 217
bcostm 0:d83f1c8ca282 218 io1_pin = (IO_Pin & IO1_PIN_ALL) >> IO1_PIN_OFFSET;
bcostm 0:d83f1c8ca282 219
bcostm 0:d83f1c8ca282 220
bcostm 0:d83f1c8ca282 221 /* Configure the selected IO Expander 1 pin(s) mode */
bcostm 0:d83f1c8ca282 222 io1_driver->Config(IO1_I2C_ADDRESS, io1_pin, IO_Mode);
bcostm 0:d83f1c8ca282 223
bcostm 0:d83f1c8ca282 224 return IO_OK;
bcostm 0:d83f1c8ca282 225 }
bcostm 0:d83f1c8ca282 226
bcostm 0:d83f1c8ca282 227 /**
bcostm 0:d83f1c8ca282 228 * @brief Sets the selected pins state.
bcostm 0:d83f1c8ca282 229 * @param IO_Pin: Selected pins to write.
bcostm 0:d83f1c8ca282 230 * This parameter can be any combination of the IO pins.
bcostm 0:d83f1c8ca282 231 * @param PinState: New pins state to write
bcostm 0:d83f1c8ca282 232 * @retval None
bcostm 0:d83f1c8ca282 233 */
bcostm 0:d83f1c8ca282 234 void BSP_IO_WritePin(uint32_t IO_Pin, uint8_t PinState)
bcostm 0:d83f1c8ca282 235 {
bcostm 0:d83f1c8ca282 236 uint32_t io1_pin = 0;
bcostm 0:d83f1c8ca282 237
bcostm 0:d83f1c8ca282 238 io1_pin = (IO_Pin & IO1_PIN_ALL) >> IO1_PIN_OFFSET;
bcostm 0:d83f1c8ca282 239
bcostm 0:d83f1c8ca282 240 /* Sets the IO Expander 1 selected pins state */
bcostm 0:d83f1c8ca282 241 io1_driver->WritePin(IO1_I2C_ADDRESS, io1_pin, PinState);
bcostm 0:d83f1c8ca282 242
bcostm 0:d83f1c8ca282 243 }
bcostm 0:d83f1c8ca282 244
bcostm 0:d83f1c8ca282 245 /**
bcostm 0:d83f1c8ca282 246 * @brief Gets the selected pins current state.
bcostm 0:d83f1c8ca282 247 * @param IO_Pin: Selected pins to read.
bcostm 0:d83f1c8ca282 248 * This parameter can be any combination of the IO pins.
bcostm 0:d83f1c8ca282 249 * @retval The current pins state
bcostm 0:d83f1c8ca282 250 */
bcostm 0:d83f1c8ca282 251 uint32_t BSP_IO_ReadPin(uint32_t IO_Pin)
bcostm 0:d83f1c8ca282 252 {
bcostm 0:d83f1c8ca282 253 uint32_t pin_state = 0;
bcostm 0:d83f1c8ca282 254 uint32_t io1_pin = 0;
bcostm 0:d83f1c8ca282 255
bcostm 0:d83f1c8ca282 256 io1_pin = (IO_Pin & IO1_PIN_ALL) >> IO1_PIN_OFFSET;
bcostm 0:d83f1c8ca282 257
bcostm 0:d83f1c8ca282 258 /* Gets the IO Expander 1 selected pins current state */
bcostm 0:d83f1c8ca282 259 pin_state |= (io1_driver->ReadPin(IO1_I2C_ADDRESS, io1_pin)) << IO1_PIN_OFFSET;
bcostm 0:d83f1c8ca282 260
bcostm 0:d83f1c8ca282 261
bcostm 0:d83f1c8ca282 262 return pin_state;
bcostm 0:d83f1c8ca282 263 }
bcostm 0:d83f1c8ca282 264
bcostm 0:d83f1c8ca282 265 /**
bcostm 0:d83f1c8ca282 266 * @brief Toggles the selected pins state
bcostm 0:d83f1c8ca282 267 * @param IO_Pin: Selected pins to toggle.
bcostm 0:d83f1c8ca282 268 * This parameter can be any combination of the IO pins.
bcostm 0:d83f1c8ca282 269 * @retval None
bcostm 0:d83f1c8ca282 270 */
bcostm 0:d83f1c8ca282 271 void BSP_IO_TogglePin(uint32_t IO_Pin)
bcostm 0:d83f1c8ca282 272 {
bcostm 0:d83f1c8ca282 273 uint32_t io1_pin = 0;
bcostm 0:d83f1c8ca282 274
bcostm 0:d83f1c8ca282 275 io1_pin = (IO_Pin & IO1_PIN_ALL) >> IO1_PIN_OFFSET;
bcostm 0:d83f1c8ca282 276
bcostm 0:d83f1c8ca282 277 /* Toggles the IO Expander 1 selected pins state */
bcostm 0:d83f1c8ca282 278 if (io1_driver->ReadPin(IO1_I2C_ADDRESS, io1_pin) == RESET) /* Set */
bcostm 0:d83f1c8ca282 279 {
bcostm 0:d83f1c8ca282 280 BSP_IO_WritePin(io1_pin, GPIO_PIN_SET); /* Reset */
bcostm 0:d83f1c8ca282 281 }
bcostm 0:d83f1c8ca282 282 else
bcostm 0:d83f1c8ca282 283 {
bcostm 0:d83f1c8ca282 284 BSP_IO_WritePin(io1_pin, GPIO_PIN_RESET); /* Set */
bcostm 0:d83f1c8ca282 285 }
bcostm 0:d83f1c8ca282 286
bcostm 0:d83f1c8ca282 287 }
bcostm 0:d83f1c8ca282 288
bcostm 0:d83f1c8ca282 289 /**
bcostm 0:d83f1c8ca282 290 * @}
bcostm 0:d83f1c8ca282 291 */
bcostm 0:d83f1c8ca282 292
bcostm 0:d83f1c8ca282 293 /**
bcostm 0:d83f1c8ca282 294 * @}
bcostm 0:d83f1c8ca282 295 */
bcostm 0:d83f1c8ca282 296
bcostm 0:d83f1c8ca282 297 /**
bcostm 0:d83f1c8ca282 298 * @}
bcostm 0:d83f1c8ca282 299 */
bcostm 0:d83f1c8ca282 300
bcostm 0:d83f1c8ca282 301 /**
bcostm 0:d83f1c8ca282 302 * @}
bcostm 0:d83f1c8ca282 303 */
bcostm 0:d83f1c8ca282 304
bcostm 0:d83f1c8ca282 305 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/