ST / BSP_DISCO_L496AG

BSP driver for DISCO_L496AG

Dependents:   DISCO_L496AG-LCD-prova_1 DISCO_L496AG-LCD-prova_2 DISCO_L496AG-LCD-demo DISCO_L496AG-SRAM-demo

Drivers/BSP/Components/cs42l51/cs42l51.c@2:106c7b82e064, 2019-11-20 (annotated)

Committer:
Jerome Coutant
Date:
Wed Nov 20 16:48:24 2019 +0100
Revision:
2:106c7b82e064
Parent:
0:d83f1c8ca282 
Update BSP files with CubeL4 V1.14.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bcostm 0:d83f1c8ca282 1 /**
bcostm 0:d83f1c8ca282 2 ******************************************************************************
bcostm 0:d83f1c8ca282 3 * @file cs42l51.c
bcostm 0:d83f1c8ca282 4 * @author MCD Application Team
bcostm 0:d83f1c8ca282 5 * @brief This file provides the CS42L51 Audio Codec driver.
bcostm 0:d83f1c8ca282 6 ******************************************************************************
bcostm 0:d83f1c8ca282 7 * @attention
bcostm 0:d83f1c8ca282 8 *
Jerome Coutant 2:106c7b82e064 9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
Jerome Coutant 2:106c7b82e064 10 * All rights reserved.</center></h2>
bcostm 0:d83f1c8ca282 11 *
Jerome Coutant 2:106c7b82e064 12 * This software component is licensed by ST under BSD 3-Clause license,
Jerome Coutant 2:106c7b82e064 13 * the "License"; You may not use this file except in compliance with the
Jerome Coutant 2:106c7b82e064 14 * License. You may obtain a copy of the License at:
Jerome Coutant 2:106c7b82e064 15 * opensource.org/licenses/BSD-3-Clause
bcostm 0:d83f1c8ca282 16 *
bcostm 0:d83f1c8ca282 17 ******************************************************************************
bcostm 0:d83f1c8ca282 18 */
bcostm 0:d83f1c8ca282 19
bcostm 0:d83f1c8ca282 20 /* Includes ------------------------------------------------------------------*/
bcostm 0:d83f1c8ca282 21 #include "cs42l51.h"
bcostm 0:d83f1c8ca282 22
bcostm 0:d83f1c8ca282 23 /** @addtogroup BSP
bcostm 0:d83f1c8ca282 24 * @{
bcostm 0:d83f1c8ca282 25 */
bcostm 0:d83f1c8ca282 26
bcostm 0:d83f1c8ca282 27 /** @addtogroup Components
bcostm 0:d83f1c8ca282 28 * @{
bcostm 0:d83f1c8ca282 29 */
bcostm 0:d83f1c8ca282 30
bcostm 0:d83f1c8ca282 31 /** @addtogroup CS42L51
bcostm 0:d83f1c8ca282 32 * @brief This file provides a set of functions needed to drive the
bcostm 0:d83f1c8ca282 33 * CS42L51 audio codec.
bcostm 0:d83f1c8ca282 34 * @{
bcostm 0:d83f1c8ca282 35 */
bcostm 0:d83f1c8ca282 36
bcostm 0:d83f1c8ca282 37 /** @defgroup CS42L51_Exported_Variables
bcostm 0:d83f1c8ca282 38 * @{
bcostm 0:d83f1c8ca282 39 */
bcostm 0:d83f1c8ca282 40
bcostm 0:d83f1c8ca282 41 /* Audio codec driver structure initialization */
bcostm 0:d83f1c8ca282 42 AUDIO_DrvTypeDef cs42l51_drv =
bcostm 0:d83f1c8ca282 43 {
bcostm 0:d83f1c8ca282 44 cs42l51_Init,
bcostm 0:d83f1c8ca282 45 cs42l51_DeInit,
bcostm 0:d83f1c8ca282 46 cs42l51_ReadID,
bcostm 0:d83f1c8ca282 47
bcostm 0:d83f1c8ca282 48 cs42l51_Play,
bcostm 0:d83f1c8ca282 49 cs42l51_Pause,
bcostm 0:d83f1c8ca282 50 cs42l51_Resume,
bcostm 0:d83f1c8ca282 51 cs42l51_Stop,
bcostm 0:d83f1c8ca282 52
bcostm 0:d83f1c8ca282 53 cs42l51_SetFrequency,
bcostm 0:d83f1c8ca282 54 cs42l51_SetVolume,
bcostm 0:d83f1c8ca282 55 cs42l51_SetMute,
bcostm 0:d83f1c8ca282 56 cs42l51_SetOutputMode,
bcostm 0:d83f1c8ca282 57 cs42l51_Reset,
bcostm 0:d83f1c8ca282 58 };
bcostm 0:d83f1c8ca282 59
bcostm 0:d83f1c8ca282 60 /**
bcostm 0:d83f1c8ca282 61 * @}
bcostm 0:d83f1c8ca282 62 */
bcostm 0:d83f1c8ca282 63
bcostm 0:d83f1c8ca282 64 /** @defgroup CS42L51_Private_Types
bcostm 0:d83f1c8ca282 65 * @{
bcostm 0:d83f1c8ca282 66 */
bcostm 0:d83f1c8ca282 67
bcostm 0:d83f1c8ca282 68 /**
bcostm 0:d83f1c8ca282 69 * @}
bcostm 0:d83f1c8ca282 70 */
bcostm 0:d83f1c8ca282 71
bcostm 0:d83f1c8ca282 72 /** @defgroup CS42L51_Private_Defines
bcostm 0:d83f1c8ca282 73 * @{
bcostm 0:d83f1c8ca282 74 */
bcostm 0:d83f1c8ca282 75 /* Uncomment this line to enable verifying data sent to codec after each write
bcostm 0:d83f1c8ca282 76 operation (for debug purpose) */
bcostm 0:d83f1c8ca282 77 #if !defined (VERIFY_WRITTENDATA)
bcostm 0:d83f1c8ca282 78 #define VERIFY_WRITTENDATA
bcostm 0:d83f1c8ca282 79 #endif /* VERIFY_WRITTENDATA */
bcostm 0:d83f1c8ca282 80 /**
bcostm 0:d83f1c8ca282 81 * @}
bcostm 0:d83f1c8ca282 82 */
bcostm 0:d83f1c8ca282 83
bcostm 0:d83f1c8ca282 84 /** @defgroup CS42L51_Private_Macros
bcostm 0:d83f1c8ca282 85 * @{
bcostm 0:d83f1c8ca282 86 */
bcostm 0:d83f1c8ca282 87
bcostm 0:d83f1c8ca282 88 /**
bcostm 0:d83f1c8ca282 89 * @}
bcostm 0:d83f1c8ca282 90 */
bcostm 0:d83f1c8ca282 91
bcostm 0:d83f1c8ca282 92 /** @defgroup CS42L51_Private_Variables
bcostm 0:d83f1c8ca282 93 * @{
bcostm 0:d83f1c8ca282 94 */
bcostm 0:d83f1c8ca282 95
bcostm 0:d83f1c8ca282 96 static uint8_t Is_CS42L51_Initialized = 0;
bcostm 0:d83f1c8ca282 97 static uint8_t Is_CS42L51_Stop = 1;
bcostm 0:d83f1c8ca282 98
bcostm 0:d83f1c8ca282 99 static uint16_t CS42L51_Device = OUTPUT_DEVICE_HEADPHONE;
bcostm 0:d83f1c8ca282 100
bcostm 0:d83f1c8ca282 101 /**
bcostm 0:d83f1c8ca282 102 * @}
bcostm 0:d83f1c8ca282 103 */
bcostm 0:d83f1c8ca282 104
bcostm 0:d83f1c8ca282 105 /** @defgroup CS42L51_Private_Functions
bcostm 0:d83f1c8ca282 106 * @{
bcostm 0:d83f1c8ca282 107 */
bcostm 0:d83f1c8ca282 108 static uint8_t CODEC_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value);
bcostm 0:d83f1c8ca282 109 /**
bcostm 0:d83f1c8ca282 110 * @}
bcostm 0:d83f1c8ca282 111 */
bcostm 0:d83f1c8ca282 112
bcostm 0:d83f1c8ca282 113 /** @addtogroup CS42L51_Exported_Functions
bcostm 0:d83f1c8ca282 114 * @{
bcostm 0:d83f1c8ca282 115 */
bcostm 0:d83f1c8ca282 116
bcostm 0:d83f1c8ca282 117 /**
bcostm 0:d83f1c8ca282 118 * @brief Initialize the audio codec and the control interface.
bcostm 0:d83f1c8ca282 119 * @param DeviceAddr: Device address on communication bus.
bcostm 0:d83f1c8ca282 120 * @param Device: Can be combination values of OUTPUT_DEVICE_HEADPHONE and
bcostm 0:d83f1c8ca282 121 * INPUT_DEVICE_MIC1.
bcostm 0:d83f1c8ca282 122 * @param Volume: Initial output volume level (from 0 (-100dB) to 100 (0dB)).
bcostm 0:d83f1c8ca282 123 * @param AudioFreq: Initial audio frequency (currently not used).
bcostm 0:d83f1c8ca282 124 * @retval 0 if correct communication, else wrong communication.
bcostm 0:d83f1c8ca282 125 */
bcostm 0:d83f1c8ca282 126 uint32_t cs42l51_Init(uint16_t DeviceAddr, uint16_t Device, uint8_t Volume, uint32_t AudioFreq)
bcostm 0:d83f1c8ca282 127 {
bcostm 0:d83f1c8ca282 128 uint32_t counter = 0;
bcostm 0:d83f1c8ca282 129 uint8_t Value;
bcostm 0:d83f1c8ca282 130
bcostm 0:d83f1c8ca282 131 /* Check if codec is already initialized */
bcostm 0:d83f1c8ca282 132 if(Is_CS42L51_Initialized == 0)
bcostm 0:d83f1c8ca282 133 {
bcostm 0:d83f1c8ca282 134 /* Initialize the Control interface of the Audio Codec */
bcostm 0:d83f1c8ca282 135 AUDIO_IO_Init();
bcostm 0:d83f1c8ca282 136
bcostm 0:d83f1c8ca282 137 Is_CS42L51_Initialized = 1;
bcostm 0:d83f1c8ca282 138 }
bcostm 0:d83f1c8ca282 139 else
bcostm 0:d83f1c8ca282 140 {
bcostm 0:d83f1c8ca282 141 /* Set all power down bits to 1 exept PDN to mute ADCs and DACs*/
bcostm 0:d83f1c8ca282 142 counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x7E);
bcostm 0:d83f1c8ca282 143 Value = AUDIO_IO_Read(DeviceAddr, 0x03);
bcostm 0:d83f1c8ca282 144 counter += CODEC_IO_Write(DeviceAddr, 0x03, (Value | 0x0E));
bcostm 0:d83f1c8ca282 145
bcostm 0:d83f1c8ca282 146 /* Disable zero cross and soft ramp */
bcostm 0:d83f1c8ca282 147 Value = AUDIO_IO_Read(DeviceAddr, 0x09);
bcostm 0:d83f1c8ca282 148 counter += CODEC_IO_Write(DeviceAddr, 0x09, (Value & 0xFC));
bcostm 0:d83f1c8ca282 149
bcostm 0:d83f1c8ca282 150 /* Power control : Enter standby (PDN = 1) */
bcostm 0:d83f1c8ca282 151 Value = AUDIO_IO_Read(DeviceAddr, 0x02);
bcostm 0:d83f1c8ca282 152 counter += CODEC_IO_Write(DeviceAddr, 0x02, (Value | 0x01));
bcostm 0:d83f1c8ca282 153 }
bcostm 0:d83f1c8ca282 154
bcostm 0:d83f1c8ca282 155 /* Mic Power and Speed Control : Auto detect on, Speed mode SSM, tri state off, MCLK divide by 2 off */
bcostm 0:d83f1c8ca282 156 Value = AUDIO_IO_Read(DeviceAddr, 0x03);
bcostm 0:d83f1c8ca282 157 counter += CODEC_IO_Write(DeviceAddr, 0x03, ((Value & 0x0E) | 0xA0));
bcostm 0:d83f1c8ca282 158
bcostm 0:d83f1c8ca282 159 /* Interface control : Loopback off, Slave, I2S (SDIN and SOUT), Digital mix off, Mic mix off */
bcostm 0:d83f1c8ca282 160 counter += CODEC_IO_Write(DeviceAddr, 0x04, 0x0C);
bcostm 0:d83f1c8ca282 161
bcostm 0:d83f1c8ca282 162 /* Mic control : ADC single volume off, ADCB boost off, ADCA boost off, MicBias on AIN3B/MICIN2 pin, MicBias level 0.8xVA, MICB boost 16db, MICA boost 16dB */
bcostm 0:d83f1c8ca282 163 counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x00);
bcostm 0:d83f1c8ca282 164
bcostm 0:d83f1c8ca282 165 /* ADC control : ADCB HPF off, ADCB HPF freeze off, ADCA HPF off, ADCA HPF freeze off, Soft ramp B off, Zero cross B off, Soft ramp A off, Zero cross A off */
bcostm 0:d83f1c8ca282 166 counter += CODEC_IO_Write(DeviceAddr, 0x06, 0x00);
bcostm 0:d83f1c8ca282 167
bcostm 0:d83f1c8ca282 168 /* ADC Input Select, Invert and Mute : AIN1B to PGAB, AIN3A to PreAmp to PGAA, ADCB invert off, ADCA invert off, ADCB mute on, ADCA mute off */
bcostm 0:d83f1c8ca282 169 counter += CODEC_IO_Write(DeviceAddr, 0x07, 0x32);
bcostm 0:d83f1c8ca282 170
bcostm 0:d83f1c8ca282 171 /* DAC output control : HP Gain to 1, Single volume control off, PCM invert signals polarity off, DAC channels mute on */
bcostm 0:d83f1c8ca282 172 counter += CODEC_IO_Write(DeviceAddr, 0x08, 0xC3);
bcostm 0:d83f1c8ca282 173
bcostm 0:d83f1c8ca282 174 /* DAC control : Signal processing to DAC, Freeze off, De-emphasis off, Analog output auto mute off, DAC soft ramp */
bcostm 0:d83f1c8ca282 175 counter += CODEC_IO_Write(DeviceAddr, 0x09, 0x42);
bcostm 0:d83f1c8ca282 176
bcostm 0:d83f1c8ca282 177 /* ALCA and PGAA Control : ALCA soft ramp disable on, ALCA zero cross disable on, PGA A Gain 0dB */
bcostm 0:d83f1c8ca282 178 counter += CODEC_IO_Write(DeviceAddr, 0x0A, 0xC0);
bcostm 0:d83f1c8ca282 179
bcostm 0:d83f1c8ca282 180 /* ALCB and PGAB Control : ALCB soft ramp disable on, ALCB zero cross disable on, PGA B Gain 0dB */
bcostm 0:d83f1c8ca282 181 counter += CODEC_IO_Write(DeviceAddr, 0x0B, 0xC0);
bcostm 0:d83f1c8ca282 182
bcostm 0:d83f1c8ca282 183 /* ADCA Attenuator : 0dB */
bcostm 0:d83f1c8ca282 184 counter += CODEC_IO_Write(DeviceAddr, 0x0C, 0x00);
bcostm 0:d83f1c8ca282 185
bcostm 0:d83f1c8ca282 186 /* ADCB Attenuator : 0dB */
bcostm 0:d83f1c8ca282 187 counter += CODEC_IO_Write(DeviceAddr, 0x0D, 0x00);
bcostm 0:d83f1c8ca282 188
bcostm 0:d83f1c8ca282 189 /* ADCA mixer volume control : ADCA mixer channel mute on, ADCA mixer volume 0dB */
bcostm 0:d83f1c8ca282 190 counter += CODEC_IO_Write(DeviceAddr, 0x0E, 0x80);
bcostm 0:d83f1c8ca282 191
bcostm 0:d83f1c8ca282 192 /* ADCB mixer volume control : ADCB mixer channel mute on, ADCB mixer volume 0dB */
bcostm 0:d83f1c8ca282 193 counter += CODEC_IO_Write(DeviceAddr, 0x0F, 0x80);
bcostm 0:d83f1c8ca282 194
bcostm 0:d83f1c8ca282 195 /* PCMA mixer volume control : PCMA mixer channel mute off, PCMA mixer volume 0dB */
bcostm 0:d83f1c8ca282 196 counter += CODEC_IO_Write(DeviceAddr, 0x10, 0x00);
bcostm 0:d83f1c8ca282 197
bcostm 0:d83f1c8ca282 198 /* PCMB mixer volume control : PCMB mixer channel mute off, PCMB mixer volume 0dB */
bcostm 0:d83f1c8ca282 199 counter += CODEC_IO_Write(DeviceAddr, 0x11, 0x00);
bcostm 0:d83f1c8ca282 200
bcostm 0:d83f1c8ca282 201 /* PCM channel mixer : AOUTA Left, AOUTB Right */
bcostm 0:d83f1c8ca282 202 counter += CODEC_IO_Write(DeviceAddr, 0x18, 0x00);
bcostm 0:d83f1c8ca282 203
bcostm 0:d83f1c8ca282 204 if(Device & OUTPUT_DEVICE_HEADPHONE)
bcostm 0:d83f1c8ca282 205 {
bcostm 0:d83f1c8ca282 206 Value = VOLUME_CONVERT(Volume);
bcostm 0:d83f1c8ca282 207 /* AOUTA volume control : AOUTA volume */
bcostm 0:d83f1c8ca282 208 counter += CODEC_IO_Write(DeviceAddr, 0x16, Value);
bcostm 0:d83f1c8ca282 209 /* AOUTB volume control : AOUTB volume */
bcostm 0:d83f1c8ca282 210 counter += CODEC_IO_Write(DeviceAddr, 0x17, Value);
bcostm 0:d83f1c8ca282 211 }
bcostm 0:d83f1c8ca282 212
bcostm 0:d83f1c8ca282 213 /* Store device */
bcostm 0:d83f1c8ca282 214 CS42L51_Device = Device;
bcostm 0:d83f1c8ca282 215
bcostm 0:d83f1c8ca282 216 /* Return communication control value */
bcostm 0:d83f1c8ca282 217 return counter;
bcostm 0:d83f1c8ca282 218 }
bcostm 0:d83f1c8ca282 219
bcostm 0:d83f1c8ca282 220 /**
bcostm 0:d83f1c8ca282 221 * @brief Deinitialize the audio codec.
bcostm 0:d83f1c8ca282 222 * @param None
bcostm 0:d83f1c8ca282 223 * @retval None
bcostm 0:d83f1c8ca282 224 */
bcostm 0:d83f1c8ca282 225 void cs42l51_DeInit(void)
bcostm 0:d83f1c8ca282 226 {
bcostm 0:d83f1c8ca282 227 /* Deinitialize Audio Codec interface */
bcostm 0:d83f1c8ca282 228 AUDIO_IO_DeInit();
bcostm 0:d83f1c8ca282 229
bcostm 0:d83f1c8ca282 230 Is_CS42L51_Initialized = 0;
bcostm 0:d83f1c8ca282 231 }
bcostm 0:d83f1c8ca282 232
bcostm 0:d83f1c8ca282 233 /**
bcostm 0:d83f1c8ca282 234 * @brief Get the CS42L51 ID.
bcostm 0:d83f1c8ca282 235 * @param DeviceAddr: Device address on communication Bus.
bcostm 0:d83f1c8ca282 236 * @retval The CS42L51 ID
bcostm 0:d83f1c8ca282 237 */
bcostm 0:d83f1c8ca282 238 uint32_t cs42l51_ReadID(uint16_t DeviceAddr)
bcostm 0:d83f1c8ca282 239 {
bcostm 0:d83f1c8ca282 240 uint8_t Value;
bcostm 0:d83f1c8ca282 241
bcostm 0:d83f1c8ca282 242 if(Is_CS42L51_Initialized == 0)
bcostm 0:d83f1c8ca282 243 {
bcostm 0:d83f1c8ca282 244 /* Initialize the Control interface of the Audio Codec */
bcostm 0:d83f1c8ca282 245 AUDIO_IO_Init();
bcostm 0:d83f1c8ca282 246
bcostm 0:d83f1c8ca282 247 Value = AUDIO_IO_Read(DeviceAddr, CS42L51_CHIPID_ADDR);
bcostm 0:d83f1c8ca282 248 Value = (Value & CS42L51_ID_MASK);
bcostm 0:d83f1c8ca282 249
bcostm 0:d83f1c8ca282 250 /* Deinitialize Audio Codec interface */
bcostm 0:d83f1c8ca282 251 AUDIO_IO_DeInit();
bcostm 0:d83f1c8ca282 252 }
bcostm 0:d83f1c8ca282 253 else
bcostm 0:d83f1c8ca282 254 {
bcostm 0:d83f1c8ca282 255 Value = AUDIO_IO_Read(DeviceAddr, CS42L51_CHIPID_ADDR);
bcostm 0:d83f1c8ca282 256 Value = (Value & CS42L51_ID_MASK);
bcostm 0:d83f1c8ca282 257 }
bcostm 0:d83f1c8ca282 258
bcostm 0:d83f1c8ca282 259 return((uint32_t) Value);
bcostm 0:d83f1c8ca282 260 }
bcostm 0:d83f1c8ca282 261
bcostm 0:d83f1c8ca282 262 /**
bcostm 0:d83f1c8ca282 263 * @brief Start the audio Codec play feature.
bcostm 0:d83f1c8ca282 264 * @note For this codec no Play options are required.
bcostm 0:d83f1c8ca282 265 * @param DeviceAddr: Device address on communication Bus.
bcostm 0:d83f1c8ca282 266 * @retval 0 if correct communication, else wrong communication
bcostm 0:d83f1c8ca282 267 */
bcostm 0:d83f1c8ca282 268 uint32_t cs42l51_Play(uint16_t DeviceAddr, uint16_t* pBuffer, uint16_t Size)
bcostm 0:d83f1c8ca282 269 {
bcostm 0:d83f1c8ca282 270 uint32_t counter = 0;
bcostm 0:d83f1c8ca282 271 uint8_t Value;
bcostm 0:d83f1c8ca282 272
bcostm 0:d83f1c8ca282 273 if(Is_CS42L51_Stop == 1)
bcostm 0:d83f1c8ca282 274 {
bcostm 0:d83f1c8ca282 275 /* Unmute output device */
bcostm 0:d83f1c8ca282 276 counter += cs42l51_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
bcostm 0:d83f1c8ca282 277
bcostm 0:d83f1c8ca282 278 if(CS42L51_Device & OUTPUT_DEVICE_HEADPHONE)
bcostm 0:d83f1c8ca282 279 {
bcostm 0:d83f1c8ca282 280 /* DAC control : Signal processing to DAC, Freeze off, De-emphasis off, Analog output auto mute off, DAC soft ramp */
bcostm 0:d83f1c8ca282 281 counter += CODEC_IO_Write(DeviceAddr, 0x09, 0x42);
bcostm 0:d83f1c8ca282 282
bcostm 0:d83f1c8ca282 283 /* Power control 1 : PDN_DACA, PDN_DACB disable. */
bcostm 0:d83f1c8ca282 284 Value = AUDIO_IO_Read(DeviceAddr, 0x02);
bcostm 0:d83f1c8ca282 285 counter += CODEC_IO_Write(DeviceAddr, 0x02, (Value & 0x9F));
bcostm 0:d83f1c8ca282 286 }
bcostm 0:d83f1c8ca282 287
bcostm 0:d83f1c8ca282 288 if(CS42L51_Device & INPUT_DEVICE_MIC1)
bcostm 0:d83f1c8ca282 289 {
bcostm 0:d83f1c8ca282 290 /* Power control 1 : PDN_PGAA, PDN_ADCA disable. */
bcostm 0:d83f1c8ca282 291 Value = AUDIO_IO_Read(DeviceAddr, 0x02);
bcostm 0:d83f1c8ca282 292 counter += CODEC_IO_Write(DeviceAddr, 0x02, (Value & 0xF5));
bcostm 0:d83f1c8ca282 293
bcostm 0:d83f1c8ca282 294 /* Mic Power and Speed Control : PDN_MICA, PDN_MIC_BIAS disable. */
bcostm 0:d83f1c8ca282 295 Value = AUDIO_IO_Read(DeviceAddr, 0x03);
bcostm 0:d83f1c8ca282 296 counter += CODEC_IO_Write(DeviceAddr, 0x03, (Value & 0xF9));
bcostm 0:d83f1c8ca282 297 }
bcostm 0:d83f1c8ca282 298
bcostm 0:d83f1c8ca282 299 /* Power control : Exit standby (PDN = 0) */
bcostm 0:d83f1c8ca282 300 Value = AUDIO_IO_Read(DeviceAddr, 0x02);
bcostm 0:d83f1c8ca282 301 counter += CODEC_IO_Write(DeviceAddr, 0x02, (Value & 0xFE));
bcostm 0:d83f1c8ca282 302
bcostm 0:d83f1c8ca282 303 Is_CS42L51_Stop = 0;
bcostm 0:d83f1c8ca282 304 }
bcostm 0:d83f1c8ca282 305
bcostm 0:d83f1c8ca282 306 /* Return communication control value */
bcostm 0:d83f1c8ca282 307 return counter;
bcostm 0:d83f1c8ca282 308 }
bcostm 0:d83f1c8ca282 309
bcostm 0:d83f1c8ca282 310 /**
bcostm 0:d83f1c8ca282 311 * @brief Pause playing on the audio codec.
bcostm 0:d83f1c8ca282 312 * @param DeviceAddr: Device address on communication Bus.
bcostm 0:d83f1c8ca282 313 * @retval 0 if correct communication, else wrong communication
bcostm 0:d83f1c8ca282 314 */
bcostm 0:d83f1c8ca282 315 uint32_t cs42l51_Pause(uint16_t DeviceAddr)
bcostm 0:d83f1c8ca282 316 {
bcostm 0:d83f1c8ca282 317 uint32_t counter = 0;
bcostm 0:d83f1c8ca282 318
bcostm 0:d83f1c8ca282 319 /* Pause the audio file playing */
bcostm 0:d83f1c8ca282 320 /* Mute the output first */
bcostm 0:d83f1c8ca282 321 counter += cs42l51_SetMute(DeviceAddr, AUDIO_MUTE_ON);
bcostm 0:d83f1c8ca282 322
bcostm 0:d83f1c8ca282 323 return counter;
bcostm 0:d83f1c8ca282 324 }
bcostm 0:d83f1c8ca282 325
bcostm 0:d83f1c8ca282 326 /**
bcostm 0:d83f1c8ca282 327 * @brief Resume playing on the audio codec.
bcostm 0:d83f1c8ca282 328 * @param DeviceAddr: Device address on communication Bus.
bcostm 0:d83f1c8ca282 329 * @retval 0 if correct communication, else wrong communication
bcostm 0:d83f1c8ca282 330 */
bcostm 0:d83f1c8ca282 331 uint32_t cs42l51_Resume(uint16_t DeviceAddr)
bcostm 0:d83f1c8ca282 332 {
bcostm 0:d83f1c8ca282 333 uint32_t counter = 0;
bcostm 0:d83f1c8ca282 334
bcostm 0:d83f1c8ca282 335 /* Unmute the output */
bcostm 0:d83f1c8ca282 336 counter += cs42l51_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
bcostm 0:d83f1c8ca282 337
bcostm 0:d83f1c8ca282 338 return counter;
bcostm 0:d83f1c8ca282 339 }
bcostm 0:d83f1c8ca282 340
bcostm 0:d83f1c8ca282 341 /**
bcostm 0:d83f1c8ca282 342 * @brief Stop audio Codec playing. It powers down the codec.
bcostm 0:d83f1c8ca282 343 * @param DeviceAddr: Device address on communication Bus.
bcostm 0:d83f1c8ca282 344 * @param CodecPdwnMode: selects the power down mode (currently not used).
bcostm 0:d83f1c8ca282 345 * @retval 0 if correct communication, else wrong communication
bcostm 0:d83f1c8ca282 346 */
bcostm 0:d83f1c8ca282 347 uint32_t cs42l51_Stop(uint16_t DeviceAddr, uint32_t CodecPdwnMode)
bcostm 0:d83f1c8ca282 348 {
bcostm 0:d83f1c8ca282 349 uint32_t counter = 0;
bcostm 0:d83f1c8ca282 350 uint8_t Value;
bcostm 0:d83f1c8ca282 351
bcostm 0:d83f1c8ca282 352 /* Set all power down bits to 1 exept PDN to mute ADCs and DACs*/
bcostm 0:d83f1c8ca282 353 counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x7E);
bcostm 0:d83f1c8ca282 354 Value = AUDIO_IO_Read(DeviceAddr, 0x03);
bcostm 0:d83f1c8ca282 355 counter += CODEC_IO_Write(DeviceAddr, 0x03, (Value | 0x0E));
bcostm 0:d83f1c8ca282 356
bcostm 0:d83f1c8ca282 357 /* Disable zero cross and soft ramp */
bcostm 0:d83f1c8ca282 358 Value = AUDIO_IO_Read(DeviceAddr, 0x09);
bcostm 0:d83f1c8ca282 359 counter += CODEC_IO_Write(DeviceAddr, 0x09, (Value & 0xFC));
bcostm 0:d83f1c8ca282 360
bcostm 0:d83f1c8ca282 361 /* Power control : Enter standby (PDN = 1) */
bcostm 0:d83f1c8ca282 362 Value = AUDIO_IO_Read(DeviceAddr, 0x02);
bcostm 0:d83f1c8ca282 363 counter += CODEC_IO_Write(DeviceAddr, 0x02, (Value | 0x01));
bcostm 0:d83f1c8ca282 364
bcostm 0:d83f1c8ca282 365 Is_CS42L51_Stop = 1;
bcostm 0:d83f1c8ca282 366 return counter;
bcostm 0:d83f1c8ca282 367 }
bcostm 0:d83f1c8ca282 368
bcostm 0:d83f1c8ca282 369 /**
bcostm 0:d83f1c8ca282 370 * @brief Set higher or lower the codec volume level.
bcostm 0:d83f1c8ca282 371 * @param DeviceAddr: Device address on communication Bus.
bcostm 0:d83f1c8ca282 372 * @param Volume: output volume level (from 0 (-100dB) to 100 (0dB)).
bcostm 0:d83f1c8ca282 373 * @retval 0 if correct communication, else wrong communication
bcostm 0:d83f1c8ca282 374 */
bcostm 0:d83f1c8ca282 375 uint32_t cs42l51_SetVolume(uint16_t DeviceAddr, uint8_t Volume)
bcostm 0:d83f1c8ca282 376 {
bcostm 0:d83f1c8ca282 377 uint32_t counter = 0;
bcostm 0:d83f1c8ca282 378 uint8_t convertedvol = VOLUME_CONVERT(Volume);
bcostm 0:d83f1c8ca282 379
bcostm 0:d83f1c8ca282 380 /* AOUTA volume control : AOUTA volume */
bcostm 0:d83f1c8ca282 381 counter += CODEC_IO_Write(DeviceAddr, 0x16, convertedvol);
bcostm 0:d83f1c8ca282 382 /* AOUTB volume control : AOUTB volume */
bcostm 0:d83f1c8ca282 383 counter += CODEC_IO_Write(DeviceAddr, 0x17, convertedvol);
bcostm 0:d83f1c8ca282 384
bcostm 0:d83f1c8ca282 385 return counter;
bcostm 0:d83f1c8ca282 386 }
bcostm 0:d83f1c8ca282 387
bcostm 0:d83f1c8ca282 388 /**
bcostm 0:d83f1c8ca282 389 * @brief Set new frequency.
bcostm 0:d83f1c8ca282 390 * @param DeviceAddr: Device address on communication Bus.
bcostm 0:d83f1c8ca282 391 * @param AudioFreq: Audio frequency used to play the audio stream.
bcostm 0:d83f1c8ca282 392 * @retval 0 if correct communication, else wrong communication
bcostm 0:d83f1c8ca282 393 */
bcostm 0:d83f1c8ca282 394 uint32_t cs42l51_SetFrequency(uint16_t DeviceAddr, uint32_t AudioFreq)
bcostm 0:d83f1c8ca282 395 {
bcostm 0:d83f1c8ca282 396 return 0;
bcostm 0:d83f1c8ca282 397 }
bcostm 0:d83f1c8ca282 398
bcostm 0:d83f1c8ca282 399 /**
bcostm 0:d83f1c8ca282 400 * @brief Enable or disable the mute feature on the audio codec.
bcostm 0:d83f1c8ca282 401 * @param DeviceAddr: Device address on communication Bus.
bcostm 0:d83f1c8ca282 402 * @param Cmd: AUDIO_MUTE_ON to enable the mute or AUDIO_MUTE_OFF to disable the
bcostm 0:d83f1c8ca282 403 * mute mode.
bcostm 0:d83f1c8ca282 404 * @retval 0 if correct communication, else wrong communication
bcostm 0:d83f1c8ca282 405 */
bcostm 0:d83f1c8ca282 406 uint32_t cs42l51_SetMute(uint16_t DeviceAddr, uint32_t Cmd)
bcostm 0:d83f1c8ca282 407 {
bcostm 0:d83f1c8ca282 408 uint32_t counter = 0;
bcostm 0:d83f1c8ca282 409 uint8_t Value;
bcostm 0:d83f1c8ca282 410
bcostm 0:d83f1c8ca282 411 /* Read DAC output control register */
bcostm 0:d83f1c8ca282 412 Value = AUDIO_IO_Read(DeviceAddr, 0x08);
bcostm 0:d83f1c8ca282 413
bcostm 0:d83f1c8ca282 414 /* Set the Mute mode */
bcostm 0:d83f1c8ca282 415 if(Cmd == AUDIO_MUTE_ON)
bcostm 0:d83f1c8ca282 416 {
bcostm 0:d83f1c8ca282 417 /* Mute DAC channels */
bcostm 0:d83f1c8ca282 418 counter += CODEC_IO_Write(DeviceAddr, 0x08, (Value | 0x03));
bcostm 0:d83f1c8ca282 419 }
bcostm 0:d83f1c8ca282 420 else /* AUDIO_MUTE_OFF Disable the Mute */
bcostm 0:d83f1c8ca282 421 {
bcostm 0:d83f1c8ca282 422 /* Unmute DAC channels */
bcostm 0:d83f1c8ca282 423 counter += CODEC_IO_Write(DeviceAddr, 0x08, (Value & 0xFC));
bcostm 0:d83f1c8ca282 424 }
bcostm 0:d83f1c8ca282 425 return counter;
bcostm 0:d83f1c8ca282 426 }
bcostm 0:d83f1c8ca282 427
bcostm 0:d83f1c8ca282 428 /**
bcostm 0:d83f1c8ca282 429 * @brief Switch dynamically (while audio file is played) the output target
bcostm 0:d83f1c8ca282 430 * (speaker, headphone, etc).
bcostm 0:d83f1c8ca282 431 * @note This function is currently not used (only headphone output device).
bcostm 0:d83f1c8ca282 432 * @param DeviceAddr: Device address on communication Bus.
bcostm 0:d83f1c8ca282 433 * @param Output: specifies the audio output device target.
bcostm 0:d83f1c8ca282 434 * @retval 0 if correct communication, else wrong communication
bcostm 0:d83f1c8ca282 435 */
bcostm 0:d83f1c8ca282 436 uint32_t cs42l51_SetOutputMode(uint16_t DeviceAddr, uint8_t Output)
bcostm 0:d83f1c8ca282 437 {
bcostm 0:d83f1c8ca282 438 return 0;
bcostm 0:d83f1c8ca282 439 }
bcostm 0:d83f1c8ca282 440
bcostm 0:d83f1c8ca282 441 /**
bcostm 0:d83f1c8ca282 442 * @brief Reset CS42L51 registers.
bcostm 0:d83f1c8ca282 443 * @param DeviceAddr: Device address on communication Bus.
bcostm 0:d83f1c8ca282 444 * @retval 0 if correct communication, else wrong communication
bcostm 0:d83f1c8ca282 445 */
bcostm 0:d83f1c8ca282 446 uint32_t cs42l51_Reset(uint16_t DeviceAddr)
bcostm 0:d83f1c8ca282 447 {
bcostm 0:d83f1c8ca282 448 if(Is_CS42L51_Initialized == 1)
bcostm 0:d83f1c8ca282 449 {
bcostm 0:d83f1c8ca282 450 /* Deinitialize Audio Codec interface */
bcostm 0:d83f1c8ca282 451 AUDIO_IO_DeInit();
bcostm 0:d83f1c8ca282 452
bcostm 0:d83f1c8ca282 453 /* Initialize the Control interface of the Audio Codec */
bcostm 0:d83f1c8ca282 454 AUDIO_IO_Init();
bcostm 0:d83f1c8ca282 455 }
bcostm 0:d83f1c8ca282 456 return 0;
bcostm 0:d83f1c8ca282 457 }
bcostm 0:d83f1c8ca282 458
bcostm 0:d83f1c8ca282 459 /**
bcostm 0:d83f1c8ca282 460 * @}
bcostm 0:d83f1c8ca282 461 */
bcostm 0:d83f1c8ca282 462
bcostm 0:d83f1c8ca282 463 /** @addtogroup CS42L51_Private_Functions
bcostm 0:d83f1c8ca282 464 * @{
bcostm 0:d83f1c8ca282 465 */
bcostm 0:d83f1c8ca282 466
bcostm 0:d83f1c8ca282 467 /**
bcostm 0:d83f1c8ca282 468 * @brief Write and optionally read back a single data.
bcostm 0:d83f1c8ca282 469 * @param Addr: I2C address
bcostm 0:d83f1c8ca282 470 * @param Reg: Reg address
bcostm 0:d83f1c8ca282 471 * @param Value: Data to be written
bcostm 0:d83f1c8ca282 472 * @retval None
bcostm 0:d83f1c8ca282 473 */
bcostm 0:d83f1c8ca282 474 static uint8_t CODEC_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value)
bcostm 0:d83f1c8ca282 475 {
bcostm 0:d83f1c8ca282 476 uint32_t result = 0;
bcostm 0:d83f1c8ca282 477
bcostm 0:d83f1c8ca282 478 AUDIO_IO_Write(Addr, Reg, Value);
bcostm 0:d83f1c8ca282 479
bcostm 0:d83f1c8ca282 480 #ifdef VERIFY_WRITTENDATA
bcostm 0:d83f1c8ca282 481 /* Verify that the data has been correctly written */
bcostm 0:d83f1c8ca282 482 result = (AUDIO_IO_Read(Addr, Reg) == Value)? 0:1;
bcostm 0:d83f1c8ca282 483 #endif /* VERIFY_WRITTENDATA */
bcostm 0:d83f1c8ca282 484
bcostm 0:d83f1c8ca282 485 return result;
bcostm 0:d83f1c8ca282 486 }
bcostm 0:d83f1c8ca282 487
bcostm 0:d83f1c8ca282 488 /**
bcostm 0:d83f1c8ca282 489 * @}
bcostm 0:d83f1c8ca282 490 */
bcostm 0:d83f1c8ca282 491
bcostm 0:d83f1c8ca282 492 /**
bcostm 0:d83f1c8ca282 493 * @}
bcostm 0:d83f1c8ca282 494 */
bcostm 0:d83f1c8ca282 495
bcostm 0:d83f1c8ca282 496 /**
bcostm 0:d83f1c8ca282 497 * @}
bcostm 0:d83f1c8ca282 498 */
bcostm 0:d83f1c8ca282 499
bcostm 0:d83f1c8ca282 500 /**
bcostm 0:d83f1c8ca282 501 * @}
bcostm 0:d83f1c8ca282 502 */
bcostm 0:d83f1c8ca282 503
bcostm 0:d83f1c8ca282 504 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/