ST / BSP_DISCO_L476VG

STM32L476G-Discovery board drivers V1.0.0

Dependents:   DiscoLogger DISCO_L476VG_GlassLCD DISCO_L476VG_MicrophoneRecorder DISCO_L476VG_UART ... more

Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.h@5:4943b15cce9f, 2019-09-24 (annotated)

Committer:
jeromecoutant
Date:
Tue Sep 24 18:00:58 2019 +0200
Revision:
5:4943b15cce9f
Parent:
1:917af0ca86df 
Update BSP files with CubeL4 V1.14.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Jerome Coutant 1:917af0ca86df 1 /**
Jerome Coutant 1:917af0ca86df 2 ******************************************************************************
Jerome Coutant 1:917af0ca86df 3 * @file mfxstm32l152.h
Jerome Coutant 1:917af0ca86df 4 * @author MCD Application Team
Jerome Coutant 1:917af0ca86df 5 * @brief This file contains all the functions prototypes for the
Jerome Coutant 1:917af0ca86df 6 * mfxstm32l152.c IO expander driver.
Jerome Coutant 1:917af0ca86df 7 ******************************************************************************
Jerome Coutant 1:917af0ca86df 8 * @attention
Jerome Coutant 1:917af0ca86df 9 *
jeromecoutant 5:4943b15cce9f 10 * <h2><center>&copy; Copyright (c) 2015 STMicroelectronics.
jeromecoutant 5:4943b15cce9f 11 * All rights reserved.</center></h2>
Jerome Coutant 1:917af0ca86df 12 *
jeromecoutant 5:4943b15cce9f 13 * This software component is licensed by ST under BSD 3-Clause license,
jeromecoutant 5:4943b15cce9f 14 * the "License"; You may not use this file except in compliance with the
jeromecoutant 5:4943b15cce9f 15 * License. You may obtain a copy of the License at:
jeromecoutant 5:4943b15cce9f 16 * opensource.org/licenses/BSD-3-Clause
Jerome Coutant 1:917af0ca86df 17 *
Jerome Coutant 1:917af0ca86df 18 ******************************************************************************
jeromecoutant 5:4943b15cce9f 19 */
Jerome Coutant 1:917af0ca86df 20
Jerome Coutant 1:917af0ca86df 21 /* Define to prevent recursive inclusion -------------------------------------*/
Jerome Coutant 1:917af0ca86df 22 #ifndef __MFXSTM32L152_H
Jerome Coutant 1:917af0ca86df 23 #define __MFXSTM32L152_H
Jerome Coutant 1:917af0ca86df 24
Jerome Coutant 1:917af0ca86df 25 #ifdef __cplusplus
Jerome Coutant 1:917af0ca86df 26 extern "C" {
jeromecoutant 5:4943b15cce9f 27 #endif
jeromecoutant 5:4943b15cce9f 28
Jerome Coutant 1:917af0ca86df 29 /* Includes ------------------------------------------------------------------*/
Jerome Coutant 1:917af0ca86df 30 #include "../Common/ts.h"
Jerome Coutant 1:917af0ca86df 31 #include "../Common/io.h"
Jerome Coutant 1:917af0ca86df 32 #include "../Common/idd.h"
Jerome Coutant 1:917af0ca86df 33
Jerome Coutant 1:917af0ca86df 34 /** @addtogroup BSP
Jerome Coutant 1:917af0ca86df 35 * @{
jeromecoutant 5:4943b15cce9f 36 */
Jerome Coutant 1:917af0ca86df 37
Jerome Coutant 1:917af0ca86df 38 /** @addtogroup Component
Jerome Coutant 1:917af0ca86df 39 * @{
Jerome Coutant 1:917af0ca86df 40 */
jeromecoutant 5:4943b15cce9f 41
Jerome Coutant 1:917af0ca86df 42 /** @defgroup MFXSTM32L152
Jerome Coutant 1:917af0ca86df 43 * @{
jeromecoutant 5:4943b15cce9f 44 */
Jerome Coutant 1:917af0ca86df 45
Jerome Coutant 1:917af0ca86df 46 /* Exported types ------------------------------------------------------------*/
Jerome Coutant 1:917af0ca86df 47
Jerome Coutant 1:917af0ca86df 48 /** @defgroup MFXSTM32L152_Exported_Types
Jerome Coutant 1:917af0ca86df 49 * @{
jeromecoutant 5:4943b15cce9f 50 */
Jerome Coutant 1:917af0ca86df 51 typedef struct
Jerome Coutant 1:917af0ca86df 52 {
Jerome Coutant 1:917af0ca86df 53 uint8_t SYS_CTRL;
Jerome Coutant 1:917af0ca86df 54 uint8_t ERROR_SRC;
Jerome Coutant 1:917af0ca86df 55 uint8_t ERROR_MSG;
Jerome Coutant 1:917af0ca86df 56 uint8_t IRQ_OUT;
Jerome Coutant 1:917af0ca86df 57 uint8_t IRQ_SRC_EN;
Jerome Coutant 1:917af0ca86df 58 uint8_t IRQ_PENDING;
Jerome Coutant 1:917af0ca86df 59 uint8_t IDD_CTRL;
Jerome Coutant 1:917af0ca86df 60 uint8_t IDD_PRE_DELAY;
Jerome Coutant 1:917af0ca86df 61 uint8_t IDD_SHUNT0_MSB;
Jerome Coutant 1:917af0ca86df 62 uint8_t IDD_SHUNT0_LSB;
Jerome Coutant 1:917af0ca86df 63 uint8_t IDD_SHUNT1_MSB;
Jerome Coutant 1:917af0ca86df 64 uint8_t IDD_SHUNT1_LSB;
Jerome Coutant 1:917af0ca86df 65 uint8_t IDD_SHUNT2_MSB;
Jerome Coutant 1:917af0ca86df 66 uint8_t IDD_SHUNT2_LSB;
Jerome Coutant 1:917af0ca86df 67 uint8_t IDD_SHUNT3_MSB;
Jerome Coutant 1:917af0ca86df 68 uint8_t IDD_SHUNT3_LSB;
Jerome Coutant 1:917af0ca86df 69 uint8_t IDD_SHUNT4_MSB;
Jerome Coutant 1:917af0ca86df 70 uint8_t IDD_SHUNT4_LSB;
Jerome Coutant 1:917af0ca86df 71 uint8_t IDD_GAIN_MSB;
Jerome Coutant 1:917af0ca86df 72 uint8_t IDD_GAIN_LSB;
Jerome Coutant 1:917af0ca86df 73 uint8_t IDD_VDD_MIN_MSB;
Jerome Coutant 1:917af0ca86df 74 uint8_t IDD_VDD_MIN_LSB;
Jerome Coutant 1:917af0ca86df 75 uint8_t IDD_VALUE_MSB;
Jerome Coutant 1:917af0ca86df 76 uint8_t IDD_VALUE_MID;
Jerome Coutant 1:917af0ca86df 77 uint8_t IDD_VALUE_LSB;
Jerome Coutant 1:917af0ca86df 78 uint8_t IDD_CAL_OFFSET_MSB;
Jerome Coutant 1:917af0ca86df 79 uint8_t IDD_CAL_OFFSET_LSB;
Jerome Coutant 1:917af0ca86df 80 uint8_t IDD_SHUNT_USED;
Jerome Coutant 1:917af0ca86df 81 }IDD_dbgTypeDef;
Jerome Coutant 1:917af0ca86df 82
Jerome Coutant 1:917af0ca86df 83 /**
Jerome Coutant 1:917af0ca86df 84 * @}
Jerome Coutant 1:917af0ca86df 85 */
Jerome Coutant 1:917af0ca86df 86
Jerome Coutant 1:917af0ca86df 87 /* Exported constants --------------------------------------------------------*/
jeromecoutant 5:4943b15cce9f 88
Jerome Coutant 1:917af0ca86df 89 /** @defgroup MFXSTM32L152_Exported_Constants
Jerome Coutant 1:917af0ca86df 90 * @{
jeromecoutant 5:4943b15cce9f 91 */
Jerome Coutant 1:917af0ca86df 92
Jerome Coutant 1:917af0ca86df 93 /**
Jerome Coutant 1:917af0ca86df 94 * @brief MFX COMMON defines
Jerome Coutant 1:917af0ca86df 95 */
jeromecoutant 5:4943b15cce9f 96
Jerome Coutant 1:917af0ca86df 97 /**
Jerome Coutant 1:917af0ca86df 98 * @brief Register address: chip IDs (R)
Jerome Coutant 1:917af0ca86df 99 */
Jerome Coutant 1:917af0ca86df 100 #define MFXSTM32L152_REG_ADR_ID ((uint8_t)0x00)
Jerome Coutant 1:917af0ca86df 101 /**
Jerome Coutant 1:917af0ca86df 102 * @brief Register address: chip FW_VERSION (R)
Jerome Coutant 1:917af0ca86df 103 */
Jerome Coutant 1:917af0ca86df 104 #define MFXSTM32L152_REG_ADR_FW_VERSION_MSB ((uint8_t)0x01)
Jerome Coutant 1:917af0ca86df 105 #define MFXSTM32L152_REG_ADR_FW_VERSION_LSB ((uint8_t)0x00)
Jerome Coutant 1:917af0ca86df 106 /**
Jerome Coutant 1:917af0ca86df 107 * @brief Register address: System Control Register (R/W)
Jerome Coutant 1:917af0ca86df 108 */
Jerome Coutant 1:917af0ca86df 109 #define MFXSTM32L152_REG_ADR_SYS_CTRL ((uint8_t)0x40)
Jerome Coutant 1:917af0ca86df 110 /**
Jerome Coutant 1:917af0ca86df 111 * @brief Register address: Vdd monitoring (R)
Jerome Coutant 1:917af0ca86df 112 */
Jerome Coutant 1:917af0ca86df 113 #define MFXSTM32L152_REG_ADR_VDD_REF_MSB ((uint8_t)0x06)
Jerome Coutant 1:917af0ca86df 114 #define MFXSTM32L152_REG_ADR_VDD_REF_LSB ((uint8_t)0x07)
Jerome Coutant 1:917af0ca86df 115 /**
Jerome Coutant 1:917af0ca86df 116 * @brief Register address: Error source
Jerome Coutant 1:917af0ca86df 117 */
Jerome Coutant 1:917af0ca86df 118 #define MFXSTM32L152_REG_ADR_ERROR_SRC ((uint8_t)0x03)
Jerome Coutant 1:917af0ca86df 119 /**
Jerome Coutant 1:917af0ca86df 120 * @brief Register address: Error Message
Jerome Coutant 1:917af0ca86df 121 */
Jerome Coutant 1:917af0ca86df 122 #define MFXSTM32L152_REG_ADR_ERROR_MSG ((uint8_t)0x04)
Jerome Coutant 1:917af0ca86df 123
Jerome Coutant 1:917af0ca86df 124 /**
Jerome Coutant 1:917af0ca86df 125 * @brief Reg Addr IRQs: to config the pin that informs Main MCU that MFX events appear
Jerome Coutant 1:917af0ca86df 126 */
Jerome Coutant 1:917af0ca86df 127 #define MFXSTM32L152_REG_ADR_MFX_IRQ_OUT ((uint8_t)0x41)
Jerome Coutant 1:917af0ca86df 128 /**
Jerome Coutant 1:917af0ca86df 129 * @brief Reg Addr IRQs: to select the events which activate the MFXSTM32L152_IRQ_OUT signal
Jerome Coutant 1:917af0ca86df 130 */
Jerome Coutant 1:917af0ca86df 131 #define MFXSTM32L152_REG_ADR_IRQ_SRC_EN ((uint8_t)0x42)
Jerome Coutant 1:917af0ca86df 132 /**
Jerome Coutant 1:917af0ca86df 133 * @brief Reg Addr IRQs: the Main MCU must read the IRQ_PENDING register to know the interrupt reason
Jerome Coutant 1:917af0ca86df 134 */
Jerome Coutant 1:917af0ca86df 135 #define MFXSTM32L152_REG_ADR_IRQ_PENDING ((uint8_t)0x08)
Jerome Coutant 1:917af0ca86df 136 /**
Jerome Coutant 1:917af0ca86df 137 * @brief Reg Addr IRQs: the Main MCU must acknowledge it thanks to a writing access to the IRQ_ACK register
Jerome Coutant 1:917af0ca86df 138 */
Jerome Coutant 1:917af0ca86df 139 #define MFXSTM32L152_REG_ADR_IRQ_ACK ((uint8_t)0x44)
jeromecoutant 5:4943b15cce9f 140
Jerome Coutant 1:917af0ca86df 141 /**
Jerome Coutant 1:917af0ca86df 142 * @brief MFXSTM32L152_REG_ADR_ID choices
Jerome Coutant 1:917af0ca86df 143 */
Jerome Coutant 1:917af0ca86df 144 #define MFXSTM32L152_ID_1 ((uint8_t)0x7B)
Jerome Coutant 1:917af0ca86df 145 #define MFXSTM32L152_ID_2 ((uint8_t)0x79)
jeromecoutant 5:4943b15cce9f 146
Jerome Coutant 1:917af0ca86df 147 /**
Jerome Coutant 1:917af0ca86df 148 * @brief MFXSTM32L152_REG_ADR_SYS_CTRL choices
Jerome Coutant 1:917af0ca86df 149 */
Jerome Coutant 1:917af0ca86df 150 #define MFXSTM32L152_SWRST ((uint8_t)0x80)
Jerome Coutant 1:917af0ca86df 151 #define MFXSTM32L152_STANDBY ((uint8_t)0x40)
Jerome Coutant 1:917af0ca86df 152 #define MFXSTM32L152_ALTERNATE_GPIO_EN ((uint8_t)0x08) /* by the way if IDD and TS are enabled they take automatically the AF pins*/
Jerome Coutant 1:917af0ca86df 153 #define MFXSTM32L152_IDD_EN ((uint8_t)0x04)
Jerome Coutant 1:917af0ca86df 154 #define MFXSTM32L152_TS_EN ((uint8_t)0x02)
Jerome Coutant 1:917af0ca86df 155 #define MFXSTM32L152_GPIO_EN ((uint8_t)0x01)
Jerome Coutant 1:917af0ca86df 156
Jerome Coutant 1:917af0ca86df 157 /**
Jerome Coutant 1:917af0ca86df 158 * @brief MFXSTM32L152_REG_ADR_ERROR_SRC choices
Jerome Coutant 1:917af0ca86df 159 */
Jerome Coutant 1:917af0ca86df 160 #define MFXSTM32L152_IDD_ERROR_SRC ((uint8_t)0x04) /* Error raised by Idd */
Jerome Coutant 1:917af0ca86df 161 #define MFXSTM32L152_TS_ERROR_SRC ((uint8_t)0x02) /* Error raised by Touch Screen */
Jerome Coutant 1:917af0ca86df 162 #define MFXSTM32L152_GPIO_ERROR_SRC ((uint8_t)0x01) /* Error raised by Gpio */
Jerome Coutant 1:917af0ca86df 163
Jerome Coutant 1:917af0ca86df 164 /**
Jerome Coutant 1:917af0ca86df 165 * @brief MFXSTM32L152_REG_ADR_MFX_IRQ_OUT choices
Jerome Coutant 1:917af0ca86df 166 */
Jerome Coutant 1:917af0ca86df 167 #define MFXSTM32L152_OUT_PIN_TYPE_OPENDRAIN ((uint8_t)0x00)
Jerome Coutant 1:917af0ca86df 168 #define MFXSTM32L152_OUT_PIN_TYPE_PUSHPULL ((uint8_t)0x01)
Jerome Coutant 1:917af0ca86df 169 #define MFXSTM32L152_OUT_PIN_POLARITY_LOW ((uint8_t)0x00)
Jerome Coutant 1:917af0ca86df 170 #define MFXSTM32L152_OUT_PIN_POLARITY_HIGH ((uint8_t)0x02)
Jerome Coutant 1:917af0ca86df 171
Jerome Coutant 1:917af0ca86df 172 /**
Jerome Coutant 1:917af0ca86df 173 * @brief REG_ADR_IRQ_SRC_EN, REG_ADR_IRQ_PENDING & REG_ADR_IRQ_ACK choices
Jerome Coutant 1:917af0ca86df 174 */
Jerome Coutant 1:917af0ca86df 175 #define MFXSTM32L152_IRQ_TS_OVF ((uint8_t)0x80) /* TouchScreen FIFO Overflow irq*/
Jerome Coutant 1:917af0ca86df 176 #define MFXSTM32L152_IRQ_TS_FULL ((uint8_t)0x40) /* TouchScreen FIFO Full irq*/
Jerome Coutant 1:917af0ca86df 177 #define MFXSTM32L152_IRQ_TS_TH ((uint8_t)0x20) /* TouchScreen FIFO threshold triggered irq*/
Jerome Coutant 1:917af0ca86df 178 #define MFXSTM32L152_IRQ_TS_NE ((uint8_t)0x10) /* TouchScreen FIFO Not Empty irq*/
Jerome Coutant 1:917af0ca86df 179 #define MFXSTM32L152_IRQ_TS_DET ((uint8_t)0x08) /* TouchScreen Detect irq*/
Jerome Coutant 1:917af0ca86df 180 #define MFXSTM32L152_IRQ_ERROR ((uint8_t)0x04) /* Error message from MFXSTM32L152 firmware irq */
Jerome Coutant 1:917af0ca86df 181 #define MFXSTM32L152_IRQ_IDD ((uint8_t)0x02) /* IDD function irq */
Jerome Coutant 1:917af0ca86df 182 #define MFXSTM32L152_IRQ_GPIO ((uint8_t)0x01) /* General GPIO irq (only for SRC_EN and PENDING) */
Jerome Coutant 1:917af0ca86df 183 #define MFXSTM32L152_IRQ_ALL ((uint8_t)0xFF) /* All global interrupts */
jeromecoutant 5:4943b15cce9f 184 #define MFXSTM32L152_IRQ_TS (MFXSTM32L152_IRQ_TS_DET | MFXSTM32L152_IRQ_TS_NE | MFXSTM32L152_IRQ_TS_TH | MFXSTM32L152_IRQ_TS_FULL | MFXSTM32L152_IRQ_TS_OVF )
Jerome Coutant 1:917af0ca86df 185
jeromecoutant 5:4943b15cce9f 186
Jerome Coutant 1:917af0ca86df 187 /**
Jerome Coutant 1:917af0ca86df 188 * @brief GPIO: 24 programmable input/output called MFXSTM32L152_GPIO[23:0] are provided
Jerome Coutant 1:917af0ca86df 189 */
Jerome Coutant 1:917af0ca86df 190
Jerome Coutant 1:917af0ca86df 191 /**
Jerome Coutant 1:917af0ca86df 192 * @brief Reg addr: GPIO DIRECTION (R/W): GPIO pins direction: (0) input, (1) output.
Jerome Coutant 1:917af0ca86df 193 */
Jerome Coutant 1:917af0ca86df 194 #define MFXSTM32L152_REG_ADR_GPIO_DIR1 ((uint8_t)0x60) /* gpio [0:7] */
Jerome Coutant 1:917af0ca86df 195 #define MFXSTM32L152_REG_ADR_GPIO_DIR2 ((uint8_t)0x61) /* gpio [8:15] */
Jerome Coutant 1:917af0ca86df 196 #define MFXSTM32L152_REG_ADR_GPIO_DIR3 ((uint8_t)0x62) /* agpio [0:7] */
Jerome Coutant 1:917af0ca86df 197 /**
Jerome Coutant 1:917af0ca86df 198 * @brief Reg addr: GPIO TYPE (R/W): If GPIO in output: (0) output push pull, (1) output open drain.
Jerome Coutant 1:917af0ca86df 199 * If GPIO in input: (0) input without pull resistor, (1) input with pull resistor.
Jerome Coutant 1:917af0ca86df 200 */
Jerome Coutant 1:917af0ca86df 201 #define MFXSTM32L152_REG_ADR_GPIO_TYPE1 ((uint8_t)0x64) /* gpio [0:7] */
Jerome Coutant 1:917af0ca86df 202 #define MFXSTM32L152_REG_ADR_GPIO_TYPE2 ((uint8_t)0x65) /* gpio [8:15] */
Jerome Coutant 1:917af0ca86df 203 #define MFXSTM32L152_REG_ADR_GPIO_TYPE3 ((uint8_t)0x66) /* agpio [0:7] */
Jerome Coutant 1:917af0ca86df 204 /**
Jerome Coutant 1:917af0ca86df 205 * @brief Reg addr: GPIO PULL_UP_PULL_DOWN (R/W): discussion open with Jean Claude
Jerome Coutant 1:917af0ca86df 206 */
Jerome Coutant 1:917af0ca86df 207 #define MFXSTM32L152_REG_ADR_GPIO_PUPD1 ((uint8_t)0x68) /* gpio [0:7] */
Jerome Coutant 1:917af0ca86df 208 #define MFXSTM32L152_REG_ADR_GPIO_PUPD2 ((uint8_t)0x69) /* gpio [8:15] */
Jerome Coutant 1:917af0ca86df 209 #define MFXSTM32L152_REG_ADR_GPIO_PUPD3 ((uint8_t)0x6A) /* agpio [0:7] */
Jerome Coutant 1:917af0ca86df 210 /**
Jerome Coutant 1:917af0ca86df 211 * @brief Reg addr: GPIO SET (W): When GPIO is in output mode, write (1) puts the corresponding GPO in High level.
Jerome Coutant 1:917af0ca86df 212 */
Jerome Coutant 1:917af0ca86df 213 #define MFXSTM32L152_REG_ADR_GPO_SET1 ((uint8_t)0x6C) /* gpio [0:7] */
Jerome Coutant 1:917af0ca86df 214 #define MFXSTM32L152_REG_ADR_GPO_SET2 ((uint8_t)0x6D) /* gpio [8:15] */
Jerome Coutant 1:917af0ca86df 215 #define MFXSTM32L152_REG_ADR_GPO_SET3 ((uint8_t)0x6E) /* agpio [0:7] */
Jerome Coutant 1:917af0ca86df 216 /**
Jerome Coutant 1:917af0ca86df 217 * @brief Reg addr: GPIO CLEAR (W): When GPIO is in output mode, write (1) puts the corresponding GPO in Low level.
Jerome Coutant 1:917af0ca86df 218 */
Jerome Coutant 1:917af0ca86df 219 #define MFXSTM32L152_REG_ADR_GPO_CLR1 ((uint8_t)0x70) /* gpio [0:7] */
Jerome Coutant 1:917af0ca86df 220 #define MFXSTM32L152_REG_ADR_GPO_CLR2 ((uint8_t)0x71) /* gpio [8:15] */
Jerome Coutant 1:917af0ca86df 221 #define MFXSTM32L152_REG_ADR_GPO_CLR3 ((uint8_t)0x72) /* agpio [0:7] */
Jerome Coutant 1:917af0ca86df 222 /**
Jerome Coutant 1:917af0ca86df 223 * @brief Reg addr: GPIO STATE (R): Give state of the GPIO pin.
Jerome Coutant 1:917af0ca86df 224 */
Jerome Coutant 1:917af0ca86df 225 #define MFXSTM32L152_REG_ADR_GPIO_STATE1 ((uint8_t)0x10) /* gpio [0:7] */
Jerome Coutant 1:917af0ca86df 226 #define MFXSTM32L152_REG_ADR_GPIO_STATE2 ((uint8_t)0x11) /* gpio [8:15] */
Jerome Coutant 1:917af0ca86df 227 #define MFXSTM32L152_REG_ADR_GPIO_STATE3 ((uint8_t)0x12) /* agpio [0:7] */
Jerome Coutant 1:917af0ca86df 228
Jerome Coutant 1:917af0ca86df 229 /**
Jerome Coutant 1:917af0ca86df 230 * @brief GPIO IRQ_GPIs
Jerome Coutant 1:917af0ca86df 231 */
Jerome Coutant 1:917af0ca86df 232 /* GPIOs can INDIVIDUALLY generate interruption to the Main MCU thanks to the MFXSTM32L152_IRQ_OUT signal */
Jerome Coutant 1:917af0ca86df 233 /* the general MFXSTM32L152_IRQ_GPIO_SRC_EN shall be enabled too */
Jerome Coutant 1:917af0ca86df 234 /**
Jerome Coutant 1:917af0ca86df 235 * @brief GPIO IRQ_GPI_SRC1/2/3 (R/W): registers enable or not the feature to generate irq
Jerome Coutant 1:917af0ca86df 236 */
Jerome Coutant 1:917af0ca86df 237 #define MFXSTM32L152_REG_ADR_IRQ_GPI_SRC1 ((uint8_t)0x48) /* gpio [0:7] */
Jerome Coutant 1:917af0ca86df 238 #define MFXSTM32L152_REG_ADR_IRQ_GPI_SRC2 ((uint8_t)0x49) /* gpio [8:15] */
Jerome Coutant 1:917af0ca86df 239 #define MFXSTM32L152_REG_ADR_IRQ_GPI_SRC3 ((uint8_t)0x4A) /* agpio [0:7] */
Jerome Coutant 1:917af0ca86df 240 /**
Jerome Coutant 1:917af0ca86df 241 * @brief GPIO IRQ_GPI_EVT1/2/3 (R/W): Irq generated on level (0) or edge (1).
Jerome Coutant 1:917af0ca86df 242 */
Jerome Coutant 1:917af0ca86df 243 #define MFXSTM32L152_REG_ADR_IRQ_GPI_EVT1 ((uint8_t)0x4C) /* gpio [0:7] */
Jerome Coutant 1:917af0ca86df 244 #define MFXSTM32L152_REG_ADR_IRQ_GPI_EVT2 ((uint8_t)0x4D) /* gpio [8:15] */
Jerome Coutant 1:917af0ca86df 245 #define MFXSTM32L152_REG_ADR_IRQ_GPI_EVT3 ((uint8_t)0x4E) /* agpio [0:7] */
Jerome Coutant 1:917af0ca86df 246 /**
Jerome Coutant 1:917af0ca86df 247 * @brief GPIO IRQ_GPI_TYPE1/2/3 (R/W): Irq generated on (0) : Low level or Falling edge. (1) : High level or Rising edge.
Jerome Coutant 1:917af0ca86df 248 */
Jerome Coutant 1:917af0ca86df 249 #define MFXSTM32L152_REG_ADR_IRQ_GPI_TYPE1 ((uint8_t)0x50) /* gpio [0:7] */
Jerome Coutant 1:917af0ca86df 250 #define MFXSTM32L152_REG_ADR_IRQ_GPI_TYPE2 ((uint8_t)0x51) /* gpio [8:15] */
Jerome Coutant 1:917af0ca86df 251 #define MFXSTM32L152_REG_ADR_IRQ_GPI_TYPE3 ((uint8_t)0x52) /* agpio [0:7] */
Jerome Coutant 1:917af0ca86df 252 /**
Jerome Coutant 1:917af0ca86df 253 * @brief GPIO IRQ_GPI_PENDING1/2/3 (R): irq occurs
Jerome Coutant 1:917af0ca86df 254 */
Jerome Coutant 1:917af0ca86df 255 #define MFXSTM32L152_REG_ADR_IRQ_GPI_PENDING1 ((uint8_t)0x0C) /* gpio [0:7] */
Jerome Coutant 1:917af0ca86df 256 #define MFXSTM32L152_REG_ADR_IRQ_GPI_PENDING2 ((uint8_t)0x0D) /* gpio [8:15] */
Jerome Coutant 1:917af0ca86df 257 #define MFXSTM32L152_REG_ADR_IRQ_GPI_PENDING3 ((uint8_t)0x0E) /* agpio [0:7] */
Jerome Coutant 1:917af0ca86df 258 /**
Jerome Coutant 1:917af0ca86df 259 * @brief GPIO IRQ_GPI_ACK1/2/3 (W): Write (1) to acknowledge IRQ event
Jerome Coutant 1:917af0ca86df 260 */
Jerome Coutant 1:917af0ca86df 261 #define MFXSTM32L152_REG_ADR_IRQ_GPI_ACK1 ((uint8_t)0x54) /* gpio [0:7] */
Jerome Coutant 1:917af0ca86df 262 #define MFXSTM32L152_REG_ADR_IRQ_GPI_ACK2 ((uint8_t)0x55) /* gpio [8:15] */
Jerome Coutant 1:917af0ca86df 263 #define MFXSTM32L152_REG_ADR_IRQ_GPI_ACK3 ((uint8_t)0x56) /* agpio [0:7] */
Jerome Coutant 1:917af0ca86df 264
jeromecoutant 5:4943b15cce9f 265
Jerome Coutant 1:917af0ca86df 266 /**
Jerome Coutant 1:917af0ca86df 267 * @brief GPIO: IO Pins definition
Jerome Coutant 1:917af0ca86df 268 */
Jerome Coutant 1:917af0ca86df 269 #define MFXSTM32L152_GPIO_PIN_0 ((uint32_t)0x0001)
Jerome Coutant 1:917af0ca86df 270 #define MFXSTM32L152_GPIO_PIN_1 ((uint32_t)0x0002)
Jerome Coutant 1:917af0ca86df 271 #define MFXSTM32L152_GPIO_PIN_2 ((uint32_t)0x0004)
Jerome Coutant 1:917af0ca86df 272 #define MFXSTM32L152_GPIO_PIN_3 ((uint32_t)0x0008)
Jerome Coutant 1:917af0ca86df 273 #define MFXSTM32L152_GPIO_PIN_4 ((uint32_t)0x0010)
Jerome Coutant 1:917af0ca86df 274 #define MFXSTM32L152_GPIO_PIN_5 ((uint32_t)0x0020)
Jerome Coutant 1:917af0ca86df 275 #define MFXSTM32L152_GPIO_PIN_6 ((uint32_t)0x0040)
Jerome Coutant 1:917af0ca86df 276 #define MFXSTM32L152_GPIO_PIN_7 ((uint32_t)0x0080)
Jerome Coutant 1:917af0ca86df 277
jeromecoutant 5:4943b15cce9f 278 #define MFXSTM32L152_GPIO_PIN_8 ((uint32_t)0x0100)
jeromecoutant 5:4943b15cce9f 279 #define MFXSTM32L152_GPIO_PIN_9 ((uint32_t)0x0200)
jeromecoutant 5:4943b15cce9f 280 #define MFXSTM32L152_GPIO_PIN_10 ((uint32_t)0x0400)
Jerome Coutant 1:917af0ca86df 281 #define MFXSTM32L152_GPIO_PIN_11 ((uint32_t)0x0800)
jeromecoutant 5:4943b15cce9f 282 #define MFXSTM32L152_GPIO_PIN_12 ((uint32_t)0x1000)
jeromecoutant 5:4943b15cce9f 283 #define MFXSTM32L152_GPIO_PIN_13 ((uint32_t)0x2000)
jeromecoutant 5:4943b15cce9f 284 #define MFXSTM32L152_GPIO_PIN_14 ((uint32_t)0x4000)
jeromecoutant 5:4943b15cce9f 285 #define MFXSTM32L152_GPIO_PIN_15 ((uint32_t)0x8000)
Jerome Coutant 1:917af0ca86df 286
Jerome Coutant 1:917af0ca86df 287 #define MFXSTM32L152_GPIO_PIN_16 ((uint32_t)0x010000)
Jerome Coutant 1:917af0ca86df 288 #define MFXSTM32L152_GPIO_PIN_17 ((uint32_t)0x020000)
Jerome Coutant 1:917af0ca86df 289 #define MFXSTM32L152_GPIO_PIN_18 ((uint32_t)0x040000)
Jerome Coutant 1:917af0ca86df 290 #define MFXSTM32L152_GPIO_PIN_19 ((uint32_t)0x080000)
Jerome Coutant 1:917af0ca86df 291 #define MFXSTM32L152_GPIO_PIN_20 ((uint32_t)0x100000)
Jerome Coutant 1:917af0ca86df 292 #define MFXSTM32L152_GPIO_PIN_21 ((uint32_t)0x200000)
Jerome Coutant 1:917af0ca86df 293 #define MFXSTM32L152_GPIO_PIN_22 ((uint32_t)0x400000)
Jerome Coutant 1:917af0ca86df 294 #define MFXSTM32L152_GPIO_PIN_23 ((uint32_t)0x800000)
Jerome Coutant 1:917af0ca86df 295
Jerome Coutant 1:917af0ca86df 296 #define MFXSTM32L152_AGPIO_PIN_0 MFXSTM32L152_GPIO_PIN_16
Jerome Coutant 1:917af0ca86df 297 #define MFXSTM32L152_AGPIO_PIN_1 MFXSTM32L152_GPIO_PIN_17
Jerome Coutant 1:917af0ca86df 298 #define MFXSTM32L152_AGPIO_PIN_2 MFXSTM32L152_GPIO_PIN_18
Jerome Coutant 1:917af0ca86df 299 #define MFXSTM32L152_AGPIO_PIN_3 MFXSTM32L152_GPIO_PIN_19
Jerome Coutant 1:917af0ca86df 300 #define MFXSTM32L152_AGPIO_PIN_4 MFXSTM32L152_GPIO_PIN_20
Jerome Coutant 1:917af0ca86df 301 #define MFXSTM32L152_AGPIO_PIN_5 MFXSTM32L152_GPIO_PIN_21
Jerome Coutant 1:917af0ca86df 302 #define MFXSTM32L152_AGPIO_PIN_6 MFXSTM32L152_GPIO_PIN_22
Jerome Coutant 1:917af0ca86df 303 #define MFXSTM32L152_AGPIO_PIN_7 MFXSTM32L152_GPIO_PIN_23
Jerome Coutant 1:917af0ca86df 304
Jerome Coutant 1:917af0ca86df 305 #define MFXSTM32L152_GPIO_PINS_ALL ((uint32_t)0xFFFFFF)
Jerome Coutant 1:917af0ca86df 306
Jerome Coutant 1:917af0ca86df 307 /**
Jerome Coutant 1:917af0ca86df 308 * @brief GPIO: constant
Jerome Coutant 1:917af0ca86df 309 */
jeromecoutant 5:4943b15cce9f 310 #define MFXSTM32L152_GPIO_DIR_IN ((uint8_t)0x0)
jeromecoutant 5:4943b15cce9f 311 #define MFXSTM32L152_GPIO_DIR_OUT ((uint8_t)0x1)
jeromecoutant 5:4943b15cce9f 312 #define MFXSTM32L152_IRQ_GPI_EVT_LEVEL ((uint8_t)0x0)
jeromecoutant 5:4943b15cce9f 313 #define MFXSTM32L152_IRQ_GPI_EVT_EDGE ((uint8_t)0x1)
Jerome Coutant 1:917af0ca86df 314 #define MFXSTM32L152_IRQ_GPI_TYPE_LLFE ((uint8_t)0x0) /* Low Level Falling Edge */
Jerome Coutant 1:917af0ca86df 315 #define MFXSTM32L152_IRQ_GPI_TYPE_HLRE ((uint8_t)0x1) /*High Level Raising Edge */
jeromecoutant 5:4943b15cce9f 316 #define MFXSTM32L152_GPI_WITHOUT_PULL_RESISTOR ((uint8_t)0x0)
jeromecoutant 5:4943b15cce9f 317 #define MFXSTM32L152_GPI_WITH_PULL_RESISTOR ((uint8_t)0x1)
jeromecoutant 5:4943b15cce9f 318 #define MFXSTM32L152_GPO_PUSH_PULL ((uint8_t)0x0)
jeromecoutant 5:4943b15cce9f 319 #define MFXSTM32L152_GPO_OPEN_DRAIN ((uint8_t)0x1)
jeromecoutant 5:4943b15cce9f 320 #define MFXSTM32L152_GPIO_PULL_DOWN ((uint8_t)0x0)
jeromecoutant 5:4943b15cce9f 321 #define MFXSTM32L152_GPIO_PULL_UP ((uint8_t)0x1)
jeromecoutant 5:4943b15cce9f 322
jeromecoutant 5:4943b15cce9f 323
Jerome Coutant 1:917af0ca86df 324 /**
Jerome Coutant 1:917af0ca86df 325 * @brief TOUCH SCREEN Registers
Jerome Coutant 1:917af0ca86df 326 */
Jerome Coutant 1:917af0ca86df 327
Jerome Coutant 1:917af0ca86df 328 /**
Jerome Coutant 1:917af0ca86df 329 * @brief Touch Screen Registers
Jerome Coutant 1:917af0ca86df 330 */
Jerome Coutant 1:917af0ca86df 331 #define MFXSTM32L152_TS_SETTLING ((uint8_t)0xA0)
Jerome Coutant 1:917af0ca86df 332 #define MFXSTM32L152_TS_TOUCH_DET_DELAY ((uint8_t)0xA1)
Jerome Coutant 1:917af0ca86df 333 #define MFXSTM32L152_TS_AVE ((uint8_t)0xA2)
Jerome Coutant 1:917af0ca86df 334 #define MFXSTM32L152_TS_TRACK ((uint8_t)0xA3)
Jerome Coutant 1:917af0ca86df 335 #define MFXSTM32L152_TS_FIFO_TH ((uint8_t)0xA4)
Jerome Coutant 1:917af0ca86df 336 #define MFXSTM32L152_TS_FIFO_STA ((uint8_t)0x20)
Jerome Coutant 1:917af0ca86df 337 #define MFXSTM32L152_TS_FIFO_LEVEL ((uint8_t)0x21)
Jerome Coutant 1:917af0ca86df 338 #define MFXSTM32L152_TS_XY_DATA ((uint8_t)0x24)
Jerome Coutant 1:917af0ca86df 339
Jerome Coutant 1:917af0ca86df 340 /**
Jerome Coutant 1:917af0ca86df 341 * @brief TS registers masks
Jerome Coutant 1:917af0ca86df 342 */
Jerome Coutant 1:917af0ca86df 343 #define MFXSTM32L152_TS_CTRL_STATUS ((uint8_t)0x08)
Jerome Coutant 1:917af0ca86df 344 #define MFXSTM32L152_TS_CLEAR_FIFO ((uint8_t)0x80)
Jerome Coutant 1:917af0ca86df 345
Jerome Coutant 1:917af0ca86df 346
Jerome Coutant 1:917af0ca86df 347 /**
Jerome Coutant 1:917af0ca86df 348 * @brief Register address: Idd control register (R/W)
Jerome Coutant 1:917af0ca86df 349 */
Jerome Coutant 1:917af0ca86df 350 #define MFXSTM32L152_REG_ADR_IDD_CTRL ((uint8_t)0x80)
Jerome Coutant 1:917af0ca86df 351
Jerome Coutant 1:917af0ca86df 352 /**
Jerome Coutant 1:917af0ca86df 353 * @brief Register address: Idd pre delay register (R/W)
Jerome Coutant 1:917af0ca86df 354 */
Jerome Coutant 1:917af0ca86df 355 #define MFXSTM32L152_REG_ADR_IDD_PRE_DELAY ((uint8_t)0x81)
Jerome Coutant 1:917af0ca86df 356
Jerome Coutant 1:917af0ca86df 357 /**
Jerome Coutant 1:917af0ca86df 358 * @brief Register address: Idd Shunt registers (R/W)
Jerome Coutant 1:917af0ca86df 359 */
Jerome Coutant 1:917af0ca86df 360 #define MFXSTM32L152_REG_ADR_IDD_SHUNT0_MSB ((uint8_t)0x82)
Jerome Coutant 1:917af0ca86df 361 #define MFXSTM32L152_REG_ADR_IDD_SHUNT0_LSB ((uint8_t)0x83)
Jerome Coutant 1:917af0ca86df 362 #define MFXSTM32L152_REG_ADR_IDD_SHUNT1_MSB ((uint8_t)0x84)
Jerome Coutant 1:917af0ca86df 363 #define MFXSTM32L152_REG_ADR_IDD_SHUNT1_LSB ((uint8_t)0x85)
Jerome Coutant 1:917af0ca86df 364 #define MFXSTM32L152_REG_ADR_IDD_SHUNT2_MSB ((uint8_t)0x86)
Jerome Coutant 1:917af0ca86df 365 #define MFXSTM32L152_REG_ADR_IDD_SHUNT2_LSB ((uint8_t)0x87)
Jerome Coutant 1:917af0ca86df 366 #define MFXSTM32L152_REG_ADR_IDD_SHUNT3_MSB ((uint8_t)0x88)
Jerome Coutant 1:917af0ca86df 367 #define MFXSTM32L152_REG_ADR_IDD_SHUNT3_LSB ((uint8_t)0x89)
Jerome Coutant 1:917af0ca86df 368 #define MFXSTM32L152_REG_ADR_IDD_SHUNT4_MSB ((uint8_t)0x8A)
Jerome Coutant 1:917af0ca86df 369 #define MFXSTM32L152_REG_ADR_IDD_SHUNT4_LSB ((uint8_t)0x8B)
Jerome Coutant 1:917af0ca86df 370
Jerome Coutant 1:917af0ca86df 371 /**
Jerome Coutant 1:917af0ca86df 372 * @brief Register address: Idd ampli gain register (R/W)
Jerome Coutant 1:917af0ca86df 373 */
Jerome Coutant 1:917af0ca86df 374 #define MFXSTM32L152_REG_ADR_IDD_GAIN_MSB ((uint8_t)0x8C)
Jerome Coutant 1:917af0ca86df 375 #define MFXSTM32L152_REG_ADR_IDD_GAIN_LSB ((uint8_t)0x8D)
Jerome Coutant 1:917af0ca86df 376
Jerome Coutant 1:917af0ca86df 377 /**
Jerome Coutant 1:917af0ca86df 378 * @brief Register address: Idd VDD min register (R/W)
Jerome Coutant 1:917af0ca86df 379 */
Jerome Coutant 1:917af0ca86df 380 #define MFXSTM32L152_REG_ADR_IDD_VDD_MIN_MSB ((uint8_t)0x8E)
Jerome Coutant 1:917af0ca86df 381 #define MFXSTM32L152_REG_ADR_IDD_VDD_MIN_LSB ((uint8_t)0x8F)
Jerome Coutant 1:917af0ca86df 382
Jerome Coutant 1:917af0ca86df 383 /**
Jerome Coutant 1:917af0ca86df 384 * @brief Register address: Idd value register (R)
Jerome Coutant 1:917af0ca86df 385 */
Jerome Coutant 1:917af0ca86df 386 #define MFXSTM32L152_REG_ADR_IDD_VALUE_MSB ((uint8_t)0x14)
Jerome Coutant 1:917af0ca86df 387 #define MFXSTM32L152_REG_ADR_IDD_VALUE_MID ((uint8_t)0x15)
Jerome Coutant 1:917af0ca86df 388 #define MFXSTM32L152_REG_ADR_IDD_VALUE_LSB ((uint8_t)0x16)
Jerome Coutant 1:917af0ca86df 389
Jerome Coutant 1:917af0ca86df 390 /**
Jerome Coutant 1:917af0ca86df 391 * @brief Register address: Idd calibration offset register (R)
Jerome Coutant 1:917af0ca86df 392 */
Jerome Coutant 1:917af0ca86df 393 #define MFXSTM32L152_REG_ADR_IDD_CAL_OFFSET_MSB ((uint8_t)0x18)
Jerome Coutant 1:917af0ca86df 394 #define MFXSTM32L152_REG_ADR_IDD_CAL_OFFSET_LSB ((uint8_t)0x19)
Jerome Coutant 1:917af0ca86df 395
Jerome Coutant 1:917af0ca86df 396 /**
Jerome Coutant 1:917af0ca86df 397 * @brief Register address: Idd shunt used offset register (R)
Jerome Coutant 1:917af0ca86df 398 */
Jerome Coutant 1:917af0ca86df 399 #define MFXSTM32L152_REG_ADR_IDD_SHUNT_USED ((uint8_t)0x1A)
Jerome Coutant 1:917af0ca86df 400
Jerome Coutant 1:917af0ca86df 401 /**
Jerome Coutant 1:917af0ca86df 402 * @brief Register address: shunt stabilisation delay registers (R/W)
Jerome Coutant 1:917af0ca86df 403 */
Jerome Coutant 1:917af0ca86df 404 #define MFXSTM32L152_REG_ADR_IDD_SH0_STABILIZATION ((uint8_t)0x90)
Jerome Coutant 1:917af0ca86df 405 #define MFXSTM32L152_REG_ADR_IDD_SH1_STABILIZATION ((uint8_t)0x91)
Jerome Coutant 1:917af0ca86df 406 #define MFXSTM32L152_REG_ADR_IDD_SH2_STABILIZATION ((uint8_t)0x92)
Jerome Coutant 1:917af0ca86df 407 #define MFXSTM32L152_REG_ADR_IDD_SH3_STABILIZATION ((uint8_t)0x93)
Jerome Coutant 1:917af0ca86df 408 #define MFXSTM32L152_REG_ADR_IDD_SH4_STABILIZATION ((uint8_t)0x94)
Jerome Coutant 1:917af0ca86df 409
Jerome Coutant 1:917af0ca86df 410 /**
Jerome Coutant 1:917af0ca86df 411 * @brief Register address: Idd number of measurements register (R/W)
Jerome Coutant 1:917af0ca86df 412 */
Jerome Coutant 1:917af0ca86df 413 #define MFXSTM32L152_REG_ADR_IDD_NBR_OF_MEAS ((uint8_t)0x96)
Jerome Coutant 1:917af0ca86df 414
Jerome Coutant 1:917af0ca86df 415 /**
Jerome Coutant 1:917af0ca86df 416 * @brief Register address: Idd delta delay between 2 measurements register (R/W)
Jerome Coutant 1:917af0ca86df 417 */
Jerome Coutant 1:917af0ca86df 418 #define MFXSTM32L152_REG_ADR_IDD_MEAS_DELTA_DELAY ((uint8_t)0x97)
Jerome Coutant 1:917af0ca86df 419
Jerome Coutant 1:917af0ca86df 420 /**
Jerome Coutant 1:917af0ca86df 421 * @brief Register address: Idd number of shunt on board register (R/W)
Jerome Coutant 1:917af0ca86df 422 */
Jerome Coutant 1:917af0ca86df 423 #define MFXSTM32L152_REG_ADR_IDD_SHUNTS_ON_BOARD ((uint8_t)0x98)
Jerome Coutant 1:917af0ca86df 424
jeromecoutant 5:4943b15cce9f 425
Jerome Coutant 1:917af0ca86df 426
Jerome Coutant 1:917af0ca86df 427 /** @defgroup IDD_Control_Register_Defines IDD Control Register Defines
Jerome Coutant 1:917af0ca86df 428 * @{
Jerome Coutant 1:917af0ca86df 429 */
Jerome Coutant 1:917af0ca86df 430 /**
Jerome Coutant 1:917af0ca86df 431 * @brief IDD control register masks
Jerome Coutant 1:917af0ca86df 432 */
Jerome Coutant 1:917af0ca86df 433 #define MFXSTM32L152_IDD_CTRL_REQ ((uint8_t)0x01)
Jerome Coutant 1:917af0ca86df 434 #define MFXSTM32L152_IDD_CTRL_SHUNT_NB ((uint8_t)0x0E)
Jerome Coutant 1:917af0ca86df 435 #define MFXSTM32L152_IDD_CTRL_VREF_DIS ((uint8_t)0x40)
Jerome Coutant 1:917af0ca86df 436 #define MFXSTM32L152_IDD_CTRL_CAL_DIS ((uint8_t)0x80)
Jerome Coutant 1:917af0ca86df 437
Jerome Coutant 1:917af0ca86df 438 /**
Jerome Coutant 1:917af0ca86df 439 * @brief IDD Shunt Number
Jerome Coutant 1:917af0ca86df 440 */
Jerome Coutant 1:917af0ca86df 441 #define MFXSTM32L152_IDD_SHUNT_NB_1 ((uint8_t) 0x01)
Jerome Coutant 1:917af0ca86df 442 #define MFXSTM32L152_IDD_SHUNT_NB_2 ((uint8_t) 0x02)
Jerome Coutant 1:917af0ca86df 443 #define MFXSTM32L152_IDD_SHUNT_NB_3 ((uint8_t) 0x03)
Jerome Coutant 1:917af0ca86df 444 #define MFXSTM32L152_IDD_SHUNT_NB_4 ((uint8_t) 0x04)
Jerome Coutant 1:917af0ca86df 445 #define MFXSTM32L152_IDD_SHUNT_NB_5 ((uint8_t) 0x05)
Jerome Coutant 1:917af0ca86df 446
Jerome Coutant 1:917af0ca86df 447 /**
Jerome Coutant 1:917af0ca86df 448 * @brief Vref Measurement
Jerome Coutant 1:917af0ca86df 449 */
Jerome Coutant 1:917af0ca86df 450 #define MFXSTM32L152_IDD_VREF_AUTO_MEASUREMENT_ENABLE ((uint8_t) 0x00)
Jerome Coutant 1:917af0ca86df 451 #define MFXSTM32L152_IDD_VREF_AUTO_MEASUREMENT_DISABLE ((uint8_t) 0x70)
Jerome Coutant 1:917af0ca86df 452
Jerome Coutant 1:917af0ca86df 453 /**
Jerome Coutant 1:917af0ca86df 454 * @brief IDD Calibration
Jerome Coutant 1:917af0ca86df 455 */
Jerome Coutant 1:917af0ca86df 456 #define MFXSTM32L152_IDD_AUTO_CALIBRATION_ENABLE ((uint8_t) 0x00)
Jerome Coutant 1:917af0ca86df 457 #define MFXSTM32L152_IDD_AUTO_CALIBRATION_DISABLE ((uint8_t) 0x80)
Jerome Coutant 1:917af0ca86df 458 /**
Jerome Coutant 1:917af0ca86df 459 * @}
Jerome Coutant 1:917af0ca86df 460 */
Jerome Coutant 1:917af0ca86df 461
Jerome Coutant 1:917af0ca86df 462 /** @defgroup IDD_PreDelay_Defines IDD PreDelay Defines
Jerome Coutant 1:917af0ca86df 463 * @{
Jerome Coutant 1:917af0ca86df 464 */
Jerome Coutant 1:917af0ca86df 465 /**
Jerome Coutant 1:917af0ca86df 466 * @brief IDD PreDelay masks
Jerome Coutant 1:917af0ca86df 467 */
Jerome Coutant 1:917af0ca86df 468 #define MFXSTM32L152_IDD_PREDELAY_UNIT ((uint8_t) 0x80)
Jerome Coutant 1:917af0ca86df 469 #define MFXSTM32L152_IDD_PREDELAY_VALUE ((uint8_t) 0x7F)
Jerome Coutant 1:917af0ca86df 470
Jerome Coutant 1:917af0ca86df 471
Jerome Coutant 1:917af0ca86df 472 /**
Jerome Coutant 1:917af0ca86df 473 * @brief IDD PreDelay unit
Jerome Coutant 1:917af0ca86df 474 */
Jerome Coutant 1:917af0ca86df 475 #define MFXSTM32L152_IDD_PREDELAY_0_5_MS ((uint8_t) 0x00)
Jerome Coutant 1:917af0ca86df 476 #define MFXSTM32L152_IDD_PREDELAY_20_MS ((uint8_t) 0x80)
Jerome Coutant 1:917af0ca86df 477 /**
Jerome Coutant 1:917af0ca86df 478 * @}
Jerome Coutant 1:917af0ca86df 479 */
Jerome Coutant 1:917af0ca86df 480
Jerome Coutant 1:917af0ca86df 481 /** @defgroup IDD_DeltaDelay_Defines IDD Delta DElay Defines
Jerome Coutant 1:917af0ca86df 482 * @{
Jerome Coutant 1:917af0ca86df 483 */
Jerome Coutant 1:917af0ca86df 484 /**
Jerome Coutant 1:917af0ca86df 485 * @brief IDD Delta Delay masks
Jerome Coutant 1:917af0ca86df 486 */
Jerome Coutant 1:917af0ca86df 487 #define MFXSTM32L152_IDD_DELTADELAY_UNIT ((uint8_t) 0x80)
Jerome Coutant 1:917af0ca86df 488 #define MFXSTM32L152_IDD_DELTADELAY_VALUE ((uint8_t) 0x7F)
Jerome Coutant 1:917af0ca86df 489
Jerome Coutant 1:917af0ca86df 490
Jerome Coutant 1:917af0ca86df 491 /**
Jerome Coutant 1:917af0ca86df 492 * @brief IDD Delta Delay unit
Jerome Coutant 1:917af0ca86df 493 */
Jerome Coutant 1:917af0ca86df 494 #define MFXSTM32L152_IDD_DELTADELAY_0_5_MS ((uint8_t) 0x00)
Jerome Coutant 1:917af0ca86df 495 #define MFXSTM32L152_IDD_DELTADELAY_20_MS ((uint8_t) 0x80)
Jerome Coutant 1:917af0ca86df 496
Jerome Coutant 1:917af0ca86df 497
Jerome Coutant 1:917af0ca86df 498 /**
Jerome Coutant 1:917af0ca86df 499 * @}
Jerome Coutant 1:917af0ca86df 500 */
Jerome Coutant 1:917af0ca86df 501
Jerome Coutant 1:917af0ca86df 502 /**
Jerome Coutant 1:917af0ca86df 503 * @}
Jerome Coutant 1:917af0ca86df 504 */
Jerome Coutant 1:917af0ca86df 505
jeromecoutant 5:4943b15cce9f 506
Jerome Coutant 1:917af0ca86df 507 /* Exported macro ------------------------------------------------------------*/
jeromecoutant 5:4943b15cce9f 508
Jerome Coutant 1:917af0ca86df 509 /** @defgroup MFXSTM32L152_Exported_Macros
Jerome Coutant 1:917af0ca86df 510 * @{
jeromecoutant 5:4943b15cce9f 511 */
Jerome Coutant 1:917af0ca86df 512
Jerome Coutant 1:917af0ca86df 513 /**
Jerome Coutant 1:917af0ca86df 514 * @}
jeromecoutant 5:4943b15cce9f 515 */
Jerome Coutant 1:917af0ca86df 516
Jerome Coutant 1:917af0ca86df 517 /* Exported functions --------------------------------------------------------*/
jeromecoutant 5:4943b15cce9f 518
Jerome Coutant 1:917af0ca86df 519 /** @defgroup MFXSTM32L152_Exported_Functions
Jerome Coutant 1:917af0ca86df 520 * @{
Jerome Coutant 1:917af0ca86df 521 */
Jerome Coutant 1:917af0ca86df 522
jeromecoutant 5:4943b15cce9f 523 /**
Jerome Coutant 1:917af0ca86df 524 * @brief MFXSTM32L152 Control functions
Jerome Coutant 1:917af0ca86df 525 */
Jerome Coutant 1:917af0ca86df 526 void mfxstm32l152_Init(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 527 void mfxstm32l152_DeInit(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 528 void mfxstm32l152_Reset(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 529 uint16_t mfxstm32l152_ReadID(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 530 uint16_t mfxstm32l152_ReadFwVersion(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 531 void mfxstm32l152_LowPower(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 532 void mfxstm32l152_WakeUp(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 533
Jerome Coutant 1:917af0ca86df 534 void mfxstm32l152_EnableITSource(uint16_t DeviceAddr, uint8_t Source);
Jerome Coutant 1:917af0ca86df 535 void mfxstm32l152_DisableITSource(uint16_t DeviceAddr, uint8_t Source);
Jerome Coutant 1:917af0ca86df 536 uint8_t mfxstm32l152_GlobalITStatus(uint16_t DeviceAddr, uint8_t Source);
Jerome Coutant 1:917af0ca86df 537 void mfxstm32l152_ClearGlobalIT(uint16_t DeviceAddr, uint8_t Source);
Jerome Coutant 1:917af0ca86df 538
Jerome Coutant 1:917af0ca86df 539 void mfxstm32l152_SetIrqOutPinPolarity(uint16_t DeviceAddr, uint8_t Polarity);
Jerome Coutant 1:917af0ca86df 540 void mfxstm32l152_SetIrqOutPinType(uint16_t DeviceAddr, uint8_t Type);
Jerome Coutant 1:917af0ca86df 541
Jerome Coutant 1:917af0ca86df 542
jeromecoutant 5:4943b15cce9f 543 /**
Jerome Coutant 1:917af0ca86df 544 * @brief MFXSTM32L152 IO functionalities functions
Jerome Coutant 1:917af0ca86df 545 */
Jerome Coutant 1:917af0ca86df 546 void mfxstm32l152_IO_Start(uint16_t DeviceAddr, uint32_t IO_Pin);
Jerome Coutant 1:917af0ca86df 547 uint8_t mfxstm32l152_IO_Config(uint16_t DeviceAddr, uint32_t IO_Pin, IO_ModeTypedef IO_Mode);
Jerome Coutant 1:917af0ca86df 548 void mfxstm32l152_IO_WritePin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t PinState);
Jerome Coutant 1:917af0ca86df 549 uint32_t mfxstm32l152_IO_ReadPin(uint16_t DeviceAddr, uint32_t IO_Pin);
Jerome Coutant 1:917af0ca86df 550 void mfxstm32l152_IO_EnableIT(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 551 void mfxstm32l152_IO_DisableIT(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 552 uint32_t mfxstm32l152_IO_ITStatus(uint16_t DeviceAddr, uint32_t IO_Pin);
Jerome Coutant 1:917af0ca86df 553 void mfxstm32l152_IO_ClearIT(uint16_t DeviceAddr, uint32_t IO_Pin);
Jerome Coutant 1:917af0ca86df 554
Jerome Coutant 1:917af0ca86df 555 void mfxstm32l152_IO_InitPin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Direction);
Jerome Coutant 1:917af0ca86df 556 void mfxstm32l152_IO_EnableAF(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 557 void mfxstm32l152_IO_DisableAF(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 558 void mfxstm32l152_IO_SetIrqTypeMode(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Type);
Jerome Coutant 1:917af0ca86df 559 void mfxstm32l152_IO_SetIrqEvtMode(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Evt);
Jerome Coutant 1:917af0ca86df 560 void mfxstm32l152_IO_EnablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin);
Jerome Coutant 1:917af0ca86df 561 void mfxstm32l152_IO_DisablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin);
Jerome Coutant 1:917af0ca86df 562
jeromecoutant 5:4943b15cce9f 563 /**
Jerome Coutant 1:917af0ca86df 564 * @brief MFXSTM32L152 Touch screen functionalities functions
Jerome Coutant 1:917af0ca86df 565 */
Jerome Coutant 1:917af0ca86df 566 void mfxstm32l152_TS_Start(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 567 uint8_t mfxstm32l152_TS_DetectTouch(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 568 void mfxstm32l152_TS_GetXY(uint16_t DeviceAddr, uint16_t *X, uint16_t *Y);
Jerome Coutant 1:917af0ca86df 569 void mfxstm32l152_TS_EnableIT(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 570 void mfxstm32l152_TS_DisableIT(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 571 uint8_t mfxstm32l152_TS_ITStatus (uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 572 void mfxstm32l152_TS_ClearIT (uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 573
Jerome Coutant 1:917af0ca86df 574 /**
Jerome Coutant 1:917af0ca86df 575 * @brief MFXSTM32L152 IDD current measurement functionalities functions
Jerome Coutant 1:917af0ca86df 576 */
Jerome Coutant 1:917af0ca86df 577 void mfxstm32l152_IDD_Start(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 578 void mfxstm32l152_IDD_Config(uint16_t DeviceAddr, IDD_ConfigTypeDef MfxIddConfig);
Jerome Coutant 1:917af0ca86df 579 void mfxstm32l152_IDD_ConfigShuntNbLimit(uint16_t DeviceAddr, uint8_t ShuntNbLimit);
Jerome Coutant 1:917af0ca86df 580 void mfxstm32l152_IDD_GetValue(uint16_t DeviceAddr, uint32_t *ReadValue);
Jerome Coutant 1:917af0ca86df 581 uint8_t mfxstm32l152_IDD_GetShuntUsed(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 582 void mfxstm32l152_IDD_EnableIT(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 583 void mfxstm32l152_IDD_ClearIT(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 584 uint8_t mfxstm32l152_IDD_GetITStatus(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 585 void mfxstm32l152_IDD_DisableIT(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 586
Jerome Coutant 1:917af0ca86df 587 /**
Jerome Coutant 1:917af0ca86df 588 * @brief MFXSTM32L152 Error management functions
Jerome Coutant 1:917af0ca86df 589 */
Jerome Coutant 1:917af0ca86df 590 uint8_t mfxstm32l152_Error_ReadSrc(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 591 uint8_t mfxstm32l152_Error_ReadMsg(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 592 void mfxstm32l152_Error_EnableIT(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 593 void mfxstm32l152_Error_ClearIT(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 594 uint8_t mfxstm32l152_Error_GetITStatus(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 595 void mfxstm32l152_Error_DisableIT(uint16_t DeviceAddr);
Jerome Coutant 1:917af0ca86df 596
Jerome Coutant 1:917af0ca86df 597 uint8_t mfxstm32l152_ReadReg(uint16_t DeviceAddr, uint8_t RegAddr);
Jerome Coutant 1:917af0ca86df 598 void mfxstm32l152_WriteReg(uint16_t DeviceAddr, uint8_t RegAddr, uint8_t Value);
Jerome Coutant 1:917af0ca86df 599
Jerome Coutant 1:917af0ca86df 600
Jerome Coutant 1:917af0ca86df 601
jeromecoutant 5:4943b15cce9f 602 /**
Jerome Coutant 1:917af0ca86df 603 * @brief iobus prototypes (they should be defined in common/stm32_iobus.h)
Jerome Coutant 1:917af0ca86df 604 */
Jerome Coutant 1:917af0ca86df 605 void MFX_IO_Init(void);
Jerome Coutant 1:917af0ca86df 606 void MFX_IO_DeInit(void);
Jerome Coutant 1:917af0ca86df 607 void MFX_IO_ITConfig (void);
Jerome Coutant 1:917af0ca86df 608 void MFX_IO_EnableWakeupPin(void);
Jerome Coutant 1:917af0ca86df 609 void MFX_IO_Wakeup(void);
Jerome Coutant 1:917af0ca86df 610 void MFX_IO_Delay(uint32_t delay);
Jerome Coutant 1:917af0ca86df 611 void MFX_IO_Write(uint16_t addr, uint8_t reg, uint8_t value);
Jerome Coutant 1:917af0ca86df 612 uint8_t MFX_IO_Read(uint16_t addr, uint8_t reg);
Jerome Coutant 1:917af0ca86df 613 uint16_t MFX_IO_ReadMultiple(uint16_t addr, uint8_t reg, uint8_t *buffer, uint16_t length);
Jerome Coutant 1:917af0ca86df 614
Jerome Coutant 1:917af0ca86df 615 /**
Jerome Coutant 1:917af0ca86df 616 * @}
jeromecoutant 5:4943b15cce9f 617 */
Jerome Coutant 1:917af0ca86df 618
Jerome Coutant 1:917af0ca86df 619 /* Touch screen driver structure */
Jerome Coutant 1:917af0ca86df 620 extern TS_DrvTypeDef mfxstm32l152_ts_drv;
Jerome Coutant 1:917af0ca86df 621
Jerome Coutant 1:917af0ca86df 622 /* IO driver structure */
Jerome Coutant 1:917af0ca86df 623 extern IO_DrvTypeDef mfxstm32l152_io_drv;
Jerome Coutant 1:917af0ca86df 624
Jerome Coutant 1:917af0ca86df 625 /* IDD driver structure */
Jerome Coutant 1:917af0ca86df 626 extern IDD_DrvTypeDef mfxstm32l152_idd_drv;
Jerome Coutant 1:917af0ca86df 627
Jerome Coutant 1:917af0ca86df 628
Jerome Coutant 1:917af0ca86df 629 #ifdef __cplusplus
Jerome Coutant 1:917af0ca86df 630 }
Jerome Coutant 1:917af0ca86df 631 #endif
Jerome Coutant 1:917af0ca86df 632 #endif /* __MFXSTM32L152_H */
Jerome Coutant 1:917af0ca86df 633
Jerome Coutant 1:917af0ca86df 634
Jerome Coutant 1:917af0ca86df 635 /**
Jerome Coutant 1:917af0ca86df 636 * @}
jeromecoutant 5:4943b15cce9f 637 */
Jerome Coutant 1:917af0ca86df 638
Jerome Coutant 1:917af0ca86df 639 /**
Jerome Coutant 1:917af0ca86df 640 * @}
Jerome Coutant 1:917af0ca86df 641 */
Jerome Coutant 1:917af0ca86df 642
Jerome Coutant 1:917af0ca86df 643 /**
Jerome Coutant 1:917af0ca86df 644 * @}
jeromecoutant 5:4943b15cce9f 645 */
Jerome Coutant 1:917af0ca86df 646
Jerome Coutant 1:917af0ca86df 647 /**
Jerome Coutant 1:917af0ca86df 648 * @}
jeromecoutant 5:4943b15cce9f 649 */
Jerome Coutant 1:917af0ca86df 650 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/