BSP files for STM32H747I-Discovery Copy from ST Cube delivery
Dependents: DISCO_H747I_LCD_demo DISCO_H747I_AUDIO_demo
Components/otm8009a/otm8009a.c@3:bc403474b366, 2019-11-06 (annotated)
- Committer:
- Jerome Coutant
- Date:
- Wed Nov 06 11:32:01 2019 +0100
- Revision:
- 3:bc403474b366
- Parent:
- 0:146cf26a9bbb
Add PDM lib
Who changed what in which revision?
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/**
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******************************************************************************
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* @file otm8009a.c
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* @author MCD Application Team
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* @version V1.0.2
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* @date 27-January-2017
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* @brief This file provides the LCD Driver for KoD KM-040TMP-02-0621 (WVGA)
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* DSI LCD Display OTM8009A.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "otm8009a.h"
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/** @addtogroup BSP
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* @{
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*/
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/** @addtogroup Components
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* @{
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*/
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/** @defgroup OTM8009A OTM8009A
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* @brief This file provides a set of functions needed to drive the
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* otm8009a IC display driver.
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* @{
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*/
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/* Private types -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private constants ---------------------------------------------------------*/
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/** @defgroup OTM8009A_Private_Constants OTM8009A Private Constants
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* @{
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*/
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/*
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* @brief Constant tables of register settings used to transmit DSI
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* command packets as power up initialization sequence of the KoD LCD (OTM8009A LCD Driver)
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*/
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const uint8_t lcdRegData1[] = {0x80,0x09,0x01,0xFF};
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const uint8_t lcdRegData2[] = {0x80,0x09,0xFF};
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const uint8_t lcdRegData3[] = {0x00,0x09,0x0F,0x0E,0x07,0x10,0x0B,0x0A,0x04,0x07,0x0B,0x08,0x0F,0x10,0x0A,0x01,0xE1};
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const uint8_t lcdRegData4[] = {0x00,0x09,0x0F,0x0E,0x07,0x10,0x0B,0x0A,0x04,0x07,0x0B,0x08,0x0F,0x10,0x0A,0x01,0xE2};
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const uint8_t lcdRegData5[] = {0x79,0x79,0xD8};
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const uint8_t lcdRegData6[] = {0x00,0x01,0xB3};
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const uint8_t lcdRegData7[] = {0x85,0x01,0x00,0x84,0x01,0x00,0xCE};
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const uint8_t lcdRegData8[] = {0x18,0x04,0x03,0x39,0x00,0x00,0x00,0x18,0x03,0x03,0x3A,0x00,0x00,0x00,0xCE};
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const uint8_t lcdRegData9[] = {0x18,0x02,0x03,0x3B,0x00,0x00,0x00,0x18,0x01,0x03,0x3C,0x00,0x00,0x00,0xCE};
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const uint8_t lcdRegData10[] = {0x01,0x01,0x20,0x20,0x00,0x00,0x01,0x02,0x00,0x00,0xCF};
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const uint8_t lcdRegData11[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
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const uint8_t lcdRegData12[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
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const uint8_t lcdRegData13[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
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const uint8_t lcdRegData14[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
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const uint8_t lcdRegData15[] = {0x00,0x04,0x04,0x04,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
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const uint8_t lcdRegData16[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x04,0x04,0x04,0x04,0x00,0x00,0x00,0x00,0xCB};
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const uint8_t lcdRegData17[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
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const uint8_t lcdRegData18[] = {0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xCB};
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const uint8_t lcdRegData19[] = {0x00,0x26,0x09,0x0B,0x01,0x25,0x00,0x00,0x00,0x00,0xCC};
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const uint8_t lcdRegData20[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x26,0x0A,0x0C,0x02,0xCC};
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const uint8_t lcdRegData21[] = {0x25,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCC};
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const uint8_t lcdRegData22[] = {0x00,0x25,0x0C,0x0A,0x02,0x26,0x00,0x00,0x00,0x00,0xCC};
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const uint8_t lcdRegData23[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x25,0x0B,0x09,0x01,0xCC};
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const uint8_t lcdRegData24[] = {0x26,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCC};
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const uint8_t lcdRegData25[] = {0xFF,0xFF,0xFF,0xFF};
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/*
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* CASET value (Column Address Set) : X direction LCD GRAM boundaries
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* depending on LCD orientation mode and PASET value (Page Address Set) : Y direction
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* LCD GRAM boundaries depending on LCD orientation mode
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* XS[15:0] = 0x000 = 0, XE[15:0] = 0x31F = 799 for landscape mode : apply to CASET
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* YS[15:0] = 0x000 = 0, YE[15:0] = 0x31F = 799 for portrait mode : : apply to PASET
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*/
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const uint8_t lcdRegData27[] = {0x00, 0x00, 0x03, 0x1F, OTM8009A_CMD_CASET};
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/*
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* XS[15:0] = 0x000 = 0, XE[15:0] = 0x1DF = 479 for portrait mode : apply to CASET
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* YS[15:0] = 0x000 = 0, YE[15:0] = 0x1DF = 479 for landscape mode : apply to PASET
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*/
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const uint8_t lcdRegData28[] = {0x00, 0x00, 0x01, 0xDF, OTM8009A_CMD_PASET};
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const uint8_t ShortRegData1[] = {OTM8009A_CMD_NOP, 0x00};
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const uint8_t ShortRegData2[] = {OTM8009A_CMD_NOP, 0x80};
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const uint8_t ShortRegData3[] = {0xC4, 0x30};
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const uint8_t ShortRegData4[] = {OTM8009A_CMD_NOP, 0x8A};
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const uint8_t ShortRegData5[] = {0xC4, 0x40};
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const uint8_t ShortRegData6[] = {OTM8009A_CMD_NOP, 0xB1};
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const uint8_t ShortRegData7[] = {0xC5, 0xA9};
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const uint8_t ShortRegData8[] = {OTM8009A_CMD_NOP, 0x91};
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const uint8_t ShortRegData9[] = {0xC5, 0x34};
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const uint8_t ShortRegData10[] = {OTM8009A_CMD_NOP, 0xB4};
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const uint8_t ShortRegData11[] = {0xC0, 0x50};
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const uint8_t ShortRegData12[] = {0xD9, 0x4E};
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const uint8_t ShortRegData13[] = {OTM8009A_CMD_NOP, 0x81};
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const uint8_t ShortRegData14[] = {0xC1, 0x66};
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const uint8_t ShortRegData15[] = {OTM8009A_CMD_NOP, 0xA1};
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const uint8_t ShortRegData16[] = {0xC1, 0x08};
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const uint8_t ShortRegData17[] = {OTM8009A_CMD_NOP, 0x92};
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const uint8_t ShortRegData18[] = {0xC5, 0x01};
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const uint8_t ShortRegData19[] = {OTM8009A_CMD_NOP, 0x95};
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const uint8_t ShortRegData20[] = {OTM8009A_CMD_NOP, 0x94};
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const uint8_t ShortRegData21[] = {0xC5, 0x33};
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const uint8_t ShortRegData22[] = {OTM8009A_CMD_NOP, 0xA3};
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const uint8_t ShortRegData23[] = {0xC0, 0x1B};
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const uint8_t ShortRegData24[] = {OTM8009A_CMD_NOP, 0x82};
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const uint8_t ShortRegData25[] = {0xC5, 0x83};
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const uint8_t ShortRegData26[] = {0xC4, 0x83};
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const uint8_t ShortRegData27[] = {0xC1, 0x0E};
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const uint8_t ShortRegData28[] = {OTM8009A_CMD_NOP, 0xA6};
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const uint8_t ShortRegData29[] = {OTM8009A_CMD_NOP, 0xA0};
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const uint8_t ShortRegData30[] = {OTM8009A_CMD_NOP, 0xB0};
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const uint8_t ShortRegData31[] = {OTM8009A_CMD_NOP, 0xC0};
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const uint8_t ShortRegData32[] = {OTM8009A_CMD_NOP, 0xD0};
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const uint8_t ShortRegData33[] = {OTM8009A_CMD_NOP, 0x90};
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const uint8_t ShortRegData34[] = {OTM8009A_CMD_NOP, 0xE0};
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const uint8_t ShortRegData35[] = {OTM8009A_CMD_NOP, 0xF0};
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const uint8_t ShortRegData36[] = {OTM8009A_CMD_SLPOUT, 0x00};
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const uint8_t ShortRegData37[] = {OTM8009A_CMD_COLMOD, OTM8009A_COLMOD_RGB565};
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const uint8_t ShortRegData38[] = {OTM8009A_CMD_COLMOD, OTM8009A_COLMOD_RGB888};
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const uint8_t ShortRegData39[] = {OTM8009A_CMD_MADCTR, OTM8009A_MADCTR_MODE_LANDSCAPE};
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const uint8_t ShortRegData40[] = {OTM8009A_CMD_WRDISBV, 0x7F};
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const uint8_t ShortRegData41[] = {OTM8009A_CMD_WRCTRLD, 0x2C};
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const uint8_t ShortRegData42[] = {OTM8009A_CMD_WRCABC, 0x02};
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const uint8_t ShortRegData43[] = {OTM8009A_CMD_WRCABCMB, 0xFF};
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const uint8_t ShortRegData44[] = {OTM8009A_CMD_DISPON, 0x00};
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const uint8_t ShortRegData45[] = {OTM8009A_CMD_RAMWR, 0x00};
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const uint8_t ShortRegData46[] = {0xCF, 0x00};
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const uint8_t ShortRegData47[] = {0xC5, 0x66};
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const uint8_t ShortRegData48[] = {OTM8009A_CMD_NOP, 0xB6};
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const uint8_t ShortRegData49[] = {0xF5, 0x06};
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const uint8_t ShortRegData50[] = {OTM8009A_CMD_NOP, 0xB1};
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const uint8_t ShortRegData51[] = {0xC6, 0x06};
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/** @defgroup OTM8009A_Exported_Variables
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* @{
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*/
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/**
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* @}
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*/
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/* Exported functions ---------------------------------------------------------*/
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/** @defgroup OTM8009A_Exported_Functions OTM8009A Exported Functions
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* @{
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*/
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/**
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* @brief DSI IO write short/long command.
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* @note : Can be surcharged by application code implementation of the function.
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*/
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__weak void DSI_IO_WriteCmd(uint32_t NbrParams, uint8_t *pParams)
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{
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/* NOTE : This function Should not be modified, when it is needed,
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the DSI_IO_WriteCmd could be implemented in the user file
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*/
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}
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/**
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* @brief Initializes the LCD KoD display part by communication in DSI mode in Video Mode
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* with IC Display Driver OTM8009A (see IC Driver specification for more information).
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* @param hdsi_eval : pointer on DSI configuration structure
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* @param hdsivideo_handle : pointer on DSI video mode configuration structure
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* @retval Status
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*/
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uint8_t OTM8009A_Init(uint32_t ColorCoding, uint32_t orientation)
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{
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/* Enable CMD2 to access vendor specific commands */
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/* Enter in command 2 mode and set EXTC to enable address shift function (0x00) */
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DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1);
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DSI_IO_WriteCmd( 3, (uint8_t *)lcdRegData1);
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/* Enter ORISE Command 2 */
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DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData2); /* Shift address to 0x80 */
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DSI_IO_WriteCmd( 2, (uint8_t *)lcdRegData2);
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/////////////////////////////////////////////////////////////////////
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/* SD_PCH_CTRL - 0xC480h - 129th parameter - Default 0x00 */
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208
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/* Set SD_PT */
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209
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/* -> Source output level during porch and non-display area to GND */
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DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData2);
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DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData3);
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212
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OTM8009A_IO_Delay(10);
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/* Not documented */
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DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData4);
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DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData5);
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OTM8009A_IO_Delay(10);
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/////////////////////////////////////////////////////////////////////
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219
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/* PWR_CTRL4 - 0xC4B0h - 178th parameter - Default 0xA8 */
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220
|
/* Set gvdd_en_test */
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221
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/* -> enable GVDD test mode !!! */
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DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData6);
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223
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DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData7);
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224
|
|
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225
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/* PWR_CTRL2 - 0xC590h - 146th parameter - Default 0x79 */
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226
|
/* Set pump 4 vgh voltage */
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227
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/* -> from 15.0v down to 13.0v */
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228
|
/* Set pump 5 vgh voltage */
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229
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/* -> from -12.0v downto -9.0v */
|
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230
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DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData8);
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231
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DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData9);
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232
|
|
|
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233
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/* P_DRV_M - 0xC0B4h - 181th parameter - Default 0x00 */
|
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234
|
/* -> Column inversion */
|
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235
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DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData10);
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236
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData11);
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237
|
|
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238
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/* VCOMDC - 0xD900h - 1st parameter - Default 0x39h */
|
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239
|
/* VCOM Voltage settings */
|
|
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240
|
/* -> from -1.0000v downto -1.2625v */
|
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241
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1);
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242
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData12);
|
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243
|
|
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244
|
/* Oscillator adjustment for Idle/Normal mode (LPDT only) set to 65Hz (default is 60Hz) */
|
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245
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData13);
|
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246
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData14);
|
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247
|
|
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248
|
/* Video mode internal */
|
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249
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData15);
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250
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData16);
|
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251
|
|
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252
|
/* PWR_CTRL2 - 0xC590h - 147h parameter - Default 0x00 */
|
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253
|
/* Set pump 4&5 x6 */
|
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254
|
/* -> ONLY VALID when PUMP4_EN_ASDM_HV = "0" */
|
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255
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData17);
|
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256
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData18);
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257
|
|
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258
|
/* PWR_CTRL2 - 0xC590h - 150th parameter - Default 0x33h */
|
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259
|
/* Change pump4 clock ratio */
|
|
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260
|
/* -> from 1 line to 1/2 line */
|
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261
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData19);
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|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData9);
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263
|
|
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264
|
/* GVDD/NGVDD settings */
|
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265
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1);
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266
|
DSI_IO_WriteCmd( 2, (uint8_t *)lcdRegData5);
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267
|
|
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268
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/* PWR_CTRL2 - 0xC590h - 149th parameter - Default 0x33h */
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269
|
/* Rewrite the default value ! */
|
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|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData20);
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|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData21);
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272
|
|
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273
|
/* Panel display timing Setting 3 */
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|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData22);
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|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData23);
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|
|
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277
|
/* Power control 1 */
|
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278
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData24);
|
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279
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData25);
|
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280
|
|
|
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281
|
/* Source driver precharge */
|
|
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282
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData13);
|
|
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283
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData26);
|
|
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284
|
|
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285
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData15);
|
|
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286
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData27);
|
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287
|
|
|
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288
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData28);
|
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289
|
DSI_IO_WriteCmd( 2, (uint8_t *)lcdRegData6);
|
|
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290
|
|
|
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291
|
/* GOAVST */
|
|
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292
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData2);
|
|
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293
|
DSI_IO_WriteCmd( 6, (uint8_t *)lcdRegData7);
|
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294
|
|
|
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295
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData29);
|
|
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296
|
DSI_IO_WriteCmd( 14, (uint8_t *)lcdRegData8);
|
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297
|
|
|
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298
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData30);
|
|
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299
|
DSI_IO_WriteCmd( 14, (uint8_t *)lcdRegData9);
|
|
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300
|
|
|
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301
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData31);
|
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302
|
DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData10);
|
|
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303
|
|
|
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304
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData32);
|
|
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305
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData46);
|
|
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306
|
|
|
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307
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData2);
|
|
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308
|
DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData11);
|
|
Jerome Coutant
0:146cf26a9bbb
|
309
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
310
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData33);
|
|
Jerome Coutant
0:146cf26a9bbb
|
311
|
DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData12);
|
|
Jerome Coutant
0:146cf26a9bbb
|
312
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
313
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData29);
|
|
Jerome Coutant
0:146cf26a9bbb
|
314
|
DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData13);
|
|
Jerome Coutant
0:146cf26a9bbb
|
315
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
316
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData30);
|
|
Jerome Coutant
0:146cf26a9bbb
|
317
|
DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData14);
|
|
Jerome Coutant
0:146cf26a9bbb
|
318
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
319
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData31);
|
|
Jerome Coutant
0:146cf26a9bbb
|
320
|
DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData15);
|
|
Jerome Coutant
0:146cf26a9bbb
|
321
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
322
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData32);
|
|
Jerome Coutant
0:146cf26a9bbb
|
323
|
DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData16);
|
|
Jerome Coutant
0:146cf26a9bbb
|
324
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
325
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData34);
|
|
Jerome Coutant
0:146cf26a9bbb
|
326
|
DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData17);
|
|
Jerome Coutant
0:146cf26a9bbb
|
327
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
328
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData35);
|
|
Jerome Coutant
0:146cf26a9bbb
|
329
|
DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData18);
|
|
Jerome Coutant
0:146cf26a9bbb
|
330
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
331
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData2);
|
|
Jerome Coutant
0:146cf26a9bbb
|
332
|
DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData19);
|
|
Jerome Coutant
0:146cf26a9bbb
|
333
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
334
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData33);
|
|
Jerome Coutant
0:146cf26a9bbb
|
335
|
DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData20);
|
|
Jerome Coutant
0:146cf26a9bbb
|
336
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
337
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData29);
|
|
Jerome Coutant
0:146cf26a9bbb
|
338
|
DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData21);
|
|
Jerome Coutant
0:146cf26a9bbb
|
339
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
340
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData30);
|
|
Jerome Coutant
0:146cf26a9bbb
|
341
|
DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData22);
|
|
Jerome Coutant
0:146cf26a9bbb
|
342
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
343
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData31);
|
|
Jerome Coutant
0:146cf26a9bbb
|
344
|
DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData23);
|
|
Jerome Coutant
0:146cf26a9bbb
|
345
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
346
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData32);
|
|
Jerome Coutant
0:146cf26a9bbb
|
347
|
DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData24);
|
|
Jerome Coutant
0:146cf26a9bbb
|
348
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
349
|
/////////////////////////////////////////////////////////////////////////////
|
|
Jerome Coutant
0:146cf26a9bbb
|
350
|
/* PWR_CTRL1 - 0xc580h - 130th parameter - default 0x00 */
|
|
Jerome Coutant
0:146cf26a9bbb
|
351
|
/* Pump 1 min and max DM */
|
|
Jerome Coutant
0:146cf26a9bbb
|
352
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData13);
|
|
Jerome Coutant
0:146cf26a9bbb
|
353
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData47);
|
|
Jerome Coutant
0:146cf26a9bbb
|
354
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData48);
|
|
Jerome Coutant
0:146cf26a9bbb
|
355
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData49);
|
|
Jerome Coutant
0:146cf26a9bbb
|
356
|
/////////////////////////////////////////////////////////////////////////////
|
|
Jerome Coutant
0:146cf26a9bbb
|
357
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
358
|
/* CABC LEDPWM frequency adjusted to 19,5kHz */
|
|
Jerome Coutant
0:146cf26a9bbb
|
359
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData50);
|
|
Jerome Coutant
0:146cf26a9bbb
|
360
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData51);
|
|
Jerome Coutant
0:146cf26a9bbb
|
361
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
362
|
/* Exit CMD2 mode */
|
|
Jerome Coutant
0:146cf26a9bbb
|
363
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1);
|
|
Jerome Coutant
0:146cf26a9bbb
|
364
|
DSI_IO_WriteCmd( 3, (uint8_t *)lcdRegData25);
|
|
Jerome Coutant
0:146cf26a9bbb
|
365
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
366
|
/*************************************************************************** */
|
|
Jerome Coutant
0:146cf26a9bbb
|
367
|
/* Standard DCS Initialization TO KEEP CAN BE DONE IN HSDT */
|
|
Jerome Coutant
0:146cf26a9bbb
|
368
|
/*************************************************************************** */
|
|
Jerome Coutant
0:146cf26a9bbb
|
369
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
370
|
/* NOP - goes back to DCS std command ? */
|
|
Jerome Coutant
0:146cf26a9bbb
|
371
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1);
|
|
Jerome Coutant
0:146cf26a9bbb
|
372
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
373
|
/* Gamma correction 2.2+ table (HSDT possible) */
|
|
Jerome Coutant
0:146cf26a9bbb
|
374
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1);
|
|
Jerome Coutant
0:146cf26a9bbb
|
375
|
DSI_IO_WriteCmd( 16, (uint8_t *)lcdRegData3);
|
|
Jerome Coutant
0:146cf26a9bbb
|
376
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
377
|
/* Gamma correction 2.2- table (HSDT possible) */
|
|
Jerome Coutant
0:146cf26a9bbb
|
378
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1);
|
|
Jerome Coutant
0:146cf26a9bbb
|
379
|
DSI_IO_WriteCmd( 16, (uint8_t *)lcdRegData4);
|
|
Jerome Coutant
0:146cf26a9bbb
|
380
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
381
|
/* Send Sleep Out command to display : no parameter */
|
|
Jerome Coutant
0:146cf26a9bbb
|
382
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData36);
|
|
Jerome Coutant
0:146cf26a9bbb
|
383
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
384
|
/* Wait for sleep out exit */
|
|
Jerome Coutant
0:146cf26a9bbb
|
385
|
OTM8009A_IO_Delay(120);
|
|
Jerome Coutant
0:146cf26a9bbb
|
386
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
387
|
switch(ColorCoding)
|
|
Jerome Coutant
0:146cf26a9bbb
|
388
|
{
|
|
Jerome Coutant
0:146cf26a9bbb
|
389
|
case OTM8009A_FORMAT_RBG565 :
|
|
Jerome Coutant
0:146cf26a9bbb
|
390
|
/* Set Pixel color format to RGB565 */
|
|
Jerome Coutant
0:146cf26a9bbb
|
391
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData37);
|
|
Jerome Coutant
0:146cf26a9bbb
|
392
|
break;
|
|
Jerome Coutant
0:146cf26a9bbb
|
393
|
case OTM8009A_FORMAT_RGB888 :
|
|
Jerome Coutant
0:146cf26a9bbb
|
394
|
/* Set Pixel color format to RGB888 */
|
|
Jerome Coutant
0:146cf26a9bbb
|
395
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData38);
|
|
Jerome Coutant
0:146cf26a9bbb
|
396
|
break;
|
|
Jerome Coutant
0:146cf26a9bbb
|
397
|
default :
|
|
Jerome Coutant
0:146cf26a9bbb
|
398
|
break;
|
|
Jerome Coutant
0:146cf26a9bbb
|
399
|
}
|
|
Jerome Coutant
0:146cf26a9bbb
|
400
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
401
|
/* Send command to configure display in landscape orientation mode. By default
|
|
Jerome Coutant
0:146cf26a9bbb
|
402
|
the orientation mode is portrait */
|
|
Jerome Coutant
0:146cf26a9bbb
|
403
|
if(orientation == OTM8009A_ORIENTATION_LANDSCAPE)
|
|
Jerome Coutant
0:146cf26a9bbb
|
404
|
{
|
|
Jerome Coutant
0:146cf26a9bbb
|
405
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData39);
|
|
Jerome Coutant
0:146cf26a9bbb
|
406
|
DSI_IO_WriteCmd( 4, (uint8_t *)lcdRegData27);
|
|
Jerome Coutant
0:146cf26a9bbb
|
407
|
DSI_IO_WriteCmd( 4, (uint8_t *)lcdRegData28);
|
|
Jerome Coutant
0:146cf26a9bbb
|
408
|
}
|
|
Jerome Coutant
0:146cf26a9bbb
|
409
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
410
|
/** CABC : Content Adaptive Backlight Control section start >> */
|
|
Jerome Coutant
0:146cf26a9bbb
|
411
|
/* Note : defaut is 0 (lowest Brightness), 0xFF is highest Brightness, try 0x7F : intermediate value */
|
|
Jerome Coutant
0:146cf26a9bbb
|
412
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData40);
|
|
Jerome Coutant
0:146cf26a9bbb
|
413
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
414
|
/* defaut is 0, try 0x2C - Brightness Control Block, Display Dimming & BackLight on */
|
|
Jerome Coutant
0:146cf26a9bbb
|
415
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData41);
|
|
Jerome Coutant
0:146cf26a9bbb
|
416
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
417
|
/* defaut is 0, try 0x02 - image Content based Adaptive Brightness [Still Picture] */
|
|
Jerome Coutant
0:146cf26a9bbb
|
418
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData42);
|
|
Jerome Coutant
0:146cf26a9bbb
|
419
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
420
|
/* defaut is 0 (lowest Brightness), 0xFF is highest Brightness */
|
|
Jerome Coutant
0:146cf26a9bbb
|
421
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData43);
|
|
Jerome Coutant
0:146cf26a9bbb
|
422
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
423
|
/** CABC : Content Adaptive Backlight Control section end << */
|
|
Jerome Coutant
0:146cf26a9bbb
|
424
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
425
|
/* Send Command Display On */
|
|
Jerome Coutant
0:146cf26a9bbb
|
426
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData44);
|
|
Jerome Coutant
0:146cf26a9bbb
|
427
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
428
|
/* NOP command */
|
|
Jerome Coutant
0:146cf26a9bbb
|
429
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1);
|
|
Jerome Coutant
0:146cf26a9bbb
|
430
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
431
|
/* Send Command GRAM memory write (no parameters) : this initiates frame write via other DSI commands sent by */
|
|
Jerome Coutant
0:146cf26a9bbb
|
432
|
/* DSI host from LTDC incoming pixels in video mode */
|
|
Jerome Coutant
0:146cf26a9bbb
|
433
|
DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData45);
|
|
Jerome Coutant
0:146cf26a9bbb
|
434
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
435
|
return 0;
|
|
Jerome Coutant
0:146cf26a9bbb
|
436
|
}
|
|
Jerome Coutant
0:146cf26a9bbb
|
437
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
438
|
/**
|
|
Jerome Coutant
0:146cf26a9bbb
|
439
|
* @}
|
|
Jerome Coutant
0:146cf26a9bbb
|
440
|
*/
|
|
Jerome Coutant
0:146cf26a9bbb
|
441
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
442
|
/**
|
|
Jerome Coutant
0:146cf26a9bbb
|
443
|
* @}
|
|
Jerome Coutant
0:146cf26a9bbb
|
444
|
*/
|
|
Jerome Coutant
0:146cf26a9bbb
|
445
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
446
|
/**
|
|
Jerome Coutant
0:146cf26a9bbb
|
447
|
* @}
|
|
Jerome Coutant
0:146cf26a9bbb
|
448
|
*/
|
|
Jerome Coutant
0:146cf26a9bbb
|
449
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
450
|
/**
|
|
Jerome Coutant
0:146cf26a9bbb
|
451
|
* @}
|
|
Jerome Coutant
0:146cf26a9bbb
|
452
|
*/
|
|
Jerome Coutant
0:146cf26a9bbb
|
453
|
|
|
Jerome Coutant
0:146cf26a9bbb
|
454
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|