ST / BSP_DISCO_H747I

BSP files for STM32H747I-Discovery Copy from ST Cube delivery

Dependents:   DISCO_H747I_LCD_demo DISCO_H747I_AUDIO_demo

Components/mt25tl01g/mt25tl01g.h@0:146cf26a9bbb, 2019-09-25 (annotated)

Committer:
Jerome Coutant
Date:
Wed Sep 25 13:37:39 2019 +0200
Revision:
0:146cf26a9bbb
STM32Cube_FW_H7_V1.5.0 BSP STM32H747I-DISCO

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Jerome Coutant 0:146cf26a9bbb 1 /**
Jerome Coutant 0:146cf26a9bbb 2 ******************************************************************************
Jerome Coutant 0:146cf26a9bbb 3 * @file MT25TL01G.h
Jerome Coutant 0:146cf26a9bbb 4 * @author MCD Application Team
Jerome Coutant 0:146cf26a9bbb 5 * @version V1.0.0
Jerome Coutant 0:146cf26a9bbb 6 * @date 08-August-2016
Jerome Coutant 0:146cf26a9bbb 7 * @brief This file contains all the description of the MT25TL01G QSPI memory.
Jerome Coutant 0:146cf26a9bbb 8 ******************************************************************************
Jerome Coutant 0:146cf26a9bbb 9 * @attention
Jerome Coutant 0:146cf26a9bbb 10 *
Jerome Coutant 0:146cf26a9bbb 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Jerome Coutant 0:146cf26a9bbb 12 *
Jerome Coutant 0:146cf26a9bbb 13 * Redistribution and use in source and binary forms, with or without modification,
Jerome Coutant 0:146cf26a9bbb 14 * are permitted provided that the following conditions are met:
Jerome Coutant 0:146cf26a9bbb 15 * 1. Redistributions of source code must retain the above copyright notice,
Jerome Coutant 0:146cf26a9bbb 16 * this list of conditions and the following disclaimer.
Jerome Coutant 0:146cf26a9bbb 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Jerome Coutant 0:146cf26a9bbb 18 * this list of conditions and the following disclaimer in the documentation
Jerome Coutant 0:146cf26a9bbb 19 * and/or other materials provided with the distribution.
Jerome Coutant 0:146cf26a9bbb 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Jerome Coutant 0:146cf26a9bbb 21 * may be used to endorse or promote products derived from this software
Jerome Coutant 0:146cf26a9bbb 22 * without specific prior written permission.
Jerome Coutant 0:146cf26a9bbb 23 *
Jerome Coutant 0:146cf26a9bbb 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Jerome Coutant 0:146cf26a9bbb 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Jerome Coutant 0:146cf26a9bbb 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Jerome Coutant 0:146cf26a9bbb 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Jerome Coutant 0:146cf26a9bbb 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Jerome Coutant 0:146cf26a9bbb 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Jerome Coutant 0:146cf26a9bbb 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Jerome Coutant 0:146cf26a9bbb 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Jerome Coutant 0:146cf26a9bbb 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Jerome Coutant 0:146cf26a9bbb 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Jerome Coutant 0:146cf26a9bbb 34 *
Jerome Coutant 0:146cf26a9bbb 35 ******************************************************************************
Jerome Coutant 0:146cf26a9bbb 36 */
Jerome Coutant 0:146cf26a9bbb 37
Jerome Coutant 0:146cf26a9bbb 38 /* Define to prevent recursive inclusion -------------------------------------*/
Jerome Coutant 0:146cf26a9bbb 39 #ifndef __MT25TL01G_H
Jerome Coutant 0:146cf26a9bbb 40 #define __MT25TL01G_H
Jerome Coutant 0:146cf26a9bbb 41
Jerome Coutant 0:146cf26a9bbb 42 #ifdef __cplusplus
Jerome Coutant 0:146cf26a9bbb 43 extern "C" {
Jerome Coutant 0:146cf26a9bbb 44 #endif
Jerome Coutant 0:146cf26a9bbb 45
Jerome Coutant 0:146cf26a9bbb 46 /* Includes ------------------------------------------------------------------*/
Jerome Coutant 0:146cf26a9bbb 47
Jerome Coutant 0:146cf26a9bbb 48 /** @addtogroup BSP
Jerome Coutant 0:146cf26a9bbb 49 * @{
Jerome Coutant 0:146cf26a9bbb 50 */
Jerome Coutant 0:146cf26a9bbb 51
Jerome Coutant 0:146cf26a9bbb 52 /** @addtogroup Components
Jerome Coutant 0:146cf26a9bbb 53 * @{
Jerome Coutant 0:146cf26a9bbb 54 */
Jerome Coutant 0:146cf26a9bbb 55
Jerome Coutant 0:146cf26a9bbb 56 /** @addtogroup MT25TL01G
Jerome Coutant 0:146cf26a9bbb 57 * @{
Jerome Coutant 0:146cf26a9bbb 58 */
Jerome Coutant 0:146cf26a9bbb 59
Jerome Coutant 0:146cf26a9bbb 60 /** @defgroup MT25TL01G_Exported_Types
Jerome Coutant 0:146cf26a9bbb 61 * @{
Jerome Coutant 0:146cf26a9bbb 62 */
Jerome Coutant 0:146cf26a9bbb 63
Jerome Coutant 0:146cf26a9bbb 64 /**
Jerome Coutant 0:146cf26a9bbb 65 * @}
Jerome Coutant 0:146cf26a9bbb 66 */
Jerome Coutant 0:146cf26a9bbb 67
Jerome Coutant 0:146cf26a9bbb 68 /** @defgroup MT25TL01G_Exported_Constants
Jerome Coutant 0:146cf26a9bbb 69 * @{
Jerome Coutant 0:146cf26a9bbb 70 */
Jerome Coutant 0:146cf26a9bbb 71
Jerome Coutant 0:146cf26a9bbb 72 /**
Jerome Coutant 0:146cf26a9bbb 73 * @brief MT25TL01G Configuration
Jerome Coutant 0:146cf26a9bbb 74 */
Jerome Coutant 0:146cf26a9bbb 75 #define MT25TL01G_FLASH_SIZE 0x8000000 /* 2 * 512 MBits => 2 * 64MBytes => 128MBytes*/
Jerome Coutant 0:146cf26a9bbb 76 #define MT25TL01G_SECTOR_SIZE 0x10000 /* 2 * 1024 sectors of 64KBytes */
Jerome Coutant 0:146cf26a9bbb 77 #define MT25TL01G_SUBSECTOR_SIZE 0x1000 /* 2 * 16384 subsectors of 4kBytes */
Jerome Coutant 0:146cf26a9bbb 78 #define MT25TL01G_PAGE_SIZE 0x100 /* 2 * 262144 pages of 256 bytes */
Jerome Coutant 0:146cf26a9bbb 79
Jerome Coutant 0:146cf26a9bbb 80 #define MT25TL01G_DUMMY_CYCLES_READ_QUAD 8
Jerome Coutant 0:146cf26a9bbb 81 #define MT25TL01G_DUMMY_CYCLES_READ 8
Jerome Coutant 0:146cf26a9bbb 82 #define MT25TL01G_DUMMY_CYCLES_READ_DTR 6
Jerome Coutant 0:146cf26a9bbb 83 #define MT25TL01G_DUMMY_CYCLES_READ_QUAD_DTR 6
Jerome Coutant 0:146cf26a9bbb 84
Jerome Coutant 0:146cf26a9bbb 85 #define MT25TL01G_DIE_ERASE_MAX_TIME 460000
Jerome Coutant 0:146cf26a9bbb 86 #define MT25TL01G_SECTOR_ERASE_MAX_TIME 1000
Jerome Coutant 0:146cf26a9bbb 87 #define MT25TL01G_SUBSECTOR_ERASE_MAX_TIME 400
Jerome Coutant 0:146cf26a9bbb 88
Jerome Coutant 0:146cf26a9bbb 89 /**
Jerome Coutant 0:146cf26a9bbb 90 * @brief MT25TL01G Commands
Jerome Coutant 0:146cf26a9bbb 91 */
Jerome Coutant 0:146cf26a9bbb 92 /* Reset Operations */
Jerome Coutant 0:146cf26a9bbb 93 #define RESET_ENABLE_CMD 0x66
Jerome Coutant 0:146cf26a9bbb 94 #define RESET_MEMORY_CMD 0x99
Jerome Coutant 0:146cf26a9bbb 95
Jerome Coutant 0:146cf26a9bbb 96 /* Identification Operations */
Jerome Coutant 0:146cf26a9bbb 97 #define READ_ID_CMD 0x9E
Jerome Coutant 0:146cf26a9bbb 98 #define READ_ID_CMD2 0x9F
Jerome Coutant 0:146cf26a9bbb 99 #define MULTIPLE_IO_READ_ID_CMD 0xAF
Jerome Coutant 0:146cf26a9bbb 100 #define READ_SERIAL_FLASH_DISCO_PARAM_CMD 0x5A
Jerome Coutant 0:146cf26a9bbb 101
Jerome Coutant 0:146cf26a9bbb 102 /* Read Operations */
Jerome Coutant 0:146cf26a9bbb 103 #define READ_CMD 0x03
Jerome Coutant 0:146cf26a9bbb 104 #define READ_4_BYTE_ADDR_CMD 0x13
Jerome Coutant 0:146cf26a9bbb 105
Jerome Coutant 0:146cf26a9bbb 106 #define FAST_READ_CMD 0x0B
Jerome Coutant 0:146cf26a9bbb 107 #define FAST_READ_DTR_CMD 0x0D
Jerome Coutant 0:146cf26a9bbb 108 #define FAST_READ_4_BYTE_ADDR_CMD 0x0C
Jerome Coutant 0:146cf26a9bbb 109
Jerome Coutant 0:146cf26a9bbb 110 #define DUAL_OUT_FAST_READ_CMD 0x3B
Jerome Coutant 0:146cf26a9bbb 111 #define DUAL_OUT_FAST_READ_DTR_CMD 0x3D
Jerome Coutant 0:146cf26a9bbb 112 #define DUAL_OUT_FAST_READ_4_BYTE_ADDR_CMD 0x3C
Jerome Coutant 0:146cf26a9bbb 113
Jerome Coutant 0:146cf26a9bbb 114 #define DUAL_INOUT_FAST_READ_CMD 0xBB
Jerome Coutant 0:146cf26a9bbb 115 #define DUAL_INOUT_FAST_READ_DTR_CMD 0xBD
Jerome Coutant 0:146cf26a9bbb 116 #define DUAL_INOUT_FAST_READ_4_BYTE_ADDR_CMD 0xBC
Jerome Coutant 0:146cf26a9bbb 117
Jerome Coutant 0:146cf26a9bbb 118 #define QUAD_OUT_FAST_READ_CMD 0x6B
Jerome Coutant 0:146cf26a9bbb 119 #define QUAD_OUT_FAST_READ_DTR_CMD 0x6D
Jerome Coutant 0:146cf26a9bbb 120 #define QUAD_OUT_FAST_READ_4_BYTE_ADDR_CMD 0x6C
Jerome Coutant 0:146cf26a9bbb 121
Jerome Coutant 0:146cf26a9bbb 122 #define QUAD_INOUT_FAST_READ_CMD 0xEB
Jerome Coutant 0:146cf26a9bbb 123 #define QUAD_INOUT_FAST_READ_DTR_CMD 0xED
Jerome Coutant 0:146cf26a9bbb 124 #define QUAD_INOUT_FAST_READ_4_BYTE_ADDR_CMD 0xEC
Jerome Coutant 0:146cf26a9bbb 125
Jerome Coutant 0:146cf26a9bbb 126 /* Write Operations */
Jerome Coutant 0:146cf26a9bbb 127 #define WRITE_ENABLE_CMD 0x06
Jerome Coutant 0:146cf26a9bbb 128 #define WRITE_DISABLE_CMD 0x04
Jerome Coutant 0:146cf26a9bbb 129
Jerome Coutant 0:146cf26a9bbb 130 /* Register Operations */
Jerome Coutant 0:146cf26a9bbb 131 #define READ_STATUS_REG_CMD 0x05
Jerome Coutant 0:146cf26a9bbb 132 #define WRITE_STATUS_REG_CMD 0x01
Jerome Coutant 0:146cf26a9bbb 133
Jerome Coutant 0:146cf26a9bbb 134 #define READ_LOCK_REG_CMD 0xE8
Jerome Coutant 0:146cf26a9bbb 135 #define WRITE_LOCK_REG_CMD 0xE5
Jerome Coutant 0:146cf26a9bbb 136
Jerome Coutant 0:146cf26a9bbb 137 #define READ_FLAG_STATUS_REG_CMD 0x70
Jerome Coutant 0:146cf26a9bbb 138 #define CLEAR_FLAG_STATUS_REG_CMD 0x50
Jerome Coutant 0:146cf26a9bbb 139
Jerome Coutant 0:146cf26a9bbb 140 #define READ_NONVOL_CFG_REG_CMD 0xB5
Jerome Coutant 0:146cf26a9bbb 141 #define WRITE_NONVOL_CFG_REG_CMD 0xB1
Jerome Coutant 0:146cf26a9bbb 142
Jerome Coutant 0:146cf26a9bbb 143 #define READ_VOL_CFG_REG_CMD 0x85
Jerome Coutant 0:146cf26a9bbb 144 #define WRITE_VOL_CFG_REG_CMD 0x81
Jerome Coutant 0:146cf26a9bbb 145
Jerome Coutant 0:146cf26a9bbb 146 #define READ_ENHANCED_VOL_CFG_REG_CMD 0x65
Jerome Coutant 0:146cf26a9bbb 147 #define WRITE_ENHANCED_VOL_CFG_REG_CMD 0x61
Jerome Coutant 0:146cf26a9bbb 148
Jerome Coutant 0:146cf26a9bbb 149 #define READ_EXT_ADDR_REG_CMD 0xC8
Jerome Coutant 0:146cf26a9bbb 150 #define WRITE_EXT_ADDR_REG_CMD 0xC5
Jerome Coutant 0:146cf26a9bbb 151
Jerome Coutant 0:146cf26a9bbb 152 /* Program Operations */
Jerome Coutant 0:146cf26a9bbb 153 #define PAGE_PROG_CMD 0x02
Jerome Coutant 0:146cf26a9bbb 154 #define PAGE_PROG_4_BYTE_ADDR_CMD 0x12
Jerome Coutant 0:146cf26a9bbb 155
Jerome Coutant 0:146cf26a9bbb 156 #define DUAL_IN_FAST_PROG_CMD 0xA2
Jerome Coutant 0:146cf26a9bbb 157 #define EXT_DUAL_IN_FAST_PROG_CMD 0xD2
Jerome Coutant 0:146cf26a9bbb 158
Jerome Coutant 0:146cf26a9bbb 159 #define QUAD_IN_FAST_PROG_CMD 0x32
Jerome Coutant 0:146cf26a9bbb 160 #define EXT_QUAD_IN_FAST_PROG_CMD 0x38
Jerome Coutant 0:146cf26a9bbb 161 #define QUAD_IN_FAST_PROG_4_BYTE_ADDR_CMD 0x34
Jerome Coutant 0:146cf26a9bbb 162
Jerome Coutant 0:146cf26a9bbb 163 /* Erase Operations */
Jerome Coutant 0:146cf26a9bbb 164 #define SUBSECTOR_ERASE_CMD 0x20
Jerome Coutant 0:146cf26a9bbb 165 #define SUBSECTOR_ERASE_4_BYTE_ADDR_CMD 0x21
Jerome Coutant 0:146cf26a9bbb 166
Jerome Coutant 0:146cf26a9bbb 167 #define SECTOR_ERASE_CMD 0xD8
Jerome Coutant 0:146cf26a9bbb 168 #define SECTOR_ERASE_4_BYTE_ADDR_CMD 0xDC
Jerome Coutant 0:146cf26a9bbb 169
Jerome Coutant 0:146cf26a9bbb 170 #define DIE_ERASE_CMD 0xC4
Jerome Coutant 0:146cf26a9bbb 171
Jerome Coutant 0:146cf26a9bbb 172 #define PROG_ERASE_RESUME_CMD 0x7A
Jerome Coutant 0:146cf26a9bbb 173 #define PROG_ERASE_SUSPEND_CMD 0x75
Jerome Coutant 0:146cf26a9bbb 174
Jerome Coutant 0:146cf26a9bbb 175 /* One-Time Programmable Operations */
Jerome Coutant 0:146cf26a9bbb 176 #define READ_OTP_ARRAY_CMD 0x4B
Jerome Coutant 0:146cf26a9bbb 177 #define PROG_OTP_ARRAY_CMD 0x42
Jerome Coutant 0:146cf26a9bbb 178
Jerome Coutant 0:146cf26a9bbb 179 /* 4-byte Address Mode Operations */
Jerome Coutant 0:146cf26a9bbb 180 #define ENTER_4_BYTE_ADDR_MODE_CMD 0xB7
Jerome Coutant 0:146cf26a9bbb 181 #define EXIT_4_BYTE_ADDR_MODE_CMD 0xE9
Jerome Coutant 0:146cf26a9bbb 182
Jerome Coutant 0:146cf26a9bbb 183 /* Quad Operations */
Jerome Coutant 0:146cf26a9bbb 184 #define ENTER_QUAD_CMD 0x35
Jerome Coutant 0:146cf26a9bbb 185 #define EXIT_QUAD_CMD 0xF5
Jerome Coutant 0:146cf26a9bbb 186
Jerome Coutant 0:146cf26a9bbb 187 /**
Jerome Coutant 0:146cf26a9bbb 188 * @brief MT25TL01G Registers
Jerome Coutant 0:146cf26a9bbb 189 */
Jerome Coutant 0:146cf26a9bbb 190 /* Status Register */
Jerome Coutant 0:146cf26a9bbb 191 #define MT25TL01G_SR_WIP ((uint8_t)0x01) /*!< Write in progress */
Jerome Coutant 0:146cf26a9bbb 192 #define MT25TL01G_SR_WREN ((uint8_t)0x02) /*!< Write enable latch */
Jerome Coutant 0:146cf26a9bbb 193 #define MT25TL01G_SR_BLOCKPR ((uint8_t)0x5C) /*!< Block protected against program and erase operations */
Jerome Coutant 0:146cf26a9bbb 194 #define MT25TL01G_SR_PRBOTTOM ((uint8_t)0x20) /*!< Protected memory area defined by BLOCKPR starts from top or bottom */
Jerome Coutant 0:146cf26a9bbb 195 #define MT25TL01G_SR_SRWREN ((uint8_t)0x80) /*!< Status register write enable/disable */
Jerome Coutant 0:146cf26a9bbb 196
Jerome Coutant 0:146cf26a9bbb 197 /* Non volatile Configuration Register */
Jerome Coutant 0:146cf26a9bbb 198 #define MT25TL01G_NVCR_NBADDR ((uint16_t)0x0001) /*!< 3-bytes or 4-bytes addressing */
Jerome Coutant 0:146cf26a9bbb 199 #define MT25TL01G_NVCR_SEGMENT ((uint16_t)0x0002) /*!< Upper or lower 128Mb segment selected by default */
Jerome Coutant 0:146cf26a9bbb 200 #define MT25TL01G_NVCR_DUAL ((uint16_t)0x0004) /*!< Dual I/O protocol */
Jerome Coutant 0:146cf26a9bbb 201 #define MT25TL01G_NVCR_QUAB ((uint16_t)0x0008) /*!< Quad I/O protocol */
Jerome Coutant 0:146cf26a9bbb 202 #define MT25TL01G_NVCR_RH ((uint16_t)0x0010) /*!< Reset/hold */
Jerome Coutant 0:146cf26a9bbb 203 #define MT25TL01G_NVCR_DTRP ((uint16_t)0x0020) /*!< Double transfer rate protocol */
Jerome Coutant 0:146cf26a9bbb 204 #define MT25TL01G_NVCR_ODS ((uint16_t)0x01C0) /*!< Output driver strength */
Jerome Coutant 0:146cf26a9bbb 205 #define MT25TL01G_NVCR_XIP ((uint16_t)0x0E00) /*!< XIP mode at power-on reset */
Jerome Coutant 0:146cf26a9bbb 206 #define MT25TL01G_NVCR_NB_DUMMY ((uint16_t)0xF000) /*!< Number of dummy clock cycles */
Jerome Coutant 0:146cf26a9bbb 207
Jerome Coutant 0:146cf26a9bbb 208 /* Volatile Configuration Register */
Jerome Coutant 0:146cf26a9bbb 209 #define MT25TL01G_VCR_WRAP ((uint8_t)0x03) /*!< Wrap */
Jerome Coutant 0:146cf26a9bbb 210 #define MT25TL01G_VCR_XIP ((uint8_t)0x08) /*!< XIP */
Jerome Coutant 0:146cf26a9bbb 211 #define MT25TL01G_VCR_NB_DUMMY ((uint8_t)0xF0) /*!< Number of dummy clock cycles */
Jerome Coutant 0:146cf26a9bbb 212
Jerome Coutant 0:146cf26a9bbb 213 /* Extended Address Register */
Jerome Coutant 0:146cf26a9bbb 214 #define MT25TL01G_EAR_HIGHEST_SE ((uint8_t)0x03) /*!< Select the Highest 128Mb segment */
Jerome Coutant 0:146cf26a9bbb 215 #define MT25TL01G_EAR_THIRD_SEG ((uint8_t)0x02) /*!< Select the Third 128Mb segment */
Jerome Coutant 0:146cf26a9bbb 216 #define MT25TL01G_EAR_SECOND_SEG ((uint8_t)0x01) /*!< Select the Second 128Mb segment */
Jerome Coutant 0:146cf26a9bbb 217 #define MT25TL01G_EAR_LOWEST_SEG ((uint8_t)0x00) /*!< Select the Lowest 128Mb segment (default) */
Jerome Coutant 0:146cf26a9bbb 218
Jerome Coutant 0:146cf26a9bbb 219 /* Enhanced Volatile Configuration Register */
Jerome Coutant 0:146cf26a9bbb 220 #define MT25TL01G_EVCR_ODS ((uint8_t)0x07) /*!< Output driver strength */
Jerome Coutant 0:146cf26a9bbb 221 #define MT25TL01G_EVCR_RH ((uint8_t)0x10) /*!< Reset/hold */
Jerome Coutant 0:146cf26a9bbb 222 #define MT25TL01G_EVCR_DTRP ((uint8_t)0x20) /*!< Double transfer rate protocol */
Jerome Coutant 0:146cf26a9bbb 223 #define MT25TL01G_EVCR_DUAL ((uint8_t)0x40) /*!< Dual I/O protocol */
Jerome Coutant 0:146cf26a9bbb 224 #define MT25TL01G_EVCR_QUAD ((uint8_t)0x80) /*!< Quad I/O protocol */
Jerome Coutant 0:146cf26a9bbb 225
Jerome Coutant 0:146cf26a9bbb 226 /* Flag Status Register */
Jerome Coutant 0:146cf26a9bbb 227 #define MT25TL01G_FSR_NBADDR ((uint8_t)0x01) /*!< 3-bytes or 4-bytes addressing */
Jerome Coutant 0:146cf26a9bbb 228 #define MT25TL01G_FSR_PRERR ((uint8_t)0x02) /*!< Protection error */
Jerome Coutant 0:146cf26a9bbb 229 #define MT25TL01G_FSR_PGSUS ((uint8_t)0x04) /*!< Program operation suspended */
Jerome Coutant 0:146cf26a9bbb 230 #define MT25TL01G_FSR_PGERR ((uint8_t)0x10) /*!< Program error */
Jerome Coutant 0:146cf26a9bbb 231 #define MT25TL01G_FSR_ERERR ((uint8_t)0x20) /*!< Erase error */
Jerome Coutant 0:146cf26a9bbb 232 #define MT25TL01G_FSR_ERSUS ((uint8_t)0x40) /*!< Erase operation suspended */
Jerome Coutant 0:146cf26a9bbb 233 #define MT25TL01G_FSR_READY ((uint8_t)0x80) /*!< Ready or command in progress */
Jerome Coutant 0:146cf26a9bbb 234
Jerome Coutant 0:146cf26a9bbb 235
Jerome Coutant 0:146cf26a9bbb 236 /**
Jerome Coutant 0:146cf26a9bbb 237 * @}
Jerome Coutant 0:146cf26a9bbb 238 */
Jerome Coutant 0:146cf26a9bbb 239
Jerome Coutant 0:146cf26a9bbb 240 /** @defgroup MT25TL01G_Exported_Functions
Jerome Coutant 0:146cf26a9bbb 241 * @{
Jerome Coutant 0:146cf26a9bbb 242 */
Jerome Coutant 0:146cf26a9bbb 243 /**
Jerome Coutant 0:146cf26a9bbb 244 * @}
Jerome Coutant 0:146cf26a9bbb 245 */
Jerome Coutant 0:146cf26a9bbb 246
Jerome Coutant 0:146cf26a9bbb 247 #ifdef __cplusplus
Jerome Coutant 0:146cf26a9bbb 248 }
Jerome Coutant 0:146cf26a9bbb 249 #endif
Jerome Coutant 0:146cf26a9bbb 250
Jerome Coutant 0:146cf26a9bbb 251 #endif /* __MT25TL01G_H */
Jerome Coutant 0:146cf26a9bbb 252
Jerome Coutant 0:146cf26a9bbb 253 /**
Jerome Coutant 0:146cf26a9bbb 254 * @}
Jerome Coutant 0:146cf26a9bbb 255 */
Jerome Coutant 0:146cf26a9bbb 256
Jerome Coutant 0:146cf26a9bbb 257 /**
Jerome Coutant 0:146cf26a9bbb 258 * @}
Jerome Coutant 0:146cf26a9bbb 259 */
Jerome Coutant 0:146cf26a9bbb 260
Jerome Coutant 0:146cf26a9bbb 261 /**
Jerome Coutant 0:146cf26a9bbb 262 * @}
Jerome Coutant 0:146cf26a9bbb 263 */
Jerome Coutant 0:146cf26a9bbb 264
Jerome Coutant 0:146cf26a9bbb 265 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/