STM32Cube BSP FW for STM32F769I-Discovery
Dependents: mbed-os-example-blinky-5 DISCO-F769NI_TOUCHSCREEN_demo_custom_1 Datarecorder2 DISCO-F769NI_TOUCHSCREEN_demo ... more
otm8009a.c
00001 /** 00002 ****************************************************************************** 00003 * @file otm8009a.c 00004 * @author MCD Application Team 00005 * @brief This file provides the LCD Driver for KoD KM-040TMP-02-0621 (WVGA) 00006 * DSI LCD Display OTM8009A. 00007 ****************************************************************************** 00008 * @attention 00009 * 00010 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00011 * 00012 * Redistribution and use in source and binary forms, with or without modification, 00013 * are permitted provided that the following conditions are met: 00014 * 1. Redistributions of source code must retain the above copyright notice, 00015 * this list of conditions and the following disclaimer. 00016 * 2. Redistributions in binary form must reproduce the above copyright notice, 00017 * this list of conditions and the following disclaimer in the documentation 00018 * and/or other materials provided with the distribution. 00019 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00020 * may be used to endorse or promote products derived from this software 00021 * without specific prior written permission. 00022 * 00023 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00024 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00025 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00026 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00027 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00028 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00029 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00030 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00031 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00032 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00033 * 00034 ****************************************************************************** 00035 */ 00036 00037 /* Includes ------------------------------------------------------------------*/ 00038 #include "otm8009a.h" 00039 00040 /** @addtogroup BSP 00041 * @{ 00042 */ 00043 00044 /** @addtogroup Components 00045 * @{ 00046 */ 00047 00048 /** @defgroup OTM8009A OTM8009A 00049 * @brief This file provides a set of functions needed to drive the 00050 * otm8009a IC display driver. 00051 * @{ 00052 */ 00053 00054 /* Private types -------------------------------------------------------------*/ 00055 /* Private variables ---------------------------------------------------------*/ 00056 /* Private constants ---------------------------------------------------------*/ 00057 /** @defgroup OTM8009A_Private_Constants OTM8009A Private Constants 00058 * @{ 00059 */ 00060 00061 /* 00062 * @brief Constant tables of register settings used to transmit DSI 00063 * command packets as power up initialization sequence of the KoD LCD (OTM8009A LCD Driver) 00064 */ 00065 const uint8_t lcdRegData1[] = {0x80,0x09,0x01,0xFF}; 00066 const uint8_t lcdRegData2[] = {0x80,0x09,0xFF}; 00067 const uint8_t lcdRegData3[] = {0x00,0x09,0x0F,0x0E,0x07,0x10,0x0B,0x0A,0x04,0x07,0x0B,0x08,0x0F,0x10,0x0A,0x01,0xE1}; 00068 const uint8_t lcdRegData4[] = {0x00,0x09,0x0F,0x0E,0x07,0x10,0x0B,0x0A,0x04,0x07,0x0B,0x08,0x0F,0x10,0x0A,0x01,0xE2}; 00069 const uint8_t lcdRegData5[] = {0x79,0x79,0xD8}; 00070 const uint8_t lcdRegData6[] = {0x00,0x01,0xB3}; 00071 const uint8_t lcdRegData7[] = {0x85,0x01,0x00,0x84,0x01,0x00,0xCE}; 00072 const uint8_t lcdRegData8[] = {0x18,0x04,0x03,0x39,0x00,0x00,0x00,0x18,0x03,0x03,0x3A,0x00,0x00,0x00,0xCE}; 00073 const uint8_t lcdRegData9[] = {0x18,0x02,0x03,0x3B,0x00,0x00,0x00,0x18,0x01,0x03,0x3C,0x00,0x00,0x00,0xCE}; 00074 const uint8_t lcdRegData10[] = {0x01,0x01,0x20,0x20,0x00,0x00,0x01,0x02,0x00,0x00,0xCF}; 00075 const uint8_t lcdRegData11[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB}; 00076 const uint8_t lcdRegData12[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB}; 00077 const uint8_t lcdRegData13[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB}; 00078 const uint8_t lcdRegData14[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB}; 00079 const uint8_t lcdRegData15[] = {0x00,0x04,0x04,0x04,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB}; 00080 const uint8_t lcdRegData16[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x04,0x04,0x04,0x04,0x00,0x00,0x00,0x00,0xCB}; 00081 const uint8_t lcdRegData17[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB}; 00082 const uint8_t lcdRegData18[] = {0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xCB}; 00083 const uint8_t lcdRegData19[] = {0x00,0x26,0x09,0x0B,0x01,0x25,0x00,0x00,0x00,0x00,0xCC}; 00084 const uint8_t lcdRegData20[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x26,0x0A,0x0C,0x02,0xCC}; 00085 const uint8_t lcdRegData21[] = {0x25,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCC}; 00086 const uint8_t lcdRegData22[] = {0x00,0x25,0x0C,0x0A,0x02,0x26,0x00,0x00,0x00,0x00,0xCC}; 00087 const uint8_t lcdRegData23[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x25,0x0B,0x09,0x01,0xCC}; 00088 const uint8_t lcdRegData24[] = {0x26,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCC}; 00089 const uint8_t lcdRegData25[] = {0xFF,0xFF,0xFF,0xFF}; 00090 /* 00091 * CASET value (Column Address Set) : X direction LCD GRAM boundaries 00092 * depending on LCD orientation mode and PASET value (Page Address Set) : Y direction 00093 * LCD GRAM boundaries depending on LCD orientation mode 00094 * XS[15:0] = 0x000 = 0, XE[15:0] = 0x31F = 799 for landscape mode : apply to CASET 00095 * YS[15:0] = 0x000 = 0, YE[15:0] = 0x31F = 799 for portrait mode : : apply to PASET 00096 */ 00097 const uint8_t lcdRegData27[] = {0x00, 0x00, 0x03, 0x1F, OTM8009A_CMD_CASET}; 00098 /* 00099 * XS[15:0] = 0x000 = 0, XE[15:0] = 0x1DF = 479 for portrait mode : apply to CASET 00100 * YS[15:0] = 0x000 = 0, YE[15:0] = 0x1DF = 479 for landscape mode : apply to PASET 00101 */ 00102 const uint8_t lcdRegData28[] = {0x00, 0x00, 0x01, 0xDF, OTM8009A_CMD_PASET}; 00103 00104 00105 const uint8_t ShortRegData1[] = {OTM8009A_CMD_NOP, 0x00}; 00106 const uint8_t ShortRegData2[] = {OTM8009A_CMD_NOP, 0x80}; 00107 const uint8_t ShortRegData3[] = {0xC4, 0x30}; 00108 const uint8_t ShortRegData4[] = {OTM8009A_CMD_NOP, 0x8A}; 00109 const uint8_t ShortRegData5[] = {0xC4, 0x40}; 00110 const uint8_t ShortRegData6[] = {OTM8009A_CMD_NOP, 0xB1}; 00111 const uint8_t ShortRegData7[] = {0xC5, 0xA9}; 00112 const uint8_t ShortRegData8[] = {OTM8009A_CMD_NOP, 0x91}; 00113 const uint8_t ShortRegData9[] = {0xC5, 0x34}; 00114 const uint8_t ShortRegData10[] = {OTM8009A_CMD_NOP, 0xB4}; 00115 const uint8_t ShortRegData11[] = {0xC0, 0x50}; 00116 const uint8_t ShortRegData12[] = {0xD9, 0x4E}; 00117 const uint8_t ShortRegData13[] = {OTM8009A_CMD_NOP, 0x81}; 00118 const uint8_t ShortRegData14[] = {0xC1, 0x66}; 00119 const uint8_t ShortRegData15[] = {OTM8009A_CMD_NOP, 0xA1}; 00120 const uint8_t ShortRegData16[] = {0xC1, 0x08}; 00121 const uint8_t ShortRegData17[] = {OTM8009A_CMD_NOP, 0x92}; 00122 const uint8_t ShortRegData18[] = {0xC5, 0x01}; 00123 const uint8_t ShortRegData19[] = {OTM8009A_CMD_NOP, 0x95}; 00124 const uint8_t ShortRegData20[] = {OTM8009A_CMD_NOP, 0x94}; 00125 const uint8_t ShortRegData21[] = {0xC5, 0x33}; 00126 const uint8_t ShortRegData22[] = {OTM8009A_CMD_NOP, 0xA3}; 00127 const uint8_t ShortRegData23[] = {0xC0, 0x1B}; 00128 const uint8_t ShortRegData24[] = {OTM8009A_CMD_NOP, 0x82}; 00129 const uint8_t ShortRegData25[] = {0xC5, 0x83}; 00130 const uint8_t ShortRegData26[] = {0xC4, 0x83}; 00131 const uint8_t ShortRegData27[] = {0xC1, 0x0E}; 00132 const uint8_t ShortRegData28[] = {OTM8009A_CMD_NOP, 0xA6}; 00133 const uint8_t ShortRegData29[] = {OTM8009A_CMD_NOP, 0xA0}; 00134 const uint8_t ShortRegData30[] = {OTM8009A_CMD_NOP, 0xB0}; 00135 const uint8_t ShortRegData31[] = {OTM8009A_CMD_NOP, 0xC0}; 00136 const uint8_t ShortRegData32[] = {OTM8009A_CMD_NOP, 0xD0}; 00137 const uint8_t ShortRegData33[] = {OTM8009A_CMD_NOP, 0x90}; 00138 const uint8_t ShortRegData34[] = {OTM8009A_CMD_NOP, 0xE0}; 00139 const uint8_t ShortRegData35[] = {OTM8009A_CMD_NOP, 0xF0}; 00140 const uint8_t ShortRegData36[] = {OTM8009A_CMD_SLPOUT, 0x00}; 00141 const uint8_t ShortRegData37[] = {OTM8009A_CMD_COLMOD, OTM8009A_COLMOD_RGB565}; 00142 const uint8_t ShortRegData38[] = {OTM8009A_CMD_COLMOD, OTM8009A_COLMOD_RGB888}; 00143 const uint8_t ShortRegData39[] = {OTM8009A_CMD_MADCTR, OTM8009A_MADCTR_MODE_LANDSCAPE}; 00144 const uint8_t ShortRegData40[] = {OTM8009A_CMD_WRDISBV, 0x7F}; 00145 const uint8_t ShortRegData41[] = {OTM8009A_CMD_WRCTRLD, 0x2C}; 00146 const uint8_t ShortRegData42[] = {OTM8009A_CMD_WRCABC, 0x02}; 00147 const uint8_t ShortRegData43[] = {OTM8009A_CMD_WRCABCMB, 0xFF}; 00148 const uint8_t ShortRegData44[] = {OTM8009A_CMD_DISPON, 0x00}; 00149 const uint8_t ShortRegData45[] = {OTM8009A_CMD_RAMWR, 0x00}; 00150 const uint8_t ShortRegData46[] = {0xCF, 0x00}; 00151 const uint8_t ShortRegData47[] = {0xC5, 0x66}; 00152 const uint8_t ShortRegData48[] = {OTM8009A_CMD_NOP, 0xB6}; 00153 const uint8_t ShortRegData49[] = {0xF5, 0x06}; 00154 const uint8_t ShortRegData50[] = {OTM8009A_CMD_NOP, 0xB1}; 00155 const uint8_t ShortRegData51[] = {0xC6, 0x06}; 00156 /** 00157 * @} 00158 */ 00159 00160 /* Private macros ------------------------------------------------------------*/ 00161 /* Private functions ---------------------------------------------------------*/ 00162 /** @defgroup OTM8009A_Exported_Variables 00163 * @{ 00164 */ 00165 00166 /** 00167 * @} 00168 */ 00169 00170 /* Exported functions ---------------------------------------------------------*/ 00171 /** @defgroup OTM8009A_Exported_Functions OTM8009A Exported Functions 00172 * @{ 00173 */ 00174 00175 /** 00176 * @brief DSI IO write short/long command. 00177 * @note : Can be surcharged by application code implementation of the function. 00178 */ 00179 __weak void DSI_IO_WriteCmd(uint32_t NbrParams, uint8_t *pParams) 00180 { 00181 /* NOTE : This function Should not be modified, when it is needed, 00182 the DSI_IO_WriteCmd could be implemented in the user file 00183 */ 00184 } 00185 00186 /** 00187 * @brief Initializes the LCD KoD display part by communication in DSI mode in Video Mode 00188 * with IC Display Driver OTM8009A (see IC Driver specification for more information). 00189 * @param hdsi_eval : pointer on DSI configuration structure 00190 * @param hdsivideo_handle : pointer on DSI video mode configuration structure 00191 * @retval Status 00192 */ 00193 uint8_t OTM8009A_Init(uint32_t ColorCoding, uint32_t orientation) 00194 { 00195 /* Enable CMD2 to access vendor specific commands */ 00196 /* Enter in command 2 mode and set EXTC to enable address shift function (0x00) */ 00197 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1); 00198 DSI_IO_WriteCmd( 3, (uint8_t *)lcdRegData1); 00199 00200 /* Enter ORISE Command 2 */ 00201 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData2); /* Shift address to 0x80 */ 00202 DSI_IO_WriteCmd( 2, (uint8_t *)lcdRegData2); 00203 00204 ///////////////////////////////////////////////////////////////////// 00205 /* SD_PCH_CTRL - 0xC480h - 129th parameter - Default 0x00 */ 00206 /* Set SD_PT */ 00207 /* -> Source output level during porch and non-display area to GND */ 00208 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData2); 00209 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData3); 00210 OTM8009A_IO_Delay(10); 00211 /* Not documented */ 00212 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData4); 00213 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData5); 00214 OTM8009A_IO_Delay(10); 00215 ///////////////////////////////////////////////////////////////////// 00216 00217 /* PWR_CTRL4 - 0xC4B0h - 178th parameter - Default 0xA8 */ 00218 /* Set gvdd_en_test */ 00219 /* -> enable GVDD test mode !!! */ 00220 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData6); 00221 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData7); 00222 00223 /* PWR_CTRL2 - 0xC590h - 146th parameter - Default 0x79 */ 00224 /* Set pump 4 vgh voltage */ 00225 /* -> from 15.0v down to 13.0v */ 00226 /* Set pump 5 vgh voltage */ 00227 /* -> from -12.0v downto -9.0v */ 00228 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData8); 00229 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData9); 00230 00231 /* P_DRV_M - 0xC0B4h - 181th parameter - Default 0x00 */ 00232 /* -> Column inversion */ 00233 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData10); 00234 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData11); 00235 00236 /* VCOMDC - 0xD900h - 1st parameter - Default 0x39h */ 00237 /* VCOM Voltage settings */ 00238 /* -> from -1.0000v downto -1.2625v */ 00239 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1); 00240 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData12); 00241 00242 /* Oscillator adjustment for Idle/Normal mode (LPDT only) set to 65Hz (default is 60Hz) */ 00243 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData13); 00244 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData14); 00245 00246 /* Video mode internal */ 00247 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData15); 00248 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData16); 00249 00250 /* PWR_CTRL2 - 0xC590h - 147h parameter - Default 0x00 */ 00251 /* Set pump 4&5 x6 */ 00252 /* -> ONLY VALID when PUMP4_EN_ASDM_HV = "0" */ 00253 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData17); 00254 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData18); 00255 00256 /* PWR_CTRL2 - 0xC590h - 150th parameter - Default 0x33h */ 00257 /* Change pump4 clock ratio */ 00258 /* -> from 1 line to 1/2 line */ 00259 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData19); 00260 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData9); 00261 00262 /* GVDD/NGVDD settings */ 00263 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1); 00264 DSI_IO_WriteCmd( 2, (uint8_t *)lcdRegData5); 00265 00266 /* PWR_CTRL2 - 0xC590h - 149th parameter - Default 0x33h */ 00267 /* Rewrite the default value ! */ 00268 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData20); 00269 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData21); 00270 00271 /* Panel display timing Setting 3 */ 00272 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData22); 00273 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData23); 00274 00275 /* Power control 1 */ 00276 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData24); 00277 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData25); 00278 00279 /* Source driver precharge */ 00280 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData13); 00281 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData26); 00282 00283 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData15); 00284 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData27); 00285 00286 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData28); 00287 DSI_IO_WriteCmd( 2, (uint8_t *)lcdRegData6); 00288 00289 /* GOAVST */ 00290 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData2); 00291 DSI_IO_WriteCmd( 6, (uint8_t *)lcdRegData7); 00292 00293 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData29); 00294 DSI_IO_WriteCmd( 14, (uint8_t *)lcdRegData8); 00295 00296 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData30); 00297 DSI_IO_WriteCmd( 14, (uint8_t *)lcdRegData9); 00298 00299 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData31); 00300 DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData10); 00301 00302 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData32); 00303 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData46); 00304 00305 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData2); 00306 DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData11); 00307 00308 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData33); 00309 DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData12); 00310 00311 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData29); 00312 DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData13); 00313 00314 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData30); 00315 DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData14); 00316 00317 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData31); 00318 DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData15); 00319 00320 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData32); 00321 DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData16); 00322 00323 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData34); 00324 DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData17); 00325 00326 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData35); 00327 DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData18); 00328 00329 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData2); 00330 DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData19); 00331 00332 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData33); 00333 DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData20); 00334 00335 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData29); 00336 DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData21); 00337 00338 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData30); 00339 DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData22); 00340 00341 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData31); 00342 DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData23); 00343 00344 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData32); 00345 DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData24); 00346 00347 ///////////////////////////////////////////////////////////////////////////// 00348 /* PWR_CTRL1 - 0xc580h - 130th parameter - default 0x00 */ 00349 /* Pump 1 min and max DM */ 00350 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData13); 00351 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData47); 00352 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData48); 00353 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData49); 00354 ///////////////////////////////////////////////////////////////////////////// 00355 00356 /* CABC LEDPWM frequency adjusted to 19,5kHz */ 00357 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData50); 00358 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData51); 00359 00360 /* Exit CMD2 mode */ 00361 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1); 00362 DSI_IO_WriteCmd( 3, (uint8_t *)lcdRegData25); 00363 00364 /*************************************************************************** */ 00365 /* Standard DCS Initialization TO KEEP CAN BE DONE IN HSDT */ 00366 /*************************************************************************** */ 00367 00368 /* NOP - goes back to DCS std command ? */ 00369 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1); 00370 00371 /* Gamma correction 2.2+ table (HSDT possible) */ 00372 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1); 00373 DSI_IO_WriteCmd( 16, (uint8_t *)lcdRegData3); 00374 00375 /* Gamma correction 2.2- table (HSDT possible) */ 00376 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1); 00377 DSI_IO_WriteCmd( 16, (uint8_t *)lcdRegData4); 00378 00379 /* Send Sleep Out command to display : no parameter */ 00380 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData36); 00381 00382 /* Wait for sleep out exit */ 00383 OTM8009A_IO_Delay(120); 00384 00385 switch(ColorCoding) 00386 { 00387 case OTM8009A_FORMAT_RBG565 : 00388 /* Set Pixel color format to RGB565 */ 00389 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData37); 00390 break; 00391 case OTM8009A_FORMAT_RGB888 : 00392 /* Set Pixel color format to RGB888 */ 00393 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData38); 00394 break; 00395 default : 00396 break; 00397 } 00398 00399 /* Send command to configure display in landscape orientation mode. By default 00400 the orientation mode is portrait */ 00401 if(orientation == OTM8009A_ORIENTATION_LANDSCAPE) 00402 { 00403 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData39); 00404 DSI_IO_WriteCmd( 4, (uint8_t *)lcdRegData27); 00405 DSI_IO_WriteCmd( 4, (uint8_t *)lcdRegData28); 00406 } 00407 00408 /** CABC : Content Adaptive Backlight Control section start >> */ 00409 /* Note : defaut is 0 (lowest Brightness), 0xFF is highest Brightness, try 0x7F : intermediate value */ 00410 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData40); 00411 00412 /* defaut is 0, try 0x2C - Brightness Control Block, Display Dimming & BackLight on */ 00413 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData41); 00414 00415 /* defaut is 0, try 0x02 - image Content based Adaptive Brightness [Still Picture] */ 00416 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData42); 00417 00418 /* defaut is 0 (lowest Brightness), 0xFF is highest Brightness */ 00419 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData43); 00420 00421 /** CABC : Content Adaptive Backlight Control section end << */ 00422 00423 /* Send Command Display On */ 00424 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData44); 00425 00426 /* NOP command */ 00427 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1); 00428 00429 /* Send Command GRAM memory write (no parameters) : this initiates frame write via other DSI commands sent by */ 00430 /* DSI host from LTDC incoming pixels in video mode */ 00431 DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData45); 00432 00433 return 0; 00434 } 00435 00436 /** 00437 * @} 00438 */ 00439 00440 /** 00441 * @} 00442 */ 00443 00444 /** 00445 * @} 00446 */ 00447 00448 /** 00449 * @} 00450 */ 00451 00452 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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