ST
STM32746G-Discovery board drivers V1.0.0
Dependents: DISCO-F746NG_LCDTS_CC3000_NTP DISCO-F746NG_ROPE_WIFI F746_SpectralAnalysis_NoPhoto ecte433 ... more
Drivers/BSP/Components/wm8994/wm8994.c@13:85dbcff443aa, 2019-11-27 (annotated)
- Committer:
- jeromecoutant
- Date:
- Wed Nov 27 08:29:42 2019 +0000
- Revision:
- 13:85dbcff443aa
- Parent:
- 10:1050c589b2ad
Fix OV9655 Camera Driver
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
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| bcostm | 6:e1d9da7fe856 | 1 | /** |
| bcostm | 6:e1d9da7fe856 | 2 | ****************************************************************************** |
| bcostm | 6:e1d9da7fe856 | 3 | * @file wm8994.c |
| bcostm | 6:e1d9da7fe856 | 4 | * @author MCD Application Team |
Jerome Coutant |
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* @brief This file provides the WM8994 Audio Codec driver.
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| bcostm | 6:e1d9da7fe856 | 6 | ****************************************************************************** |
| bcostm | 6:e1d9da7fe856 | 7 | * @attention |
| bcostm | 6:e1d9da7fe856 | 8 | * |
| bcostm | 6:e1d9da7fe856 | 9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| bcostm | 6:e1d9da7fe856 | 10 | * |
| bcostm | 6:e1d9da7fe856 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| bcostm | 6:e1d9da7fe856 | 12 | * are permitted provided that the following conditions are met: |
| bcostm | 6:e1d9da7fe856 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| bcostm | 6:e1d9da7fe856 | 14 | * this list of conditions and the following disclaimer. |
| bcostm | 6:e1d9da7fe856 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bcostm | 6:e1d9da7fe856 | 16 | * this list of conditions and the following disclaimer in the documentation |
| bcostm | 6:e1d9da7fe856 | 17 | * and/or other materials provided with the distribution. |
| bcostm | 6:e1d9da7fe856 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bcostm | 6:e1d9da7fe856 | 19 | * may be used to endorse or promote products derived from this software |
| bcostm | 6:e1d9da7fe856 | 20 | * without specific prior written permission. |
| bcostm | 6:e1d9da7fe856 | 21 | * |
| bcostm | 6:e1d9da7fe856 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bcostm | 6:e1d9da7fe856 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bcostm | 6:e1d9da7fe856 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bcostm | 6:e1d9da7fe856 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bcostm | 6:e1d9da7fe856 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bcostm | 6:e1d9da7fe856 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bcostm | 6:e1d9da7fe856 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bcostm | 6:e1d9da7fe856 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bcostm | 6:e1d9da7fe856 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bcostm | 6:e1d9da7fe856 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bcostm | 6:e1d9da7fe856 | 32 | * |
| bcostm | 6:e1d9da7fe856 | 33 | ****************************************************************************** |
| bcostm | 6:e1d9da7fe856 | 34 | */ |
| bcostm | 6:e1d9da7fe856 | 35 | |
| bcostm | 6:e1d9da7fe856 | 36 | /* Includes ------------------------------------------------------------------*/ |
| bcostm | 6:e1d9da7fe856 | 37 | #include "wm8994.h" |
| bcostm | 6:e1d9da7fe856 | 38 | |
| bcostm | 6:e1d9da7fe856 | 39 | /** @addtogroup BSP |
| bcostm | 6:e1d9da7fe856 | 40 | * @{ |
| bcostm | 6:e1d9da7fe856 | 41 | */ |
| bcostm | 6:e1d9da7fe856 | 42 | |
| bcostm | 6:e1d9da7fe856 | 43 | /** @addtogroup Components |
| bcostm | 6:e1d9da7fe856 | 44 | * @{ |
| bcostm | 6:e1d9da7fe856 | 45 | */ |
| bcostm | 6:e1d9da7fe856 | 46 | |
| bcostm | 6:e1d9da7fe856 | 47 | /** @addtogroup wm8994 |
| bcostm | 6:e1d9da7fe856 | 48 | * @brief This file provides a set of functions needed to drive the |
| bcostm | 6:e1d9da7fe856 | 49 | * WM8994 audio codec. |
| bcostm | 6:e1d9da7fe856 | 50 | * @{ |
| bcostm | 6:e1d9da7fe856 | 51 | */ |
| bcostm | 6:e1d9da7fe856 | 52 | |
| bcostm | 6:e1d9da7fe856 | 53 | /** @defgroup WM8994_Private_Types |
| bcostm | 6:e1d9da7fe856 | 54 | * @{ |
| bcostm | 6:e1d9da7fe856 | 55 | */ |
| bcostm | 6:e1d9da7fe856 | 56 | |
| bcostm | 6:e1d9da7fe856 | 57 | /** |
| bcostm | 6:e1d9da7fe856 | 58 | * @} |
| bcostm | 6:e1d9da7fe856 | 59 | */ |
| bcostm | 6:e1d9da7fe856 | 60 | |
| bcostm | 6:e1d9da7fe856 | 61 | /** @defgroup WM8994_Private_Defines |
| bcostm | 6:e1d9da7fe856 | 62 | * @{ |
| bcostm | 6:e1d9da7fe856 | 63 | */ |
| bcostm | 6:e1d9da7fe856 | 64 | /* Uncomment this line to enable verifying data sent to codec after each write |
| bcostm | 6:e1d9da7fe856 | 65 | operation (for debug purpose) */ |
| bcostm | 6:e1d9da7fe856 | 66 | #if !defined (VERIFY_WRITTENDATA) |
| bcostm | 6:e1d9da7fe856 | 67 | /*#define VERIFY_WRITTENDATA*/ |
| bcostm | 6:e1d9da7fe856 | 68 | #endif /* VERIFY_WRITTENDATA */ |
| bcostm | 6:e1d9da7fe856 | 69 | /** |
| bcostm | 6:e1d9da7fe856 | 70 | * @} |
| bcostm | 6:e1d9da7fe856 | 71 | */ |
| bcostm | 6:e1d9da7fe856 | 72 | |
| bcostm | 6:e1d9da7fe856 | 73 | /** @defgroup WM8994_Private_Macros |
| bcostm | 6:e1d9da7fe856 | 74 | * @{ |
| bcostm | 6:e1d9da7fe856 | 75 | */ |
| bcostm | 6:e1d9da7fe856 | 76 | |
| bcostm | 6:e1d9da7fe856 | 77 | /** |
| bcostm | 6:e1d9da7fe856 | 78 | * @} |
| bcostm | 6:e1d9da7fe856 | 79 | */ |
| bcostm | 6:e1d9da7fe856 | 80 | |
| bcostm | 6:e1d9da7fe856 | 81 | /** @defgroup WM8994_Private_Variables |
| bcostm | 6:e1d9da7fe856 | 82 | * @{ |
| bcostm | 6:e1d9da7fe856 | 83 | */ |
| bcostm | 6:e1d9da7fe856 | 84 | |
| bcostm | 6:e1d9da7fe856 | 85 | /* Audio codec driver structure initialization */ |
| bcostm | 6:e1d9da7fe856 | 86 | AUDIO_DrvTypeDef wm8994_drv = |
| bcostm | 6:e1d9da7fe856 | 87 | { |
| bcostm | 6:e1d9da7fe856 | 88 | wm8994_Init, |
| bcostm | 6:e1d9da7fe856 | 89 | wm8994_DeInit, |
| bcostm | 6:e1d9da7fe856 | 90 | wm8994_ReadID, |
| bcostm | 6:e1d9da7fe856 | 91 | |
| bcostm | 6:e1d9da7fe856 | 92 | wm8994_Play, |
| bcostm | 6:e1d9da7fe856 | 93 | wm8994_Pause, |
| bcostm | 6:e1d9da7fe856 | 94 | wm8994_Resume, |
| bcostm | 6:e1d9da7fe856 | 95 | wm8994_Stop, |
| bcostm | 6:e1d9da7fe856 | 96 | |
| bcostm | 6:e1d9da7fe856 | 97 | wm8994_SetFrequency, |
| bcostm | 6:e1d9da7fe856 | 98 | wm8994_SetVolume, |
| bcostm | 6:e1d9da7fe856 | 99 | wm8994_SetMute, |
| bcostm | 6:e1d9da7fe856 | 100 | wm8994_SetOutputMode, |
| bcostm | 6:e1d9da7fe856 | 101 | |
| bcostm | 6:e1d9da7fe856 | 102 | wm8994_Reset |
| bcostm | 6:e1d9da7fe856 | 103 | }; |
| bcostm | 6:e1d9da7fe856 | 104 | |
| bcostm | 6:e1d9da7fe856 | 105 | static uint32_t outputEnabled = 0; |
| bcostm | 6:e1d9da7fe856 | 106 | static uint32_t inputEnabled = 0; |
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static uint8_t ColdStartup = 1;
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| bcostm | 6:e1d9da7fe856 | 109 | /** |
| bcostm | 6:e1d9da7fe856 | 110 | * @} |
| bcostm | 6:e1d9da7fe856 | 111 | */ |
| bcostm | 6:e1d9da7fe856 | 112 | |
| bcostm | 6:e1d9da7fe856 | 113 | /** @defgroup WM8994_Function_Prototypes |
| bcostm | 6:e1d9da7fe856 | 114 | * @{ |
| bcostm | 6:e1d9da7fe856 | 115 | */ |
| bcostm | 6:e1d9da7fe856 | 116 | static uint8_t CODEC_IO_Write(uint8_t Addr, uint16_t Reg, uint16_t Value); |
| bcostm | 6:e1d9da7fe856 | 117 | /** |
| bcostm | 6:e1d9da7fe856 | 118 | * @} |
| bcostm | 6:e1d9da7fe856 | 119 | */ |
| bcostm | 6:e1d9da7fe856 | 120 | |
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| bcostm | 6:e1d9da7fe856 | 122 | /** @defgroup WM8994_Private_Functions |
| bcostm | 6:e1d9da7fe856 | 123 | * @{ |
| bcostm | 6:e1d9da7fe856 | 124 | */ |
| bcostm | 6:e1d9da7fe856 | 125 | |
| bcostm | 6:e1d9da7fe856 | 126 | /** |
| bcostm | 6:e1d9da7fe856 | 127 | * @brief Initializes the audio codec and the control interface. |
| bcostm | 6:e1d9da7fe856 | 128 | * @param DeviceAddr: Device address on communication Bus. |
| bcostm | 6:e1d9da7fe856 | 129 | * @param OutputInputDevice: can be OUTPUT_DEVICE_SPEAKER, OUTPUT_DEVICE_HEADPHONE, |
| bcostm | 6:e1d9da7fe856 | 130 | * OUTPUT_DEVICE_BOTH, OUTPUT_DEVICE_AUTO, INPUT_DEVICE_DIGITAL_MICROPHONE_1, |
| bcostm | 6:e1d9da7fe856 | 131 | * INPUT_DEVICE_DIGITAL_MICROPHONE_2, INPUT_DEVICE_DIGITAL_MIC1_MIC2, |
| bcostm | 6:e1d9da7fe856 | 132 | * INPUT_DEVICE_INPUT_LINE_1 or INPUT_DEVICE_INPUT_LINE_2. |
| bcostm | 6:e1d9da7fe856 | 133 | * @param Volume: Initial volume level (from 0 (Mute) to 100 (Max)) |
| bcostm | 6:e1d9da7fe856 | 134 | * @param AudioFreq: Audio Frequency |
| bcostm | 6:e1d9da7fe856 | 135 | * @retval 0 if correct communication, else wrong communication |
| bcostm | 6:e1d9da7fe856 | 136 | */ |
| bcostm | 6:e1d9da7fe856 | 137 | uint32_t wm8994_Init(uint16_t DeviceAddr, uint16_t OutputInputDevice, uint8_t Volume, uint32_t AudioFreq) |
| bcostm | 6:e1d9da7fe856 | 138 | { |
| bcostm | 6:e1d9da7fe856 | 139 | uint32_t counter = 0; |
| bcostm | 6:e1d9da7fe856 | 140 | uint16_t output_device = OutputInputDevice & 0xFF; |
| bcostm | 6:e1d9da7fe856 | 141 | uint16_t input_device = OutputInputDevice & 0xFF00; |
| bcostm | 6:e1d9da7fe856 | 142 | uint16_t power_mgnt_reg_1 = 0; |
| bcostm | 6:e1d9da7fe856 | 143 | |
| bcostm | 6:e1d9da7fe856 | 144 | /* Initialize the Control interface of the Audio Codec */ |
| bcostm | 6:e1d9da7fe856 | 145 | AUDIO_IO_Init(); |
| bcostm | 6:e1d9da7fe856 | 146 | /* wm8994 Errata Work-Arounds */ |
| bcostm | 6:e1d9da7fe856 | 147 | counter += CODEC_IO_Write(DeviceAddr, 0x102, 0x0003); |
| bcostm | 6:e1d9da7fe856 | 148 | counter += CODEC_IO_Write(DeviceAddr, 0x817, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 149 | counter += CODEC_IO_Write(DeviceAddr, 0x102, 0x0000); |
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| bcostm | 6:e1d9da7fe856 | 151 | /* Enable VMID soft start (fast), Start-up Bias Current Enabled */ |
| bcostm | 6:e1d9da7fe856 | 152 | counter += CODEC_IO_Write(DeviceAddr, 0x39, 0x006C); |
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| bcostm | 6:e1d9da7fe856 | 154 | /* Enable bias generator, Enable VMID */ |
| bcostm | 6:e1d9da7fe856 | 155 | if (input_device > 0) |
| bcostm | 6:e1d9da7fe856 | 156 | { |
| bcostm | 6:e1d9da7fe856 | 157 | counter += CODEC_IO_Write(DeviceAddr, 0x01, 0x0013); |
| bcostm | 6:e1d9da7fe856 | 158 | } |
| bcostm | 6:e1d9da7fe856 | 159 | else |
| bcostm | 6:e1d9da7fe856 | 160 | { |
| bcostm | 6:e1d9da7fe856 | 161 | counter += CODEC_IO_Write(DeviceAddr, 0x01, 0x0003); |
| bcostm | 6:e1d9da7fe856 | 162 | } |
| bcostm | 6:e1d9da7fe856 | 163 | |
| bcostm | 6:e1d9da7fe856 | 164 | /* Add Delay */ |
| bcostm | 6:e1d9da7fe856 | 165 | AUDIO_IO_Delay(50); |
| bcostm | 6:e1d9da7fe856 | 166 | |
| bcostm | 6:e1d9da7fe856 | 167 | /* Path Configurations for output */ |
| bcostm | 6:e1d9da7fe856 | 168 | if (output_device > 0) |
| bcostm | 6:e1d9da7fe856 | 169 | { |
| bcostm | 6:e1d9da7fe856 | 170 | outputEnabled = 1; |
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| bcostm | 6:e1d9da7fe856 | 172 | switch (output_device) |
| bcostm | 6:e1d9da7fe856 | 173 | { |
| bcostm | 6:e1d9da7fe856 | 174 | case OUTPUT_DEVICE_SPEAKER: |
| bcostm | 6:e1d9da7fe856 | 175 | /* Enable DAC1 (Left), Enable DAC1 (Right), |
| bcostm | 6:e1d9da7fe856 | 176 | Disable DAC2 (Left), Disable DAC2 (Right)*/ |
| bcostm | 6:e1d9da7fe856 | 177 | counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0C0C); |
| bcostm | 6:e1d9da7fe856 | 178 | |
| bcostm | 6:e1d9da7fe856 | 179 | /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 180 | counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 181 | |
| bcostm | 6:e1d9da7fe856 | 182 | /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 183 | counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 184 | |
| bcostm | 6:e1d9da7fe856 | 185 | /* Disable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 186 | counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0002); |
| bcostm | 6:e1d9da7fe856 | 187 | |
| bcostm | 6:e1d9da7fe856 | 188 | /* Disable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 189 | counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0002); |
| bcostm | 6:e1d9da7fe856 | 190 | break; |
| bcostm | 6:e1d9da7fe856 | 191 | |
| bcostm | 6:e1d9da7fe856 | 192 | case OUTPUT_DEVICE_HEADPHONE: |
| bcostm | 6:e1d9da7fe856 | 193 | /* Disable DAC1 (Left), Disable DAC1 (Right), |
| bcostm | 6:e1d9da7fe856 | 194 | Enable DAC2 (Left), Enable DAC2 (Right)*/ |
| bcostm | 6:e1d9da7fe856 | 195 | counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0303); |
| bcostm | 6:e1d9da7fe856 | 196 | |
| bcostm | 6:e1d9da7fe856 | 197 | /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 198 | counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0001); |
| bcostm | 6:e1d9da7fe856 | 199 | |
| bcostm | 6:e1d9da7fe856 | 200 | /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 201 | counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0001); |
| bcostm | 6:e1d9da7fe856 | 202 | |
| bcostm | 6:e1d9da7fe856 | 203 | /* Disable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 204 | counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 205 | |
| bcostm | 6:e1d9da7fe856 | 206 | /* Disable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 207 | counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 208 | break; |
| bcostm | 6:e1d9da7fe856 | 209 | |
| bcostm | 6:e1d9da7fe856 | 210 | case OUTPUT_DEVICE_BOTH: |
| bcostm | 6:e1d9da7fe856 | 211 | if (input_device == INPUT_DEVICE_DIGITAL_MIC1_MIC2) |
| bcostm | 6:e1d9da7fe856 | 212 | { |
| bcostm | 6:e1d9da7fe856 | 213 | /* Enable DAC1 (Left), Enable DAC1 (Right), |
| bcostm | 6:e1d9da7fe856 | 214 | also Enable DAC2 (Left), Enable DAC2 (Right)*/ |
| bcostm | 6:e1d9da7fe856 | 215 | counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0303 | 0x0C0C); |
| bcostm | 6:e1d9da7fe856 | 216 | |
| bcostm | 6:e1d9da7fe856 | 217 | /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path |
| bcostm | 6:e1d9da7fe856 | 218 | Enable the AIF1 Timeslot 1 (Left) to DAC 1 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 219 | counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0003); |
| bcostm | 6:e1d9da7fe856 | 220 | |
| bcostm | 6:e1d9da7fe856 | 221 | /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path |
| bcostm | 6:e1d9da7fe856 | 222 | Enable the AIF1 Timeslot 1 (Right) to DAC 1 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 223 | counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0003); |
| bcostm | 6:e1d9da7fe856 | 224 | |
| bcostm | 6:e1d9da7fe856 | 225 | /* Enable the AIF1 Timeslot 0 (Left) to DAC 2 (Left) mixer path |
| bcostm | 6:e1d9da7fe856 | 226 | Enable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 227 | counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0003); |
| bcostm | 6:e1d9da7fe856 | 228 | |
| bcostm | 6:e1d9da7fe856 | 229 | /* Enable the AIF1 Timeslot 0 (Right) to DAC 2 (Right) mixer path |
| bcostm | 6:e1d9da7fe856 | 230 | Enable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 231 | counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0003); |
| bcostm | 6:e1d9da7fe856 | 232 | } |
| bcostm | 6:e1d9da7fe856 | 233 | else |
| bcostm | 6:e1d9da7fe856 | 234 | { |
| bcostm | 6:e1d9da7fe856 | 235 | /* Enable DAC1 (Left), Enable DAC1 (Right), |
| bcostm | 6:e1d9da7fe856 | 236 | also Enable DAC2 (Left), Enable DAC2 (Right)*/ |
| bcostm | 6:e1d9da7fe856 | 237 | counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0303 | 0x0C0C); |
| bcostm | 6:e1d9da7fe856 | 238 | |
| bcostm | 6:e1d9da7fe856 | 239 | /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 240 | counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0001); |
| bcostm | 6:e1d9da7fe856 | 241 | |
| bcostm | 6:e1d9da7fe856 | 242 | /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 243 | counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0001); |
| bcostm | 6:e1d9da7fe856 | 244 | |
| bcostm | 6:e1d9da7fe856 | 245 | /* Enable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 246 | counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0002); |
| bcostm | 6:e1d9da7fe856 | 247 | |
| bcostm | 6:e1d9da7fe856 | 248 | /* Enable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 249 | counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0002); |
| bcostm | 6:e1d9da7fe856 | 250 | } |
| bcostm | 6:e1d9da7fe856 | 251 | break; |
| bcostm | 6:e1d9da7fe856 | 252 | |
| bcostm | 6:e1d9da7fe856 | 253 | case OUTPUT_DEVICE_AUTO : |
| bcostm | 6:e1d9da7fe856 | 254 | default: |
| bcostm | 6:e1d9da7fe856 | 255 | /* Disable DAC1 (Left), Disable DAC1 (Right), |
| bcostm | 6:e1d9da7fe856 | 256 | Enable DAC2 (Left), Enable DAC2 (Right)*/ |
| bcostm | 6:e1d9da7fe856 | 257 | counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0303); |
| bcostm | 6:e1d9da7fe856 | 258 | |
| bcostm | 6:e1d9da7fe856 | 259 | /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 260 | counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0001); |
| bcostm | 6:e1d9da7fe856 | 261 | |
| bcostm | 6:e1d9da7fe856 | 262 | /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 263 | counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0001); |
| bcostm | 6:e1d9da7fe856 | 264 | |
| bcostm | 6:e1d9da7fe856 | 265 | /* Disable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 266 | counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 267 | |
| bcostm | 6:e1d9da7fe856 | 268 | /* Disable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 269 | counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 270 | break; |
| bcostm | 6:e1d9da7fe856 | 271 | } |
| bcostm | 6:e1d9da7fe856 | 272 | } |
| bcostm | 6:e1d9da7fe856 | 273 | else |
| bcostm | 6:e1d9da7fe856 | 274 | { |
| bcostm | 6:e1d9da7fe856 | 275 | outputEnabled = 0; |
| bcostm | 6:e1d9da7fe856 | 276 | } |
| bcostm | 6:e1d9da7fe856 | 277 | |
| bcostm | 6:e1d9da7fe856 | 278 | /* Path Configurations for input */ |
| bcostm | 6:e1d9da7fe856 | 279 | if (input_device > 0) |
| bcostm | 6:e1d9da7fe856 | 280 | { |
| bcostm | 6:e1d9da7fe856 | 281 | inputEnabled = 1; |
| bcostm | 6:e1d9da7fe856 | 282 | switch (input_device) |
| bcostm | 6:e1d9da7fe856 | 283 | { |
| bcostm | 6:e1d9da7fe856 | 284 | case INPUT_DEVICE_DIGITAL_MICROPHONE_2 : |
| bcostm | 6:e1d9da7fe856 | 285 | /* Enable AIF1ADC2 (Left), Enable AIF1ADC2 (Right) |
| bcostm | 6:e1d9da7fe856 | 286 | * Enable DMICDAT2 (Left), Enable DMICDAT2 (Right) |
| bcostm | 6:e1d9da7fe856 | 287 | * Enable Left ADC, Enable Right ADC */ |
| bcostm | 6:e1d9da7fe856 | 288 | counter += CODEC_IO_Write(DeviceAddr, 0x04, 0x0C30); |
| bcostm | 6:e1d9da7fe856 | 289 | |
| bcostm | 6:e1d9da7fe856 | 290 | /* Enable AIF1 DRC2 Signal Detect & DRC in AIF1ADC2 Left/Right Timeslot 1 */ |
| bcostm | 6:e1d9da7fe856 | 291 | counter += CODEC_IO_Write(DeviceAddr, 0x450, 0x00DB); |
| bcostm | 6:e1d9da7fe856 | 292 | |
| bcostm | 6:e1d9da7fe856 | 293 | /* Disable IN1L, IN1R, IN2L, IN2R, Enable Thermal sensor & shutdown */ |
| bcostm | 6:e1d9da7fe856 | 294 | counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x6000); |
| bcostm | 6:e1d9da7fe856 | 295 | |
| bcostm | 6:e1d9da7fe856 | 296 | /* Enable the DMIC2(Left) to AIF1 Timeslot 1 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 297 | counter += CODEC_IO_Write(DeviceAddr, 0x608, 0x0002); |
| bcostm | 6:e1d9da7fe856 | 298 | |
| bcostm | 6:e1d9da7fe856 | 299 | /* Enable the DMIC2(Right) to AIF1 Timeslot 1 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 300 | counter += CODEC_IO_Write(DeviceAddr, 0x609, 0x0002); |
| bcostm | 6:e1d9da7fe856 | 301 | |
| bcostm | 6:e1d9da7fe856 | 302 | /* GPIO1 pin configuration GP1_DIR = output, GP1_FN = AIF1 DRC2 signal detect */ |
| bcostm | 6:e1d9da7fe856 | 303 | counter += CODEC_IO_Write(DeviceAddr, 0x700, 0x000E); |
| bcostm | 6:e1d9da7fe856 | 304 | break; |
| bcostm | 6:e1d9da7fe856 | 305 | |
| bcostm | 6:e1d9da7fe856 | 306 | case INPUT_DEVICE_INPUT_LINE_1 : |
| bcostm | 6:e1d9da7fe856 | 307 | /* IN1LN_TO_IN1L, IN1LP_TO_VMID, IN1RN_TO_IN1R, IN1RP_TO_VMID */ |
| bcostm | 6:e1d9da7fe856 | 308 | counter += CODEC_IO_Write(DeviceAddr, 0x28, 0x0011); |
| bcostm | 6:e1d9da7fe856 | 309 | |
| bcostm | 6:e1d9da7fe856 | 310 | /* Disable mute on IN1L_TO_MIXINL and +30dB on IN1L PGA output */ |
| bcostm | 6:e1d9da7fe856 | 311 | counter += CODEC_IO_Write(DeviceAddr, 0x29, 0x0035); |
| bcostm | 6:e1d9da7fe856 | 312 | |
| bcostm | 6:e1d9da7fe856 | 313 | /* Disable mute on IN1R_TO_MIXINL, Gain = +30dB */ |
| bcostm | 6:e1d9da7fe856 | 314 | counter += CODEC_IO_Write(DeviceAddr, 0x2A, 0x0035); |
| bcostm | 6:e1d9da7fe856 | 315 | |
| bcostm | 6:e1d9da7fe856 | 316 | /* Enable AIF1ADC1 (Left), Enable AIF1ADC1 (Right) |
| bcostm | 6:e1d9da7fe856 | 317 | * Enable Left ADC, Enable Right ADC */ |
| bcostm | 6:e1d9da7fe856 | 318 | counter += CODEC_IO_Write(DeviceAddr, 0x04, 0x0303); |
| bcostm | 6:e1d9da7fe856 | 319 | |
| bcostm | 6:e1d9da7fe856 | 320 | /* Enable AIF1 DRC1 Signal Detect & DRC in AIF1ADC1 Left/Right Timeslot 0 */ |
| bcostm | 6:e1d9da7fe856 | 321 | counter += CODEC_IO_Write(DeviceAddr, 0x440, 0x00DB); |
| bcostm | 6:e1d9da7fe856 | 322 | |
| bcostm | 6:e1d9da7fe856 | 323 | /* Enable IN1L and IN1R, Disable IN2L and IN2R, Enable Thermal sensor & shutdown */ |
| bcostm | 6:e1d9da7fe856 | 324 | counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x6350); |
| bcostm | 6:e1d9da7fe856 | 325 | |
| bcostm | 6:e1d9da7fe856 | 326 | /* Enable the ADCL(Left) to AIF1 Timeslot 0 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 327 | counter += CODEC_IO_Write(DeviceAddr, 0x606, 0x0002); |
| bcostm | 6:e1d9da7fe856 | 328 | |
| bcostm | 6:e1d9da7fe856 | 329 | /* Enable the ADCR(Right) to AIF1 Timeslot 0 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 330 | counter += CODEC_IO_Write(DeviceAddr, 0x607, 0x0002); |
| bcostm | 6:e1d9da7fe856 | 331 | |
| bcostm | 6:e1d9da7fe856 | 332 | /* GPIO1 pin configuration GP1_DIR = output, GP1_FN = AIF1 DRC1 signal detect */ |
| bcostm | 6:e1d9da7fe856 | 333 | counter += CODEC_IO_Write(DeviceAddr, 0x700, 0x000D); |
| bcostm | 6:e1d9da7fe856 | 334 | break; |
| bcostm | 6:e1d9da7fe856 | 335 | |
| bcostm | 6:e1d9da7fe856 | 336 | case INPUT_DEVICE_DIGITAL_MICROPHONE_1 : |
| bcostm | 6:e1d9da7fe856 | 337 | /* Enable AIF1ADC1 (Left), Enable AIF1ADC1 (Right) |
| bcostm | 6:e1d9da7fe856 | 338 | * Enable DMICDAT1 (Left), Enable DMICDAT1 (Right) |
| bcostm | 6:e1d9da7fe856 | 339 | * Enable Left ADC, Enable Right ADC */ |
| bcostm | 6:e1d9da7fe856 | 340 | counter += CODEC_IO_Write(DeviceAddr, 0x04, 0x030C); |
| bcostm | 6:e1d9da7fe856 | 341 | |
| bcostm | 6:e1d9da7fe856 | 342 | /* Enable AIF1 DRC2 Signal Detect & DRC in AIF1ADC1 Left/Right Timeslot 0 */ |
| bcostm | 6:e1d9da7fe856 | 343 | counter += CODEC_IO_Write(DeviceAddr, 0x440, 0x00DB); |
| bcostm | 6:e1d9da7fe856 | 344 | |
| bcostm | 6:e1d9da7fe856 | 345 | /* Disable IN1L, IN1R, IN2L, IN2R, Enable Thermal sensor & shutdown */ |
| bcostm | 6:e1d9da7fe856 | 346 | counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x6350); |
| bcostm | 6:e1d9da7fe856 | 347 | |
| bcostm | 6:e1d9da7fe856 | 348 | /* Enable the DMIC2(Left) to AIF1 Timeslot 0 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 349 | counter += CODEC_IO_Write(DeviceAddr, 0x606, 0x0002); |
| bcostm | 6:e1d9da7fe856 | 350 | |
| bcostm | 6:e1d9da7fe856 | 351 | /* Enable the DMIC2(Right) to AIF1 Timeslot 0 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 352 | counter += CODEC_IO_Write(DeviceAddr, 0x607, 0x0002); |
| bcostm | 6:e1d9da7fe856 | 353 | |
| bcostm | 6:e1d9da7fe856 | 354 | /* GPIO1 pin configuration GP1_DIR = output, GP1_FN = AIF1 DRC1 signal detect */ |
| bcostm | 6:e1d9da7fe856 | 355 | counter += CODEC_IO_Write(DeviceAddr, 0x700, 0x000D); |
| bcostm | 6:e1d9da7fe856 | 356 | break; |
| bcostm | 6:e1d9da7fe856 | 357 | case INPUT_DEVICE_DIGITAL_MIC1_MIC2 : |
| bcostm | 6:e1d9da7fe856 | 358 | /* Enable AIF1ADC1 (Left), Enable AIF1ADC1 (Right) |
| bcostm | 6:e1d9da7fe856 | 359 | * Enable DMICDAT1 (Left), Enable DMICDAT1 (Right) |
| bcostm | 6:e1d9da7fe856 | 360 | * Enable Left ADC, Enable Right ADC */ |
| bcostm | 6:e1d9da7fe856 | 361 | counter += CODEC_IO_Write(DeviceAddr, 0x04, 0x0F3C); |
| bcostm | 6:e1d9da7fe856 | 362 | |
| bcostm | 6:e1d9da7fe856 | 363 | /* Enable AIF1 DRC2 Signal Detect & DRC in AIF1ADC2 Left/Right Timeslot 1 */ |
| bcostm | 6:e1d9da7fe856 | 364 | counter += CODEC_IO_Write(DeviceAddr, 0x450, 0x00DB); |
| bcostm | 6:e1d9da7fe856 | 365 | |
| bcostm | 6:e1d9da7fe856 | 366 | /* Enable AIF1 DRC2 Signal Detect & DRC in AIF1ADC1 Left/Right Timeslot 0 */ |
| bcostm | 6:e1d9da7fe856 | 367 | counter += CODEC_IO_Write(DeviceAddr, 0x440, 0x00DB); |
| bcostm | 6:e1d9da7fe856 | 368 | |
| bcostm | 6:e1d9da7fe856 | 369 | /* Disable IN1L, IN1R, Enable IN2L, IN2R, Thermal sensor & shutdown */ |
| bcostm | 6:e1d9da7fe856 | 370 | counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x63A0); |
| bcostm | 6:e1d9da7fe856 | 371 | |
| bcostm | 6:e1d9da7fe856 | 372 | /* Enable the DMIC2(Left) to AIF1 Timeslot 0 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 373 | counter += CODEC_IO_Write(DeviceAddr, 0x606, 0x0002); |
| bcostm | 6:e1d9da7fe856 | 374 | |
| bcostm | 6:e1d9da7fe856 | 375 | /* Enable the DMIC2(Right) to AIF1 Timeslot 0 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 376 | counter += CODEC_IO_Write(DeviceAddr, 0x607, 0x0002); |
| bcostm | 6:e1d9da7fe856 | 377 | |
| bcostm | 6:e1d9da7fe856 | 378 | /* Enable the DMIC2(Left) to AIF1 Timeslot 1 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 379 | counter += CODEC_IO_Write(DeviceAddr, 0x608, 0x0002); |
| bcostm | 6:e1d9da7fe856 | 380 | |
| bcostm | 6:e1d9da7fe856 | 381 | /* Enable the DMIC2(Right) to AIF1 Timeslot 1 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 382 | counter += CODEC_IO_Write(DeviceAddr, 0x609, 0x0002); |
| bcostm | 6:e1d9da7fe856 | 383 | |
| bcostm | 6:e1d9da7fe856 | 384 | /* GPIO1 pin configuration GP1_DIR = output, GP1_FN = AIF1 DRC1 signal detect */ |
| bcostm | 6:e1d9da7fe856 | 385 | counter += CODEC_IO_Write(DeviceAddr, 0x700, 0x000D); |
| bcostm | 6:e1d9da7fe856 | 386 | break; |
| bcostm | 6:e1d9da7fe856 | 387 | case INPUT_DEVICE_INPUT_LINE_2 : |
| bcostm | 6:e1d9da7fe856 | 388 | default: |
| bcostm | 6:e1d9da7fe856 | 389 | /* Actually, no other input devices supported */ |
| bcostm | 6:e1d9da7fe856 | 390 | counter++; |
| bcostm | 6:e1d9da7fe856 | 391 | break; |
| bcostm | 6:e1d9da7fe856 | 392 | } |
| bcostm | 6:e1d9da7fe856 | 393 | } |
| bcostm | 6:e1d9da7fe856 | 394 | else |
| bcostm | 6:e1d9da7fe856 | 395 | { |
| bcostm | 6:e1d9da7fe856 | 396 | inputEnabled = 0; |
| bcostm | 6:e1d9da7fe856 | 397 | } |
| bcostm | 6:e1d9da7fe856 | 398 | |
| bcostm | 6:e1d9da7fe856 | 399 | /* Clock Configurations */ |
| bcostm | 6:e1d9da7fe856 | 400 | switch (AudioFreq) |
| bcostm | 6:e1d9da7fe856 | 401 | { |
| bcostm | 6:e1d9da7fe856 | 402 | case AUDIO_FREQUENCY_8K: |
| bcostm | 6:e1d9da7fe856 | 403 | /* AIF1 Sample Rate = 8 (KHz), ratio=256 */ |
| bcostm | 6:e1d9da7fe856 | 404 | counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0003); |
| bcostm | 6:e1d9da7fe856 | 405 | break; |
| bcostm | 6:e1d9da7fe856 | 406 | |
| bcostm | 6:e1d9da7fe856 | 407 | case AUDIO_FREQUENCY_16K: |
| bcostm | 6:e1d9da7fe856 | 408 | /* AIF1 Sample Rate = 16 (KHz), ratio=256 */ |
| bcostm | 6:e1d9da7fe856 | 409 | counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0033); |
| bcostm | 6:e1d9da7fe856 | 410 | break; |
| bcostm | 6:e1d9da7fe856 | 411 | |
| bcostm | 6:e1d9da7fe856 | 412 | case AUDIO_FREQUENCY_32K: |
| bcostm | 6:e1d9da7fe856 | 413 | /* AIF1 Sample Rate = 32 (KHz), ratio=256 */ |
| bcostm | 6:e1d9da7fe856 | 414 | counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0063); |
| bcostm | 6:e1d9da7fe856 | 415 | break; |
| bcostm | 6:e1d9da7fe856 | 416 | |
| bcostm | 6:e1d9da7fe856 | 417 | case AUDIO_FREQUENCY_48K: |
| bcostm | 6:e1d9da7fe856 | 418 | /* AIF1 Sample Rate = 48 (KHz), ratio=256 */ |
| bcostm | 6:e1d9da7fe856 | 419 | counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0083); |
| bcostm | 6:e1d9da7fe856 | 420 | break; |
| bcostm | 6:e1d9da7fe856 | 421 | |
| bcostm | 6:e1d9da7fe856 | 422 | case AUDIO_FREQUENCY_96K: |
| bcostm | 6:e1d9da7fe856 | 423 | /* AIF1 Sample Rate = 96 (KHz), ratio=256 */ |
| bcostm | 6:e1d9da7fe856 | 424 | counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x00A3); |
| bcostm | 6:e1d9da7fe856 | 425 | break; |
| bcostm | 6:e1d9da7fe856 | 426 | |
| bcostm | 6:e1d9da7fe856 | 427 | case AUDIO_FREQUENCY_11K: |
| bcostm | 6:e1d9da7fe856 | 428 | /* AIF1 Sample Rate = 11.025 (KHz), ratio=256 */ |
| bcostm | 6:e1d9da7fe856 | 429 | counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0013); |
| bcostm | 6:e1d9da7fe856 | 430 | break; |
| bcostm | 6:e1d9da7fe856 | 431 | |
| bcostm | 6:e1d9da7fe856 | 432 | case AUDIO_FREQUENCY_22K: |
| bcostm | 6:e1d9da7fe856 | 433 | /* AIF1 Sample Rate = 22.050 (KHz), ratio=256 */ |
| bcostm | 6:e1d9da7fe856 | 434 | counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0043); |
| bcostm | 6:e1d9da7fe856 | 435 | break; |
| bcostm | 6:e1d9da7fe856 | 436 | |
| bcostm | 6:e1d9da7fe856 | 437 | case AUDIO_FREQUENCY_44K: |
| bcostm | 6:e1d9da7fe856 | 438 | /* AIF1 Sample Rate = 44.1 (KHz), ratio=256 */ |
| bcostm | 6:e1d9da7fe856 | 439 | counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0073); |
| bcostm | 6:e1d9da7fe856 | 440 | break; |
| bcostm | 6:e1d9da7fe856 | 441 | |
| bcostm | 6:e1d9da7fe856 | 442 | default: |
| bcostm | 6:e1d9da7fe856 | 443 | /* AIF1 Sample Rate = 48 (KHz), ratio=256 */ |
| bcostm | 6:e1d9da7fe856 | 444 | counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0083); |
| bcostm | 6:e1d9da7fe856 | 445 | break; |
| bcostm | 6:e1d9da7fe856 | 446 | } |
| bcostm | 6:e1d9da7fe856 | 447 | |
| bcostm | 6:e1d9da7fe856 | 448 | if(input_device == INPUT_DEVICE_DIGITAL_MIC1_MIC2) |
| bcostm | 6:e1d9da7fe856 | 449 | { |
| bcostm | 6:e1d9da7fe856 | 450 | /* AIF1 Word Length = 16-bits, AIF1 Format = DSP mode */ |
| bcostm | 6:e1d9da7fe856 | 451 | counter += CODEC_IO_Write(DeviceAddr, 0x300, 0x4018); |
| bcostm | 6:e1d9da7fe856 | 452 | } |
| bcostm | 6:e1d9da7fe856 | 453 | else |
| bcostm | 6:e1d9da7fe856 | 454 | { |
| bcostm | 6:e1d9da7fe856 | 455 | /* AIF1 Word Length = 16-bits, AIF1 Format = I2S (Default Register Value) */ |
| bcostm | 6:e1d9da7fe856 | 456 | counter += CODEC_IO_Write(DeviceAddr, 0x300, 0x4010); |
| bcostm | 6:e1d9da7fe856 | 457 | } |
| bcostm | 6:e1d9da7fe856 | 458 | |
| bcostm | 6:e1d9da7fe856 | 459 | /* slave mode */ |
| bcostm | 6:e1d9da7fe856 | 460 | counter += CODEC_IO_Write(DeviceAddr, 0x302, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 461 | |
| bcostm | 6:e1d9da7fe856 | 462 | /* Enable the DSP processing clock for AIF1, Enable the core clock */ |
| bcostm | 6:e1d9da7fe856 | 463 | counter += CODEC_IO_Write(DeviceAddr, 0x208, 0x000A); |
| bcostm | 6:e1d9da7fe856 | 464 | |
| bcostm | 6:e1d9da7fe856 | 465 | /* Enable AIF1 Clock, AIF1 Clock Source = MCLK1 pin */ |
| bcostm | 6:e1d9da7fe856 | 466 | counter += CODEC_IO_Write(DeviceAddr, 0x200, 0x0001); |
| bcostm | 6:e1d9da7fe856 | 467 | |
| bcostm | 6:e1d9da7fe856 | 468 | if (output_device > 0) /* Audio output selected */ |
| bcostm | 6:e1d9da7fe856 | 469 | { |
Jerome Coutant |
10:1050c589b2ad
|
470
|
if (output_device == OUTPUT_DEVICE_HEADPHONE)
|
|
Jerome Coutant |
10:1050c589b2ad
|
471
|
{
|
|
Jerome Coutant |
10:1050c589b2ad
|
472
|
/* Select DAC1 (Left) to Left Headphone Output PGA (HPOUT1LVOL) path */
|
|
Jerome Coutant |
10:1050c589b2ad
|
473
|
counter += CODEC_IO_Write(DeviceAddr, 0x2D, 0x0100);
|
|
Jerome Coutant |
10:1050c589b2ad
|
474
|
|
|
Jerome Coutant |
10:1050c589b2ad
|
475
|
/* Select DAC1 (Right) to Right Headphone Output PGA (HPOUT1RVOL) path */
|
|
Jerome Coutant |
10:1050c589b2ad
|
476
|
counter += CODEC_IO_Write(DeviceAddr, 0x2E, 0x0100);
|
|
Jerome Coutant |
10:1050c589b2ad
|
477
|
|
|
Jerome Coutant |
10:1050c589b2ad
|
478
|
/* Startup sequence for Headphone */
|
|
Jerome Coutant |
10:1050c589b2ad
|
479
|
if(ColdStartup)
|
|
Jerome Coutant |
10:1050c589b2ad
|
480
|
{
|
|
Jerome Coutant |
10:1050c589b2ad
|
481
|
counter += CODEC_IO_Write(DeviceAddr,0x110,0x8100);
|
|
Jerome Coutant |
10:1050c589b2ad
|
482
|
|
|
Jerome Coutant |
10:1050c589b2ad
|
483
|
ColdStartup=0;
|
|
Jerome Coutant |
10:1050c589b2ad
|
484
|
/* Add Delay */
|
|
Jerome Coutant |
10:1050c589b2ad
|
485
|
AUDIO_IO_Delay(300);
|
|
Jerome Coutant |
10:1050c589b2ad
|
486
|
}
|
|
Jerome Coutant |
10:1050c589b2ad
|
487
|
else /* Headphone Warm Start-Up */
|
|
Jerome Coutant |
10:1050c589b2ad
|
488
|
{
|
|
Jerome Coutant |
10:1050c589b2ad
|
489
|
counter += CODEC_IO_Write(DeviceAddr,0x110,0x8108);
|
|
Jerome Coutant |
10:1050c589b2ad
|
490
|
/* Add Delay */
|
|
Jerome Coutant |
10:1050c589b2ad
|
491
|
AUDIO_IO_Delay(50);
|
|
Jerome Coutant |
10:1050c589b2ad
|
492
|
}
|
|
Jerome Coutant |
10:1050c589b2ad
|
493
|
|
|
Jerome Coutant |
10:1050c589b2ad
|
494
|
/* Soft un-Mute the AIF1 Timeslot 0 DAC1 path L&R */
|
|
Jerome Coutant |
10:1050c589b2ad
|
495
|
counter += CODEC_IO_Write(DeviceAddr, 0x420, 0x0000);
|
|
Jerome Coutant |
10:1050c589b2ad
|
496
|
}
|
|
| bcostm | 6:e1d9da7fe856 | 497 | /* Analog Output Configuration */ |
| bcostm | 6:e1d9da7fe856 | 498 | |
| bcostm | 6:e1d9da7fe856 | 499 | /* Enable SPKRVOL PGA, Enable SPKMIXR, Enable SPKLVOL PGA, Enable SPKMIXL */ |
| bcostm | 6:e1d9da7fe856 | 500 | counter += CODEC_IO_Write(DeviceAddr, 0x03, 0x0300); |
| bcostm | 6:e1d9da7fe856 | 501 | |
| bcostm | 6:e1d9da7fe856 | 502 | /* Left Speaker Mixer Volume = 0dB */ |
| bcostm | 6:e1d9da7fe856 | 503 | counter += CODEC_IO_Write(DeviceAddr, 0x22, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 504 | |
| bcostm | 6:e1d9da7fe856 | 505 | /* Speaker output mode = Class D, Right Speaker Mixer Volume = 0dB ((0x23, 0x0100) = class AB)*/ |
| bcostm | 6:e1d9da7fe856 | 506 | counter += CODEC_IO_Write(DeviceAddr, 0x23, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 507 | |
| bcostm | 6:e1d9da7fe856 | 508 | /* Unmute DAC2 (Left) to Left Speaker Mixer (SPKMIXL) path, |
| bcostm | 6:e1d9da7fe856 | 509 | Unmute DAC2 (Right) to Right Speaker Mixer (SPKMIXR) path */ |
| bcostm | 6:e1d9da7fe856 | 510 | counter += CODEC_IO_Write(DeviceAddr, 0x36, 0x0300); |
| bcostm | 6:e1d9da7fe856 | 511 | |
| bcostm | 6:e1d9da7fe856 | 512 | /* Enable bias generator, Enable VMID, Enable SPKOUTL, Enable SPKOUTR */ |
| bcostm | 6:e1d9da7fe856 | 513 | counter += CODEC_IO_Write(DeviceAddr, 0x01, 0x3003); |
| bcostm | 6:e1d9da7fe856 | 514 | |
| bcostm | 6:e1d9da7fe856 | 515 | /* Headphone/Speaker Enable */ |
| bcostm | 6:e1d9da7fe856 | 516 | |
| bcostm | 6:e1d9da7fe856 | 517 | if (input_device == INPUT_DEVICE_DIGITAL_MIC1_MIC2) |
| bcostm | 6:e1d9da7fe856 | 518 | { |
| bcostm | 6:e1d9da7fe856 | 519 | /* Enable Class W, Class W Envelope Tracking = AIF1 Timeslots 0 and 1 */ |
| bcostm | 6:e1d9da7fe856 | 520 | counter += CODEC_IO_Write(DeviceAddr, 0x51, 0x0205); |
| bcostm | 6:e1d9da7fe856 | 521 | } |
| bcostm | 6:e1d9da7fe856 | 522 | else |
| bcostm | 6:e1d9da7fe856 | 523 | { |
| bcostm | 6:e1d9da7fe856 | 524 | /* Enable Class W, Class W Envelope Tracking = AIF1 Timeslot 0 */ |
| bcostm | 6:e1d9da7fe856 | 525 | counter += CODEC_IO_Write(DeviceAddr, 0x51, 0x0005); |
| bcostm | 6:e1d9da7fe856 | 526 | } |
| bcostm | 6:e1d9da7fe856 | 527 | |
| bcostm | 6:e1d9da7fe856 | 528 | /* Enable bias generator, Enable VMID, Enable HPOUT1 (Left) and Enable HPOUT1 (Right) input stages */ |
| bcostm | 6:e1d9da7fe856 | 529 | /* idem for Speaker */ |
| bcostm | 6:e1d9da7fe856 | 530 | power_mgnt_reg_1 |= 0x0303 | 0x3003; |
| bcostm | 6:e1d9da7fe856 | 531 | counter += CODEC_IO_Write(DeviceAddr, 0x01, power_mgnt_reg_1); |
| bcostm | 6:e1d9da7fe856 | 532 | |
| bcostm | 6:e1d9da7fe856 | 533 | /* Enable HPOUT1 (Left) and HPOUT1 (Right) intermediate stages */ |
| bcostm | 6:e1d9da7fe856 | 534 | counter += CODEC_IO_Write(DeviceAddr, 0x60, 0x0022); |
| bcostm | 6:e1d9da7fe856 | 535 | |
| bcostm | 6:e1d9da7fe856 | 536 | /* Enable Charge Pump */ |
| bcostm | 6:e1d9da7fe856 | 537 | counter += CODEC_IO_Write(DeviceAddr, 0x4C, 0x9F25); |
| bcostm | 6:e1d9da7fe856 | 538 | |
| bcostm | 6:e1d9da7fe856 | 539 | /* Add Delay */ |
| bcostm | 6:e1d9da7fe856 | 540 | AUDIO_IO_Delay(15); |
| bcostm | 6:e1d9da7fe856 | 541 | |
| bcostm | 6:e1d9da7fe856 | 542 | /* Select DAC1 (Left) to Left Headphone Output PGA (HPOUT1LVOL) path */ |
| bcostm | 6:e1d9da7fe856 | 543 | counter += CODEC_IO_Write(DeviceAddr, 0x2D, 0x0001); |
| bcostm | 6:e1d9da7fe856 | 544 | |
| bcostm | 6:e1d9da7fe856 | 545 | /* Select DAC1 (Right) to Right Headphone Output PGA (HPOUT1RVOL) path */ |
| bcostm | 6:e1d9da7fe856 | 546 | counter += CODEC_IO_Write(DeviceAddr, 0x2E, 0x0001); |
| bcostm | 6:e1d9da7fe856 | 547 | |
| bcostm | 6:e1d9da7fe856 | 548 | /* Enable Left Output Mixer (MIXOUTL), Enable Right Output Mixer (MIXOUTR) */ |
| bcostm | 6:e1d9da7fe856 | 549 | /* idem for SPKOUTL and SPKOUTR */ |
| bcostm | 6:e1d9da7fe856 | 550 | counter += CODEC_IO_Write(DeviceAddr, 0x03, 0x0030 | 0x0300); |
| bcostm | 6:e1d9da7fe856 | 551 | |
| bcostm | 6:e1d9da7fe856 | 552 | /* Enable DC Servo and trigger start-up mode on left and right channels */ |
| bcostm | 6:e1d9da7fe856 | 553 | counter += CODEC_IO_Write(DeviceAddr, 0x54, 0x0033); |
| bcostm | 6:e1d9da7fe856 | 554 | |
| bcostm | 6:e1d9da7fe856 | 555 | /* Add Delay */ |
Jerome Coutant |
10:1050c589b2ad
|
556
|
AUDIO_IO_Delay(257);
|
|
| bcostm | 6:e1d9da7fe856 | 557 | |
| bcostm | 6:e1d9da7fe856 | 558 | /* Enable HPOUT1 (Left) and HPOUT1 (Right) intermediate and output stages. Remove clamps */ |
| bcostm | 6:e1d9da7fe856 | 559 | counter += CODEC_IO_Write(DeviceAddr, 0x60, 0x00EE); |
| bcostm | 6:e1d9da7fe856 | 560 | |
| bcostm | 6:e1d9da7fe856 | 561 | /* Unmutes */ |
| bcostm | 6:e1d9da7fe856 | 562 | |
| bcostm | 6:e1d9da7fe856 | 563 | /* Unmute DAC 1 (Left) */ |
| bcostm | 6:e1d9da7fe856 | 564 | counter += CODEC_IO_Write(DeviceAddr, 0x610, 0x00C0); |
| bcostm | 6:e1d9da7fe856 | 565 | |
| bcostm | 6:e1d9da7fe856 | 566 | /* Unmute DAC 1 (Right) */ |
| bcostm | 6:e1d9da7fe856 | 567 | counter += CODEC_IO_Write(DeviceAddr, 0x611, 0x00C0); |
| bcostm | 6:e1d9da7fe856 | 568 | |
| bcostm | 6:e1d9da7fe856 | 569 | /* Unmute the AIF1 Timeslot 0 DAC path */ |
Jerome Coutant |
10:1050c589b2ad
|
570
|
counter += CODEC_IO_Write(DeviceAddr, 0x420, 0x0010);
|
|
| bcostm | 6:e1d9da7fe856 | 571 | |
| bcostm | 6:e1d9da7fe856 | 572 | /* Unmute DAC 2 (Left) */ |
| bcostm | 6:e1d9da7fe856 | 573 | counter += CODEC_IO_Write(DeviceAddr, 0x612, 0x00C0); |
| bcostm | 6:e1d9da7fe856 | 574 | |
| bcostm | 6:e1d9da7fe856 | 575 | /* Unmute DAC 2 (Right) */ |
| bcostm | 6:e1d9da7fe856 | 576 | counter += CODEC_IO_Write(DeviceAddr, 0x613, 0x00C0); |
| bcostm | 6:e1d9da7fe856 | 577 | |
| bcostm | 6:e1d9da7fe856 | 578 | /* Unmute the AIF1 Timeslot 1 DAC2 path */ |
Jerome Coutant |
10:1050c589b2ad
|
579
|
counter += CODEC_IO_Write(DeviceAddr, 0x422, 0x0010);
|
|
| bcostm | 6:e1d9da7fe856 | 580 | |
| bcostm | 6:e1d9da7fe856 | 581 | /* Volume Control */ |
| bcostm | 6:e1d9da7fe856 | 582 | wm8994_SetVolume(DeviceAddr, Volume); |
| bcostm | 6:e1d9da7fe856 | 583 | } |
| bcostm | 6:e1d9da7fe856 | 584 | |
| bcostm | 6:e1d9da7fe856 | 585 | if (input_device > 0) /* Audio input selected */ |
| bcostm | 6:e1d9da7fe856 | 586 | { |
| bcostm | 6:e1d9da7fe856 | 587 | if ((input_device == INPUT_DEVICE_DIGITAL_MICROPHONE_1) || (input_device == INPUT_DEVICE_DIGITAL_MICROPHONE_2)) |
| bcostm | 6:e1d9da7fe856 | 588 | { |
| bcostm | 6:e1d9da7fe856 | 589 | /* Enable Microphone bias 1 generator, Enable VMID */ |
| bcostm | 6:e1d9da7fe856 | 590 | power_mgnt_reg_1 |= 0x0013; |
| bcostm | 6:e1d9da7fe856 | 591 | counter += CODEC_IO_Write(DeviceAddr, 0x01, power_mgnt_reg_1); |
| bcostm | 6:e1d9da7fe856 | 592 | |
| bcostm | 6:e1d9da7fe856 | 593 | /* ADC oversample enable */ |
| bcostm | 6:e1d9da7fe856 | 594 | counter += CODEC_IO_Write(DeviceAddr, 0x620, 0x0002); |
| bcostm | 6:e1d9da7fe856 | 595 | |
| bcostm | 6:e1d9da7fe856 | 596 | /* AIF ADC2 HPF enable, HPF cut = voice mode 1 fc=127Hz at fs=8kHz */ |
| bcostm | 6:e1d9da7fe856 | 597 | counter += CODEC_IO_Write(DeviceAddr, 0x411, 0x3800); |
| bcostm | 6:e1d9da7fe856 | 598 | } |
| bcostm | 6:e1d9da7fe856 | 599 | else if(input_device == INPUT_DEVICE_DIGITAL_MIC1_MIC2) |
| bcostm | 6:e1d9da7fe856 | 600 | { |
| bcostm | 6:e1d9da7fe856 | 601 | /* Enable Microphone bias 1 generator, Enable VMID */ |
| bcostm | 6:e1d9da7fe856 | 602 | power_mgnt_reg_1 |= 0x0013; |
| bcostm | 6:e1d9da7fe856 | 603 | counter += CODEC_IO_Write(DeviceAddr, 0x01, power_mgnt_reg_1); |
| bcostm | 6:e1d9da7fe856 | 604 | |
| bcostm | 6:e1d9da7fe856 | 605 | /* ADC oversample enable */ |
| bcostm | 6:e1d9da7fe856 | 606 | counter += CODEC_IO_Write(DeviceAddr, 0x620, 0x0002); |
| bcostm | 6:e1d9da7fe856 | 607 | |
| bcostm | 6:e1d9da7fe856 | 608 | /* AIF ADC1 HPF enable, HPF cut = voice mode 1 fc=127Hz at fs=8kHz */ |
| bcostm | 6:e1d9da7fe856 | 609 | counter += CODEC_IO_Write(DeviceAddr, 0x410, 0x1800); |
| bcostm | 6:e1d9da7fe856 | 610 | |
| bcostm | 6:e1d9da7fe856 | 611 | /* AIF ADC2 HPF enable, HPF cut = voice mode 1 fc=127Hz at fs=8kHz */ |
| bcostm | 6:e1d9da7fe856 | 612 | counter += CODEC_IO_Write(DeviceAddr, 0x411, 0x1800); |
| bcostm | 6:e1d9da7fe856 | 613 | } |
| bcostm | 6:e1d9da7fe856 | 614 | else if ((input_device == INPUT_DEVICE_INPUT_LINE_1) || (input_device == INPUT_DEVICE_INPUT_LINE_2)) |
| bcostm | 6:e1d9da7fe856 | 615 | { |
| bcostm | 6:e1d9da7fe856 | 616 | |
| bcostm | 6:e1d9da7fe856 | 617 | /* Disable mute on IN1L, IN1L Volume = +0dB */ |
| bcostm | 6:e1d9da7fe856 | 618 | counter += CODEC_IO_Write(DeviceAddr, 0x18, 0x000B); |
| bcostm | 6:e1d9da7fe856 | 619 | |
| bcostm | 6:e1d9da7fe856 | 620 | /* Disable mute on IN1R, IN1R Volume = +0dB */ |
| bcostm | 6:e1d9da7fe856 | 621 | counter += CODEC_IO_Write(DeviceAddr, 0x1A, 0x000B); |
| bcostm | 6:e1d9da7fe856 | 622 | |
| bcostm | 6:e1d9da7fe856 | 623 | /* AIF ADC1 HPF enable, HPF cut = hifi mode fc=4Hz at fs=48kHz */ |
| bcostm | 6:e1d9da7fe856 | 624 | counter += CODEC_IO_Write(DeviceAddr, 0x410, 0x1800); |
| bcostm | 6:e1d9da7fe856 | 625 | } |
| bcostm | 6:e1d9da7fe856 | 626 | /* Volume Control */ |
| bcostm | 6:e1d9da7fe856 | 627 | wm8994_SetVolume(DeviceAddr, Volume); |
| bcostm | 6:e1d9da7fe856 | 628 | } |
| bcostm | 6:e1d9da7fe856 | 629 | /* Return communication control value */ |
| bcostm | 6:e1d9da7fe856 | 630 | return counter; |
| bcostm | 6:e1d9da7fe856 | 631 | } |
| bcostm | 6:e1d9da7fe856 | 632 | |
| bcostm | 6:e1d9da7fe856 | 633 | /** |
| bcostm | 6:e1d9da7fe856 | 634 | * @brief Deinitializes the audio codec. |
| bcostm | 6:e1d9da7fe856 | 635 | * @param None |
| bcostm | 6:e1d9da7fe856 | 636 | * @retval None |
| bcostm | 6:e1d9da7fe856 | 637 | */ |
| bcostm | 6:e1d9da7fe856 | 638 | void wm8994_DeInit(void) |
| bcostm | 6:e1d9da7fe856 | 639 | { |
| bcostm | 6:e1d9da7fe856 | 640 | /* Deinitialize Audio Codec interface */ |
| bcostm | 6:e1d9da7fe856 | 641 | AUDIO_IO_DeInit(); |
| bcostm | 6:e1d9da7fe856 | 642 | } |
| bcostm | 6:e1d9da7fe856 | 643 | |
| bcostm | 6:e1d9da7fe856 | 644 | /** |
| bcostm | 6:e1d9da7fe856 | 645 | * @brief Get the WM8994 ID. |
| bcostm | 6:e1d9da7fe856 | 646 | * @param DeviceAddr: Device address on communication Bus. |
| bcostm | 6:e1d9da7fe856 | 647 | * @retval The WM8994 ID |
| bcostm | 6:e1d9da7fe856 | 648 | */ |
| bcostm | 6:e1d9da7fe856 | 649 | uint32_t wm8994_ReadID(uint16_t DeviceAddr) |
| bcostm | 6:e1d9da7fe856 | 650 | { |
| bcostm | 6:e1d9da7fe856 | 651 | /* Initialize the Control interface of the Audio Codec */ |
| bcostm | 6:e1d9da7fe856 | 652 | AUDIO_IO_Init(); |
| bcostm | 6:e1d9da7fe856 | 653 | |
| bcostm | 6:e1d9da7fe856 | 654 | return ((uint32_t)AUDIO_IO_Read(DeviceAddr, WM8994_CHIPID_ADDR)); |
| bcostm | 6:e1d9da7fe856 | 655 | } |
| bcostm | 6:e1d9da7fe856 | 656 | |
| bcostm | 6:e1d9da7fe856 | 657 | /** |
| bcostm | 6:e1d9da7fe856 | 658 | * @brief Start the audio Codec play feature. |
| bcostm | 6:e1d9da7fe856 | 659 | * @note For this codec no Play options are required. |
| bcostm | 6:e1d9da7fe856 | 660 | * @param DeviceAddr: Device address on communication Bus. |
| bcostm | 6:e1d9da7fe856 | 661 | * @retval 0 if correct communication, else wrong communication |
| bcostm | 6:e1d9da7fe856 | 662 | */ |
| bcostm | 6:e1d9da7fe856 | 663 | uint32_t wm8994_Play(uint16_t DeviceAddr, uint16_t* pBuffer, uint16_t Size) |
| bcostm | 6:e1d9da7fe856 | 664 | { |
| bcostm | 6:e1d9da7fe856 | 665 | uint32_t counter = 0; |
| bcostm | 6:e1d9da7fe856 | 666 | |
| bcostm | 6:e1d9da7fe856 | 667 | /* Resumes the audio file playing */ |
| bcostm | 6:e1d9da7fe856 | 668 | /* Unmute the output first */ |
| bcostm | 6:e1d9da7fe856 | 669 | counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_OFF); |
| bcostm | 6:e1d9da7fe856 | 670 | |
| bcostm | 6:e1d9da7fe856 | 671 | return counter; |
| bcostm | 6:e1d9da7fe856 | 672 | } |
| bcostm | 6:e1d9da7fe856 | 673 | |
| bcostm | 6:e1d9da7fe856 | 674 | /** |
| bcostm | 6:e1d9da7fe856 | 675 | * @brief Pauses playing on the audio codec. |
| bcostm | 6:e1d9da7fe856 | 676 | * @param DeviceAddr: Device address on communication Bus. |
| bcostm | 6:e1d9da7fe856 | 677 | * @retval 0 if correct communication, else wrong communication |
| bcostm | 6:e1d9da7fe856 | 678 | */ |
| bcostm | 6:e1d9da7fe856 | 679 | uint32_t wm8994_Pause(uint16_t DeviceAddr) |
| bcostm | 6:e1d9da7fe856 | 680 | { |
| bcostm | 6:e1d9da7fe856 | 681 | uint32_t counter = 0; |
| bcostm | 6:e1d9da7fe856 | 682 | |
| bcostm | 6:e1d9da7fe856 | 683 | /* Pause the audio file playing */ |
| bcostm | 6:e1d9da7fe856 | 684 | /* Mute the output first */ |
| bcostm | 6:e1d9da7fe856 | 685 | counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_ON); |
| bcostm | 6:e1d9da7fe856 | 686 | |
| bcostm | 6:e1d9da7fe856 | 687 | /* Put the Codec in Power save mode */ |
| bcostm | 6:e1d9da7fe856 | 688 | counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x01); |
| bcostm | 6:e1d9da7fe856 | 689 | |
| bcostm | 6:e1d9da7fe856 | 690 | return counter; |
| bcostm | 6:e1d9da7fe856 | 691 | } |
| bcostm | 6:e1d9da7fe856 | 692 | |
| bcostm | 6:e1d9da7fe856 | 693 | /** |
| bcostm | 6:e1d9da7fe856 | 694 | * @brief Resumes playing on the audio codec. |
| bcostm | 6:e1d9da7fe856 | 695 | * @param DeviceAddr: Device address on communication Bus. |
| bcostm | 6:e1d9da7fe856 | 696 | * @retval 0 if correct communication, else wrong communication |
| bcostm | 6:e1d9da7fe856 | 697 | */ |
| bcostm | 6:e1d9da7fe856 | 698 | uint32_t wm8994_Resume(uint16_t DeviceAddr) |
| bcostm | 6:e1d9da7fe856 | 699 | { |
| bcostm | 6:e1d9da7fe856 | 700 | uint32_t counter = 0; |
| bcostm | 6:e1d9da7fe856 | 701 | |
| bcostm | 6:e1d9da7fe856 | 702 | /* Resumes the audio file playing */ |
| bcostm | 6:e1d9da7fe856 | 703 | /* Unmute the output first */ |
| bcostm | 6:e1d9da7fe856 | 704 | counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_OFF); |
| bcostm | 6:e1d9da7fe856 | 705 | |
| bcostm | 6:e1d9da7fe856 | 706 | return counter; |
| bcostm | 6:e1d9da7fe856 | 707 | } |
| bcostm | 6:e1d9da7fe856 | 708 | |
| bcostm | 6:e1d9da7fe856 | 709 | /** |
| bcostm | 6:e1d9da7fe856 | 710 | * @brief Stops audio Codec playing. It powers down the codec. |
| bcostm | 6:e1d9da7fe856 | 711 | * @param DeviceAddr: Device address on communication Bus. |
| bcostm | 6:e1d9da7fe856 | 712 | * @param CodecPdwnMode: selects the power down mode. |
| bcostm | 6:e1d9da7fe856 | 713 | * - CODEC_PDWN_SW: only mutes the audio codec. When resuming from this |
| bcostm | 6:e1d9da7fe856 | 714 | * mode the codec keeps the previous initialization |
| bcostm | 6:e1d9da7fe856 | 715 | * (no need to re-Initialize the codec registers). |
| bcostm | 6:e1d9da7fe856 | 716 | * - CODEC_PDWN_HW: Physically power down the codec. When resuming from this |
| bcostm | 6:e1d9da7fe856 | 717 | * mode, the codec is set to default configuration |
| bcostm | 6:e1d9da7fe856 | 718 | * (user should re-Initialize the codec in order to |
| bcostm | 6:e1d9da7fe856 | 719 | * play again the audio stream). |
| bcostm | 6:e1d9da7fe856 | 720 | * @retval 0 if correct communication, else wrong communication |
| bcostm | 6:e1d9da7fe856 | 721 | */ |
| bcostm | 6:e1d9da7fe856 | 722 | uint32_t wm8994_Stop(uint16_t DeviceAddr, uint32_t CodecPdwnMode) |
| bcostm | 6:e1d9da7fe856 | 723 | { |
| bcostm | 6:e1d9da7fe856 | 724 | uint32_t counter = 0; |
| bcostm | 6:e1d9da7fe856 | 725 | |
| bcostm | 6:e1d9da7fe856 | 726 | if (outputEnabled != 0) |
| bcostm | 6:e1d9da7fe856 | 727 | { |
| bcostm | 6:e1d9da7fe856 | 728 | /* Mute the output first */ |
| bcostm | 6:e1d9da7fe856 | 729 | counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_ON); |
| bcostm | 6:e1d9da7fe856 | 730 | |
| bcostm | 6:e1d9da7fe856 | 731 | if (CodecPdwnMode == CODEC_PDWN_SW) |
| bcostm | 6:e1d9da7fe856 | 732 | { |
Jerome Coutant |
10:1050c589b2ad
|
733
|
/* Only output mute required*/
|
|
| bcostm | 6:e1d9da7fe856 | 734 | } |
| bcostm | 6:e1d9da7fe856 | 735 | else /* CODEC_PDWN_HW */ |
| bcostm | 6:e1d9da7fe856 | 736 | { |
| bcostm | 6:e1d9da7fe856 | 737 | /* Mute the AIF1 Timeslot 0 DAC1 path */ |
| bcostm | 6:e1d9da7fe856 | 738 | counter += CODEC_IO_Write(DeviceAddr, 0x420, 0x0200); |
| bcostm | 6:e1d9da7fe856 | 739 | |
| bcostm | 6:e1d9da7fe856 | 740 | /* Mute the AIF1 Timeslot 1 DAC2 path */ |
| bcostm | 6:e1d9da7fe856 | 741 | counter += CODEC_IO_Write(DeviceAddr, 0x422, 0x0200); |
| bcostm | 6:e1d9da7fe856 | 742 | |
| bcostm | 6:e1d9da7fe856 | 743 | /* Disable DAC1L_TO_HPOUT1L */ |
| bcostm | 6:e1d9da7fe856 | 744 | counter += CODEC_IO_Write(DeviceAddr, 0x2D, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 745 | |
| bcostm | 6:e1d9da7fe856 | 746 | /* Disable DAC1R_TO_HPOUT1R */ |
| bcostm | 6:e1d9da7fe856 | 747 | counter += CODEC_IO_Write(DeviceAddr, 0x2E, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 748 | |
| bcostm | 6:e1d9da7fe856 | 749 | /* Disable DAC1 and DAC2 */ |
| bcostm | 6:e1d9da7fe856 | 750 | counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 751 | |
| bcostm | 6:e1d9da7fe856 | 752 | /* Reset Codec by writing in 0x0000 address register */ |
| bcostm | 6:e1d9da7fe856 | 753 | counter += CODEC_IO_Write(DeviceAddr, 0x0000, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 754 | |
| bcostm | 6:e1d9da7fe856 | 755 | outputEnabled = 0; |
| bcostm | 6:e1d9da7fe856 | 756 | } |
| bcostm | 6:e1d9da7fe856 | 757 | } |
| bcostm | 6:e1d9da7fe856 | 758 | return counter; |
| bcostm | 6:e1d9da7fe856 | 759 | } |
| bcostm | 6:e1d9da7fe856 | 760 | |
| bcostm | 6:e1d9da7fe856 | 761 | /** |
| bcostm | 6:e1d9da7fe856 | 762 | * @brief Sets higher or lower the codec volume level. |
| bcostm | 6:e1d9da7fe856 | 763 | * @param DeviceAddr: Device address on communication Bus. |
| bcostm | 6:e1d9da7fe856 | 764 | * @param Volume: a byte value from 0 to 255 (refer to codec registers |
| bcostm | 6:e1d9da7fe856 | 765 | * description for more details). |
| bcostm | 6:e1d9da7fe856 | 766 | * @retval 0 if correct communication, else wrong communication |
| bcostm | 6:e1d9da7fe856 | 767 | */ |
| bcostm | 6:e1d9da7fe856 | 768 | uint32_t wm8994_SetVolume(uint16_t DeviceAddr, uint8_t Volume) |
| bcostm | 6:e1d9da7fe856 | 769 | { |
| bcostm | 6:e1d9da7fe856 | 770 | uint32_t counter = 0; |
| bcostm | 6:e1d9da7fe856 | 771 | uint8_t convertedvol = VOLUME_CONVERT(Volume); |
| bcostm | 6:e1d9da7fe856 | 772 | |
| bcostm | 6:e1d9da7fe856 | 773 | /* Output volume */ |
| bcostm | 6:e1d9da7fe856 | 774 | if (outputEnabled != 0) |
| bcostm | 6:e1d9da7fe856 | 775 | { |
| bcostm | 6:e1d9da7fe856 | 776 | if(convertedvol > 0x3E) |
| bcostm | 6:e1d9da7fe856 | 777 | { |
| bcostm | 6:e1d9da7fe856 | 778 | /* Unmute audio codec */ |
| bcostm | 6:e1d9da7fe856 | 779 | counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_OFF); |
| bcostm | 6:e1d9da7fe856 | 780 | |
| bcostm | 6:e1d9da7fe856 | 781 | /* Left Headphone Volume */ |
| bcostm | 6:e1d9da7fe856 | 782 | counter += CODEC_IO_Write(DeviceAddr, 0x1C, 0x3F | 0x140); |
| bcostm | 6:e1d9da7fe856 | 783 | |
| bcostm | 6:e1d9da7fe856 | 784 | /* Right Headphone Volume */ |
| bcostm | 6:e1d9da7fe856 | 785 | counter += CODEC_IO_Write(DeviceAddr, 0x1D, 0x3F | 0x140); |
| bcostm | 6:e1d9da7fe856 | 786 | |
| bcostm | 6:e1d9da7fe856 | 787 | /* Left Speaker Volume */ |
| bcostm | 6:e1d9da7fe856 | 788 | counter += CODEC_IO_Write(DeviceAddr, 0x26, 0x3F | 0x140); |
| bcostm | 6:e1d9da7fe856 | 789 | |
| bcostm | 6:e1d9da7fe856 | 790 | /* Right Speaker Volume */ |
| bcostm | 6:e1d9da7fe856 | 791 | counter += CODEC_IO_Write(DeviceAddr, 0x27, 0x3F | 0x140); |
| bcostm | 6:e1d9da7fe856 | 792 | } |
| bcostm | 6:e1d9da7fe856 | 793 | else if (Volume == 0) |
| bcostm | 6:e1d9da7fe856 | 794 | { |
| bcostm | 6:e1d9da7fe856 | 795 | /* Mute audio codec */ |
| bcostm | 6:e1d9da7fe856 | 796 | counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_ON); |
| bcostm | 6:e1d9da7fe856 | 797 | } |
| bcostm | 6:e1d9da7fe856 | 798 | else |
| bcostm | 6:e1d9da7fe856 | 799 | { |
| bcostm | 6:e1d9da7fe856 | 800 | /* Unmute audio codec */ |
| bcostm | 6:e1d9da7fe856 | 801 | counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_OFF); |
| bcostm | 6:e1d9da7fe856 | 802 | |
| bcostm | 6:e1d9da7fe856 | 803 | /* Left Headphone Volume */ |
| bcostm | 6:e1d9da7fe856 | 804 | counter += CODEC_IO_Write(DeviceAddr, 0x1C, convertedvol | 0x140); |
| bcostm | 6:e1d9da7fe856 | 805 | |
| bcostm | 6:e1d9da7fe856 | 806 | /* Right Headphone Volume */ |
| bcostm | 6:e1d9da7fe856 | 807 | counter += CODEC_IO_Write(DeviceAddr, 0x1D, convertedvol | 0x140); |
| bcostm | 6:e1d9da7fe856 | 808 | |
| bcostm | 6:e1d9da7fe856 | 809 | /* Left Speaker Volume */ |
| bcostm | 6:e1d9da7fe856 | 810 | counter += CODEC_IO_Write(DeviceAddr, 0x26, convertedvol | 0x140); |
| bcostm | 6:e1d9da7fe856 | 811 | |
| bcostm | 6:e1d9da7fe856 | 812 | /* Right Speaker Volume */ |
| bcostm | 6:e1d9da7fe856 | 813 | counter += CODEC_IO_Write(DeviceAddr, 0x27, convertedvol | 0x140); |
| bcostm | 6:e1d9da7fe856 | 814 | } |
| bcostm | 6:e1d9da7fe856 | 815 | } |
| bcostm | 6:e1d9da7fe856 | 816 | |
| bcostm | 6:e1d9da7fe856 | 817 | /* Input volume */ |
| bcostm | 6:e1d9da7fe856 | 818 | if (inputEnabled != 0) |
| bcostm | 6:e1d9da7fe856 | 819 | { |
| bcostm | 6:e1d9da7fe856 | 820 | convertedvol = VOLUME_IN_CONVERT(Volume); |
| bcostm | 6:e1d9da7fe856 | 821 | |
| bcostm | 6:e1d9da7fe856 | 822 | /* Left AIF1 ADC1 volume */ |
| bcostm | 6:e1d9da7fe856 | 823 | counter += CODEC_IO_Write(DeviceAddr, 0x400, convertedvol | 0x100); |
| bcostm | 6:e1d9da7fe856 | 824 | |
| bcostm | 6:e1d9da7fe856 | 825 | /* Right AIF1 ADC1 volume */ |
| bcostm | 6:e1d9da7fe856 | 826 | counter += CODEC_IO_Write(DeviceAddr, 0x401, convertedvol | 0x100); |
| bcostm | 6:e1d9da7fe856 | 827 | |
| bcostm | 6:e1d9da7fe856 | 828 | /* Left AIF1 ADC2 volume */ |
| bcostm | 6:e1d9da7fe856 | 829 | counter += CODEC_IO_Write(DeviceAddr, 0x404, convertedvol | 0x100); |
| bcostm | 6:e1d9da7fe856 | 830 | |
| bcostm | 6:e1d9da7fe856 | 831 | /* Right AIF1 ADC2 volume */ |
| bcostm | 6:e1d9da7fe856 | 832 | counter += CODEC_IO_Write(DeviceAddr, 0x405, convertedvol | 0x100); |
| bcostm | 6:e1d9da7fe856 | 833 | } |
| bcostm | 6:e1d9da7fe856 | 834 | return counter; |
| bcostm | 6:e1d9da7fe856 | 835 | } |
| bcostm | 6:e1d9da7fe856 | 836 | |
| bcostm | 6:e1d9da7fe856 | 837 | /** |
| bcostm | 6:e1d9da7fe856 | 838 | * @brief Enables or disables the mute feature on the audio codec. |
| bcostm | 6:e1d9da7fe856 | 839 | * @param DeviceAddr: Device address on communication Bus. |
| bcostm | 6:e1d9da7fe856 | 840 | * @param Cmd: AUDIO_MUTE_ON to enable the mute or AUDIO_MUTE_OFF to disable the |
| bcostm | 6:e1d9da7fe856 | 841 | * mute mode. |
| bcostm | 6:e1d9da7fe856 | 842 | * @retval 0 if correct communication, else wrong communication |
| bcostm | 6:e1d9da7fe856 | 843 | */ |
| bcostm | 6:e1d9da7fe856 | 844 | uint32_t wm8994_SetMute(uint16_t DeviceAddr, uint32_t Cmd) |
| bcostm | 6:e1d9da7fe856 | 845 | { |
| bcostm | 6:e1d9da7fe856 | 846 | uint32_t counter = 0; |
| bcostm | 6:e1d9da7fe856 | 847 | |
| bcostm | 6:e1d9da7fe856 | 848 | if (outputEnabled != 0) |
| bcostm | 6:e1d9da7fe856 | 849 | { |
| bcostm | 6:e1d9da7fe856 | 850 | /* Set the Mute mode */ |
| bcostm | 6:e1d9da7fe856 | 851 | if(Cmd == AUDIO_MUTE_ON) |
| bcostm | 6:e1d9da7fe856 | 852 | { |
| bcostm | 6:e1d9da7fe856 | 853 | /* Soft Mute the AIF1 Timeslot 0 DAC1 path L&R */ |
| bcostm | 6:e1d9da7fe856 | 854 | counter += CODEC_IO_Write(DeviceAddr, 0x420, 0x0200); |
| bcostm | 6:e1d9da7fe856 | 855 | |
| bcostm | 6:e1d9da7fe856 | 856 | /* Soft Mute the AIF1 Timeslot 1 DAC2 path L&R */ |
| bcostm | 6:e1d9da7fe856 | 857 | counter += CODEC_IO_Write(DeviceAddr, 0x422, 0x0200); |
| bcostm | 6:e1d9da7fe856 | 858 | } |
| bcostm | 6:e1d9da7fe856 | 859 | else /* AUDIO_MUTE_OFF Disable the Mute */ |
| bcostm | 6:e1d9da7fe856 | 860 | { |
| bcostm | 6:e1d9da7fe856 | 861 | /* Unmute the AIF1 Timeslot 0 DAC1 path L&R */ |
Jerome Coutant |
10:1050c589b2ad
|
862
|
counter += CODEC_IO_Write(DeviceAddr, 0x420, 0x0010);
|
|
| bcostm | 6:e1d9da7fe856 | 863 | |
| bcostm | 6:e1d9da7fe856 | 864 | /* Unmute the AIF1 Timeslot 1 DAC2 path L&R */ |
Jerome Coutant |
10:1050c589b2ad
|
865
|
counter += CODEC_IO_Write(DeviceAddr, 0x422, 0x0010);
|
|
| bcostm | 6:e1d9da7fe856 | 866 | } |
| bcostm | 6:e1d9da7fe856 | 867 | } |
| bcostm | 6:e1d9da7fe856 | 868 | return counter; |
| bcostm | 6:e1d9da7fe856 | 869 | } |
| bcostm | 6:e1d9da7fe856 | 870 | |
| bcostm | 6:e1d9da7fe856 | 871 | /** |
| bcostm | 6:e1d9da7fe856 | 872 | * @brief Switch dynamically (while audio file is played) the output target |
| bcostm | 6:e1d9da7fe856 | 873 | * (speaker or headphone). |
| bcostm | 6:e1d9da7fe856 | 874 | * @param DeviceAddr: Device address on communication Bus. |
| bcostm | 6:e1d9da7fe856 | 875 | * @param Output: specifies the audio output target: OUTPUT_DEVICE_SPEAKER, |
| bcostm | 6:e1d9da7fe856 | 876 | * OUTPUT_DEVICE_HEADPHONE, OUTPUT_DEVICE_BOTH or OUTPUT_DEVICE_AUTO |
| bcostm | 6:e1d9da7fe856 | 877 | * @retval 0 if correct communication, else wrong communication |
| bcostm | 6:e1d9da7fe856 | 878 | */ |
| bcostm | 6:e1d9da7fe856 | 879 | uint32_t wm8994_SetOutputMode(uint16_t DeviceAddr, uint8_t Output) |
| bcostm | 6:e1d9da7fe856 | 880 | { |
| bcostm | 6:e1d9da7fe856 | 881 | uint32_t counter = 0; |
| bcostm | 6:e1d9da7fe856 | 882 | |
| bcostm | 6:e1d9da7fe856 | 883 | switch (Output) |
| bcostm | 6:e1d9da7fe856 | 884 | { |
| bcostm | 6:e1d9da7fe856 | 885 | case OUTPUT_DEVICE_SPEAKER: |
| bcostm | 6:e1d9da7fe856 | 886 | /* Enable DAC1 (Left), Enable DAC1 (Right), |
| bcostm | 6:e1d9da7fe856 | 887 | Disable DAC2 (Left), Disable DAC2 (Right)*/ |
| bcostm | 6:e1d9da7fe856 | 888 | counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0C0C); |
| bcostm | 6:e1d9da7fe856 | 889 | |
| bcostm | 6:e1d9da7fe856 | 890 | /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 891 | counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 892 | |
| bcostm | 6:e1d9da7fe856 | 893 | /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 894 | counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 895 | |
| bcostm | 6:e1d9da7fe856 | 896 | /* Disable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 897 | counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0002); |
| bcostm | 6:e1d9da7fe856 | 898 | |
| bcostm | 6:e1d9da7fe856 | 899 | /* Disable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 900 | counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0002); |
| bcostm | 6:e1d9da7fe856 | 901 | break; |
| bcostm | 6:e1d9da7fe856 | 902 | |
| bcostm | 6:e1d9da7fe856 | 903 | case OUTPUT_DEVICE_HEADPHONE: |
| bcostm | 6:e1d9da7fe856 | 904 | /* Disable DAC1 (Left), Disable DAC1 (Right), |
| bcostm | 6:e1d9da7fe856 | 905 | Enable DAC2 (Left), Enable DAC2 (Right)*/ |
| bcostm | 6:e1d9da7fe856 | 906 | counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0303); |
| bcostm | 6:e1d9da7fe856 | 907 | |
| bcostm | 6:e1d9da7fe856 | 908 | /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 909 | counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0001); |
| bcostm | 6:e1d9da7fe856 | 910 | |
| bcostm | 6:e1d9da7fe856 | 911 | /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 912 | counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0001); |
| bcostm | 6:e1d9da7fe856 | 913 | |
| bcostm | 6:e1d9da7fe856 | 914 | /* Disable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 915 | counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 916 | |
| bcostm | 6:e1d9da7fe856 | 917 | /* Disable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 918 | counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 919 | break; |
| bcostm | 6:e1d9da7fe856 | 920 | |
| bcostm | 6:e1d9da7fe856 | 921 | case OUTPUT_DEVICE_BOTH: |
| bcostm | 6:e1d9da7fe856 | 922 | /* Enable DAC1 (Left), Enable DAC1 (Right), |
| bcostm | 6:e1d9da7fe856 | 923 | also Enable DAC2 (Left), Enable DAC2 (Right)*/ |
| bcostm | 6:e1d9da7fe856 | 924 | counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0303 | 0x0C0C); |
| bcostm | 6:e1d9da7fe856 | 925 | |
| bcostm | 6:e1d9da7fe856 | 926 | /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 927 | counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0001); |
| bcostm | 6:e1d9da7fe856 | 928 | |
| bcostm | 6:e1d9da7fe856 | 929 | /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 930 | counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0001); |
| bcostm | 6:e1d9da7fe856 | 931 | |
| bcostm | 6:e1d9da7fe856 | 932 | /* Enable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 933 | counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0002); |
| bcostm | 6:e1d9da7fe856 | 934 | |
| bcostm | 6:e1d9da7fe856 | 935 | /* Enable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 936 | counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0002); |
| bcostm | 6:e1d9da7fe856 | 937 | break; |
| bcostm | 6:e1d9da7fe856 | 938 | |
| bcostm | 6:e1d9da7fe856 | 939 | default: |
| bcostm | 6:e1d9da7fe856 | 940 | /* Disable DAC1 (Left), Disable DAC1 (Right), |
| bcostm | 6:e1d9da7fe856 | 941 | Enable DAC2 (Left), Enable DAC2 (Right)*/ |
| bcostm | 6:e1d9da7fe856 | 942 | counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0303); |
| bcostm | 6:e1d9da7fe856 | 943 | |
| bcostm | 6:e1d9da7fe856 | 944 | /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 945 | counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0001); |
| bcostm | 6:e1d9da7fe856 | 946 | |
| bcostm | 6:e1d9da7fe856 | 947 | /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 948 | counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0001); |
| bcostm | 6:e1d9da7fe856 | 949 | |
| bcostm | 6:e1d9da7fe856 | 950 | /* Disable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 951 | counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 952 | |
| bcostm | 6:e1d9da7fe856 | 953 | /* Disable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */ |
| bcostm | 6:e1d9da7fe856 | 954 | counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 955 | break; |
| bcostm | 6:e1d9da7fe856 | 956 | } |
| bcostm | 6:e1d9da7fe856 | 957 | return counter; |
| bcostm | 6:e1d9da7fe856 | 958 | } |
| bcostm | 6:e1d9da7fe856 | 959 | |
| bcostm | 6:e1d9da7fe856 | 960 | /** |
| bcostm | 6:e1d9da7fe856 | 961 | * @brief Sets new frequency. |
| bcostm | 6:e1d9da7fe856 | 962 | * @param DeviceAddr: Device address on communication Bus. |
| bcostm | 6:e1d9da7fe856 | 963 | * @param AudioFreq: Audio frequency used to play the audio stream. |
| bcostm | 6:e1d9da7fe856 | 964 | * @retval 0 if correct communication, else wrong communication |
| bcostm | 6:e1d9da7fe856 | 965 | */ |
| bcostm | 6:e1d9da7fe856 | 966 | uint32_t wm8994_SetFrequency(uint16_t DeviceAddr, uint32_t AudioFreq) |
| bcostm | 6:e1d9da7fe856 | 967 | { |
| bcostm | 6:e1d9da7fe856 | 968 | uint32_t counter = 0; |
| bcostm | 6:e1d9da7fe856 | 969 | |
| bcostm | 6:e1d9da7fe856 | 970 | /* Clock Configurations */ |
| bcostm | 6:e1d9da7fe856 | 971 | switch (AudioFreq) |
| bcostm | 6:e1d9da7fe856 | 972 | { |
| bcostm | 6:e1d9da7fe856 | 973 | case AUDIO_FREQUENCY_8K: |
| bcostm | 6:e1d9da7fe856 | 974 | /* AIF1 Sample Rate = 8 (KHz), ratio=256 */ |
| bcostm | 6:e1d9da7fe856 | 975 | counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0003); |
| bcostm | 6:e1d9da7fe856 | 976 | break; |
| bcostm | 6:e1d9da7fe856 | 977 | |
| bcostm | 6:e1d9da7fe856 | 978 | case AUDIO_FREQUENCY_16K: |
| bcostm | 6:e1d9da7fe856 | 979 | /* AIF1 Sample Rate = 16 (KHz), ratio=256 */ |
| bcostm | 6:e1d9da7fe856 | 980 | counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0033); |
| bcostm | 6:e1d9da7fe856 | 981 | break; |
Jerome Coutant |
10:1050c589b2ad
|
982
|
|
|
Jerome Coutant |
10:1050c589b2ad
|
983
|
case AUDIO_FREQUENCY_32K:
|
|
Jerome Coutant |
10:1050c589b2ad
|
984
|
/* AIF1 Sample Rate = 32 (KHz), ratio=256 */
|
|
Jerome Coutant |
10:1050c589b2ad
|
985
|
counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0063);
|
|
Jerome Coutant |
10:1050c589b2ad
|
986
|
break;
|
|
| bcostm | 6:e1d9da7fe856 | 987 | |
| bcostm | 6:e1d9da7fe856 | 988 | case AUDIO_FREQUENCY_48K: |
| bcostm | 6:e1d9da7fe856 | 989 | /* AIF1 Sample Rate = 48 (KHz), ratio=256 */ |
| bcostm | 6:e1d9da7fe856 | 990 | counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0083); |
| bcostm | 6:e1d9da7fe856 | 991 | break; |
| bcostm | 6:e1d9da7fe856 | 992 | |
| bcostm | 6:e1d9da7fe856 | 993 | case AUDIO_FREQUENCY_96K: |
| bcostm | 6:e1d9da7fe856 | 994 | /* AIF1 Sample Rate = 96 (KHz), ratio=256 */ |
| bcostm | 6:e1d9da7fe856 | 995 | counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x00A3); |
| bcostm | 6:e1d9da7fe856 | 996 | break; |
| bcostm | 6:e1d9da7fe856 | 997 | |
| bcostm | 6:e1d9da7fe856 | 998 | case AUDIO_FREQUENCY_11K: |
| bcostm | 6:e1d9da7fe856 | 999 | /* AIF1 Sample Rate = 11.025 (KHz), ratio=256 */ |
| bcostm | 6:e1d9da7fe856 | 1000 | counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0013); |
| bcostm | 6:e1d9da7fe856 | 1001 | break; |
| bcostm | 6:e1d9da7fe856 | 1002 | |
| bcostm | 6:e1d9da7fe856 | 1003 | case AUDIO_FREQUENCY_22K: |
| bcostm | 6:e1d9da7fe856 | 1004 | /* AIF1 Sample Rate = 22.050 (KHz), ratio=256 */ |
| bcostm | 6:e1d9da7fe856 | 1005 | counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0043); |
| bcostm | 6:e1d9da7fe856 | 1006 | break; |
| bcostm | 6:e1d9da7fe856 | 1007 | |
| bcostm | 6:e1d9da7fe856 | 1008 | case AUDIO_FREQUENCY_44K: |
| bcostm | 6:e1d9da7fe856 | 1009 | /* AIF1 Sample Rate = 44.1 (KHz), ratio=256 */ |
| bcostm | 6:e1d9da7fe856 | 1010 | counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0073); |
| bcostm | 6:e1d9da7fe856 | 1011 | break; |
| bcostm | 6:e1d9da7fe856 | 1012 | |
| bcostm | 6:e1d9da7fe856 | 1013 | default: |
| bcostm | 6:e1d9da7fe856 | 1014 | /* AIF1 Sample Rate = 48 (KHz), ratio=256 */ |
| bcostm | 6:e1d9da7fe856 | 1015 | counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0083); |
| bcostm | 6:e1d9da7fe856 | 1016 | break; |
| bcostm | 6:e1d9da7fe856 | 1017 | } |
| bcostm | 6:e1d9da7fe856 | 1018 | return counter; |
| bcostm | 6:e1d9da7fe856 | 1019 | } |
| bcostm | 6:e1d9da7fe856 | 1020 | |
| bcostm | 6:e1d9da7fe856 | 1021 | /** |
| bcostm | 6:e1d9da7fe856 | 1022 | * @brief Resets wm8994 registers. |
| bcostm | 6:e1d9da7fe856 | 1023 | * @param DeviceAddr: Device address on communication Bus. |
| bcostm | 6:e1d9da7fe856 | 1024 | * @retval 0 if correct communication, else wrong communication |
| bcostm | 6:e1d9da7fe856 | 1025 | */ |
| bcostm | 6:e1d9da7fe856 | 1026 | uint32_t wm8994_Reset(uint16_t DeviceAddr) |
| bcostm | 6:e1d9da7fe856 | 1027 | { |
| bcostm | 6:e1d9da7fe856 | 1028 | uint32_t counter = 0; |
| bcostm | 6:e1d9da7fe856 | 1029 | |
| bcostm | 6:e1d9da7fe856 | 1030 | /* Reset Codec by writing in 0x0000 address register */ |
| bcostm | 6:e1d9da7fe856 | 1031 | counter = CODEC_IO_Write(DeviceAddr, 0x0000, 0x0000); |
| bcostm | 6:e1d9da7fe856 | 1032 | outputEnabled = 0; |
| bcostm | 6:e1d9da7fe856 | 1033 | inputEnabled=0; |
| bcostm | 6:e1d9da7fe856 | 1034 | |
| bcostm | 6:e1d9da7fe856 | 1035 | return counter; |
| bcostm | 6:e1d9da7fe856 | 1036 | } |
| bcostm | 6:e1d9da7fe856 | 1037 | |
| bcostm | 6:e1d9da7fe856 | 1038 | /** |
| bcostm | 6:e1d9da7fe856 | 1039 | * @brief Writes/Read a single data. |
| bcostm | 6:e1d9da7fe856 | 1040 | * @param Addr: I2C address |
| bcostm | 6:e1d9da7fe856 | 1041 | * @param Reg: Reg address |
| bcostm | 6:e1d9da7fe856 | 1042 | * @param Value: Data to be written |
| bcostm | 6:e1d9da7fe856 | 1043 | * @retval None |
| bcostm | 6:e1d9da7fe856 | 1044 | */ |
| bcostm | 6:e1d9da7fe856 | 1045 | static uint8_t CODEC_IO_Write(uint8_t Addr, uint16_t Reg, uint16_t Value) |
| bcostm | 6:e1d9da7fe856 | 1046 | { |
| bcostm | 6:e1d9da7fe856 | 1047 | uint32_t result = 0; |
| bcostm | 6:e1d9da7fe856 | 1048 | |
| bcostm | 6:e1d9da7fe856 | 1049 | AUDIO_IO_Write(Addr, Reg, Value); |
| bcostm | 6:e1d9da7fe856 | 1050 | |
| bcostm | 6:e1d9da7fe856 | 1051 | #ifdef VERIFY_WRITTENDATA |
| bcostm | 6:e1d9da7fe856 | 1052 | /* Verify that the data has been correctly written */ |
| bcostm | 6:e1d9da7fe856 | 1053 | result = (AUDIO_IO_Read(Addr, Reg) == Value)? 0:1; |
| bcostm | 6:e1d9da7fe856 | 1054 | #endif /* VERIFY_WRITTENDATA */ |
| bcostm | 6:e1d9da7fe856 | 1055 | |
| bcostm | 6:e1d9da7fe856 | 1056 | return result; |
| bcostm | 6:e1d9da7fe856 | 1057 | } |
| bcostm | 6:e1d9da7fe856 | 1058 | |
| bcostm | 6:e1d9da7fe856 | 1059 | /** |
| bcostm | 6:e1d9da7fe856 | 1060 | * @} |
| bcostm | 6:e1d9da7fe856 | 1061 | */ |
| bcostm | 6:e1d9da7fe856 | 1062 | |
| bcostm | 6:e1d9da7fe856 | 1063 | /** |
| bcostm | 6:e1d9da7fe856 | 1064 | * @} |
| bcostm | 6:e1d9da7fe856 | 1065 | */ |
| bcostm | 6:e1d9da7fe856 | 1066 | |
| bcostm | 6:e1d9da7fe856 | 1067 | /** |
| bcostm | 6:e1d9da7fe856 | 1068 | * @} |
| bcostm | 6:e1d9da7fe856 | 1069 | */ |
| bcostm | 6:e1d9da7fe856 | 1070 | |
| bcostm | 6:e1d9da7fe856 | 1071 | /** |
| bcostm | 6:e1d9da7fe856 | 1072 | * @} |
| bcostm | 6:e1d9da7fe856 | 1073 | */ |
| bcostm | 6:e1d9da7fe856 | 1074 | |
| bcostm | 6:e1d9da7fe856 | 1075 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |