STM32746G-Discovery board drivers V1.0.0
Dependents: DISCO-F746NG_LCDTS_CC3000_NTP DISCO-F746NG_ROPE_WIFI F746_SpectralAnalysis_NoPhoto ecte433 ... more
Drivers/BSP/Components/n25q128a/n25q128a.h@10:1050c589b2ad, 2019-11-12 (annotated)
- Committer:
- Jerome Coutant
- Date:
- Tue Nov 12 11:24:03 2019 +0100
- Revision:
- 10:1050c589b2ad
- Parent:
- 6:e1d9da7fe856
STM32Cube_FW_F7_V1.15.0 BSP_DISCO_F746NG
Who changed what in which revision?
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bcostm | 6:e1d9da7fe856 | 1 | /** |
bcostm | 6:e1d9da7fe856 | 2 | ****************************************************************************** |
bcostm | 6:e1d9da7fe856 | 3 | * @file n25q128a.h |
bcostm | 6:e1d9da7fe856 | 4 | * @author MCD Application Team |
bcostm | 6:e1d9da7fe856 | 5 | * @brief This file contains all the description of the N25Q128A QSPI memory. |
bcostm | 6:e1d9da7fe856 | 6 | ****************************************************************************** |
bcostm | 6:e1d9da7fe856 | 7 | * @attention |
bcostm | 6:e1d9da7fe856 | 8 | * |
bcostm | 6:e1d9da7fe856 | 9 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
bcostm | 6:e1d9da7fe856 | 10 | * |
bcostm | 6:e1d9da7fe856 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
bcostm | 6:e1d9da7fe856 | 12 | * are permitted provided that the following conditions are met: |
bcostm | 6:e1d9da7fe856 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
bcostm | 6:e1d9da7fe856 | 14 | * this list of conditions and the following disclaimer. |
bcostm | 6:e1d9da7fe856 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bcostm | 6:e1d9da7fe856 | 16 | * this list of conditions and the following disclaimer in the documentation |
bcostm | 6:e1d9da7fe856 | 17 | * and/or other materials provided with the distribution. |
bcostm | 6:e1d9da7fe856 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bcostm | 6:e1d9da7fe856 | 19 | * may be used to endorse or promote products derived from this software |
bcostm | 6:e1d9da7fe856 | 20 | * without specific prior written permission. |
bcostm | 6:e1d9da7fe856 | 21 | * |
bcostm | 6:e1d9da7fe856 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bcostm | 6:e1d9da7fe856 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bcostm | 6:e1d9da7fe856 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bcostm | 6:e1d9da7fe856 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bcostm | 6:e1d9da7fe856 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bcostm | 6:e1d9da7fe856 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bcostm | 6:e1d9da7fe856 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bcostm | 6:e1d9da7fe856 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bcostm | 6:e1d9da7fe856 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bcostm | 6:e1d9da7fe856 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bcostm | 6:e1d9da7fe856 | 32 | * |
bcostm | 6:e1d9da7fe856 | 33 | ****************************************************************************** |
bcostm | 6:e1d9da7fe856 | 34 | */ |
bcostm | 6:e1d9da7fe856 | 35 | |
bcostm | 6:e1d9da7fe856 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
bcostm | 6:e1d9da7fe856 | 37 | #ifndef __N25Q128A_H |
bcostm | 6:e1d9da7fe856 | 38 | #define __N25Q128A_H |
bcostm | 6:e1d9da7fe856 | 39 | |
bcostm | 6:e1d9da7fe856 | 40 | #ifdef __cplusplus |
bcostm | 6:e1d9da7fe856 | 41 | extern "C" { |
bcostm | 6:e1d9da7fe856 | 42 | #endif |
bcostm | 6:e1d9da7fe856 | 43 | |
bcostm | 6:e1d9da7fe856 | 44 | /* Includes ------------------------------------------------------------------*/ |
bcostm | 6:e1d9da7fe856 | 45 | |
bcostm | 6:e1d9da7fe856 | 46 | /** @addtogroup BSP |
bcostm | 6:e1d9da7fe856 | 47 | * @{ |
bcostm | 6:e1d9da7fe856 | 48 | */ |
bcostm | 6:e1d9da7fe856 | 49 | |
bcostm | 6:e1d9da7fe856 | 50 | /** @addtogroup Components |
bcostm | 6:e1d9da7fe856 | 51 | * @{ |
bcostm | 6:e1d9da7fe856 | 52 | */ |
bcostm | 6:e1d9da7fe856 | 53 | |
bcostm | 6:e1d9da7fe856 | 54 | /** @addtogroup n25q128a |
bcostm | 6:e1d9da7fe856 | 55 | * @{ |
bcostm | 6:e1d9da7fe856 | 56 | */ |
bcostm | 6:e1d9da7fe856 | 57 | |
bcostm | 6:e1d9da7fe856 | 58 | /** @defgroup N25Q128A_Exported_Types |
bcostm | 6:e1d9da7fe856 | 59 | * @{ |
bcostm | 6:e1d9da7fe856 | 60 | */ |
bcostm | 6:e1d9da7fe856 | 61 | |
bcostm | 6:e1d9da7fe856 | 62 | /** |
bcostm | 6:e1d9da7fe856 | 63 | * @} |
bcostm | 6:e1d9da7fe856 | 64 | */ |
bcostm | 6:e1d9da7fe856 | 65 | |
bcostm | 6:e1d9da7fe856 | 66 | /** @defgroup N25Q128A_Exported_Constants |
bcostm | 6:e1d9da7fe856 | 67 | * @{ |
bcostm | 6:e1d9da7fe856 | 68 | */ |
bcostm | 6:e1d9da7fe856 | 69 | |
bcostm | 6:e1d9da7fe856 | 70 | /** |
bcostm | 6:e1d9da7fe856 | 71 | * @brief N25Q128A Configuration |
bcostm | 6:e1d9da7fe856 | 72 | */ |
bcostm | 6:e1d9da7fe856 | 73 | #define N25Q128A_FLASH_SIZE 0x1000000 /* 128 MBits => 16MBytes */ |
bcostm | 6:e1d9da7fe856 | 74 | #define N25Q128A_SECTOR_SIZE 0x10000 /* 256 sectors of 64KBytes */ |
bcostm | 6:e1d9da7fe856 | 75 | #define N25Q128A_SUBSECTOR_SIZE 0x1000 /* 4096 subsectors of 4kBytes */ |
bcostm | 6:e1d9da7fe856 | 76 | #define N25Q128A_PAGE_SIZE 0x100 /* 65536 pages of 256 bytes */ |
bcostm | 6:e1d9da7fe856 | 77 | |
bcostm | 6:e1d9da7fe856 | 78 | #define N25Q128A_DUMMY_CYCLES_READ 8 |
bcostm | 6:e1d9da7fe856 | 79 | #define N25Q128A_DUMMY_CYCLES_READ_QUAD 10 |
bcostm | 6:e1d9da7fe856 | 80 | |
bcostm | 6:e1d9da7fe856 | 81 | #define N25Q128A_BULK_ERASE_MAX_TIME 250000 |
bcostm | 6:e1d9da7fe856 | 82 | #define N25Q128A_SECTOR_ERASE_MAX_TIME 3000 |
bcostm | 6:e1d9da7fe856 | 83 | #define N25Q128A_SUBSECTOR_ERASE_MAX_TIME 800 |
bcostm | 6:e1d9da7fe856 | 84 | |
bcostm | 6:e1d9da7fe856 | 85 | /** |
bcostm | 6:e1d9da7fe856 | 86 | * @brief N25Q128A Commands |
bcostm | 6:e1d9da7fe856 | 87 | */ |
bcostm | 6:e1d9da7fe856 | 88 | /* Reset Operations */ |
bcostm | 6:e1d9da7fe856 | 89 | #define RESET_ENABLE_CMD 0x66 |
bcostm | 6:e1d9da7fe856 | 90 | #define RESET_MEMORY_CMD 0x99 |
bcostm | 6:e1d9da7fe856 | 91 | |
bcostm | 6:e1d9da7fe856 | 92 | /* Identification Operations */ |
bcostm | 6:e1d9da7fe856 | 93 | #define READ_ID_CMD 0x9E |
bcostm | 6:e1d9da7fe856 | 94 | #define READ_ID_CMD2 0x9F |
bcostm | 6:e1d9da7fe856 | 95 | #define MULTIPLE_IO_READ_ID_CMD 0xAF |
bcostm | 6:e1d9da7fe856 | 96 | #define READ_SERIAL_FLASH_DISCO_PARAM_CMD 0x5A |
bcostm | 6:e1d9da7fe856 | 97 | |
bcostm | 6:e1d9da7fe856 | 98 | /* Read Operations */ |
bcostm | 6:e1d9da7fe856 | 99 | #define READ_CMD 0x03 |
bcostm | 6:e1d9da7fe856 | 100 | #define FAST_READ_CMD 0x0B |
bcostm | 6:e1d9da7fe856 | 101 | #define DUAL_OUT_FAST_READ_CMD 0x3B |
bcostm | 6:e1d9da7fe856 | 102 | #define DUAL_INOUT_FAST_READ_CMD 0xBB |
bcostm | 6:e1d9da7fe856 | 103 | #define QUAD_OUT_FAST_READ_CMD 0x6B |
bcostm | 6:e1d9da7fe856 | 104 | #define QUAD_INOUT_FAST_READ_CMD 0xEB |
bcostm | 6:e1d9da7fe856 | 105 | |
bcostm | 6:e1d9da7fe856 | 106 | /* Write Operations */ |
bcostm | 6:e1d9da7fe856 | 107 | #define WRITE_ENABLE_CMD 0x06 |
bcostm | 6:e1d9da7fe856 | 108 | #define WRITE_DISABLE_CMD 0x04 |
bcostm | 6:e1d9da7fe856 | 109 | |
bcostm | 6:e1d9da7fe856 | 110 | /* Register Operations */ |
bcostm | 6:e1d9da7fe856 | 111 | #define READ_STATUS_REG_CMD 0x05 |
bcostm | 6:e1d9da7fe856 | 112 | #define WRITE_STATUS_REG_CMD 0x01 |
bcostm | 6:e1d9da7fe856 | 113 | |
bcostm | 6:e1d9da7fe856 | 114 | #define READ_LOCK_REG_CMD 0xE8 |
bcostm | 6:e1d9da7fe856 | 115 | #define WRITE_LOCK_REG_CMD 0xE5 |
bcostm | 6:e1d9da7fe856 | 116 | |
bcostm | 6:e1d9da7fe856 | 117 | #define READ_FLAG_STATUS_REG_CMD 0x70 |
bcostm | 6:e1d9da7fe856 | 118 | #define CLEAR_FLAG_STATUS_REG_CMD 0x50 |
bcostm | 6:e1d9da7fe856 | 119 | |
bcostm | 6:e1d9da7fe856 | 120 | #define READ_NONVOL_CFG_REG_CMD 0xB5 |
bcostm | 6:e1d9da7fe856 | 121 | #define WRITE_NONVOL_CFG_REG_CMD 0xB1 |
bcostm | 6:e1d9da7fe856 | 122 | |
bcostm | 6:e1d9da7fe856 | 123 | #define READ_VOL_CFG_REG_CMD 0x85 |
bcostm | 6:e1d9da7fe856 | 124 | #define WRITE_VOL_CFG_REG_CMD 0x81 |
bcostm | 6:e1d9da7fe856 | 125 | |
bcostm | 6:e1d9da7fe856 | 126 | #define READ_ENHANCED_VOL_CFG_REG_CMD 0x65 |
bcostm | 6:e1d9da7fe856 | 127 | #define WRITE_ENHANCED_VOL_CFG_REG_CMD 0x61 |
bcostm | 6:e1d9da7fe856 | 128 | |
bcostm | 6:e1d9da7fe856 | 129 | /* Program Operations */ |
bcostm | 6:e1d9da7fe856 | 130 | #define PAGE_PROG_CMD 0x02 |
bcostm | 6:e1d9da7fe856 | 131 | #define DUAL_IN_FAST_PROG_CMD 0xA2 |
bcostm | 6:e1d9da7fe856 | 132 | #define EXT_DUAL_IN_FAST_PROG_CMD 0xD2 |
bcostm | 6:e1d9da7fe856 | 133 | #define QUAD_IN_FAST_PROG_CMD 0x32 |
bcostm | 6:e1d9da7fe856 | 134 | #define EXT_QUAD_IN_FAST_PROG_CMD 0x12 |
bcostm | 6:e1d9da7fe856 | 135 | |
bcostm | 6:e1d9da7fe856 | 136 | /* Erase Operations */ |
bcostm | 6:e1d9da7fe856 | 137 | #define SUBSECTOR_ERASE_CMD 0x20 |
bcostm | 6:e1d9da7fe856 | 138 | #define SECTOR_ERASE_CMD 0xD8 |
bcostm | 6:e1d9da7fe856 | 139 | #define BULK_ERASE_CMD 0xC7 |
bcostm | 6:e1d9da7fe856 | 140 | |
bcostm | 6:e1d9da7fe856 | 141 | #define PROG_ERASE_RESUME_CMD 0x7A |
bcostm | 6:e1d9da7fe856 | 142 | #define PROG_ERASE_SUSPEND_CMD 0x75 |
bcostm | 6:e1d9da7fe856 | 143 | |
bcostm | 6:e1d9da7fe856 | 144 | /* One-Time Programmable Operations */ |
bcostm | 6:e1d9da7fe856 | 145 | #define READ_OTP_ARRAY_CMD 0x4B |
bcostm | 6:e1d9da7fe856 | 146 | #define PROG_OTP_ARRAY_CMD 0x42 |
bcostm | 6:e1d9da7fe856 | 147 | |
bcostm | 6:e1d9da7fe856 | 148 | /** |
bcostm | 6:e1d9da7fe856 | 149 | * @brief N25Q128A Registers |
bcostm | 6:e1d9da7fe856 | 150 | */ |
bcostm | 6:e1d9da7fe856 | 151 | /* Status Register */ |
bcostm | 6:e1d9da7fe856 | 152 | #define N25Q128A_SR_WIP ((uint8_t)0x01) /*!< Write in progress */ |
bcostm | 6:e1d9da7fe856 | 153 | #define N25Q128A_SR_WREN ((uint8_t)0x02) /*!< Write enable latch */ |
bcostm | 6:e1d9da7fe856 | 154 | #define N25Q128A_SR_BLOCKPR ((uint8_t)0x5C) /*!< Block protected against program and erase operations */ |
bcostm | 6:e1d9da7fe856 | 155 | #define N25Q128A_SR_PRBOTTOM ((uint8_t)0x20) /*!< Protected memory area defined by BLOCKPR starts from top or bottom */ |
bcostm | 6:e1d9da7fe856 | 156 | #define N25Q128A_SR_SRWREN ((uint8_t)0x80) /*!< Status register write enable/disable */ |
bcostm | 6:e1d9da7fe856 | 157 | |
bcostm | 6:e1d9da7fe856 | 158 | /* Nonvolatile Configuration Register */ |
bcostm | 6:e1d9da7fe856 | 159 | #define N25Q128A_NVCR_LOCK ((uint16_t)0x0001) /*!< Lock nonvolatile configuration register */ |
bcostm | 6:e1d9da7fe856 | 160 | #define N25Q128A_NVCR_DUAL ((uint16_t)0x0004) /*!< Dual I/O protocol */ |
bcostm | 6:e1d9da7fe856 | 161 | #define N25Q128A_NVCR_QUAB ((uint16_t)0x0008) /*!< Quad I/O protocol */ |
bcostm | 6:e1d9da7fe856 | 162 | #define N25Q128A_NVCR_RH ((uint16_t)0x0010) /*!< Reset/hold */ |
bcostm | 6:e1d9da7fe856 | 163 | #define N25Q128A_NVCR_ODS ((uint16_t)0x01C0) /*!< Output driver strength */ |
bcostm | 6:e1d9da7fe856 | 164 | #define N25Q128A_NVCR_XIP ((uint16_t)0x0E00) /*!< XIP mode at power-on reset */ |
bcostm | 6:e1d9da7fe856 | 165 | #define N25Q128A_NVCR_NB_DUMMY ((uint16_t)0xF000) /*!< Number of dummy clock cycles */ |
bcostm | 6:e1d9da7fe856 | 166 | |
bcostm | 6:e1d9da7fe856 | 167 | /* Volatile Configuration Register */ |
bcostm | 6:e1d9da7fe856 | 168 | #define N25Q128A_VCR_WRAP ((uint8_t)0x03) /*!< Wrap */ |
bcostm | 6:e1d9da7fe856 | 169 | #define N25Q128A_VCR_XIP ((uint8_t)0x08) /*!< XIP */ |
bcostm | 6:e1d9da7fe856 | 170 | #define N25Q128A_VCR_NB_DUMMY ((uint8_t)0xF0) /*!< Number of dummy clock cycles */ |
bcostm | 6:e1d9da7fe856 | 171 | |
bcostm | 6:e1d9da7fe856 | 172 | /* Enhanced Volatile Configuration Register */ |
bcostm | 6:e1d9da7fe856 | 173 | #define N25Q128A_EVCR_ODS ((uint8_t)0x07) /*!< Output driver strength */ |
bcostm | 6:e1d9da7fe856 | 174 | #define N25Q128A_EVCR_VPPA ((uint8_t)0x08) /*!< Vpp accelerator */ |
bcostm | 6:e1d9da7fe856 | 175 | #define N25Q128A_EVCR_RH ((uint8_t)0x10) /*!< Reset/hold */ |
bcostm | 6:e1d9da7fe856 | 176 | #define N25Q128A_EVCR_DUAL ((uint8_t)0x40) /*!< Dual I/O protocol */ |
bcostm | 6:e1d9da7fe856 | 177 | #define N25Q128A_EVCR_QUAD ((uint8_t)0x80) /*!< Quad I/O protocol */ |
bcostm | 6:e1d9da7fe856 | 178 | |
bcostm | 6:e1d9da7fe856 | 179 | /* Flag Status Register */ |
bcostm | 6:e1d9da7fe856 | 180 | #define N25Q128A_FSR_PRERR ((uint8_t)0x02) /*!< Protection error */ |
bcostm | 6:e1d9da7fe856 | 181 | #define N25Q128A_FSR_PGSUS ((uint8_t)0x04) /*!< Program operation suspended */ |
bcostm | 6:e1d9da7fe856 | 182 | #define N25Q128A_FSR_VPPERR ((uint8_t)0x08) /*!< Invalid voltage during program or erase */ |
bcostm | 6:e1d9da7fe856 | 183 | #define N25Q128A_FSR_PGERR ((uint8_t)0x10) /*!< Program error */ |
bcostm | 6:e1d9da7fe856 | 184 | #define N25Q128A_FSR_ERERR ((uint8_t)0x20) /*!< Erase error */ |
bcostm | 6:e1d9da7fe856 | 185 | #define N25Q128A_FSR_ERSUS ((uint8_t)0x40) /*!< Erase operation suspended */ |
bcostm | 6:e1d9da7fe856 | 186 | #define N25Q128A_FSR_READY ((uint8_t)0x80) /*!< Ready or command in progress */ |
bcostm | 6:e1d9da7fe856 | 187 | |
bcostm | 6:e1d9da7fe856 | 188 | /** |
bcostm | 6:e1d9da7fe856 | 189 | * @} |
bcostm | 6:e1d9da7fe856 | 190 | */ |
bcostm | 6:e1d9da7fe856 | 191 | |
bcostm | 6:e1d9da7fe856 | 192 | /** @defgroup N25Q128A_Exported_Functions |
bcostm | 6:e1d9da7fe856 | 193 | * @{ |
bcostm | 6:e1d9da7fe856 | 194 | */ |
bcostm | 6:e1d9da7fe856 | 195 | /** |
bcostm | 6:e1d9da7fe856 | 196 | * @} |
bcostm | 6:e1d9da7fe856 | 197 | */ |
bcostm | 6:e1d9da7fe856 | 198 | |
bcostm | 6:e1d9da7fe856 | 199 | /** |
bcostm | 6:e1d9da7fe856 | 200 | * @} |
bcostm | 6:e1d9da7fe856 | 201 | */ |
bcostm | 6:e1d9da7fe856 | 202 | |
bcostm | 6:e1d9da7fe856 | 203 | /** |
bcostm | 6:e1d9da7fe856 | 204 | * @} |
bcostm | 6:e1d9da7fe856 | 205 | */ |
bcostm | 6:e1d9da7fe856 | 206 | |
bcostm | 6:e1d9da7fe856 | 207 | /** |
bcostm | 6:e1d9da7fe856 | 208 | * @} |
bcostm | 6:e1d9da7fe856 | 209 | */ |
bcostm | 6:e1d9da7fe856 | 210 | |
bcostm | 6:e1d9da7fe856 | 211 | #ifdef __cplusplus |
bcostm | 6:e1d9da7fe856 | 212 | } |
bcostm | 6:e1d9da7fe856 | 213 | #endif |
bcostm | 6:e1d9da7fe856 | 214 | |
bcostm | 6:e1d9da7fe856 | 215 | #endif /* __N25Q128A_H */ |
bcostm | 6:e1d9da7fe856 | 216 | |
bcostm | 6:e1d9da7fe856 | 217 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |