STM32F469NI Discovery board drivers
Dependents: DISCO-F469NI_LCDTS_GUI_demo Configurable_Robots DISCO-F469NI_LCD_demo DISCO-F469NI_SD_demo ... more
Drivers/BSP/STM32469I-Discovery/stm32469i_discovery_qspi.c@4:27609b3a44ed, 2021-06-09 (annotated)
- Committer:
- aa6164
- Date:
- Wed Jun 09 12:45:23 2021 +0000
- Revision:
- 4:27609b3a44ed
- Parent:
- 3:3cdfcc4f7c9d
Updated wait_ms() to thread_sleep_for() for Mbed OS 6+
Who changed what in which revision?
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/**
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******************************************************************************
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* @file stm32469i_discovery_qspi.c
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* @author MCD Application Team
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* @brief This file includes a standard driver for the N25Q128A QSPI
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* memory mounted on STM32469I-Discovery board.
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@verbatim
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==============================================================================
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##### How to use this driver #####
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==============================================================================
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[..]
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(#) This driver is used to drive the N25Q128A QSPI external
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memory mounted on STM32469I-Discovery board.
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(#) This driver need a specific component driver N25Q128A to be included with.
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(#) Initialization steps:
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(++) Initialize the QPSI external memory using the BSP_QSPI_Init() function. This
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function includes the MSP layer hardware resources initialization and the
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QSPI interface with the external memory.
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(#) QSPI memory operations
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(++) QSPI memory can be accessed with read/write operations once it is
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initialized.
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Read/write operation can be performed with AHB access using the functions
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BSP_QSPI_Read()/BSP_QSPI_Write().
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(++) The function BSP_QSPI_GetInfo() returns the configuration of the QSPI memory.
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(see the QSPI memory data sheet)
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(++) Perform erase block operation using the function BSP_QSPI_Erase_Block() and by
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specifying the block address. You can perform an erase operation of the whole
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chip by calling the function BSP_QSPI_Erase_Chip().
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(++) The function BSP_QSPI_GetStatus() returns the current status of the QSPI memory.
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(see the QSPI memory data sheet)
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@endverbatim
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32469i_discovery_qspi.h"
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/** @addtogroup BSP
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* @{
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*/
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/** @addtogroup STM32469I_Discovery
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* @{
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*/
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/** @defgroup STM32469I_Discovery_QSPI STM32469I Discovery QSPI
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* @{
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*/
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/* Private variables ---------------------------------------------------------*/
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/** @defgroup STM32469I_Discovery_QSPI_Private_Variables STM32469I Discovery QSPI Private Variables
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* @{
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*/
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QSPI_HandleTypeDef QSPIHandle;
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/**
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* @}
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*/
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/* Private functions ---------------------------------------------------------*/
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/** @defgroup STM32469I_Discovery_QSPI_Private_Functions STM32469I Discovery QSPI Private Functions
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* @{
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*/
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static uint8_t QSPI_ResetMemory (QSPI_HandleTypeDef *hqspi);
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static uint8_t QSPI_DummyCyclesCfg (QSPI_HandleTypeDef *hqspi);
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static uint8_t QSPI_WriteEnable (QSPI_HandleTypeDef *hqspi);
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static uint8_t QSPI_AutoPollingMemReady (QSPI_HandleTypeDef *hqspi, uint32_t Timeout);
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/**
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* @}
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*/
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/** @defgroup STM32469I_Discovery_QSPI_Exported_Functions STM32469I Discovery QSPI Exported Functions
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* @{
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*/
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/**
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* @brief Initializes the QSPI interface.
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* @retval QSPI memory status
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*/
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uint8_t BSP_QSPI_Init(void)
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{
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QSPIHandle.Instance = QUADSPI;
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/* Call the DeInit function to reset the driver */
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if (HAL_QSPI_DeInit(&QSPIHandle) != HAL_OK)
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{
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return QSPI_ERROR;
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}
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/* System level initialization */
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BSP_QSPI_MspInit(&QSPIHandle, NULL);
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/* QSPI initialization */
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QSPIHandle.Init.ClockPrescaler = 1; /* QSPI Freq= 180 MHz / (1+1) = 90 MHz */
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QSPIHandle.Init.FifoThreshold = 1;
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QSPIHandle.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_HALFCYCLE;
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QSPIHandle.Init.FlashSize = POSITION_VAL(N25Q128A_FLASH_SIZE) - 1;
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QSPIHandle.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_5_CYCLE;
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QSPIHandle.Init.ClockMode = QSPI_CLOCK_MODE_0;
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QSPIHandle.Init.FlashID = QSPI_FLASH_ID_1;
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QSPIHandle.Init.DualFlash = QSPI_DUALFLASH_DISABLE;
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if (HAL_QSPI_Init(&QSPIHandle) != HAL_OK)
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{
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return QSPI_ERROR;
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}
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/* QSPI memory reset */
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if (QSPI_ResetMemory(&QSPIHandle) != QSPI_OK)
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{
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return QSPI_NOT_SUPPORTED;
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}
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/* Configuration of the dummy cucles on QSPI memory side */
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if (QSPI_DummyCyclesCfg(&QSPIHandle) != QSPI_OK)
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{
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return QSPI_NOT_SUPPORTED;
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}
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return QSPI_OK;
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}
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/**
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* @brief De-Initializes the QSPI interface.
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* @retval QSPI memory status
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*/
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uint8_t BSP_QSPI_DeInit(void)
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{
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QSPIHandle.Instance = QUADSPI;
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/* Call the DeInit function to reset the driver */
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if (HAL_QSPI_DeInit(&QSPIHandle) != HAL_OK)
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{
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return QSPI_ERROR;
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}
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/* System level De-initialization */
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BSP_QSPI_MspDeInit(&QSPIHandle, NULL);
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return QSPI_OK;
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}
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/**
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* @brief Reads an amount of data from the QSPI memory.
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* @param pData: Pointer to data to be read
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* @param ReadAddr: Read start address
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* @param Size: Size of data to read
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* @retval QSPI memory status
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*/
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uint8_t BSP_QSPI_Read(uint8_t* pData, uint32_t ReadAddr, uint32_t Size)
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{
|
|
Jerome Coutant
2:123b894b49dd
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191
|
QSPI_CommandTypeDef s_command;
|
|
Jerome Coutant
2:123b894b49dd
|
192
|
|
|
Jerome Coutant
2:123b894b49dd
|
193
|
/* Initialize the read command */
|
|
Jerome Coutant
2:123b894b49dd
|
194
|
s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;
|
|
Jerome Coutant
2:123b894b49dd
|
195
|
s_command.Instruction = QUAD_INOUT_FAST_READ_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
196
|
s_command.AddressMode = QSPI_ADDRESS_4_LINES;
|
|
Jerome Coutant
2:123b894b49dd
|
197
|
s_command.AddressSize = QSPI_ADDRESS_24_BITS;
|
|
Jerome Coutant
2:123b894b49dd
|
198
|
s_command.Address = ReadAddr;
|
|
Jerome Coutant
2:123b894b49dd
|
199
|
s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
|
|
Jerome Coutant
2:123b894b49dd
|
200
|
s_command.DataMode = QSPI_DATA_4_LINES;
|
|
Jerome Coutant
2:123b894b49dd
|
201
|
s_command.DummyCycles = N25Q128A_DUMMY_CYCLES_READ_QUAD;
|
|
Jerome Coutant
2:123b894b49dd
|
202
|
s_command.NbData = Size;
|
|
Jerome Coutant
2:123b894b49dd
|
203
|
s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
|
|
Jerome Coutant
2:123b894b49dd
|
204
|
s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
|
|
Jerome Coutant
2:123b894b49dd
|
205
|
s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
|
|
Jerome Coutant
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|
206
|
|
|
Jerome Coutant
2:123b894b49dd
|
207
|
/* Configure the command */
|
|
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2:123b894b49dd
|
208
|
if (HAL_QSPI_Command(&QSPIHandle, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
209
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
210
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
211
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
212
|
|
|
Jerome Coutant
2:123b894b49dd
|
213
|
/* Set S# timing for Read command: Min 20ns for N25Q128A memory */
|
|
Jerome Coutant
2:123b894b49dd
|
214
|
MODIFY_REG(QSPIHandle.Instance->DCR, QUADSPI_DCR_CSHT, QSPI_CS_HIGH_TIME_2_CYCLE);
|
|
Jerome Coutant
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|
215
|
|
|
Jerome Coutant
2:123b894b49dd
|
216
|
/* Reception of the data */
|
|
Jerome Coutant
2:123b894b49dd
|
217
|
if (HAL_QSPI_Receive(&QSPIHandle, pData, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
218
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
219
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
220
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
221
|
|
|
Jerome Coutant
2:123b894b49dd
|
222
|
/* Restore S# timing for nonRead commands */
|
|
Jerome Coutant
2:123b894b49dd
|
223
|
MODIFY_REG(QSPIHandle.Instance->DCR, QUADSPI_DCR_CSHT, QSPI_CS_HIGH_TIME_5_CYCLE);
|
|
Jerome Coutant
2:123b894b49dd
|
224
|
|
|
Jerome Coutant
2:123b894b49dd
|
225
|
return QSPI_OK;
|
|
Jerome Coutant
2:123b894b49dd
|
226
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
227
|
|
|
Jerome Coutant
2:123b894b49dd
|
228
|
/**
|
|
Jerome Coutant
2:123b894b49dd
|
229
|
* @brief Writes an amount of data to the QSPI memory.
|
|
Jerome Coutant
2:123b894b49dd
|
230
|
* @param pData: Pointer to data to be written
|
|
Jerome Coutant
2:123b894b49dd
|
231
|
* @param WriteAddr: Write start address
|
|
Jerome Coutant
2:123b894b49dd
|
232
|
* @param Size: Size of data to write
|
|
Jerome Coutant
2:123b894b49dd
|
233
|
* @retval QSPI memory status
|
|
Jerome Coutant
2:123b894b49dd
|
234
|
*/
|
|
Jerome Coutant
2:123b894b49dd
|
235
|
uint8_t BSP_QSPI_Write(uint8_t* pData, uint32_t WriteAddr, uint32_t Size)
|
|
Jerome Coutant
2:123b894b49dd
|
236
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
237
|
QSPI_CommandTypeDef s_command;
|
|
Jerome Coutant
2:123b894b49dd
|
238
|
uint32_t end_addr, current_size, current_addr;
|
|
Jerome Coutant
2:123b894b49dd
|
239
|
|
|
Jerome Coutant
2:123b894b49dd
|
240
|
/* Calculation of the size between the write address and the end of the page */
|
|
Jerome Coutant
2:123b894b49dd
|
241
|
current_size = N25Q128A_PAGE_SIZE - (WriteAddr % N25Q128A_PAGE_SIZE);
|
|
Jerome Coutant
2:123b894b49dd
|
242
|
|
|
Jerome Coutant
2:123b894b49dd
|
243
|
/* Check if the size of the data is less than the remaining place in the page */
|
|
Jerome Coutant
2:123b894b49dd
|
244
|
if (current_size > Size)
|
|
Jerome Coutant
2:123b894b49dd
|
245
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
246
|
current_size = Size;
|
|
Jerome Coutant
2:123b894b49dd
|
247
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
248
|
|
|
Jerome Coutant
2:123b894b49dd
|
249
|
/* Initialize the address variables */
|
|
Jerome Coutant
2:123b894b49dd
|
250
|
current_addr = WriteAddr;
|
|
Jerome Coutant
2:123b894b49dd
|
251
|
end_addr = WriteAddr + Size;
|
|
Jerome Coutant
2:123b894b49dd
|
252
|
|
|
Jerome Coutant
2:123b894b49dd
|
253
|
/* Initialize the program command */
|
|
Jerome Coutant
2:123b894b49dd
|
254
|
s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;
|
|
Jerome Coutant
2:123b894b49dd
|
255
|
s_command.Instruction = EXT_QUAD_IN_FAST_PROG_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
256
|
s_command.AddressMode = QSPI_ADDRESS_4_LINES;
|
|
Jerome Coutant
2:123b894b49dd
|
257
|
s_command.AddressSize = QSPI_ADDRESS_24_BITS;
|
|
Jerome Coutant
2:123b894b49dd
|
258
|
s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
|
|
Jerome Coutant
2:123b894b49dd
|
259
|
s_command.DataMode = QSPI_DATA_4_LINES;
|
|
Jerome Coutant
2:123b894b49dd
|
260
|
s_command.DummyCycles = 0;
|
|
Jerome Coutant
2:123b894b49dd
|
261
|
s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
|
|
Jerome Coutant
2:123b894b49dd
|
262
|
s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
|
|
Jerome Coutant
2:123b894b49dd
|
263
|
s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
264
|
|
|
Jerome Coutant
2:123b894b49dd
|
265
|
/* Perform the write page by page */
|
|
Jerome Coutant
2:123b894b49dd
|
266
|
do
|
|
Jerome Coutant
2:123b894b49dd
|
267
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
268
|
s_command.Address = current_addr;
|
|
Jerome Coutant
2:123b894b49dd
|
269
|
s_command.NbData = current_size;
|
|
Jerome Coutant
2:123b894b49dd
|
270
|
|
|
Jerome Coutant
2:123b894b49dd
|
271
|
/* Enable write operations */
|
|
Jerome Coutant
2:123b894b49dd
|
272
|
if (QSPI_WriteEnable(&QSPIHandle) != QSPI_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
273
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
274
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
275
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
276
|
|
|
Jerome Coutant
2:123b894b49dd
|
277
|
/* Configure the command */
|
|
Jerome Coutant
2:123b894b49dd
|
278
|
if (HAL_QSPI_Command(&QSPIHandle, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
279
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
280
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
281
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
282
|
|
|
Jerome Coutant
2:123b894b49dd
|
283
|
/* Transmission of the data */
|
|
Jerome Coutant
2:123b894b49dd
|
284
|
if (HAL_QSPI_Transmit(&QSPIHandle, pData, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
285
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
286
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
287
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
288
|
|
|
Jerome Coutant
2:123b894b49dd
|
289
|
/* Configure automatic polling mode to wait for end of program */
|
|
Jerome Coutant
2:123b894b49dd
|
290
|
if (QSPI_AutoPollingMemReady(&QSPIHandle, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != QSPI_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
291
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
292
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
293
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
294
|
|
|
Jerome Coutant
2:123b894b49dd
|
295
|
/* Update the address and size variables for next page programming */
|
|
Jerome Coutant
2:123b894b49dd
|
296
|
current_addr += current_size;
|
|
Jerome Coutant
2:123b894b49dd
|
297
|
pData += current_size;
|
|
Jerome Coutant
2:123b894b49dd
|
298
|
current_size = ((current_addr + N25Q128A_PAGE_SIZE) > end_addr) ? (end_addr - current_addr) : N25Q128A_PAGE_SIZE;
|
|
Jerome Coutant
2:123b894b49dd
|
299
|
} while (current_addr < end_addr);
|
|
Jerome Coutant
2:123b894b49dd
|
300
|
|
|
Jerome Coutant
2:123b894b49dd
|
301
|
return QSPI_OK;
|
|
Jerome Coutant
2:123b894b49dd
|
302
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
303
|
|
|
Jerome Coutant
2:123b894b49dd
|
304
|
/**
|
|
Jerome Coutant
2:123b894b49dd
|
305
|
* @brief Erases the specified block of the QSPI memory.
|
|
Jerome Coutant
2:123b894b49dd
|
306
|
* @param BlockAddress: Block address to erase
|
|
Jerome Coutant
2:123b894b49dd
|
307
|
* @retval QSPI memory status
|
|
Jerome Coutant
2:123b894b49dd
|
308
|
*/
|
|
Jerome Coutant
2:123b894b49dd
|
309
|
uint8_t BSP_QSPI_Erase_Block(uint32_t BlockAddress)
|
|
Jerome Coutant
2:123b894b49dd
|
310
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
311
|
QSPI_CommandTypeDef s_command;
|
|
Jerome Coutant
2:123b894b49dd
|
312
|
|
|
Jerome Coutant
2:123b894b49dd
|
313
|
/* Initialize the erase command */
|
|
Jerome Coutant
2:123b894b49dd
|
314
|
s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;
|
|
Jerome Coutant
2:123b894b49dd
|
315
|
s_command.Instruction = SUBSECTOR_ERASE_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
316
|
s_command.AddressMode = QSPI_ADDRESS_1_LINE;
|
|
Jerome Coutant
2:123b894b49dd
|
317
|
s_command.AddressSize = QSPI_ADDRESS_24_BITS;
|
|
Jerome Coutant
2:123b894b49dd
|
318
|
s_command.Address = BlockAddress;
|
|
Jerome Coutant
2:123b894b49dd
|
319
|
s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
|
|
Jerome Coutant
2:123b894b49dd
|
320
|
s_command.DataMode = QSPI_DATA_NONE;
|
|
Jerome Coutant
2:123b894b49dd
|
321
|
s_command.DummyCycles = 0;
|
|
Jerome Coutant
2:123b894b49dd
|
322
|
s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
|
|
Jerome Coutant
2:123b894b49dd
|
323
|
s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
|
|
Jerome Coutant
2:123b894b49dd
|
324
|
s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
325
|
|
|
Jerome Coutant
2:123b894b49dd
|
326
|
/* Enable write operations */
|
|
Jerome Coutant
2:123b894b49dd
|
327
|
if (QSPI_WriteEnable(&QSPIHandle) != QSPI_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
328
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
329
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
330
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
331
|
|
|
Jerome Coutant
2:123b894b49dd
|
332
|
/* Send the command */
|
|
Jerome Coutant
2:123b894b49dd
|
333
|
if (HAL_QSPI_Command(&QSPIHandle, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
334
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
335
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
336
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
337
|
|
|
Jerome Coutant
2:123b894b49dd
|
338
|
/* Configure automatic polling mode to wait for end of erase */
|
|
Jerome Coutant
2:123b894b49dd
|
339
|
if (QSPI_AutoPollingMemReady(&QSPIHandle, N25Q128A_SUBSECTOR_ERASE_MAX_TIME) != QSPI_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
340
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
341
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
342
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
343
|
|
|
Jerome Coutant
2:123b894b49dd
|
344
|
return QSPI_OK;
|
|
Jerome Coutant
2:123b894b49dd
|
345
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
346
|
|
|
Jerome Coutant
2:123b894b49dd
|
347
|
/**
|
|
Jerome Coutant
2:123b894b49dd
|
348
|
* @brief Erases the entire QSPI memory.
|
|
Jerome Coutant
2:123b894b49dd
|
349
|
* @retval QSPI memory status
|
|
Jerome Coutant
2:123b894b49dd
|
350
|
*/
|
|
Jerome Coutant
2:123b894b49dd
|
351
|
uint8_t BSP_QSPI_Erase_Chip(void)
|
|
Jerome Coutant
2:123b894b49dd
|
352
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
353
|
QSPI_CommandTypeDef s_command;
|
|
Jerome Coutant
2:123b894b49dd
|
354
|
|
|
Jerome Coutant
2:123b894b49dd
|
355
|
/* Initialize the erase command */
|
|
Jerome Coutant
2:123b894b49dd
|
356
|
s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;
|
|
Jerome Coutant
2:123b894b49dd
|
357
|
s_command.Instruction = BULK_ERASE_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
358
|
s_command.AddressMode = QSPI_ADDRESS_NONE;
|
|
Jerome Coutant
2:123b894b49dd
|
359
|
s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
|
|
Jerome Coutant
2:123b894b49dd
|
360
|
s_command.DataMode = QSPI_DATA_NONE;
|
|
Jerome Coutant
2:123b894b49dd
|
361
|
s_command.DummyCycles = 0;
|
|
Jerome Coutant
2:123b894b49dd
|
362
|
s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
|
|
Jerome Coutant
2:123b894b49dd
|
363
|
s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
|
|
Jerome Coutant
2:123b894b49dd
|
364
|
s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
365
|
|
|
Jerome Coutant
2:123b894b49dd
|
366
|
/* Enable write operations */
|
|
Jerome Coutant
2:123b894b49dd
|
367
|
if (QSPI_WriteEnable(&QSPIHandle) != QSPI_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
368
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
369
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
370
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
371
|
|
|
Jerome Coutant
2:123b894b49dd
|
372
|
/* Send the command */
|
|
Jerome Coutant
2:123b894b49dd
|
373
|
if (HAL_QSPI_Command(&QSPIHandle, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
374
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
375
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
376
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
377
|
|
|
Jerome Coutant
2:123b894b49dd
|
378
|
/* Configure automatic polling mode to wait for end of erase */
|
|
Jerome Coutant
2:123b894b49dd
|
379
|
if (QSPI_AutoPollingMemReady(&QSPIHandle, N25Q128A_BULK_ERASE_MAX_TIME) != QSPI_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
380
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
381
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
382
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
383
|
|
|
Jerome Coutant
2:123b894b49dd
|
384
|
return QSPI_OK;
|
|
Jerome Coutant
2:123b894b49dd
|
385
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
386
|
|
|
Jerome Coutant
2:123b894b49dd
|
387
|
/**
|
|
Jerome Coutant
2:123b894b49dd
|
388
|
* @brief Reads current status of the QSPI memory.
|
|
Jerome Coutant
2:123b894b49dd
|
389
|
* @retval QSPI memory status
|
|
Jerome Coutant
2:123b894b49dd
|
390
|
*/
|
|
Jerome Coutant
2:123b894b49dd
|
391
|
uint8_t BSP_QSPI_GetStatus(void)
|
|
Jerome Coutant
2:123b894b49dd
|
392
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
393
|
QSPI_CommandTypeDef s_command;
|
|
Jerome Coutant
2:123b894b49dd
|
394
|
uint8_t reg;
|
|
Jerome Coutant
2:123b894b49dd
|
395
|
|
|
Jerome Coutant
2:123b894b49dd
|
396
|
/* Initialize the read flag status register command */
|
|
Jerome Coutant
2:123b894b49dd
|
397
|
s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;
|
|
Jerome Coutant
2:123b894b49dd
|
398
|
s_command.Instruction = READ_FLAG_STATUS_REG_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
399
|
s_command.AddressMode = QSPI_ADDRESS_NONE;
|
|
Jerome Coutant
2:123b894b49dd
|
400
|
s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
|
|
Jerome Coutant
2:123b894b49dd
|
401
|
s_command.DataMode = QSPI_DATA_1_LINE;
|
|
Jerome Coutant
2:123b894b49dd
|
402
|
s_command.DummyCycles = 0;
|
|
Jerome Coutant
2:123b894b49dd
|
403
|
s_command.NbData = 1;
|
|
Jerome Coutant
2:123b894b49dd
|
404
|
s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
|
|
Jerome Coutant
2:123b894b49dd
|
405
|
s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
|
|
Jerome Coutant
2:123b894b49dd
|
406
|
s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
407
|
|
|
Jerome Coutant
2:123b894b49dd
|
408
|
/* Configure the command */
|
|
Jerome Coutant
2:123b894b49dd
|
409
|
if (HAL_QSPI_Command(&QSPIHandle, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
410
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
411
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
412
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
413
|
|
|
Jerome Coutant
2:123b894b49dd
|
414
|
/* Reception of the data */
|
|
Jerome Coutant
2:123b894b49dd
|
415
|
if (HAL_QSPI_Receive(&QSPIHandle, ®, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
416
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
417
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
418
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
419
|
|
|
Jerome Coutant
2:123b894b49dd
|
420
|
/* Check the value of the register */
|
|
Jerome Coutant
2:123b894b49dd
|
421
|
if ((reg & (N25Q128A_FSR_PRERR | N25Q128A_FSR_VPPERR | N25Q128A_FSR_PGERR | N25Q128A_FSR_ERERR)) != 0)
|
|
Jerome Coutant
2:123b894b49dd
|
422
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
423
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
424
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
425
|
else if ((reg & (N25Q128A_FSR_PGSUS | N25Q128A_FSR_ERSUS)) != 0)
|
|
Jerome Coutant
2:123b894b49dd
|
426
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
427
|
return QSPI_SUSPENDED;
|
|
Jerome Coutant
2:123b894b49dd
|
428
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
429
|
else if ((reg & N25Q128A_FSR_READY) != 0)
|
|
Jerome Coutant
2:123b894b49dd
|
430
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
431
|
return QSPI_OK;
|
|
Jerome Coutant
2:123b894b49dd
|
432
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
433
|
else
|
|
Jerome Coutant
2:123b894b49dd
|
434
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
435
|
return QSPI_BUSY;
|
|
Jerome Coutant
2:123b894b49dd
|
436
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
437
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
438
|
|
|
Jerome Coutant
2:123b894b49dd
|
439
|
/**
|
|
Jerome Coutant
2:123b894b49dd
|
440
|
* @brief Reads the configuration of the memory and fills QspiInfo struct
|
|
Jerome Coutant
2:123b894b49dd
|
441
|
* @param pInfo pointer to Info structure
|
|
Jerome Coutant
2:123b894b49dd
|
442
|
* @retval QSPI memory status
|
|
Jerome Coutant
2:123b894b49dd
|
443
|
*/
|
|
Jerome Coutant
2:123b894b49dd
|
444
|
uint8_t BSP_QSPI_GetInfo(QSPI_InfoTypeDef* pInfo)
|
|
Jerome Coutant
2:123b894b49dd
|
445
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
446
|
/* Configure the structure with the memory configuration */
|
|
Jerome Coutant
2:123b894b49dd
|
447
|
pInfo->FlashSize = N25Q128A_FLASH_SIZE;
|
|
Jerome Coutant
2:123b894b49dd
|
448
|
pInfo->EraseSectorSize = N25Q128A_SUBSECTOR_SIZE;
|
|
Jerome Coutant
2:123b894b49dd
|
449
|
pInfo->EraseSectorsNumber = (N25Q128A_FLASH_SIZE/N25Q128A_SUBSECTOR_SIZE);
|
|
Jerome Coutant
2:123b894b49dd
|
450
|
pInfo->ProgPageSize = N25Q128A_PAGE_SIZE;
|
|
Jerome Coutant
2:123b894b49dd
|
451
|
pInfo->ProgPagesNumber = (N25Q128A_FLASH_SIZE/N25Q128A_PAGE_SIZE);
|
|
Jerome Coutant
2:123b894b49dd
|
452
|
|
|
Jerome Coutant
2:123b894b49dd
|
453
|
return QSPI_OK;
|
|
Jerome Coutant
2:123b894b49dd
|
454
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
455
|
|
|
Jerome Coutant
2:123b894b49dd
|
456
|
/**
|
|
Jerome Coutant
2:123b894b49dd
|
457
|
* @brief Configure the QSPI in memory-mapped mode
|
|
Jerome Coutant
2:123b894b49dd
|
458
|
* @retval QSPI memory status
|
|
Jerome Coutant
2:123b894b49dd
|
459
|
*/
|
|
Jerome Coutant
2:123b894b49dd
|
460
|
uint8_t BSP_QSPI_EnableMemoryMappedMode(void)
|
|
Jerome Coutant
2:123b894b49dd
|
461
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
462
|
QSPI_CommandTypeDef s_command;
|
|
Jerome Coutant
2:123b894b49dd
|
463
|
QSPI_MemoryMappedTypeDef s_mem_mapped_cfg;
|
|
Jerome Coutant
2:123b894b49dd
|
464
|
|
|
Jerome Coutant
2:123b894b49dd
|
465
|
/* Configure the command for the read instruction */
|
|
Jerome Coutant
2:123b894b49dd
|
466
|
s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;
|
|
Jerome Coutant
2:123b894b49dd
|
467
|
s_command.Instruction = QUAD_INOUT_FAST_READ_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
468
|
s_command.AddressMode = QSPI_ADDRESS_4_LINES;
|
|
Jerome Coutant
2:123b894b49dd
|
469
|
s_command.AddressSize = QSPI_ADDRESS_24_BITS;
|
|
Jerome Coutant
2:123b894b49dd
|
470
|
s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
|
|
Jerome Coutant
2:123b894b49dd
|
471
|
s_command.DataMode = QSPI_DATA_4_LINES;
|
|
Jerome Coutant
2:123b894b49dd
|
472
|
s_command.DummyCycles = N25Q128A_DUMMY_CYCLES_READ_QUAD;
|
|
Jerome Coutant
2:123b894b49dd
|
473
|
s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
|
|
Jerome Coutant
2:123b894b49dd
|
474
|
s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
|
|
Jerome Coutant
2:123b894b49dd
|
475
|
s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
476
|
|
|
Jerome Coutant
2:123b894b49dd
|
477
|
/* Configure the memory mapped mode */
|
|
Jerome Coutant
2:123b894b49dd
|
478
|
s_mem_mapped_cfg.TimeOutActivation = QSPI_TIMEOUT_COUNTER_DISABLE;
|
|
Jerome Coutant
2:123b894b49dd
|
479
|
|
|
Jerome Coutant
2:123b894b49dd
|
480
|
if (HAL_QSPI_MemoryMapped(&QSPIHandle, &s_command, &s_mem_mapped_cfg) != HAL_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
481
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
482
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
483
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
484
|
|
|
Jerome Coutant
2:123b894b49dd
|
485
|
return QSPI_OK;
|
|
Jerome Coutant
2:123b894b49dd
|
486
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
487
|
|
|
Jerome Coutant
2:123b894b49dd
|
488
|
/**
|
|
Jerome Coutant
2:123b894b49dd
|
489
|
* @}
|
|
Jerome Coutant
2:123b894b49dd
|
490
|
*/
|
|
Jerome Coutant
2:123b894b49dd
|
491
|
|
|
Jerome Coutant
2:123b894b49dd
|
492
|
/** @defgroup STM32469I_Discovery_QSPI_Private_Functions STM32469I Discovery QSPI Private Functions
|
|
Jerome Coutant
2:123b894b49dd
|
493
|
* @{
|
|
Jerome Coutant
2:123b894b49dd
|
494
|
*/
|
|
Jerome Coutant
2:123b894b49dd
|
495
|
|
|
Jerome Coutant
2:123b894b49dd
|
496
|
/**
|
|
Jerome Coutant
2:123b894b49dd
|
497
|
* @brief QSPI MSP Initialization
|
|
Jerome Coutant
2:123b894b49dd
|
498
|
* This function configures the hardware resources used in this example:
|
|
Jerome Coutant
2:123b894b49dd
|
499
|
* - Peripheral's clock enable
|
|
Jerome Coutant
2:123b894b49dd
|
500
|
* - Peripheral's GPIO Configuration
|
|
Jerome Coutant
2:123b894b49dd
|
501
|
* - NVIC configuration for QSPI interrupt
|
|
Jerome Coutant
2:123b894b49dd
|
502
|
*/
|
|
Jerome Coutant
2:123b894b49dd
|
503
|
__weak void BSP_QSPI_MspInit(QSPI_HandleTypeDef *hqspi, void *Params)
|
|
Jerome Coutant
2:123b894b49dd
|
504
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
505
|
GPIO_InitTypeDef gpio_init_structure;
|
|
Jerome Coutant
2:123b894b49dd
|
506
|
|
|
Jerome Coutant
2:123b894b49dd
|
507
|
/*##-1- Enable peripherals and GPIO Clocks #################################*/
|
|
Jerome Coutant
2:123b894b49dd
|
508
|
/* Enable the QuadSPI memory interface clock */
|
|
Jerome Coutant
2:123b894b49dd
|
509
|
QSPI_CLK_ENABLE();
|
|
Jerome Coutant
2:123b894b49dd
|
510
|
/* Reset the QuadSPI memory interface */
|
|
Jerome Coutant
2:123b894b49dd
|
511
|
QSPI_FORCE_RESET();
|
|
Jerome Coutant
2:123b894b49dd
|
512
|
QSPI_RELEASE_RESET();
|
|
Jerome Coutant
2:123b894b49dd
|
513
|
/* Enable GPIO clocks */
|
|
Jerome Coutant
2:123b894b49dd
|
514
|
QSPI_CS_GPIO_CLK_ENABLE();
|
|
Jerome Coutant
2:123b894b49dd
|
515
|
QSPI_DX_CLK_GPIO_CLK_ENABLE();
|
|
Jerome Coutant
2:123b894b49dd
|
516
|
|
|
Jerome Coutant
2:123b894b49dd
|
517
|
/*##-2- Configure peripheral GPIO ##########################################*/
|
|
Jerome Coutant
2:123b894b49dd
|
518
|
/* QSPI CS GPIO pin configuration */
|
|
Jerome Coutant
2:123b894b49dd
|
519
|
gpio_init_structure.Pin = QSPI_CS_PIN;
|
|
Jerome Coutant
2:123b894b49dd
|
520
|
gpio_init_structure.Mode = GPIO_MODE_AF_PP;
|
|
Jerome Coutant
2:123b894b49dd
|
521
|
gpio_init_structure.Pull = GPIO_PULLUP;
|
|
Jerome Coutant
2:123b894b49dd
|
522
|
gpio_init_structure.Speed = GPIO_SPEED_HIGH;
|
|
Jerome Coutant
2:123b894b49dd
|
523
|
gpio_init_structure.Alternate = GPIO_AF10_QSPI;
|
|
Jerome Coutant
2:123b894b49dd
|
524
|
HAL_GPIO_Init(QSPI_CS_GPIO_PORT, &gpio_init_structure);
|
|
Jerome Coutant
2:123b894b49dd
|
525
|
|
|
Jerome Coutant
2:123b894b49dd
|
526
|
/* QSPI CLK GPIO pin configuration */
|
|
Jerome Coutant
2:123b894b49dd
|
527
|
gpio_init_structure.Pin = QSPI_CLK_PIN;
|
|
Jerome Coutant
2:123b894b49dd
|
528
|
gpio_init_structure.Pull = GPIO_NOPULL;
|
|
Jerome Coutant
2:123b894b49dd
|
529
|
gpio_init_structure.Alternate = GPIO_AF9_QSPI;
|
|
Jerome Coutant
2:123b894b49dd
|
530
|
HAL_GPIO_Init(QSPI_CLK_GPIO_PORT, &gpio_init_structure);
|
|
Jerome Coutant
2:123b894b49dd
|
531
|
|
|
Jerome Coutant
2:123b894b49dd
|
532
|
/* QSPI D0 and D1 GPIO pin configuration */
|
|
Jerome Coutant
2:123b894b49dd
|
533
|
gpio_init_structure.Pin = (QSPI_D0_PIN | QSPI_D1_PIN);
|
|
Jerome Coutant
2:123b894b49dd
|
534
|
gpio_init_structure.Alternate = GPIO_AF10_QSPI;
|
|
Jerome Coutant
2:123b894b49dd
|
535
|
HAL_GPIO_Init(QSPI_DX_GPIO_PORT, &gpio_init_structure);
|
|
Jerome Coutant
2:123b894b49dd
|
536
|
|
|
Jerome Coutant
2:123b894b49dd
|
537
|
/* QSPI D2 and D3 GPIO pin configuration */
|
|
Jerome Coutant
2:123b894b49dd
|
538
|
gpio_init_structure.Pin = (QSPI_D2_PIN | QSPI_D3_PIN) ;
|
|
Jerome Coutant
2:123b894b49dd
|
539
|
gpio_init_structure.Alternate = GPIO_AF9_QSPI;
|
|
Jerome Coutant
2:123b894b49dd
|
540
|
HAL_GPIO_Init(QSPI_DX_GPIO_PORT, &gpio_init_structure);
|
|
Jerome Coutant
2:123b894b49dd
|
541
|
|
|
Jerome Coutant
2:123b894b49dd
|
542
|
/*##-3- Configure the NVIC for QSPI #########################################*/
|
|
Jerome Coutant
2:123b894b49dd
|
543
|
/* NVIC configuration for QSPI interrupt */
|
|
Jerome Coutant
2:123b894b49dd
|
544
|
HAL_NVIC_SetPriority(QUADSPI_IRQn, 0x0F, 0);
|
|
Jerome Coutant
2:123b894b49dd
|
545
|
HAL_NVIC_EnableIRQ(QUADSPI_IRQn);
|
|
Jerome Coutant
2:123b894b49dd
|
546
|
|
|
Jerome Coutant
2:123b894b49dd
|
547
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
548
|
|
|
Jerome Coutant
2:123b894b49dd
|
549
|
/**
|
|
Jerome Coutant
2:123b894b49dd
|
550
|
* @brief QSPI MSP De-Initialization
|
|
Jerome Coutant
2:123b894b49dd
|
551
|
* This function frees the hardware resources used in this example:
|
|
Jerome Coutant
2:123b894b49dd
|
552
|
* - Disable the Peripheral's clock
|
|
Jerome Coutant
2:123b894b49dd
|
553
|
* - Revert GPIO and NVIC configuration to their default state
|
|
Jerome Coutant
2:123b894b49dd
|
554
|
*/
|
|
Jerome Coutant
2:123b894b49dd
|
555
|
__weak void BSP_QSPI_MspDeInit(QSPI_HandleTypeDef *hqspi, void *Params)
|
|
Jerome Coutant
2:123b894b49dd
|
556
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
557
|
/*##-1- Disable the NVIC for QSPI ###########################################*/
|
|
Jerome Coutant
2:123b894b49dd
|
558
|
HAL_NVIC_DisableIRQ(QUADSPI_IRQn);
|
|
Jerome Coutant
2:123b894b49dd
|
559
|
|
|
Jerome Coutant
2:123b894b49dd
|
560
|
/*##-2- Disable peripherals and GPIO Clocks ################################*/
|
|
Jerome Coutant
2:123b894b49dd
|
561
|
/* De-Configure QSPI pins */
|
|
Jerome Coutant
2:123b894b49dd
|
562
|
HAL_GPIO_DeInit(QSPI_CS_GPIO_PORT, QSPI_CS_PIN);
|
|
Jerome Coutant
2:123b894b49dd
|
563
|
HAL_GPIO_DeInit(QSPI_CLK_GPIO_PORT, QSPI_CLK_PIN);
|
|
Jerome Coutant
2:123b894b49dd
|
564
|
HAL_GPIO_DeInit(QSPI_DX_GPIO_PORT, QSPI_D0_PIN);
|
|
Jerome Coutant
2:123b894b49dd
|
565
|
HAL_GPIO_DeInit(QSPI_DX_GPIO_PORT, QSPI_D1_PIN);
|
|
Jerome Coutant
2:123b894b49dd
|
566
|
HAL_GPIO_DeInit(QSPI_DX_GPIO_PORT, QSPI_D2_PIN);
|
|
Jerome Coutant
2:123b894b49dd
|
567
|
HAL_GPIO_DeInit(QSPI_DX_GPIO_PORT, QSPI_D3_PIN);
|
|
Jerome Coutant
2:123b894b49dd
|
568
|
|
|
Jerome Coutant
2:123b894b49dd
|
569
|
/*##-3- Reset peripherals ##################################################*/
|
|
Jerome Coutant
2:123b894b49dd
|
570
|
/* Reset the QuadSPI memory interface */
|
|
Jerome Coutant
2:123b894b49dd
|
571
|
QSPI_FORCE_RESET();
|
|
Jerome Coutant
2:123b894b49dd
|
572
|
QSPI_RELEASE_RESET();
|
|
Jerome Coutant
2:123b894b49dd
|
573
|
|
|
Jerome Coutant
2:123b894b49dd
|
574
|
/* Disable the QuadSPI memory interface clock */
|
|
Jerome Coutant
2:123b894b49dd
|
575
|
QSPI_CLK_DISABLE();
|
|
Jerome Coutant
2:123b894b49dd
|
576
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
577
|
|
|
Jerome Coutant
2:123b894b49dd
|
578
|
/**
|
|
Jerome Coutant
2:123b894b49dd
|
579
|
* @brief This function reset the QSPI memory.
|
|
Jerome Coutant
2:123b894b49dd
|
580
|
* @param hqspi: QSPI handle
|
|
Jerome Coutant
2:123b894b49dd
|
581
|
*/
|
|
Jerome Coutant
2:123b894b49dd
|
582
|
static uint8_t QSPI_ResetMemory(QSPI_HandleTypeDef *hqspi)
|
|
Jerome Coutant
2:123b894b49dd
|
583
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
584
|
QSPI_CommandTypeDef s_command;
|
|
Jerome Coutant
2:123b894b49dd
|
585
|
|
|
Jerome Coutant
2:123b894b49dd
|
586
|
/* Initialize the reset enable command */
|
|
Jerome Coutant
2:123b894b49dd
|
587
|
s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;
|
|
Jerome Coutant
2:123b894b49dd
|
588
|
s_command.Instruction = RESET_ENABLE_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
589
|
s_command.AddressMode = QSPI_ADDRESS_NONE;
|
|
Jerome Coutant
2:123b894b49dd
|
590
|
s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
|
|
Jerome Coutant
2:123b894b49dd
|
591
|
s_command.DataMode = QSPI_DATA_NONE;
|
|
Jerome Coutant
2:123b894b49dd
|
592
|
s_command.DummyCycles = 0;
|
|
Jerome Coutant
2:123b894b49dd
|
593
|
s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
|
|
Jerome Coutant
2:123b894b49dd
|
594
|
s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
|
|
Jerome Coutant
2:123b894b49dd
|
595
|
s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
596
|
|
|
Jerome Coutant
2:123b894b49dd
|
597
|
/* Send the command */
|
|
Jerome Coutant
2:123b894b49dd
|
598
|
if (HAL_QSPI_Command(hqspi, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
599
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
600
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
601
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
602
|
|
|
Jerome Coutant
2:123b894b49dd
|
603
|
/* Send the reset memory command */
|
|
Jerome Coutant
2:123b894b49dd
|
604
|
s_command.Instruction = RESET_MEMORY_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
605
|
if (HAL_QSPI_Command(hqspi, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
606
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
607
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
608
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
609
|
|
|
Jerome Coutant
2:123b894b49dd
|
610
|
/* Configure automatic polling mode to wait the memory is ready */
|
|
Jerome Coutant
2:123b894b49dd
|
611
|
if (QSPI_AutoPollingMemReady(hqspi, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != QSPI_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
612
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
613
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
614
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
615
|
|
|
Jerome Coutant
2:123b894b49dd
|
616
|
return QSPI_OK;
|
|
Jerome Coutant
2:123b894b49dd
|
617
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
618
|
|
|
Jerome Coutant
2:123b894b49dd
|
619
|
/**
|
|
Jerome Coutant
2:123b894b49dd
|
620
|
* @brief This function configure the dummy cycles on memory side.
|
|
Jerome Coutant
2:123b894b49dd
|
621
|
* @param hqspi: QSPI handle
|
|
Jerome Coutant
2:123b894b49dd
|
622
|
*/
|
|
Jerome Coutant
2:123b894b49dd
|
623
|
static uint8_t QSPI_DummyCyclesCfg(QSPI_HandleTypeDef *hqspi)
|
|
Jerome Coutant
2:123b894b49dd
|
624
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
625
|
QSPI_CommandTypeDef s_command;
|
|
Jerome Coutant
2:123b894b49dd
|
626
|
uint8_t reg;
|
|
Jerome Coutant
2:123b894b49dd
|
627
|
|
|
Jerome Coutant
2:123b894b49dd
|
628
|
/* Initialize the read volatile configuration register command */
|
|
Jerome Coutant
2:123b894b49dd
|
629
|
s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;
|
|
Jerome Coutant
2:123b894b49dd
|
630
|
s_command.Instruction = READ_VOL_CFG_REG_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
631
|
s_command.AddressMode = QSPI_ADDRESS_NONE;
|
|
Jerome Coutant
2:123b894b49dd
|
632
|
s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
|
|
Jerome Coutant
2:123b894b49dd
|
633
|
s_command.DataMode = QSPI_DATA_1_LINE;
|
|
Jerome Coutant
2:123b894b49dd
|
634
|
s_command.DummyCycles = 0;
|
|
Jerome Coutant
2:123b894b49dd
|
635
|
s_command.NbData = 1;
|
|
Jerome Coutant
2:123b894b49dd
|
636
|
s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
|
|
Jerome Coutant
2:123b894b49dd
|
637
|
s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
|
|
Jerome Coutant
2:123b894b49dd
|
638
|
s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
639
|
|
|
Jerome Coutant
2:123b894b49dd
|
640
|
/* Configure the command */
|
|
Jerome Coutant
2:123b894b49dd
|
641
|
if (HAL_QSPI_Command(hqspi, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
642
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
643
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
644
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
645
|
|
|
Jerome Coutant
2:123b894b49dd
|
646
|
/* Reception of the data */
|
|
Jerome Coutant
2:123b894b49dd
|
647
|
if (HAL_QSPI_Receive(hqspi, ®, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
648
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
649
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
650
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
651
|
|
|
Jerome Coutant
2:123b894b49dd
|
652
|
/* Enable write operations */
|
|
Jerome Coutant
2:123b894b49dd
|
653
|
if (QSPI_WriteEnable(hqspi) != QSPI_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
654
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
655
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
656
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
657
|
|
|
Jerome Coutant
2:123b894b49dd
|
658
|
/* Update volatile configuration register (with new dummy cycles) */
|
|
Jerome Coutant
2:123b894b49dd
|
659
|
s_command.Instruction = WRITE_VOL_CFG_REG_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
660
|
MODIFY_REG(reg, N25Q128A_VCR_NB_DUMMY, (N25Q128A_DUMMY_CYCLES_READ_QUAD << POSITION_VAL(N25Q128A_VCR_NB_DUMMY)));
|
|
Jerome Coutant
2:123b894b49dd
|
661
|
|
|
Jerome Coutant
2:123b894b49dd
|
662
|
/* Configure the write volatile configuration register command */
|
|
Jerome Coutant
2:123b894b49dd
|
663
|
if (HAL_QSPI_Command(hqspi, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
664
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
665
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
666
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
667
|
|
|
Jerome Coutant
2:123b894b49dd
|
668
|
/* Transmission of the data */
|
|
Jerome Coutant
2:123b894b49dd
|
669
|
if (HAL_QSPI_Transmit(hqspi, ®, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
670
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
671
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
672
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
673
|
|
|
Jerome Coutant
2:123b894b49dd
|
674
|
return QSPI_OK;
|
|
Jerome Coutant
2:123b894b49dd
|
675
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
676
|
|
|
Jerome Coutant
2:123b894b49dd
|
677
|
/**
|
|
Jerome Coutant
2:123b894b49dd
|
678
|
* @brief This function send a Write Enable and wait it is effective.
|
|
Jerome Coutant
2:123b894b49dd
|
679
|
* @param hqspi: QSPI handle
|
|
Jerome Coutant
2:123b894b49dd
|
680
|
*/
|
|
Jerome Coutant
2:123b894b49dd
|
681
|
static uint8_t QSPI_WriteEnable(QSPI_HandleTypeDef *hqspi)
|
|
Jerome Coutant
2:123b894b49dd
|
682
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
683
|
QSPI_CommandTypeDef s_command;
|
|
Jerome Coutant
2:123b894b49dd
|
684
|
QSPI_AutoPollingTypeDef s_config;
|
|
Jerome Coutant
2:123b894b49dd
|
685
|
|
|
Jerome Coutant
2:123b894b49dd
|
686
|
/* Enable write operations */
|
|
Jerome Coutant
2:123b894b49dd
|
687
|
s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;
|
|
Jerome Coutant
2:123b894b49dd
|
688
|
s_command.Instruction = WRITE_ENABLE_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
689
|
s_command.AddressMode = QSPI_ADDRESS_NONE;
|
|
Jerome Coutant
2:123b894b49dd
|
690
|
s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
|
|
Jerome Coutant
2:123b894b49dd
|
691
|
s_command.DataMode = QSPI_DATA_NONE;
|
|
Jerome Coutant
2:123b894b49dd
|
692
|
s_command.DummyCycles = 0;
|
|
Jerome Coutant
2:123b894b49dd
|
693
|
s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
|
|
Jerome Coutant
2:123b894b49dd
|
694
|
s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
|
|
Jerome Coutant
2:123b894b49dd
|
695
|
s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
696
|
|
|
Jerome Coutant
2:123b894b49dd
|
697
|
if (HAL_QSPI_Command(hqspi, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
698
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
699
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
700
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
701
|
|
|
Jerome Coutant
2:123b894b49dd
|
702
|
/* Configure automatic polling mode to wait for write enabling */
|
|
Jerome Coutant
2:123b894b49dd
|
703
|
s_config.Match = N25Q128A_SR_WREN;
|
|
Jerome Coutant
2:123b894b49dd
|
704
|
s_config.Mask = N25Q128A_SR_WREN;
|
|
Jerome Coutant
2:123b894b49dd
|
705
|
s_config.MatchMode = QSPI_MATCH_MODE_AND;
|
|
Jerome Coutant
2:123b894b49dd
|
706
|
s_config.StatusBytesSize = 1;
|
|
Jerome Coutant
2:123b894b49dd
|
707
|
s_config.Interval = 0x10;
|
|
Jerome Coutant
2:123b894b49dd
|
708
|
s_config.AutomaticStop = QSPI_AUTOMATIC_STOP_ENABLE;
|
|
Jerome Coutant
2:123b894b49dd
|
709
|
|
|
Jerome Coutant
2:123b894b49dd
|
710
|
s_command.Instruction = READ_STATUS_REG_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
711
|
s_command.DataMode = QSPI_DATA_1_LINE;
|
|
Jerome Coutant
2:123b894b49dd
|
712
|
|
|
Jerome Coutant
2:123b894b49dd
|
713
|
if (HAL_QSPI_AutoPolling(hqspi, &s_command, &s_config, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
714
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
715
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
716
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
717
|
|
|
Jerome Coutant
2:123b894b49dd
|
718
|
return QSPI_OK;
|
|
Jerome Coutant
2:123b894b49dd
|
719
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
720
|
|
|
Jerome Coutant
2:123b894b49dd
|
721
|
/**
|
|
Jerome Coutant
2:123b894b49dd
|
722
|
* @brief This function read the SR of the memory and wait the EOP.
|
|
Jerome Coutant
2:123b894b49dd
|
723
|
* @param hqspi: QSPI handle
|
|
Jerome Coutant
2:123b894b49dd
|
724
|
* @param Timeout: timeout value before returning an error
|
|
Jerome Coutant
2:123b894b49dd
|
725
|
*/
|
|
Jerome Coutant
2:123b894b49dd
|
726
|
static uint8_t QSPI_AutoPollingMemReady(QSPI_HandleTypeDef *hqspi, uint32_t Timeout)
|
|
Jerome Coutant
2:123b894b49dd
|
727
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
728
|
QSPI_CommandTypeDef s_command;
|
|
Jerome Coutant
2:123b894b49dd
|
729
|
QSPI_AutoPollingTypeDef s_config;
|
|
Jerome Coutant
2:123b894b49dd
|
730
|
|
|
Jerome Coutant
2:123b894b49dd
|
731
|
/* Configure automatic polling mode to wait for memory ready */
|
|
Jerome Coutant
2:123b894b49dd
|
732
|
s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;
|
|
Jerome Coutant
2:123b894b49dd
|
733
|
s_command.Instruction = READ_STATUS_REG_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
734
|
s_command.AddressMode = QSPI_ADDRESS_NONE;
|
|
Jerome Coutant
2:123b894b49dd
|
735
|
s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
|
|
Jerome Coutant
2:123b894b49dd
|
736
|
s_command.DataMode = QSPI_DATA_1_LINE;
|
|
Jerome Coutant
2:123b894b49dd
|
737
|
s_command.DummyCycles = 0;
|
|
Jerome Coutant
2:123b894b49dd
|
738
|
s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
|
|
Jerome Coutant
2:123b894b49dd
|
739
|
s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
|
|
Jerome Coutant
2:123b894b49dd
|
740
|
s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
|
|
Jerome Coutant
2:123b894b49dd
|
741
|
|
|
Jerome Coutant
2:123b894b49dd
|
742
|
s_config.Match = 0;
|
|
Jerome Coutant
2:123b894b49dd
|
743
|
s_config.Mask = N25Q128A_SR_WIP;
|
|
Jerome Coutant
2:123b894b49dd
|
744
|
s_config.MatchMode = QSPI_MATCH_MODE_AND;
|
|
Jerome Coutant
2:123b894b49dd
|
745
|
s_config.StatusBytesSize = 1;
|
|
Jerome Coutant
2:123b894b49dd
|
746
|
s_config.Interval = 0x10;
|
|
Jerome Coutant
2:123b894b49dd
|
747
|
s_config.AutomaticStop = QSPI_AUTOMATIC_STOP_ENABLE;
|
|
Jerome Coutant
2:123b894b49dd
|
748
|
|
|
Jerome Coutant
2:123b894b49dd
|
749
|
if (HAL_QSPI_AutoPolling(hqspi, &s_command, &s_config, Timeout) != HAL_OK)
|
|
Jerome Coutant
2:123b894b49dd
|
750
|
{
|
|
Jerome Coutant
2:123b894b49dd
|
751
|
return QSPI_ERROR;
|
|
Jerome Coutant
2:123b894b49dd
|
752
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
753
|
|
|
Jerome Coutant
2:123b894b49dd
|
754
|
return QSPI_OK;
|
|
Jerome Coutant
2:123b894b49dd
|
755
|
}
|
|
Jerome Coutant
2:123b894b49dd
|
756
|
/**
|
|
Jerome Coutant
2:123b894b49dd
|
757
|
* @}
|
|
Jerome Coutant
2:123b894b49dd
|
758
|
*/
|
|
Jerome Coutant
2:123b894b49dd
|
759
|
|
|
Jerome Coutant
2:123b894b49dd
|
760
|
/**
|
|
Jerome Coutant
2:123b894b49dd
|
761
|
* @}
|
|
Jerome Coutant
2:123b894b49dd
|
762
|
*/
|
|
Jerome Coutant
2:123b894b49dd
|
763
|
|
|
Jerome Coutant
2:123b894b49dd
|
764
|
/**
|
|
Jerome Coutant
2:123b894b49dd
|
765
|
* @}
|
|
Jerome Coutant
2:123b894b49dd
|
766
|
*/
|
|
Jerome Coutant
2:123b894b49dd
|
767
|
|
|
Jerome Coutant
2:123b894b49dd
|
768
|
/**
|
|
Jerome Coutant
2:123b894b49dd
|
769
|
* @}
|
|
Jerome Coutant
2:123b894b49dd
|
770
|
*/
|
|
Jerome Coutant
2:123b894b49dd
|
771
|
|
|
Jerome Coutant
2:123b894b49dd
|
772
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
Jerome Coutant
2:123b894b49dd
|
773
|
|
|