ST Expansion SW Team / X_NUCLEO_53L1A1_mbed

X_Nucleo_53L1A1 Expansion Board Class for VL53L1X Sensor.

Dependencies:   VL53L1X_mbed

Dependents:   HelloWorld_53L1A1_Interrupts 53L1A1_Satellites_MbedOS 53L1A1_Interrupts_MbedOS 53L1A1_Polling_All_MbedOS ... more

X-NUCLEO-53L1A1 Proximity Sensor Expansion Board Firmware Package

Introduction

This firmware package includes Component Device Drivers and the Board Support Package for STMicroelectronics' X-NUCLEO-53L1A1 Proximity sensor expansion board based on VL53L1X.

Firmware Library

Class XNucleo53L1A1 is intended to represent the Proximity sensor expansion board with the same name.

The expansion board provides support for the following components:

  1. on-board VL53L1X proximity sensor,
  2. up to two additional VL53L1X Satellites.

It is intentionally implemented as a singleton because only one X-NUCLEO-VL53L1A1 may be deployed at a time in a HW component stack. In order to get the singleton instance you have to call class method `Instance()`, e.g.:

// Sensors expansion board singleton instance
static XNucleo53L1A1 *board = XNucleo53L1A1::instance(device_i2c, A2, D9, D2);

Example Applications

Components/STMPE1600/stmpe1600_class.h@21:99c367e8a402, 2017-12-18 (annotated)

Committer:
mapellil
Date:
Mon Dec 18 09:52:09 2017 +0000
Revision:
21:99c367e8a402
Updated 53L0 lib

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mapellil 21:99c367e8a402 1 /**
mapellil 21:99c367e8a402 2 ******************************************************************************
mapellil 21:99c367e8a402 3 * @file stmpe1600_class.h
mapellil 21:99c367e8a402 4 * @author AST / EST
mapellil 21:99c367e8a402 5 * @version V0.0.1
mapellil 21:99c367e8a402 6 * @date 14-April-2015
mapellil 21:99c367e8a402 7 * @brief Header file for component stmpe1600
mapellil 21:99c367e8a402 8 ******************************************************************************
mapellil 21:99c367e8a402 9 * @attention
mapellil 21:99c367e8a402 10 *
mapellil 21:99c367e8a402 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mapellil 21:99c367e8a402 12 *
mapellil 21:99c367e8a402 13 * Redistribution and use in source and binary forms, with or without modification,
mapellil 21:99c367e8a402 14 * are permitted provided that the following conditions are met:
mapellil 21:99c367e8a402 15 * 1. Redistributions of source code must retain the above copyright notice,
mapellil 21:99c367e8a402 16 * this list of conditions and the following disclaimer.
mapellil 21:99c367e8a402 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mapellil 21:99c367e8a402 18 * this list of conditions and the following disclaimer in the documentation
mapellil 21:99c367e8a402 19 * and/or other materials provided with the distribution.
mapellil 21:99c367e8a402 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mapellil 21:99c367e8a402 21 * may be used to endorse or promote products derived from this software
mapellil 21:99c367e8a402 22 * without specific prior written permission.
mapellil 21:99c367e8a402 23 *
mapellil 21:99c367e8a402 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mapellil 21:99c367e8a402 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mapellil 21:99c367e8a402 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mapellil 21:99c367e8a402 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mapellil 21:99c367e8a402 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mapellil 21:99c367e8a402 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mapellil 21:99c367e8a402 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mapellil 21:99c367e8a402 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mapellil 21:99c367e8a402 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mapellil 21:99c367e8a402 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mapellil 21:99c367e8a402 34 *
mapellil 21:99c367e8a402 35 ******************************************************************************
mapellil 21:99c367e8a402 36 */
mapellil 21:99c367e8a402 37 #ifndef __STMPE1600_CLASS
mapellil 21:99c367e8a402 38 #define __STMPE1600_CLASS
mapellil 21:99c367e8a402 39 /* Includes ------------------------------------------------------------------*/
mapellil 21:99c367e8a402 40 #include "DevI2C.h"
mapellil 21:99c367e8a402 41
mapellil 21:99c367e8a402 42 #define STMPE1600_DEF_DEVICE_ADDRESS (uint8_t)0x42*2
mapellil 21:99c367e8a402 43 #define STMPE1600_DEF_DIGIOUT_LVL 1
mapellil 21:99c367e8a402 44
mapellil 21:99c367e8a402 45 /** STMPE1600 registr map **/
mapellil 21:99c367e8a402 46 #define CHIP_ID_0_7 (uint8_t)0x00
mapellil 21:99c367e8a402 47 #define CHIP_ID_8_15 (uint8_t)0x01
mapellil 21:99c367e8a402 48 #define VERSION_ID (uint8_t)0x02
mapellil 21:99c367e8a402 49 #define SYS_CTRL (uint8_t)0x03
mapellil 21:99c367e8a402 50 #define IEGPIOR_0_7 (uint8_t)0x08
mapellil 21:99c367e8a402 51 #define IEGPIOR_8_15 (uint8_t)0x09
mapellil 21:99c367e8a402 52 #define ISGPIOR_0_7 (uint8_t)0x0A
mapellil 21:99c367e8a402 53 #define ISGPIOR_8_15 (uint8_t)0x0B
mapellil 21:99c367e8a402 54 #define GPMR_0_7 (uint8_t)0x10
mapellil 21:99c367e8a402 55 #define GPMR_8_15 (uint8_t)0x11
mapellil 21:99c367e8a402 56 #define GPSR_0_7 (uint8_t)0x12
mapellil 21:99c367e8a402 57 #define GPSR_8_15 (uint8_t)0x13
mapellil 21:99c367e8a402 58 #define GPDR_0_7 (uint8_t)0x14
mapellil 21:99c367e8a402 59 #define GPDR_8_15 (uint8_t)0x15
mapellil 21:99c367e8a402 60 #define GPIR_0_7 (uint8_t)0x16
mapellil 21:99c367e8a402 61 #define GPIR_8_15 (uint8_t)0x17
mapellil 21:99c367e8a402 62
mapellil 21:99c367e8a402 63 #define SOFT_RESET (uint8_t)0x80
mapellil 21:99c367e8a402 64
mapellil 21:99c367e8a402 65 typedef enum {
mapellil 21:99c367e8a402 66 // GPIO Expander pin names
mapellil 21:99c367e8a402 67 GPIO_0 = 0,
mapellil 21:99c367e8a402 68 GPIO_1,
mapellil 21:99c367e8a402 69 GPIO_2,
mapellil 21:99c367e8a402 70 GPIO_3,
mapellil 21:99c367e8a402 71 GPIO_4,
mapellil 21:99c367e8a402 72 GPIO_5,
mapellil 21:99c367e8a402 73 GPIO_6,
mapellil 21:99c367e8a402 74 GPIO_7,
mapellil 21:99c367e8a402 75 GPIO_8,
mapellil 21:99c367e8a402 76 GPIO_9,
mapellil 21:99c367e8a402 77 GPIO_10,
mapellil 21:99c367e8a402 78 GPIO_11,
mapellil 21:99c367e8a402 79 GPIO_12,
mapellil 21:99c367e8a402 80 GPIO_13,
mapellil 21:99c367e8a402 81 GPIO_14,
mapellil 21:99c367e8a402 82 GPIO_15,
mapellil 21:99c367e8a402 83 NOT_CON
mapellil 21:99c367e8a402 84 } ExpGpioPinName;
mapellil 21:99c367e8a402 85
mapellil 21:99c367e8a402 86 typedef enum {
mapellil 21:99c367e8a402 87 INPUT = 0,
mapellil 21:99c367e8a402 88 OUTPUT,
mapellil 21:99c367e8a402 89 NOT_CONNECTED
mapellil 21:99c367e8a402 90 } ExpGpioPinDirection;
mapellil 21:99c367e8a402 91
mapellil 21:99c367e8a402 92 /* Classes -------------------------------------------------------------------*/
mapellil 21:99c367e8a402 93 /** Class representing a single stmpe1600 GPIO expander output pin
mapellil 21:99c367e8a402 94 */
mapellil 21:99c367e8a402 95 class Stmpe1600DigiOut
mapellil 21:99c367e8a402 96 {
mapellil 21:99c367e8a402 97
mapellil 21:99c367e8a402 98 public:
mapellil 21:99c367e8a402 99 /** Constructor
mapellil 21:99c367e8a402 100 * @param[in] &i2c device I2C to be used for communication
mapellil 21:99c367e8a402 101 * @param[in] outpinname the desired out pin name to be created
mapellil 21:99c367e8a402 102 * @param[in] DevAddr the stmpe1600 I2C device address (deft STMPE1600_DEF_DEVICE_ADDRESS)
mapellil 21:99c367e8a402 103 * @param[in] lvl the default ot pin level
mapellil 21:99c367e8a402 104 */
mapellil 21:99c367e8a402 105 Stmpe1600DigiOut(DevI2C &i2c, ExpGpioPinName out_pin_name, uint8_t dev_addr = STMPE1600_DEF_DEVICE_ADDRESS,
mapellil 21:99c367e8a402 106 bool lvl = STMPE1600_DEF_DIGIOUT_LVL) : dev_i2c(&i2c), exp_dev_addr(dev_addr), exp_pin_name(out_pin_name)
mapellil 21:99c367e8a402 107 {
mapellil 21:99c367e8a402 108 uint8_t data[2];
mapellil 21:99c367e8a402 109
mapellil 21:99c367e8a402 110 if (exp_pin_name == NOT_CON)
mapellil 21:99c367e8a402 111 return;
mapellil 21:99c367e8a402 112 /* set the exp_pin_name as output */
mapellil 21:99c367e8a402 113 dev_i2c->i2c_read(data, exp_dev_addr, GPDR_0_7, 1);
mapellil 21:99c367e8a402 114 dev_i2c->i2c_read(&data[1], exp_dev_addr, GPDR_8_15, 1);
mapellil 21:99c367e8a402 115 *(uint16_t *)data = *(uint16_t *)data | (1 << (uint16_t)exp_pin_name); // set gpio as out
mapellil 21:99c367e8a402 116 dev_i2c->i2c_write(data, exp_dev_addr, GPDR_0_7, 1);
mapellil 21:99c367e8a402 117 dev_i2c->i2c_write(&data[1], exp_dev_addr, GPDR_8_15, 1);
mapellil 21:99c367e8a402 118 write(lvl);
mapellil 21:99c367e8a402 119 }
mapellil 21:99c367e8a402 120
mapellil 21:99c367e8a402 121 /**
mapellil 21:99c367e8a402 122 * @brief Write on the out pin
mapellil 21:99c367e8a402 123 * @param[in] lvl level to write
mapellil 21:99c367e8a402 124 * @return 0 on Success
mapellil 21:99c367e8a402 125 */
mapellil 21:99c367e8a402 126 void write(int lvl)
mapellil 21:99c367e8a402 127 {
mapellil 21:99c367e8a402 128 uint8_t data[2];
mapellil 21:99c367e8a402 129
mapellil 21:99c367e8a402 130 if (exp_pin_name == NOT_CON)
mapellil 21:99c367e8a402 131 return;
mapellil 21:99c367e8a402 132 /* set the exp_pin_name state to lvl */
mapellil 21:99c367e8a402 133 dev_i2c->i2c_read(data, exp_dev_addr, GPSR_0_7, 2);
mapellil 21:99c367e8a402 134 *(uint16_t *)data = *(uint16_t *)data & (uint16_t)(~(1 << (uint16_t)exp_pin_name)); // set pin mask
mapellil 21:99c367e8a402 135 if (lvl)
mapellil 21:99c367e8a402 136 *(uint16_t *)data = *(uint16_t *)data | (uint16_t)(1 << (uint16_t)exp_pin_name);
mapellil 21:99c367e8a402 137 dev_i2c->i2c_write(data, exp_dev_addr, GPSR_0_7, 2);
mapellil 21:99c367e8a402 138 }
mapellil 21:99c367e8a402 139
mapellil 21:99c367e8a402 140 /**
mapellil 21:99c367e8a402 141 * @brief Overload assignement operator
mapellil 21:99c367e8a402 142 */
mapellil 21:99c367e8a402 143 Stmpe1600DigiOut &operator= (int lvl)
mapellil 21:99c367e8a402 144 {
mapellil 21:99c367e8a402 145 write(lvl);
mapellil 21:99c367e8a402 146 return *this;
mapellil 21:99c367e8a402 147 }
mapellil 21:99c367e8a402 148
mapellil 21:99c367e8a402 149 private:
mapellil 21:99c367e8a402 150 DevI2C *dev_i2c;
mapellil 21:99c367e8a402 151 uint8_t exp_dev_addr;
mapellil 21:99c367e8a402 152 ExpGpioPinName exp_pin_name;
mapellil 21:99c367e8a402 153 };
mapellil 21:99c367e8a402 154
mapellil 21:99c367e8a402 155 /* Classes -------------------------------------------------------------------*/
mapellil 21:99c367e8a402 156 /** Class representing a single stmpe1600 GPIO expander input pin
mapellil 21:99c367e8a402 157 */
mapellil 21:99c367e8a402 158 class Stmpe1600DigiIn
mapellil 21:99c367e8a402 159 {
mapellil 21:99c367e8a402 160 public:
mapellil 21:99c367e8a402 161 /** Constructor
mapellil 21:99c367e8a402 162 * @param[in] &i2c device I2C to be used for communication
mapellil 21:99c367e8a402 163 * @param[in] inpinname the desired input pin name to be created
mapellil 21:99c367e8a402 164 * @param[in] DevAddr the stmpe1600 I2C device addres (deft STMPE1600_DEF_DEVICE_ADDRESS)
mapellil 21:99c367e8a402 165 */
mapellil 21:99c367e8a402 166 Stmpe1600DigiIn(DevI2C &i2c, ExpGpioPinName in_pin_name,
mapellil 21:99c367e8a402 167 uint8_t dev_addr = STMPE1600_DEF_DEVICE_ADDRESS) : dev_i2c(&i2c), exp_dev_addr(dev_addr),
mapellil 21:99c367e8a402 168 exp_pin_name(in_pin_name)
mapellil 21:99c367e8a402 169 {
mapellil 21:99c367e8a402 170 uint8_t data[2];
mapellil 21:99c367e8a402 171
mapellil 21:99c367e8a402 172 if (exp_pin_name == NOT_CON)
mapellil 21:99c367e8a402 173 return;
mapellil 21:99c367e8a402 174 /* set the exp_pin_name as input pin direction */
mapellil 21:99c367e8a402 175 dev_i2c->i2c_read(data, exp_dev_addr, GPDR_0_7, 2);
mapellil 21:99c367e8a402 176 *(uint16_t *)data = *(uint16_t *)data & (uint16_t)(~(1 << (uint16_t)exp_pin_name)); // set gpio as in
mapellil 21:99c367e8a402 177 dev_i2c->i2c_write(data, exp_dev_addr, GPDR_0_7, 2);
mapellil 21:99c367e8a402 178 }
mapellil 21:99c367e8a402 179
mapellil 21:99c367e8a402 180 /**
mapellil 21:99c367e8a402 181 * @brief Read the input pin
mapellil 21:99c367e8a402 182 * @return The pin logical state 0 or 1
mapellil 21:99c367e8a402 183 */
mapellil 21:99c367e8a402 184 bool read()
mapellil 21:99c367e8a402 185 {
mapellil 21:99c367e8a402 186 uint8_t data[2];
mapellil 21:99c367e8a402 187
mapellil 21:99c367e8a402 188 if (exp_pin_name == NOT_CON)
mapellil 21:99c367e8a402 189 return false;
mapellil 21:99c367e8a402 190 /* read the exp_pin_name */
mapellil 21:99c367e8a402 191 dev_i2c->i2c_read(data, exp_dev_addr, GPMR_0_7, 2);
mapellil 21:99c367e8a402 192 *(uint16_t *)data = *(uint16_t *)data & (uint16_t)(1 << (uint16_t)exp_pin_name); // mask the in gpio
mapellil 21:99c367e8a402 193 if (data[0] || data[1])
mapellil 21:99c367e8a402 194 return true;
mapellil 21:99c367e8a402 195 return false;
mapellil 21:99c367e8a402 196 }
mapellil 21:99c367e8a402 197
mapellil 21:99c367e8a402 198 operator int()
mapellil 21:99c367e8a402 199 {
mapellil 21:99c367e8a402 200 return read();
mapellil 21:99c367e8a402 201 }
mapellil 21:99c367e8a402 202
mapellil 21:99c367e8a402 203 private:
mapellil 21:99c367e8a402 204 DevI2C *dev_i2c;
mapellil 21:99c367e8a402 205 uint8_t exp_dev_addr;
mapellil 21:99c367e8a402 206 ExpGpioPinName exp_pin_name;
mapellil 21:99c367e8a402 207 };
mapellil 21:99c367e8a402 208
mapellil 21:99c367e8a402 209 /* Classes -------------------------------------------------------------------*/
mapellil 21:99c367e8a402 210 /** Class representing a whole stmpe1600 component (16 gpio)
mapellil 21:99c367e8a402 211 */
mapellil 21:99c367e8a402 212 class Stmpe1600
mapellil 21:99c367e8a402 213 {
mapellil 21:99c367e8a402 214
mapellil 21:99c367e8a402 215 public:
mapellil 21:99c367e8a402 216 /** Constructor
mapellil 21:99c367e8a402 217 * @param[in] &i2c device I2C to be used for communication
mapellil 21:99c367e8a402 218 * @param[in] DevAddr the stmpe1600 I2C device addres (deft STMPE1600_DEF_DEVICE_ADDRESS)
mapellil 21:99c367e8a402 219 */
mapellil 21:99c367e8a402 220 Stmpe1600(DevI2C &i2c, uint8_t dev_addr = STMPE1600_DEF_DEVICE_ADDRESS) : dev_i2c(&i2c)
mapellil 21:99c367e8a402 221 {
mapellil 21:99c367e8a402 222 exp_dev_addr = dev_addr;
mapellil 21:99c367e8a402 223 write_sys_ctrl(SOFT_RESET);
mapellil 21:99c367e8a402 224
mapellil 21:99c367e8a402 225 gpdr0_15 = (uint16_t) 0; // gpio dir all IN
mapellil 21:99c367e8a402 226 write_16bit_reg(GPDR_0_7, &gpdr0_15);
mapellil 21:99c367e8a402 227 gpsr0_15 = (uint16_t) 0x0ffff; // gpio status all 1
mapellil 21:99c367e8a402 228 write_16bit_reg(GPSR_0_7, &gpsr0_15);
mapellil 21:99c367e8a402 229 }
mapellil 21:99c367e8a402 230
mapellil 21:99c367e8a402 231 /**
mapellil 21:99c367e8a402 232 * @brief Write the SYS_CTRL register
mapellil 21:99c367e8a402 233 * @param[in] Data to be written (bit fields)
mapellil 21:99c367e8a402 234 */
mapellil 21:99c367e8a402 235 void write_sys_ctrl(uint8_t data) // data = SOFT_RESET reset the device
mapellil 21:99c367e8a402 236 {
mapellil 21:99c367e8a402 237 dev_i2c->i2c_write(&data, exp_dev_addr, SYS_CTRL, 1);
mapellil 21:99c367e8a402 238 }
mapellil 21:99c367e8a402 239
mapellil 21:99c367e8a402 240 /**
mapellil 21:99c367e8a402 241 * @brief Set the out pin
mapellil 21:99c367e8a402 242 * @param[in] The pin name
mapellil 21:99c367e8a402 243 * @return 0 on Success
mapellil 21:99c367e8a402 244 */
mapellil 21:99c367e8a402 245 bool set_gpio(ExpGpioPinName pin_name)
mapellil 21:99c367e8a402 246 {
mapellil 21:99c367e8a402 247 if (pin_name == NOT_CON)
mapellil 21:99c367e8a402 248 return true;
mapellil 21:99c367e8a402 249 gpsr0_15 = gpsr0_15 | ((uint16_t) 0x0001 << pin_name);
mapellil 21:99c367e8a402 250 write_16bit_reg(GPSR_0_7, &gpsr0_15);
mapellil 21:99c367e8a402 251 return false;
mapellil 21:99c367e8a402 252 }
mapellil 21:99c367e8a402 253
mapellil 21:99c367e8a402 254 /**
mapellil 21:99c367e8a402 255 * @brief Clear the out pin
mapellil 21:99c367e8a402 256 * @param[in] The pin name
mapellil 21:99c367e8a402 257 * @return 0 on Success
mapellil 21:99c367e8a402 258 */
mapellil 21:99c367e8a402 259 bool clear_gpio(ExpGpioPinName pin_name)
mapellil 21:99c367e8a402 260 {
mapellil 21:99c367e8a402 261 if (pin_name == NOT_CON)
mapellil 21:99c367e8a402 262 return true;
mapellil 21:99c367e8a402 263 gpsr0_15 = gpsr0_15 & (~((uint16_t) 0x0001 << pin_name));
mapellil 21:99c367e8a402 264 write_16bit_reg(GPSR_0_7, &gpsr0_15);
mapellil 21:99c367e8a402 265 return false;
mapellil 21:99c367e8a402 266 }
mapellil 21:99c367e8a402 267
mapellil 21:99c367e8a402 268 /**
mapellil 21:99c367e8a402 269 * @brief Read the input pin
mapellil 21:99c367e8a402 270 * @param[in] The pin name
mapellil 21:99c367e8a402 271 * @return The logical pin level
mapellil 21:99c367e8a402 272 */
mapellil 21:99c367e8a402 273 bool read_gpio(ExpGpioPinName pin_name)
mapellil 21:99c367e8a402 274 {
mapellil 21:99c367e8a402 275 uint16_t gpmr0_15;
mapellil 21:99c367e8a402 276 if (pin_name == NOT_CON)
mapellil 21:99c367e8a402 277 return true;
mapellil 21:99c367e8a402 278 read_16bit_reg(GPMR_0_7, &gpmr0_15);
mapellil 21:99c367e8a402 279 gpmr0_15 = gpmr0_15 & ((uint16_t) 0x0001 << pin_name);
mapellil 21:99c367e8a402 280 if (gpmr0_15)
mapellil 21:99c367e8a402 281 return true;
mapellil 21:99c367e8a402 282 return false;
mapellil 21:99c367e8a402 283 }
mapellil 21:99c367e8a402 284
mapellil 21:99c367e8a402 285 /**
mapellil 21:99c367e8a402 286 * @brief Set the pin direction
mapellil 21:99c367e8a402 287 * @param[in] The pin name
mapellil 21:99c367e8a402 288 * @param[in] The pin direction
mapellil 21:99c367e8a402 289 * @return 0 on success
mapellil 21:99c367e8a402 290 */
mapellil 21:99c367e8a402 291 bool set_gpio_dir(ExpGpioPinName pin_name, ExpGpioPinDirection pin_dir)
mapellil 21:99c367e8a402 292 {
mapellil 21:99c367e8a402 293 if (pin_name == NOT_CON || pin_dir == NOT_CONNECTED)
mapellil 21:99c367e8a402 294 return true;
mapellil 21:99c367e8a402 295 gpdr0_15 = gpdr0_15 & (~((uint16_t) 0x0001 << pin_name)); // clear the Pin
mapellil 21:99c367e8a402 296 gpdr0_15 = gpdr0_15 | ((uint16_t) pin_dir << pin_name);
mapellil 21:99c367e8a402 297 write_16bit_reg(GPDR_0_7, &gpdr0_15);
mapellil 21:99c367e8a402 298 return false;
mapellil 21:99c367e8a402 299 }
mapellil 21:99c367e8a402 300
mapellil 21:99c367e8a402 301 /**
mapellil 21:99c367e8a402 302 * @brief Read a 16 bits register
mapellil 21:99c367e8a402 303 * @param[in] The register address
mapellil 21:99c367e8a402 304 * @param[in] The pointer to the read data
mapellil 21:99c367e8a402 305 */
mapellil 21:99c367e8a402 306 void read_16bit_reg(uint8_t reg16_addr, uint16_t *reg16_data)
mapellil 21:99c367e8a402 307 {
mapellil 21:99c367e8a402 308 dev_i2c->i2c_read((uint8_t *) reg16_data, exp_dev_addr, reg16_addr, 2);
mapellil 21:99c367e8a402 309 }
mapellil 21:99c367e8a402 310
mapellil 21:99c367e8a402 311 /**
mapellil 21:99c367e8a402 312 * @brief Write a 16 bits register
mapellil 21:99c367e8a402 313 * @param[in] The register address
mapellil 21:99c367e8a402 314 * @param[in] The pointer to the data to be written
mapellil 21:99c367e8a402 315 */
mapellil 21:99c367e8a402 316 void write_16bit_reg(uint8_t reg16_addr, uint16_t *reg16_data)
mapellil 21:99c367e8a402 317 {
mapellil 21:99c367e8a402 318 dev_i2c->i2c_write((uint8_t *) reg16_data, exp_dev_addr, reg16_addr, 2);
mapellil 21:99c367e8a402 319 }
mapellil 21:99c367e8a402 320
mapellil 21:99c367e8a402 321 private:
mapellil 21:99c367e8a402 322 DevI2C *dev_i2c;
mapellil 21:99c367e8a402 323 uint16_t gpdr0_15; // local copy of bit direction reg
mapellil 21:99c367e8a402 324 uint16_t gpsr0_15; // local copy of bit status reg
mapellil 21:99c367e8a402 325 uint8_t exp_dev_addr; // expander device i2c addr
mapellil 21:99c367e8a402 326 };
mapellil 21:99c367e8a402 327
mapellil 21:99c367e8a402 328 #endif // __STMPE1600_CLASS
mapellil 21:99c367e8a402 329
mapellil 21:99c367e8a402 330