ST Expansion SW Team / VL53L1CB

The VL53L1CB proximity sensor, based on ST’s FlightSense™, Time-of-Flight technology.

Dependencies:   X_NUCLEO_COMMON ST_INTERFACES

Dependents:   VL53L1CB_noshield_1sensor_polls_auton VL53L1CB_noshield_1sensor_interrupt_auton X_NUCLEO_53L1A2

Based on VL53L1 library, this is a library for the VL53L1CB ToF chip.

src/vl53l1_api_core.c@18:0696efe39d08, 2021-07-21 (annotated)

Committer:
lugandc
Date:
Wed Jul 21 17:06:38 2021 +0200
Revision:
18:0696efe39d08
Parent:
7:1add29d51e72 
Cleanup i2c functions, removed all bad references to L1X

Cleanup VL53L1CB class:

 - i2c device object is passed in a consistent way in MyDevice structure

 - removed useless functions

Updated VL53L1CB component driver with bare driver release 6.6.7 content

Who changed what in which revision?

UserRevisionLine numberNew contents of line
charlesmn 0:3ac96e360672 1
Charles MacNeill 7:1add29d51e72 2 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Charles MacNeill 7:1add29d51e72 3 /******************************************************************************
charlesmn 0:3ac96e360672 4 * Copyright (c) 2020, STMicroelectronics - All Rights Reserved
charlesmn 0:3ac96e360672 5
Charles MacNeill 7:1add29d51e72 6 This file is part of VL53L1 and is dual licensed,
Charles MacNeill 7:1add29d51e72 7 either GPL-2.0+
charlesmn 0:3ac96e360672 8 or 'BSD 3-clause "New" or "Revised" License' , at your option.
Charles MacNeill 7:1add29d51e72 9 ******************************************************************************
Charles MacNeill 7:1add29d51e72 10 */
charlesmn 0:3ac96e360672 11
charlesmn 0:3ac96e360672 12
charlesmn 0:3ac96e360672 13
charlesmn 0:3ac96e360672 14
charlesmn 0:3ac96e360672 15
charlesmn 0:3ac96e360672 16 #include "vl53l1_ll_def.h"
charlesmn 0:3ac96e360672 17 #include "vl53l1_ll_device.h"
charlesmn 0:3ac96e360672 18 #include "vl53l1_platform.h"
charlesmn 0:3ac96e360672 19 #include "vl53l1_platform_ipp.h"
charlesmn 0:3ac96e360672 20 #include "vl53l1_register_map.h"
charlesmn 0:3ac96e360672 21 #include "vl53l1_register_settings.h"
charlesmn 0:3ac96e360672 22 #include "vl53l1_register_funcs.h"
charlesmn 0:3ac96e360672 23 #include "vl53l1_hist_map.h"
charlesmn 0:3ac96e360672 24 #include "vl53l1_hist_structs.h"
charlesmn 0:3ac96e360672 25 #include "vl53l1_nvm_map.h"
charlesmn 0:3ac96e360672 26 #include "vl53l1_nvm_structs.h"
charlesmn 0:3ac96e360672 27 #include "vl53l1_nvm.h"
charlesmn 0:3ac96e360672 28 #include "vl53l1_core.h"
charlesmn 0:3ac96e360672 29 #include "vl53l1_wait.h"
charlesmn 0:3ac96e360672 30 #include "vl53l1_zone_presets.h"
charlesmn 0:3ac96e360672 31 #include "vl53l1_api_preset_modes.h"
charlesmn 0:3ac96e360672 32 #include "vl53l1_silicon_core.h"
charlesmn 0:3ac96e360672 33 #include "vl53l1_api_core.h"
charlesmn 0:3ac96e360672 34 #include "vl53l1_tuning_parm_defaults.h"
charlesmn 0:3ac96e360672 35
charlesmn 0:3ac96e360672 36 #ifdef VL53L1_LOG_ENABLE
charlesmn 0:3ac96e360672 37 #include "vl53l1_api_debug.h"
charlesmn 0:3ac96e360672 38 #endif
charlesmn 0:3ac96e360672 39
charlesmn 0:3ac96e360672 40 #define LOG_FUNCTION_START(fmt, ...) \
charlesmn 0:3ac96e360672 41 _LOG_FUNCTION_START(VL53L1_TRACE_MODULE_CORE, fmt, ##__VA_ARGS__)
charlesmn 0:3ac96e360672 42 #define LOG_FUNCTION_END(status, ...) \
charlesmn 0:3ac96e360672 43 _LOG_FUNCTION_END(VL53L1_TRACE_MODULE_CORE, status, ##__VA_ARGS__)
charlesmn 0:3ac96e360672 44 #define LOG_FUNCTION_END_FMT(status, fmt, ...) \
charlesmn 0:3ac96e360672 45 _LOG_FUNCTION_END_FMT(VL53L1_TRACE_MODULE_CORE, status, \
charlesmn 0:3ac96e360672 46 fmt, ##__VA_ARGS__)
charlesmn 0:3ac96e360672 47
charlesmn 0:3ac96e360672 48 #define trace_print(level, ...) \
charlesmn 0:3ac96e360672 49 _LOG_TRACE_PRINT(VL53L1_TRACE_MODULE_CORE, \
charlesmn 0:3ac96e360672 50 level, VL53L1_TRACE_FUNCTION_NONE, ##__VA_ARGS__)
charlesmn 0:3ac96e360672 51
charlesmn 0:3ac96e360672 52 #define VL53L1_MAX_I2C_XFER_SIZE 256
charlesmn 0:3ac96e360672 53
charlesmn 0:3ac96e360672 54 static VL53L1_Error select_offset_per_vcsel(VL53L1_LLDriverData_t *pdev,
charlesmn 0:3ac96e360672 55 int16_t *poffset) {
charlesmn 0:3ac96e360672 56 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 57 int16_t tA, tB;
charlesmn 0:3ac96e360672 58 uint8_t isc;
charlesmn 0:3ac96e360672 59
charlesmn 0:3ac96e360672 60 switch (pdev->preset_mode) {
charlesmn 0:3ac96e360672 61 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE:
charlesmn 0:3ac96e360672 62 tA = pdev->per_vcsel_cal_data.short_a_offset_mm;
charlesmn 0:3ac96e360672 63 tB = pdev->per_vcsel_cal_data.short_b_offset_mm;
charlesmn 0:3ac96e360672 64 break;
charlesmn 0:3ac96e360672 65 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE:
charlesmn 0:3ac96e360672 66 tA = pdev->per_vcsel_cal_data.medium_a_offset_mm;
charlesmn 0:3ac96e360672 67 tB = pdev->per_vcsel_cal_data.medium_b_offset_mm;
charlesmn 0:3ac96e360672 68 break;
charlesmn 0:3ac96e360672 69 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE:
charlesmn 0:3ac96e360672 70 tA = pdev->per_vcsel_cal_data.long_a_offset_mm;
charlesmn 0:3ac96e360672 71 tB = pdev->per_vcsel_cal_data.long_b_offset_mm;
charlesmn 0:3ac96e360672 72 break;
charlesmn 0:3ac96e360672 73 default:
lugandc 18:0696efe39d08 74 tA = pdev->per_vcsel_cal_data.long_a_offset_mm;
lugandc 18:0696efe39d08 75 tB = pdev->per_vcsel_cal_data.long_b_offset_mm;
charlesmn 0:3ac96e360672 76 status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn 0:3ac96e360672 77 *poffset = 0;
charlesmn 0:3ac96e360672 78 break;
charlesmn 0:3ac96e360672 79 }
charlesmn 0:3ac96e360672 80
charlesmn 0:3ac96e360672 81 isc = pdev->ll_state.cfg_internal_stream_count;
charlesmn 0:3ac96e360672 82 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 83 *poffset = (isc & 0x01) ? tA : tB;
charlesmn 0:3ac96e360672 84
charlesmn 0:3ac96e360672 85 return status;
charlesmn 0:3ac96e360672 86 }
charlesmn 0:3ac96e360672 87
charlesmn 0:3ac96e360672 88 static void vl53l1_diff_histo_stddev(VL53L1_LLDriverData_t *pdev,
charlesmn 0:3ac96e360672 89 VL53L1_histogram_bin_data_t *pdata, uint8_t timing, uint8_t HighIndex,
charlesmn 0:3ac96e360672 90 uint8_t prev_pos, int32_t *pdiff_histo_stddev) {
charlesmn 0:3ac96e360672 91 uint16_t bin = 0;
charlesmn 0:3ac96e360672 92 int32_t total_rate_pre = 0;
charlesmn 0:3ac96e360672 93 int32_t total_rate_cur = 0;
charlesmn 0:3ac96e360672 94 int32_t PrevBin, CurrBin;
charlesmn 0:3ac96e360672 95
charlesmn 0:3ac96e360672 96 total_rate_pre = 0;
charlesmn 0:3ac96e360672 97 total_rate_cur = 0;
charlesmn 0:3ac96e360672 98
charlesmn 0:3ac96e360672 99
charlesmn 0:3ac96e360672 100 for (bin = timing * 4; bin < HighIndex; bin++) {
charlesmn 0:3ac96e360672 101 total_rate_pre +=
charlesmn 0:3ac96e360672 102 pdev->multi_bins_rec[prev_pos][timing][bin];
charlesmn 0:3ac96e360672 103 total_rate_cur += pdata->bin_data[bin];
charlesmn 0:3ac96e360672 104 }
charlesmn 0:3ac96e360672 105
charlesmn 0:3ac96e360672 106 if ((total_rate_pre != 0) && (total_rate_cur != 0))
charlesmn 0:3ac96e360672 107 for (bin = timing * 4; bin < HighIndex; bin++) {
charlesmn 0:3ac96e360672 108 PrevBin = pdev->multi_bins_rec[prev_pos][timing][bin];
charlesmn 0:3ac96e360672 109 PrevBin = (PrevBin * 1000) / total_rate_pre;
charlesmn 0:3ac96e360672 110 CurrBin = pdata->bin_data[bin] * 1000 / total_rate_cur;
charlesmn 0:3ac96e360672 111 *pdiff_histo_stddev += (PrevBin - CurrBin) *
charlesmn 0:3ac96e360672 112 (PrevBin - CurrBin);
charlesmn 0:3ac96e360672 113 }
charlesmn 0:3ac96e360672 114 }
charlesmn 0:3ac96e360672 115
charlesmn 0:3ac96e360672 116 static void vl53l1_histo_merge(VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 117 VL53L1_histogram_bin_data_t *pdata) {
charlesmn 0:3ac96e360672 118 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 119 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 120 uint16_t bin = 0;
charlesmn 0:3ac96e360672 121 uint8_t i = 0;
charlesmn 0:3ac96e360672 122 int32_t TuningBinRecSize = 0;
charlesmn 0:3ac96e360672 123 uint8_t recom_been_reset = 0;
charlesmn 0:3ac96e360672 124 uint8_t timing = 0;
charlesmn 0:3ac96e360672 125 int32_t rmt = 0;
charlesmn 0:3ac96e360672 126 int32_t diff_histo_stddev = 0;
charlesmn 0:3ac96e360672 127 uint8_t HighIndex, prev_pos;
charlesmn 0:3ac96e360672 128 uint8_t BuffSize = VL53L1_HISTOGRAM_BUFFER_SIZE;
charlesmn 0:3ac96e360672 129 uint8_t pos;
charlesmn 0:3ac96e360672 130
charlesmn 0:3ac96e360672 131 VL53L1_get_tuning_parm(Dev, VL53L1_TUNINGPARM_HIST_MERGE_MAX_SIZE,
charlesmn 0:3ac96e360672 132 &TuningBinRecSize);
charlesmn 0:3ac96e360672 133
charlesmn 0:3ac96e360672 134 VL53L1_get_tuning_parm(Dev, VL53L1_TUNINGPARM_RESET_MERGE_THRESHOLD,
charlesmn 0:3ac96e360672 135 &rmt);
charlesmn 0:3ac96e360672 136
charlesmn 0:3ac96e360672 137
charlesmn 0:3ac96e360672 138 if (pdev->pos_before_next_recom == 0) {
charlesmn 0:3ac96e360672 139
charlesmn 0:3ac96e360672 140 timing = 1 - pdata->result__stream_count % 2;
charlesmn 0:3ac96e360672 141
charlesmn 0:3ac96e360672 142 diff_histo_stddev = 0;
charlesmn 0:3ac96e360672 143 HighIndex = BuffSize - timing * 4;
charlesmn 0:3ac96e360672 144 if (pdev->bin_rec_pos > 0)
charlesmn 0:3ac96e360672 145 prev_pos = pdev->bin_rec_pos - 1;
charlesmn 0:3ac96e360672 146 else
charlesmn 0:3ac96e360672 147 prev_pos = (TuningBinRecSize - 1);
charlesmn 0:3ac96e360672 148
charlesmn 0:3ac96e360672 149 if (pdev->multi_bins_rec[prev_pos][timing][4] > 0)
charlesmn 0:3ac96e360672 150 vl53l1_diff_histo_stddev(pdev, pdata,
charlesmn 0:3ac96e360672 151 timing, HighIndex, prev_pos,
charlesmn 0:3ac96e360672 152 &diff_histo_stddev);
charlesmn 0:3ac96e360672 153
charlesmn 0:3ac96e360672 154 if (diff_histo_stddev >= rmt) {
charlesmn 0:3ac96e360672 155 memset(pdev->multi_bins_rec, 0,
charlesmn 0:3ac96e360672 156 sizeof(pdev->multi_bins_rec));
charlesmn 0:3ac96e360672 157 pdev->bin_rec_pos = 0;
charlesmn 0:3ac96e360672 158
charlesmn 0:3ac96e360672 159 recom_been_reset = 1;
charlesmn 0:3ac96e360672 160
charlesmn 0:3ac96e360672 161 if (timing == 0)
charlesmn 0:3ac96e360672 162 pdev->pos_before_next_recom =
charlesmn 0:3ac96e360672 163 VL53L1_FRAME_WAIT_EVENT;
charlesmn 0:3ac96e360672 164 else
charlesmn 0:3ac96e360672 165 pdev->pos_before_next_recom =
charlesmn 0:3ac96e360672 166 VL53L1_FRAME_WAIT_EVENT + 1;
charlesmn 0:3ac96e360672 167 } else {
charlesmn 0:3ac96e360672 168
charlesmn 0:3ac96e360672 169 pos = pdev->bin_rec_pos;
charlesmn 0:3ac96e360672 170 for (i = 0; i < BuffSize; i++)
charlesmn 0:3ac96e360672 171 pdev->multi_bins_rec[pos][timing][i] =
charlesmn 0:3ac96e360672 172 pdata->bin_data[i];
charlesmn 0:3ac96e360672 173 }
charlesmn 0:3ac96e360672 174
charlesmn 0:3ac96e360672 175 if (pdev->bin_rec_pos == (TuningBinRecSize - 1) && timing == 1)
charlesmn 0:3ac96e360672 176 pdev->bin_rec_pos = 0;
charlesmn 0:3ac96e360672 177 else if (timing == 1)
charlesmn 0:3ac96e360672 178 pdev->bin_rec_pos++;
charlesmn 0:3ac96e360672 179
charlesmn 0:3ac96e360672 180 if (!((recom_been_reset == 1) && (timing == 0)) &&
charlesmn 0:3ac96e360672 181 (pdev->pos_before_next_recom == 0)) {
charlesmn 0:3ac96e360672 182
charlesmn 0:3ac96e360672 183 for (bin = 0; bin < BuffSize; bin++)
charlesmn 0:3ac96e360672 184 pdata->bin_data[bin] = 0;
charlesmn 0:3ac96e360672 185
charlesmn 0:3ac96e360672 186 for (bin = 0; bin < BuffSize; bin++)
charlesmn 0:3ac96e360672 187 for (i = 0; i < TuningBinRecSize; i++)
charlesmn 0:3ac96e360672 188 pdata->bin_data[bin] +=
charlesmn 0:3ac96e360672 189 (pdev->multi_bins_rec[i][timing][bin]);
charlesmn 0:3ac96e360672 190 }
charlesmn 0:3ac96e360672 191 } else {
charlesmn 0:3ac96e360672 192
charlesmn 0:3ac96e360672 193 pdev->pos_before_next_recom--;
charlesmn 0:3ac96e360672 194 if (pdev->pos_before_next_recom == 255)
charlesmn 0:3ac96e360672 195 pdev->pos_before_next_recom = 0;
charlesmn 0:3ac96e360672 196 }
charlesmn 0:3ac96e360672 197 }
charlesmn 0:3ac96e360672 198
charlesmn 0:3ac96e360672 199 VL53L1_Error VL53L1_load_patch(
charlesmn 0:3ac96e360672 200 VL53L1_DEV Dev) {
charlesmn 0:3ac96e360672 201 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 202 int32_t patch_tuning = 0;
charlesmn 0:3ac96e360672 203 uint8_t comms_buffer[256];
charlesmn 0:3ac96e360672 204 uint32_t patch_power;
charlesmn 0:3ac96e360672 205
charlesmn 0:3ac96e360672 206 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 207
charlesmn 0:3ac96e360672 208 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 209 status = VL53L1_WrByte(Dev,
charlesmn 0:3ac96e360672 210 VL53L1_FIRMWARE__ENABLE, 0x00);
charlesmn 0:3ac96e360672 211
charlesmn 0:3ac96e360672 212 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 213 VL53L1_enable_powerforce(Dev);
charlesmn 0:3ac96e360672 214
charlesmn 0:3ac96e360672 215 VL53L1_get_tuning_parm(Dev, VL53L1_TUNINGPARM_PHASECAL_PATCH_POWER,
charlesmn 0:3ac96e360672 216 &patch_tuning);
charlesmn 0:3ac96e360672 217
charlesmn 0:3ac96e360672 218 switch (patch_tuning) {
charlesmn 0:3ac96e360672 219 case 0:
charlesmn 0:3ac96e360672 220 patch_power = 0x00;
charlesmn 0:3ac96e360672 221 break;
charlesmn 0:3ac96e360672 222 case 1:
charlesmn 0:3ac96e360672 223 patch_power = 0x10;
charlesmn 0:3ac96e360672 224 break;
charlesmn 0:3ac96e360672 225 case 2:
charlesmn 0:3ac96e360672 226 patch_power = 0x20;
charlesmn 0:3ac96e360672 227 break;
charlesmn 0:3ac96e360672 228 case 3:
charlesmn 0:3ac96e360672 229 patch_power = 0x40;
charlesmn 0:3ac96e360672 230 break;
charlesmn 0:3ac96e360672 231 default:
charlesmn 0:3ac96e360672 232 patch_power = 0x00;
charlesmn 0:3ac96e360672 233 }
charlesmn 0:3ac96e360672 234
charlesmn 0:3ac96e360672 235 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 236
charlesmn 0:3ac96e360672 237 comms_buffer[0] = 0x29;
charlesmn 0:3ac96e360672 238 comms_buffer[1] = 0xC9;
charlesmn 0:3ac96e360672 239 comms_buffer[2] = 0x0E;
charlesmn 0:3ac96e360672 240 comms_buffer[3] = 0x40;
charlesmn 0:3ac96e360672 241 comms_buffer[4] = 0x28;
charlesmn 0:3ac96e360672 242 comms_buffer[5] = patch_power;
charlesmn 0:3ac96e360672 243
charlesmn 0:3ac96e360672 244 status = VL53L1_WriteMulti(Dev,
charlesmn 0:3ac96e360672 245 VL53L1_PATCH__OFFSET_0, comms_buffer, 6);
charlesmn 0:3ac96e360672 246 }
charlesmn 0:3ac96e360672 247
charlesmn 0:3ac96e360672 248 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 249 comms_buffer[0] = 0x03;
charlesmn 0:3ac96e360672 250 comms_buffer[1] = 0x6D;
charlesmn 0:3ac96e360672 251 comms_buffer[2] = 0x03;
charlesmn 0:3ac96e360672 252 comms_buffer[3] = 0x6F;
charlesmn 0:3ac96e360672 253 comms_buffer[4] = 0x07;
charlesmn 0:3ac96e360672 254 comms_buffer[5] = 0x29;
charlesmn 0:3ac96e360672 255 status = VL53L1_WriteMulti(Dev,
charlesmn 0:3ac96e360672 256 VL53L1_PATCH__ADDRESS_0, comms_buffer, 6);
charlesmn 0:3ac96e360672 257 }
charlesmn 0:3ac96e360672 258
charlesmn 0:3ac96e360672 259 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 260 comms_buffer[0] = 0x00;
charlesmn 0:3ac96e360672 261 comms_buffer[1] = 0x07;
charlesmn 0:3ac96e360672 262 status = VL53L1_WriteMulti(Dev,
charlesmn 0:3ac96e360672 263 VL53L1_PATCH__JMP_ENABLES, comms_buffer, 2);
charlesmn 0:3ac96e360672 264 }
charlesmn 0:3ac96e360672 265
charlesmn 0:3ac96e360672 266 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 267 comms_buffer[0] = 0x00;
charlesmn 0:3ac96e360672 268 comms_buffer[1] = 0x07;
charlesmn 0:3ac96e360672 269 status = VL53L1_WriteMulti(Dev,
charlesmn 0:3ac96e360672 270 VL53L1_PATCH__DATA_ENABLES, comms_buffer, 2);
charlesmn 0:3ac96e360672 271 }
charlesmn 0:3ac96e360672 272
charlesmn 0:3ac96e360672 273 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 274 status = VL53L1_WrByte(Dev,
charlesmn 0:3ac96e360672 275 VL53L1_PATCH__CTRL, 0x01);
charlesmn 0:3ac96e360672 276
charlesmn 0:3ac96e360672 277 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 278 status = VL53L1_WrByte(Dev,
charlesmn 0:3ac96e360672 279 VL53L1_FIRMWARE__ENABLE, 0x01);
charlesmn 0:3ac96e360672 280
charlesmn 0:3ac96e360672 281 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 282
charlesmn 0:3ac96e360672 283 return status;
charlesmn 0:3ac96e360672 284 }
charlesmn 0:3ac96e360672 285
charlesmn 0:3ac96e360672 286 VL53L1_Error VL53L1_unload_patch(
charlesmn 0:3ac96e360672 287 VL53L1_DEV Dev) {
charlesmn 0:3ac96e360672 288 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 289
charlesmn 0:3ac96e360672 290 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 291 status = VL53L1_WrByte(Dev,
charlesmn 0:3ac96e360672 292 VL53L1_FIRMWARE__ENABLE, 0x00);
charlesmn 0:3ac96e360672 293
charlesmn 0:3ac96e360672 294 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 295 VL53L1_disable_powerforce(Dev);
charlesmn 0:3ac96e360672 296
charlesmn 0:3ac96e360672 297 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 298 status = VL53L1_WrByte(Dev,
charlesmn 0:3ac96e360672 299 VL53L1_PATCH__CTRL, 0x00);
charlesmn 0:3ac96e360672 300
charlesmn 0:3ac96e360672 301 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 302 status = VL53L1_WrByte(Dev,
charlesmn 0:3ac96e360672 303 VL53L1_FIRMWARE__ENABLE, 0x01);
charlesmn 0:3ac96e360672 304
charlesmn 0:3ac96e360672 305 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 306
charlesmn 0:3ac96e360672 307 return status;
charlesmn 0:3ac96e360672 308 }
charlesmn 0:3ac96e360672 309
charlesmn 0:3ac96e360672 310 VL53L1_Error VL53L1_get_version(
charlesmn 0:3ac96e360672 311 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 312 VL53L1_ll_version_t *pdata)
charlesmn 0:3ac96e360672 313 {
charlesmn 0:3ac96e360672 314
charlesmn 0:3ac96e360672 315
charlesmn 0:3ac96e360672 316 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 317
charlesmn 0:3ac96e360672 318 VL53L1_init_version(Dev);
charlesmn 0:3ac96e360672 319
charlesmn 0:3ac96e360672 320 memcpy(pdata, &(pdev->version), sizeof(VL53L1_ll_version_t));
charlesmn 0:3ac96e360672 321
charlesmn 0:3ac96e360672 322 return VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 323 }
charlesmn 0:3ac96e360672 324
charlesmn 0:3ac96e360672 325
charlesmn 0:3ac96e360672 326 VL53L1_Error VL53L1_get_device_firmware_version(
charlesmn 0:3ac96e360672 327 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 328 uint16_t *pfw_version)
charlesmn 0:3ac96e360672 329 {
charlesmn 0:3ac96e360672 330
charlesmn 0:3ac96e360672 331
charlesmn 0:3ac96e360672 332 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 333
charlesmn 0:3ac96e360672 334 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 335
charlesmn 0:3ac96e360672 336 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 337 status = VL53L1_disable_firmware(Dev);
charlesmn 0:3ac96e360672 338
charlesmn 0:3ac96e360672 339 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 340 status = VL53L1_RdWord(
charlesmn 0:3ac96e360672 341 Dev,
charlesmn 0:3ac96e360672 342 VL53L1_MCU_GENERAL_PURPOSE__GP_0,
charlesmn 0:3ac96e360672 343 pfw_version);
charlesmn 0:3ac96e360672 344
charlesmn 0:3ac96e360672 345 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 346 status = VL53L1_enable_firmware(Dev);
charlesmn 0:3ac96e360672 347
charlesmn 0:3ac96e360672 348 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 349
charlesmn 0:3ac96e360672 350 return status;
charlesmn 0:3ac96e360672 351 }
charlesmn 0:3ac96e360672 352
charlesmn 0:3ac96e360672 353
charlesmn 0:3ac96e360672 354 VL53L1_Error VL53L1_data_init(
charlesmn 0:3ac96e360672 355 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 356 uint8_t read_p2p_data)
charlesmn 0:3ac96e360672 357 {
charlesmn 0:3ac96e360672 358
charlesmn 0:3ac96e360672 359
charlesmn 0:3ac96e360672 360 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 361 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 362 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 363 VL53L1_LLDriverResults_t *pres =
charlesmn 0:3ac96e360672 364 VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn 0:3ac96e360672 365
charlesmn 0:3ac96e360672 366
charlesmn 0:3ac96e360672 367
charlesmn 0:3ac96e360672 368 VL53L1_zone_objects_t *pobjects;
charlesmn 0:3ac96e360672 369
charlesmn 0:3ac96e360672 370 uint8_t i = 0;
charlesmn 0:3ac96e360672 371
charlesmn 0:3ac96e360672 372 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 373
charlesmn 0:3ac96e360672 374 VL53L1_init_ll_driver_state(
charlesmn 0:3ac96e360672 375 Dev,
charlesmn 0:3ac96e360672 376 VL53L1_DEVICESTATE_UNKNOWN);
charlesmn 0:3ac96e360672 377
charlesmn 0:3ac96e360672 378 pres->range_results.max_results = VL53L1_MAX_RANGE_RESULTS;
charlesmn 0:3ac96e360672 379 pres->range_results.active_results = 0;
charlesmn 0:3ac96e360672 380 pres->zone_results.max_zones = VL53L1_MAX_USER_ZONES;
charlesmn 0:3ac96e360672 381 pres->zone_results.active_zones = 0;
charlesmn 0:3ac96e360672 382
charlesmn 0:3ac96e360672 383 for (i = 0; i < VL53L1_MAX_USER_ZONES; i++) {
charlesmn 0:3ac96e360672 384 pobjects = &(pres->zone_results.VL53L1_p_002[i]);
charlesmn 0:3ac96e360672 385 pobjects->xmonitor.VL53L1_p_020 = 0;
charlesmn 0:3ac96e360672 386 pobjects->xmonitor.VL53L1_p_021 = 0;
charlesmn 0:3ac96e360672 387 pobjects->xmonitor.VL53L1_p_014 = 0;
charlesmn 0:3ac96e360672 388 pobjects->xmonitor.range_status =
charlesmn 0:3ac96e360672 389 VL53L1_DEVICEERROR_NOUPDATE;
charlesmn 0:3ac96e360672 390 }
charlesmn 0:3ac96e360672 391
charlesmn 0:3ac96e360672 392
charlesmn 0:3ac96e360672 393
charlesmn 0:3ac96e360672 394 pres->zone_hists.max_zones = VL53L1_MAX_USER_ZONES;
charlesmn 0:3ac96e360672 395 pres->zone_hists.active_zones = 0;
charlesmn 0:3ac96e360672 396
charlesmn 0:3ac96e360672 397
charlesmn 0:3ac96e360672 398
charlesmn 0:3ac96e360672 399 pres->zone_cal.max_zones = VL53L1_MAX_USER_ZONES;
charlesmn 0:3ac96e360672 400 pres->zone_cal.active_zones = 0;
charlesmn 0:3ac96e360672 401 for (i = 0; i < VL53L1_MAX_USER_ZONES; i++) {
charlesmn 0:3ac96e360672 402 pres->zone_cal.VL53L1_p_002[i].no_of_samples = 0;
charlesmn 0:3ac96e360672 403 pres->zone_cal.VL53L1_p_002[i].effective_spads = 0;
charlesmn 0:3ac96e360672 404 pres->zone_cal.VL53L1_p_002[i].peak_rate_mcps = 0;
charlesmn 0:3ac96e360672 405 pres->zone_cal.VL53L1_p_002[i].median_range_mm = 0;
charlesmn 0:3ac96e360672 406 pres->zone_cal.VL53L1_p_002[i].range_mm_offset = 0;
charlesmn 0:3ac96e360672 407 }
charlesmn 0:3ac96e360672 408
charlesmn 0:3ac96e360672 409 pdev->wait_method = VL53L1_WAIT_METHOD_BLOCKING;
charlesmn 0:3ac96e360672 410 pdev->preset_mode = VL53L1_DEVICEPRESETMODE_STANDARD_RANGING;
charlesmn 0:3ac96e360672 411 pdev->zone_preset = VL53L1_DEVICEZONEPRESET_NONE;
charlesmn 0:3ac96e360672 412 pdev->measurement_mode = VL53L1_DEVICEMEASUREMENTMODE_STOP;
charlesmn 0:3ac96e360672 413
charlesmn 0:3ac96e360672 414 pdev->offset_calibration_mode =
charlesmn 0:3ac96e360672 415 VL53L1_OFFSETCALIBRATIONMODE__MM1_MM2__STANDARD;
charlesmn 0:3ac96e360672 416 pdev->offset_correction_mode =
charlesmn 0:3ac96e360672 417 VL53L1_OFFSETCORRECTIONMODE__MM1_MM2_OFFSETS;
charlesmn 0:3ac96e360672 418 pdev->dmax_mode =
charlesmn 0:3ac96e360672 419 VL53L1_DEVICEDMAXMODE__FMT_CAL_DATA;
charlesmn 0:3ac96e360672 420
charlesmn 0:3ac96e360672 421 pdev->phasecal_config_timeout_us = 1000;
charlesmn 0:3ac96e360672 422 pdev->mm_config_timeout_us = 2000;
charlesmn 0:3ac96e360672 423 pdev->range_config_timeout_us = 13000;
charlesmn 0:3ac96e360672 424 pdev->inter_measurement_period_ms = 100;
charlesmn 0:3ac96e360672 425 pdev->dss_config__target_total_rate_mcps = 0x0A00;
charlesmn 0:3ac96e360672 426 pdev->debug_mode = 0x00;
charlesmn 0:3ac96e360672 427
charlesmn 0:3ac96e360672 428 pdev->offset_results.max_results = VL53L1_MAX_OFFSET_RANGE_RESULTS;
charlesmn 0:3ac96e360672 429 pdev->offset_results.active_results = 0;
charlesmn 0:3ac96e360672 430
charlesmn 0:3ac96e360672 431
charlesmn 0:3ac96e360672 432
charlesmn 0:3ac96e360672 433 pdev->gain_cal.standard_ranging_gain_factor =
charlesmn 0:3ac96e360672 434 VL53L1_TUNINGPARM_LITE_RANGING_GAIN_FACTOR_DEFAULT;
charlesmn 0:3ac96e360672 435 pdev->gain_cal.histogram_ranging_gain_factor =
charlesmn 0:3ac96e360672 436 VL53L1_TUNINGPARM_HIST_GAIN_FACTOR_DEFAULT;
charlesmn 0:3ac96e360672 437
charlesmn 0:3ac96e360672 438
charlesmn 0:3ac96e360672 439 VL53L1_init_version(Dev);
charlesmn 0:3ac96e360672 440
charlesmn 0:3ac96e360672 441
charlesmn 0:3ac96e360672 442 memset(pdev->multi_bins_rec, 0, sizeof(pdev->multi_bins_rec));
charlesmn 0:3ac96e360672 443 pdev->bin_rec_pos = 0;
charlesmn 0:3ac96e360672 444 pdev->pos_before_next_recom = 0;
charlesmn 0:3ac96e360672 445
charlesmn 0:3ac96e360672 446
charlesmn 0:3ac96e360672 447
charlesmn 0:3ac96e360672 448 if (read_p2p_data > 0 && status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 449 status = VL53L1_read_p2p_data(Dev);
charlesmn 0:3ac96e360672 450
charlesmn 0:3ac96e360672 451
charlesmn 0:3ac96e360672 452 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 453 status = VL53L1_init_refspadchar_config_struct(
charlesmn 0:3ac96e360672 454 &(pdev->refspadchar));
charlesmn 0:3ac96e360672 455
charlesmn 0:3ac96e360672 456
charlesmn 0:3ac96e360672 457 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 458 status = VL53L1_init_ssc_config_struct(
charlesmn 0:3ac96e360672 459 &(pdev->ssc_cfg));
charlesmn 0:3ac96e360672 460
charlesmn 0:3ac96e360672 461
charlesmn 0:3ac96e360672 462 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 463 status = VL53L1_init_xtalk_config_struct(
charlesmn 0:3ac96e360672 464 &(pdev->customer),
charlesmn 0:3ac96e360672 465 &(pdev->xtalk_cfg));
charlesmn 0:3ac96e360672 466
charlesmn 0:3ac96e360672 467
charlesmn 0:3ac96e360672 468 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 469 status = VL53L1_init_xtalk_extract_config_struct(
charlesmn 0:3ac96e360672 470 &(pdev->xtalk_extract_cfg));
charlesmn 0:3ac96e360672 471
charlesmn 0:3ac96e360672 472
charlesmn 0:3ac96e360672 473 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 474 status = VL53L1_init_offset_cal_config_struct(
charlesmn 0:3ac96e360672 475 &(pdev->offsetcal_cfg));
charlesmn 0:3ac96e360672 476
charlesmn 0:3ac96e360672 477
charlesmn 0:3ac96e360672 478 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 479 status = VL53L1_init_zone_cal_config_struct(
charlesmn 0:3ac96e360672 480 &(pdev->zonecal_cfg));
charlesmn 0:3ac96e360672 481
charlesmn 0:3ac96e360672 482
charlesmn 0:3ac96e360672 483 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 484 status = VL53L1_init_hist_post_process_config_struct(
charlesmn 0:3ac96e360672 485 pdev->xtalk_cfg.global_crosstalk_compensation_enable,
charlesmn 0:3ac96e360672 486 &(pdev->histpostprocess));
charlesmn 0:3ac96e360672 487
charlesmn 0:3ac96e360672 488
charlesmn 0:3ac96e360672 489 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 490 status = VL53L1_init_hist_gen3_dmax_config_struct(
charlesmn 0:3ac96e360672 491 &(pdev->dmax_cfg));
charlesmn 0:3ac96e360672 492
charlesmn 0:3ac96e360672 493
charlesmn 0:3ac96e360672 494 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 495 status = VL53L1_init_tuning_parm_storage_struct(
charlesmn 0:3ac96e360672 496 &(pdev->tuning_parms));
charlesmn 0:3ac96e360672 497
charlesmn 0:3ac96e360672 498
charlesmn 0:3ac96e360672 499
charlesmn 0:3ac96e360672 500 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 501 status = VL53L1_set_preset_mode(
charlesmn 0:3ac96e360672 502 Dev,
charlesmn 0:3ac96e360672 503 pdev->preset_mode,
charlesmn 0:3ac96e360672 504 pdev->dss_config__target_total_rate_mcps,
charlesmn 0:3ac96e360672 505 pdev->phasecal_config_timeout_us,
charlesmn 0:3ac96e360672 506 pdev->mm_config_timeout_us,
charlesmn 0:3ac96e360672 507 pdev->range_config_timeout_us,
charlesmn 0:3ac96e360672 508 pdev->inter_measurement_period_ms);
charlesmn 0:3ac96e360672 509
charlesmn 0:3ac96e360672 510
charlesmn 0:3ac96e360672 511 VL53L1_init_histogram_bin_data_struct(
charlesmn 0:3ac96e360672 512 0,
charlesmn 0:3ac96e360672 513 VL53L1_HISTOGRAM_BUFFER_SIZE,
charlesmn 0:3ac96e360672 514 &(pdev->hist_data));
charlesmn 0:3ac96e360672 515
charlesmn 0:3ac96e360672 516 VL53L1_init_histogram_bin_data_struct(
charlesmn 0:3ac96e360672 517 0,
charlesmn 0:3ac96e360672 518 VL53L1_HISTOGRAM_BUFFER_SIZE,
charlesmn 0:3ac96e360672 519 &(pdev->hist_xtalk));
charlesmn 0:3ac96e360672 520
charlesmn 0:3ac96e360672 521
charlesmn 0:3ac96e360672 522 VL53L1_init_xtalk_bin_data_struct(
charlesmn 0:3ac96e360672 523 0,
charlesmn 0:3ac96e360672 524 VL53L1_XTALK_HISTO_BINS,
charlesmn 0:3ac96e360672 525 &(pdev->xtalk_shapes.xtalk_shape));
charlesmn 0:3ac96e360672 526
charlesmn 0:3ac96e360672 527
charlesmn 0:3ac96e360672 528
charlesmn 0:3ac96e360672 529 VL53L1_xtalk_cal_data_init(
charlesmn 0:3ac96e360672 530 Dev
charlesmn 0:3ac96e360672 531 );
charlesmn 0:3ac96e360672 532
charlesmn 0:3ac96e360672 533
charlesmn 0:3ac96e360672 534
charlesmn 0:3ac96e360672 535 VL53L1_dynamic_xtalk_correction_data_init(
charlesmn 0:3ac96e360672 536 Dev
charlesmn 0:3ac96e360672 537 );
charlesmn 0:3ac96e360672 538
charlesmn 0:3ac96e360672 539
charlesmn 0:3ac96e360672 540
charlesmn 0:3ac96e360672 541 VL53L1_low_power_auto_data_init(
charlesmn 0:3ac96e360672 542 Dev
charlesmn 0:3ac96e360672 543 );
charlesmn 0:3ac96e360672 544
charlesmn 0:3ac96e360672 545 #ifdef VL53L1_LOG_ENABLE
charlesmn 0:3ac96e360672 546
charlesmn 0:3ac96e360672 547
charlesmn 0:3ac96e360672 548
charlesmn 0:3ac96e360672 549 VL53L1_print_static_nvm_managed(
charlesmn 0:3ac96e360672 550 &(pdev->stat_nvm),
charlesmn 0:3ac96e360672 551 "data_init():pdev->lldata.stat_nvm.",
charlesmn 0:3ac96e360672 552 VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn 0:3ac96e360672 553
charlesmn 0:3ac96e360672 554 VL53L1_print_customer_nvm_managed(
charlesmn 0:3ac96e360672 555 &(pdev->customer),
charlesmn 0:3ac96e360672 556 "data_init():pdev->lldata.customer.",
charlesmn 0:3ac96e360672 557 VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn 0:3ac96e360672 558
charlesmn 0:3ac96e360672 559 VL53L1_print_nvm_copy_data(
charlesmn 0:3ac96e360672 560 &(pdev->nvm_copy_data),
charlesmn 0:3ac96e360672 561 "data_init():pdev->lldata.nvm_copy_data.",
charlesmn 0:3ac96e360672 562 VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn 0:3ac96e360672 563
charlesmn 0:3ac96e360672 564 VL53L1_print_dmax_calibration_data(
charlesmn 0:3ac96e360672 565 &(pdev->fmt_dmax_cal),
charlesmn 0:3ac96e360672 566 "data_init():pdev->lldata.fmt_dmax_cal.",
charlesmn 0:3ac96e360672 567 VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn 0:3ac96e360672 568
charlesmn 0:3ac96e360672 569 VL53L1_print_dmax_calibration_data(
charlesmn 0:3ac96e360672 570 &(pdev->cust_dmax_cal),
charlesmn 0:3ac96e360672 571 "data_init():pdev->lldata.cust_dmax_cal.",
charlesmn 0:3ac96e360672 572 VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn 0:3ac96e360672 573
charlesmn 0:3ac96e360672 574 VL53L1_print_additional_offset_cal_data(
charlesmn 0:3ac96e360672 575 &(pdev->add_off_cal_data),
charlesmn 0:3ac96e360672 576 "data_init():pdev->lldata.add_off_cal_data.",
charlesmn 0:3ac96e360672 577 VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn 0:3ac96e360672 578
charlesmn 0:3ac96e360672 579 VL53L1_print_user_zone(
charlesmn 0:3ac96e360672 580 &(pdev->mm_roi),
charlesmn 0:3ac96e360672 581 "data_init():pdev->lldata.mm_roi.",
charlesmn 0:3ac96e360672 582 VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn 0:3ac96e360672 583
charlesmn 0:3ac96e360672 584 VL53L1_print_optical_centre(
charlesmn 0:3ac96e360672 585 &(pdev->optical_centre),
charlesmn 0:3ac96e360672 586 "data_init():pdev->lldata.optical_centre.",
charlesmn 0:3ac96e360672 587 VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn 0:3ac96e360672 588
charlesmn 0:3ac96e360672 589 VL53L1_print_cal_peak_rate_map(
charlesmn 0:3ac96e360672 590 &(pdev->cal_peak_rate_map),
charlesmn 0:3ac96e360672 591 "data_init():pdev->lldata.cal_peak_rate_map.",
charlesmn 0:3ac96e360672 592 VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn 0:3ac96e360672 593
charlesmn 0:3ac96e360672 594 #endif
charlesmn 0:3ac96e360672 595
charlesmn 0:3ac96e360672 596 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 597
charlesmn 0:3ac96e360672 598 return status;
charlesmn 0:3ac96e360672 599 }
charlesmn 0:3ac96e360672 600
charlesmn 0:3ac96e360672 601
charlesmn 0:3ac96e360672 602 VL53L1_Error VL53L1_read_p2p_data(
charlesmn 0:3ac96e360672 603 VL53L1_DEV Dev)
charlesmn 0:3ac96e360672 604 {
charlesmn 0:3ac96e360672 605
charlesmn 0:3ac96e360672 606
charlesmn 0:3ac96e360672 607
charlesmn 0:3ac96e360672 608 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 609 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 610 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn 0:3ac96e360672 611 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer);
charlesmn 0:3ac96e360672 612 VL53L1_additional_offset_cal_data_t *pCD = &(pdev->add_off_cal_data);
charlesmn 0:3ac96e360672 613
charlesmn 0:3ac96e360672 614 VL53L1_decoded_nvm_fmt_range_data_t fmt_rrd;
lugandc 18:0696efe39d08 615 uint8_t i, VL53L1_p_001, count;
charlesmn 0:3ac96e360672 616
charlesmn 0:3ac96e360672 617 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 618
lugandc 18:0696efe39d08 619 pdev->fmt_total_enabled_spads = 256;
lugandc 18:0696efe39d08 620
charlesmn 0:3ac96e360672 621 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 622 status = VL53L1_get_static_nvm_managed(
charlesmn 0:3ac96e360672 623 Dev,
charlesmn 0:3ac96e360672 624 &(pdev->stat_nvm));
charlesmn 0:3ac96e360672 625
charlesmn 0:3ac96e360672 626 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 627 status = VL53L1_get_customer_nvm_managed(
charlesmn 0:3ac96e360672 628 Dev,
charlesmn 0:3ac96e360672 629 &(pdev->customer));
charlesmn 0:3ac96e360672 630
charlesmn 0:3ac96e360672 631 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 632
charlesmn 0:3ac96e360672 633 status = VL53L1_get_nvm_copy_data(
charlesmn 0:3ac96e360672 634 Dev,
charlesmn 0:3ac96e360672 635 &(pdev->nvm_copy_data));
charlesmn 0:3ac96e360672 636
charlesmn 0:3ac96e360672 637
lugandc 18:0696efe39d08 638 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 639 VL53L1_copy_rtn_good_spads_to_buffer(
charlesmn 0:3ac96e360672 640 &(pdev->nvm_copy_data),
charlesmn 0:3ac96e360672 641 &(pdev->rtn_good_spads[0]));
lugandc 18:0696efe39d08 642 pdev->fmt_total_enabled_spads = 0;
lugandc 18:0696efe39d08 643 for (i = 0; i < 32; i++) {
lugandc 18:0696efe39d08 644 VL53L1_p_001 = pdev->rtn_good_spads[i];
lugandc 18:0696efe39d08 645 count = 0;
lugandc 18:0696efe39d08 646 while(VL53L1_p_001) {
lugandc 18:0696efe39d08 647 count += VL53L1_p_001&1;
lugandc 18:0696efe39d08 648 VL53L1_p_001 = VL53L1_p_001>>1;
lugandc 18:0696efe39d08 649 }
lugandc 18:0696efe39d08 650 pdev->fmt_total_enabled_spads += count;
lugandc 18:0696efe39d08 651 }
lugandc 18:0696efe39d08 652 }
charlesmn 0:3ac96e360672 653 }
charlesmn 0:3ac96e360672 654
charlesmn 0:3ac96e360672 655
charlesmn 0:3ac96e360672 656
charlesmn 0:3ac96e360672 657 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 658 pHP->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 659 pN->algo__crosstalk_compensation_plane_offset_kcps;
charlesmn 0:3ac96e360672 660 pHP->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 661 pN->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 662 pHP->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 663 pN->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 664 }
charlesmn 0:3ac96e360672 665
charlesmn 0:3ac96e360672 666
charlesmn 0:3ac96e360672 667 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 668 status =
charlesmn 0:3ac96e360672 669 VL53L1_read_nvm_optical_centre(
charlesmn 0:3ac96e360672 670 Dev,
charlesmn 0:3ac96e360672 671 &(pdev->optical_centre));
charlesmn 0:3ac96e360672 672
charlesmn 0:3ac96e360672 673
charlesmn 0:3ac96e360672 674
charlesmn 0:3ac96e360672 675 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 676 status =
charlesmn 0:3ac96e360672 677 VL53L1_read_nvm_cal_peak_rate_map(
charlesmn 0:3ac96e360672 678 Dev,
charlesmn 0:3ac96e360672 679 &(pdev->cal_peak_rate_map));
charlesmn 0:3ac96e360672 680
charlesmn 0:3ac96e360672 681
charlesmn 0:3ac96e360672 682
charlesmn 0:3ac96e360672 683 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 684
charlesmn 0:3ac96e360672 685 status =
charlesmn 0:3ac96e360672 686 VL53L1_read_nvm_additional_offset_cal_data(
charlesmn 0:3ac96e360672 687 Dev,
charlesmn 0:3ac96e360672 688 &(pdev->add_off_cal_data));
charlesmn 0:3ac96e360672 689
charlesmn 0:3ac96e360672 690
charlesmn 0:3ac96e360672 691
charlesmn 0:3ac96e360672 692 if (pCD->result__mm_inner_peak_signal_count_rtn_mcps == 0 &&
charlesmn 0:3ac96e360672 693 pCD->result__mm_outer_peak_signal_count_rtn_mcps == 0) {
charlesmn 0:3ac96e360672 694
charlesmn 0:3ac96e360672 695 pCD->result__mm_inner_peak_signal_count_rtn_mcps
charlesmn 0:3ac96e360672 696 = 0x0080;
charlesmn 0:3ac96e360672 697 pCD->result__mm_outer_peak_signal_count_rtn_mcps
charlesmn 0:3ac96e360672 698 = 0x0180;
charlesmn 0:3ac96e360672 699
charlesmn 0:3ac96e360672 700
charlesmn 0:3ac96e360672 701
charlesmn 0:3ac96e360672 702 VL53L1_calc_mm_effective_spads(
charlesmn 0:3ac96e360672 703 pdev->nvm_copy_data.roi_config__mode_roi_centre_spad,
charlesmn 0:3ac96e360672 704 pdev->nvm_copy_data.roi_config__mode_roi_xy_size,
charlesmn 0:3ac96e360672 705 0xC7,
charlesmn 0:3ac96e360672 706 0xFF,
charlesmn 0:3ac96e360672 707 &(pdev->rtn_good_spads[0]),
charlesmn 0:3ac96e360672 708 VL53L1_RTN_SPAD_APERTURE_TRANSMISSION,
charlesmn 0:3ac96e360672 709 &(pCD->result__mm_inner_actual_effective_spads),
charlesmn 0:3ac96e360672 710 &(pCD->result__mm_outer_actual_effective_spads));
charlesmn 0:3ac96e360672 711 }
charlesmn 0:3ac96e360672 712 }
charlesmn 0:3ac96e360672 713
charlesmn 0:3ac96e360672 714
charlesmn 0:3ac96e360672 715 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 716
charlesmn 0:3ac96e360672 717 status =
charlesmn 0:3ac96e360672 718 VL53L1_read_nvm_fmt_range_results_data(
charlesmn 0:3ac96e360672 719 Dev,
charlesmn 0:3ac96e360672 720 VL53L1_NVM__FMT__RANGE_RESULTS__140MM_DARK,
charlesmn 0:3ac96e360672 721 &fmt_rrd);
charlesmn 0:3ac96e360672 722
charlesmn 0:3ac96e360672 723 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 724 pdev->fmt_dmax_cal.ref__actual_effective_spads =
charlesmn 0:3ac96e360672 725 fmt_rrd.result__actual_effective_rtn_spads;
charlesmn 0:3ac96e360672 726 pdev->fmt_dmax_cal.ref__peak_signal_count_rate_mcps =
charlesmn 0:3ac96e360672 727 fmt_rrd.result__peak_signal_count_rate_rtn_mcps;
charlesmn 0:3ac96e360672 728 pdev->fmt_dmax_cal.ref__distance_mm =
charlesmn 0:3ac96e360672 729 fmt_rrd.measured_distance_mm;
charlesmn 0:3ac96e360672 730
charlesmn 0:3ac96e360672 731
charlesmn 0:3ac96e360672 732 if (pdev->cal_peak_rate_map.cal_reflectance_pc != 0) {
charlesmn 0:3ac96e360672 733 pdev->fmt_dmax_cal.ref_reflectance_pc =
charlesmn 0:3ac96e360672 734 pdev->cal_peak_rate_map.cal_reflectance_pc;
charlesmn 0:3ac96e360672 735 } else {
charlesmn 0:3ac96e360672 736 pdev->fmt_dmax_cal.ref_reflectance_pc = 0x0014;
charlesmn 0:3ac96e360672 737 }
charlesmn 0:3ac96e360672 738
charlesmn 0:3ac96e360672 739
charlesmn 0:3ac96e360672 740 pdev->fmt_dmax_cal.coverglass_transmission = 0x0100;
charlesmn 0:3ac96e360672 741 }
charlesmn 0:3ac96e360672 742 }
charlesmn 0:3ac96e360672 743
charlesmn 0:3ac96e360672 744
charlesmn 0:3ac96e360672 745 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 746 status =
charlesmn 0:3ac96e360672 747 VL53L1_RdWord(
charlesmn 0:3ac96e360672 748 Dev,
charlesmn 0:3ac96e360672 749 VL53L1_RESULT__OSC_CALIBRATE_VAL,
charlesmn 0:3ac96e360672 750 &(pdev->dbg_results.result__osc_calibrate_val));
charlesmn 0:3ac96e360672 751
charlesmn 0:3ac96e360672 752
charlesmn 0:3ac96e360672 753
charlesmn 0:3ac96e360672 754 if (pdev->stat_nvm.osc_measured__fast_osc__frequency < 0x1000) {
charlesmn 0:3ac96e360672 755 trace_print(
charlesmn 0:3ac96e360672 756 VL53L1_TRACE_LEVEL_WARNING,
charlesmn 0:3ac96e360672 757 "\nInvalid %s value (0x%04X) - forcing to 0x%04X\n\n",
charlesmn 0:3ac96e360672 758 "pdev->stat_nvm.osc_measured__fast_osc__frequency",
charlesmn 0:3ac96e360672 759 pdev->stat_nvm.osc_measured__fast_osc__frequency,
charlesmn 0:3ac96e360672 760 0xBCCC);
charlesmn 0:3ac96e360672 761 pdev->stat_nvm.osc_measured__fast_osc__frequency = 0xBCCC;
charlesmn 0:3ac96e360672 762 }
charlesmn 0:3ac96e360672 763
charlesmn 0:3ac96e360672 764
charlesmn 0:3ac96e360672 765
charlesmn 0:3ac96e360672 766 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 767 status =
charlesmn 0:3ac96e360672 768 VL53L1_get_mode_mitigation_roi(
charlesmn 0:3ac96e360672 769 Dev,
charlesmn 0:3ac96e360672 770 &(pdev->mm_roi));
charlesmn 0:3ac96e360672 771
charlesmn 0:3ac96e360672 772
charlesmn 0:3ac96e360672 773
charlesmn 0:3ac96e360672 774 if (pdev->optical_centre.x_centre == 0 &&
charlesmn 0:3ac96e360672 775 pdev->optical_centre.y_centre == 0) {
charlesmn 0:3ac96e360672 776 pdev->optical_centre.x_centre =
charlesmn 0:3ac96e360672 777 pdev->mm_roi.x_centre << 4;
charlesmn 0:3ac96e360672 778 pdev->optical_centre.y_centre =
charlesmn 0:3ac96e360672 779 pdev->mm_roi.y_centre << 4;
charlesmn 0:3ac96e360672 780 }
charlesmn 0:3ac96e360672 781
charlesmn 0:3ac96e360672 782 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 783
charlesmn 0:3ac96e360672 784 return status;
charlesmn 0:3ac96e360672 785 }
charlesmn 0:3ac96e360672 786
charlesmn 0:3ac96e360672 787
charlesmn 0:3ac96e360672 788 VL53L1_Error VL53L1_software_reset(
charlesmn 0:3ac96e360672 789 VL53L1_DEV Dev)
charlesmn 0:3ac96e360672 790 {
charlesmn 0:3ac96e360672 791
charlesmn 0:3ac96e360672 792
charlesmn 0:3ac96e360672 793 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 794
charlesmn 0:3ac96e360672 795 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 796
charlesmn 0:3ac96e360672 797
charlesmn 0:3ac96e360672 798 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 799 status = VL53L1_WrByte(
charlesmn 0:3ac96e360672 800 Dev,
charlesmn 0:3ac96e360672 801 VL53L1_SOFT_RESET,
charlesmn 0:3ac96e360672 802 0x00);
charlesmn 0:3ac96e360672 803
charlesmn 0:3ac96e360672 804
charlesmn 0:3ac96e360672 805 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 806 status =
charlesmn 0:3ac96e360672 807 VL53L1_WaitUs(
charlesmn 0:3ac96e360672 808 Dev,
charlesmn 0:3ac96e360672 809 VL53L1_SOFTWARE_RESET_DURATION_US);
charlesmn 0:3ac96e360672 810
charlesmn 0:3ac96e360672 811
charlesmn 0:3ac96e360672 812 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 813 status = VL53L1_WrByte(
charlesmn 0:3ac96e360672 814 Dev,
charlesmn 0:3ac96e360672 815 VL53L1_SOFT_RESET,
charlesmn 0:3ac96e360672 816 0x01);
charlesmn 0:3ac96e360672 817
charlesmn 0:3ac96e360672 818
charlesmn 0:3ac96e360672 819 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 820 status = VL53L1_wait_for_boot_completion(Dev);
charlesmn 0:3ac96e360672 821
charlesmn 0:3ac96e360672 822 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 823
charlesmn 0:3ac96e360672 824 return status;
charlesmn 0:3ac96e360672 825 }
charlesmn 0:3ac96e360672 826
charlesmn 0:3ac96e360672 827
charlesmn 0:3ac96e360672 828 VL53L1_Error VL53L1_set_part_to_part_data(
charlesmn 0:3ac96e360672 829 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 830 VL53L1_calibration_data_t *pcal_data)
charlesmn 0:3ac96e360672 831 {
charlesmn 0:3ac96e360672 832
charlesmn 0:3ac96e360672 833
charlesmn 0:3ac96e360672 834 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 835 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 836 VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg);
charlesmn 0:3ac96e360672 837 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn 0:3ac96e360672 838 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer);
charlesmn 0:3ac96e360672 839
charlesmn 0:3ac96e360672 840 uint32_t tempu32;
charlesmn 0:3ac96e360672 841
charlesmn 0:3ac96e360672 842 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 843
charlesmn 0:3ac96e360672 844 if (pcal_data->struct_version !=
charlesmn 0:3ac96e360672 845 VL53L1_LL_CALIBRATION_DATA_STRUCT_VERSION) {
charlesmn 0:3ac96e360672 846 status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn 0:3ac96e360672 847 }
charlesmn 0:3ac96e360672 848
charlesmn 0:3ac96e360672 849 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 850
charlesmn 0:3ac96e360672 851
charlesmn 0:3ac96e360672 852 memcpy(
charlesmn 0:3ac96e360672 853 &(pdev->customer),
charlesmn 0:3ac96e360672 854 &(pcal_data->customer),
charlesmn 0:3ac96e360672 855 sizeof(VL53L1_customer_nvm_managed_t));
charlesmn 0:3ac96e360672 856
charlesmn 0:3ac96e360672 857
charlesmn 0:3ac96e360672 858 memcpy(
charlesmn 0:3ac96e360672 859 &(pdev->add_off_cal_data),
charlesmn 0:3ac96e360672 860 &(pcal_data->add_off_cal_data),
charlesmn 0:3ac96e360672 861 sizeof(VL53L1_additional_offset_cal_data_t));
charlesmn 0:3ac96e360672 862
charlesmn 0:3ac96e360672 863
charlesmn 0:3ac96e360672 864 memcpy(
charlesmn 0:3ac96e360672 865 &(pdev->fmt_dmax_cal),
charlesmn 0:3ac96e360672 866 &(pcal_data->fmt_dmax_cal),
charlesmn 0:3ac96e360672 867 sizeof(VL53L1_dmax_calibration_data_t));
charlesmn 0:3ac96e360672 868
charlesmn 0:3ac96e360672 869
charlesmn 0:3ac96e360672 870 memcpy(
charlesmn 0:3ac96e360672 871 &(pdev->cust_dmax_cal),
charlesmn 0:3ac96e360672 872 &(pcal_data->cust_dmax_cal),
charlesmn 0:3ac96e360672 873 sizeof(VL53L1_dmax_calibration_data_t));
charlesmn 0:3ac96e360672 874
charlesmn 0:3ac96e360672 875
charlesmn 0:3ac96e360672 876 memcpy(
charlesmn 0:3ac96e360672 877 &(pdev->xtalk_shapes),
charlesmn 0:3ac96e360672 878 &(pcal_data->xtalkhisto),
charlesmn 0:3ac96e360672 879 sizeof(VL53L1_xtalk_histogram_data_t));
charlesmn 0:3ac96e360672 880
charlesmn 0:3ac96e360672 881
charlesmn 0:3ac96e360672 882 memcpy(
charlesmn 0:3ac96e360672 883 &(pdev->gain_cal),
charlesmn 0:3ac96e360672 884 &(pcal_data->gain_cal),
charlesmn 0:3ac96e360672 885 sizeof(VL53L1_gain_calibration_data_t));
charlesmn 0:3ac96e360672 886
charlesmn 0:3ac96e360672 887
charlesmn 0:3ac96e360672 888 memcpy(
charlesmn 0:3ac96e360672 889 &(pdev->cal_peak_rate_map),
charlesmn 0:3ac96e360672 890 &(pcal_data->cal_peak_rate_map),
charlesmn 0:3ac96e360672 891 sizeof(VL53L1_cal_peak_rate_map_t));
charlesmn 0:3ac96e360672 892
charlesmn 0:3ac96e360672 893
charlesmn 0:3ac96e360672 894 memcpy(
charlesmn 0:3ac96e360672 895 &(pdev->per_vcsel_cal_data),
charlesmn 0:3ac96e360672 896 &(pcal_data->per_vcsel_cal_data),
charlesmn 0:3ac96e360672 897 sizeof(VL53L1_per_vcsel_period_offset_cal_data_t));
charlesmn 0:3ac96e360672 898
charlesmn 0:3ac96e360672 899
charlesmn 0:3ac96e360672 900
charlesmn 0:3ac96e360672 901 pC->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 902 pN->algo__crosstalk_compensation_plane_offset_kcps;
charlesmn 0:3ac96e360672 903 pC->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 904 pN->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 905 pC->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 906 pN->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 907
charlesmn 0:3ac96e360672 908 pHP->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 909 VL53L1_calc_crosstalk_plane_offset_with_margin(
charlesmn 0:3ac96e360672 910 pC->algo__crosstalk_compensation_plane_offset_kcps,
charlesmn 0:3ac96e360672 911 pC->histogram_mode_crosstalk_margin_kcps);
charlesmn 0:3ac96e360672 912
charlesmn 0:3ac96e360672 913 pHP->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 914 pC->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 915 pHP->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 916 pC->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 917
charlesmn 0:3ac96e360672 918
charlesmn 0:3ac96e360672 919
charlesmn 0:3ac96e360672 920 if (pC->global_crosstalk_compensation_enable == 0x00) {
charlesmn 0:3ac96e360672 921 pN->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 922 0x00;
charlesmn 0:3ac96e360672 923 pN->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 924 0x00;
charlesmn 0:3ac96e360672 925 pN->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 926 0x00;
charlesmn 0:3ac96e360672 927 } else {
charlesmn 0:3ac96e360672 928 tempu32 =
charlesmn 0:3ac96e360672 929 VL53L1_calc_crosstalk_plane_offset_with_margin(
charlesmn 0:3ac96e360672 930 pC->algo__crosstalk_compensation_plane_offset_kcps,
charlesmn 0:3ac96e360672 931 pC->lite_mode_crosstalk_margin_kcps);
charlesmn 0:3ac96e360672 932
charlesmn 0:3ac96e360672 933
charlesmn 0:3ac96e360672 934 if (tempu32 > 0xFFFF)
charlesmn 0:3ac96e360672 935 tempu32 = 0xFFFF;
charlesmn 0:3ac96e360672 936
charlesmn 0:3ac96e360672 937 pN->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 938 (uint16_t)tempu32;
charlesmn 0:3ac96e360672 939 }
charlesmn 0:3ac96e360672 940 }
charlesmn 0:3ac96e360672 941
charlesmn 0:3ac96e360672 942 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 943
charlesmn 0:3ac96e360672 944 return status;
charlesmn 0:3ac96e360672 945 }
charlesmn 0:3ac96e360672 946
charlesmn 0:3ac96e360672 947
charlesmn 0:3ac96e360672 948 VL53L1_Error VL53L1_get_part_to_part_data(
charlesmn 0:3ac96e360672 949 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 950 VL53L1_calibration_data_t *pcal_data)
charlesmn 0:3ac96e360672 951 {
charlesmn 0:3ac96e360672 952
charlesmn 0:3ac96e360672 953
charlesmn 0:3ac96e360672 954 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 955 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 956 VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg);
charlesmn 0:3ac96e360672 957 VL53L1_customer_nvm_managed_t *pCN = &(pcal_data->customer);
charlesmn 0:3ac96e360672 958
charlesmn 0:3ac96e360672 959 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 960
charlesmn 0:3ac96e360672 961 pcal_data->struct_version =
charlesmn 0:3ac96e360672 962 VL53L1_LL_CALIBRATION_DATA_STRUCT_VERSION;
charlesmn 0:3ac96e360672 963
charlesmn 0:3ac96e360672 964
charlesmn 0:3ac96e360672 965 memcpy(
charlesmn 0:3ac96e360672 966 &(pcal_data->customer),
charlesmn 0:3ac96e360672 967 &(pdev->customer),
charlesmn 0:3ac96e360672 968 sizeof(VL53L1_customer_nvm_managed_t));
charlesmn 0:3ac96e360672 969
charlesmn 0:3ac96e360672 970
charlesmn 0:3ac96e360672 971
charlesmn 0:3ac96e360672 972
charlesmn 0:3ac96e360672 973 if (pC->algo__crosstalk_compensation_plane_offset_kcps > 0xFFFF) {
charlesmn 0:3ac96e360672 974 pCN->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 975 0xFFFF;
charlesmn 0:3ac96e360672 976 } else {
charlesmn 0:3ac96e360672 977 pCN->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 978 (uint16_t)pC->algo__crosstalk_compensation_plane_offset_kcps;
charlesmn 0:3ac96e360672 979 }
charlesmn 0:3ac96e360672 980 pCN->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 981 pC->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 982 pCN->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 983 pC->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 984
charlesmn 0:3ac96e360672 985
charlesmn 0:3ac96e360672 986 memcpy(
charlesmn 0:3ac96e360672 987 &(pcal_data->fmt_dmax_cal),
charlesmn 0:3ac96e360672 988 &(pdev->fmt_dmax_cal),
charlesmn 0:3ac96e360672 989 sizeof(VL53L1_dmax_calibration_data_t));
charlesmn 0:3ac96e360672 990
charlesmn 0:3ac96e360672 991
charlesmn 0:3ac96e360672 992 memcpy(
charlesmn 0:3ac96e360672 993 &(pcal_data->cust_dmax_cal),
charlesmn 0:3ac96e360672 994 &(pdev->cust_dmax_cal),
charlesmn 0:3ac96e360672 995 sizeof(VL53L1_dmax_calibration_data_t));
charlesmn 0:3ac96e360672 996
charlesmn 0:3ac96e360672 997
charlesmn 0:3ac96e360672 998 memcpy(
charlesmn 0:3ac96e360672 999 &(pcal_data->add_off_cal_data),
charlesmn 0:3ac96e360672 1000 &(pdev->add_off_cal_data),
charlesmn 0:3ac96e360672 1001 sizeof(VL53L1_additional_offset_cal_data_t));
charlesmn 0:3ac96e360672 1002
charlesmn 0:3ac96e360672 1003
charlesmn 0:3ac96e360672 1004 memcpy(
charlesmn 0:3ac96e360672 1005 &(pcal_data->optical_centre),
charlesmn 0:3ac96e360672 1006 &(pdev->optical_centre),
charlesmn 0:3ac96e360672 1007 sizeof(VL53L1_optical_centre_t));
charlesmn 0:3ac96e360672 1008
charlesmn 0:3ac96e360672 1009
charlesmn 0:3ac96e360672 1010 memcpy(
charlesmn 0:3ac96e360672 1011 &(pcal_data->xtalkhisto),
charlesmn 0:3ac96e360672 1012 &(pdev->xtalk_shapes),
charlesmn 0:3ac96e360672 1013 sizeof(VL53L1_xtalk_histogram_data_t));
charlesmn 0:3ac96e360672 1014
charlesmn 0:3ac96e360672 1015
charlesmn 0:3ac96e360672 1016 memcpy(
charlesmn 0:3ac96e360672 1017 &(pcal_data->gain_cal),
charlesmn 0:3ac96e360672 1018 &(pdev->gain_cal),
charlesmn 0:3ac96e360672 1019 sizeof(VL53L1_gain_calibration_data_t));
charlesmn 0:3ac96e360672 1020
charlesmn 0:3ac96e360672 1021
charlesmn 0:3ac96e360672 1022 memcpy(
charlesmn 0:3ac96e360672 1023 &(pcal_data->cal_peak_rate_map),
charlesmn 0:3ac96e360672 1024 &(pdev->cal_peak_rate_map),
charlesmn 0:3ac96e360672 1025 sizeof(VL53L1_cal_peak_rate_map_t));
charlesmn 0:3ac96e360672 1026
charlesmn 0:3ac96e360672 1027
charlesmn 0:3ac96e360672 1028 memcpy(
charlesmn 0:3ac96e360672 1029 &(pcal_data->per_vcsel_cal_data),
charlesmn 0:3ac96e360672 1030 &(pdev->per_vcsel_cal_data),
charlesmn 0:3ac96e360672 1031 sizeof(VL53L1_per_vcsel_period_offset_cal_data_t));
charlesmn 0:3ac96e360672 1032
charlesmn 0:3ac96e360672 1033 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1034
charlesmn 0:3ac96e360672 1035 return status;
charlesmn 0:3ac96e360672 1036 }
charlesmn 0:3ac96e360672 1037
charlesmn 0:3ac96e360672 1038
charlesmn 0:3ac96e360672 1039 VL53L1_Error VL53L1_set_inter_measurement_period_ms(
charlesmn 0:3ac96e360672 1040 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1041 uint32_t inter_measurement_period_ms)
charlesmn 0:3ac96e360672 1042 {
charlesmn 0:3ac96e360672 1043
charlesmn 0:3ac96e360672 1044
charlesmn 0:3ac96e360672 1045 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1046 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1047
charlesmn 0:3ac96e360672 1048 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1049
charlesmn 0:3ac96e360672 1050 if (pdev->dbg_results.result__osc_calibrate_val == 0)
charlesmn 0:3ac96e360672 1051 status = VL53L1_ERROR_DIVISION_BY_ZERO;
charlesmn 0:3ac96e360672 1052
charlesmn 0:3ac96e360672 1053 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1054 pdev->inter_measurement_period_ms = inter_measurement_period_ms;
charlesmn 0:3ac96e360672 1055 pdev->tim_cfg.system__intermeasurement_period =
charlesmn 0:3ac96e360672 1056 inter_measurement_period_ms *
charlesmn 0:3ac96e360672 1057 (uint32_t)pdev->dbg_results.result__osc_calibrate_val;
charlesmn 0:3ac96e360672 1058 }
charlesmn 0:3ac96e360672 1059
charlesmn 0:3ac96e360672 1060 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1061
charlesmn 0:3ac96e360672 1062 return status;
charlesmn 0:3ac96e360672 1063 }
charlesmn 0:3ac96e360672 1064
charlesmn 0:3ac96e360672 1065
charlesmn 0:3ac96e360672 1066 VL53L1_Error VL53L1_get_inter_measurement_period_ms(
charlesmn 0:3ac96e360672 1067 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1068 uint32_t *pinter_measurement_period_ms)
charlesmn 0:3ac96e360672 1069 {
charlesmn 0:3ac96e360672 1070
charlesmn 0:3ac96e360672 1071
charlesmn 0:3ac96e360672 1072 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1073 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1074
charlesmn 0:3ac96e360672 1075 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1076
charlesmn 0:3ac96e360672 1077 if (pdev->dbg_results.result__osc_calibrate_val == 0)
charlesmn 0:3ac96e360672 1078 status = VL53L1_ERROR_DIVISION_BY_ZERO;
charlesmn 0:3ac96e360672 1079
charlesmn 0:3ac96e360672 1080 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 1081 *pinter_measurement_period_ms =
charlesmn 0:3ac96e360672 1082 pdev->tim_cfg.system__intermeasurement_period /
charlesmn 0:3ac96e360672 1083 (uint32_t)pdev->dbg_results.result__osc_calibrate_val;
charlesmn 0:3ac96e360672 1084
charlesmn 0:3ac96e360672 1085
charlesmn 0:3ac96e360672 1086 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1087
charlesmn 0:3ac96e360672 1088 return status;
charlesmn 0:3ac96e360672 1089 }
charlesmn 0:3ac96e360672 1090
charlesmn 0:3ac96e360672 1091
charlesmn 0:3ac96e360672 1092 VL53L1_Error VL53L1_set_timeouts_us(
charlesmn 0:3ac96e360672 1093 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1094 uint32_t phasecal_config_timeout_us,
charlesmn 0:3ac96e360672 1095 uint32_t mm_config_timeout_us,
charlesmn 0:3ac96e360672 1096 uint32_t range_config_timeout_us)
charlesmn 0:3ac96e360672 1097 {
charlesmn 0:3ac96e360672 1098
charlesmn 0:3ac96e360672 1099
charlesmn 0:3ac96e360672 1100 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1101 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1102 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1103
charlesmn 0:3ac96e360672 1104 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1105
charlesmn 0:3ac96e360672 1106 if (pdev->stat_nvm.osc_measured__fast_osc__frequency == 0)
charlesmn 0:3ac96e360672 1107 status = VL53L1_ERROR_DIVISION_BY_ZERO;
charlesmn 0:3ac96e360672 1108
charlesmn 0:3ac96e360672 1109 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1110
charlesmn 0:3ac96e360672 1111 pdev->phasecal_config_timeout_us = phasecal_config_timeout_us;
charlesmn 0:3ac96e360672 1112 pdev->mm_config_timeout_us = mm_config_timeout_us;
charlesmn 0:3ac96e360672 1113 pdev->range_config_timeout_us = range_config_timeout_us;
charlesmn 0:3ac96e360672 1114
charlesmn 0:3ac96e360672 1115 status =
charlesmn 0:3ac96e360672 1116 VL53L1_calc_timeout_register_values(
charlesmn 0:3ac96e360672 1117 phasecal_config_timeout_us,
charlesmn 0:3ac96e360672 1118 mm_config_timeout_us,
charlesmn 0:3ac96e360672 1119 range_config_timeout_us,
charlesmn 0:3ac96e360672 1120 pdev->stat_nvm.osc_measured__fast_osc__frequency,
charlesmn 0:3ac96e360672 1121 &(pdev->gen_cfg),
charlesmn 0:3ac96e360672 1122 &(pdev->tim_cfg));
charlesmn 0:3ac96e360672 1123 }
charlesmn 0:3ac96e360672 1124
charlesmn 0:3ac96e360672 1125 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1126
charlesmn 0:3ac96e360672 1127 return status;
charlesmn 0:3ac96e360672 1128 }
charlesmn 0:3ac96e360672 1129
charlesmn 0:3ac96e360672 1130
charlesmn 0:3ac96e360672 1131 VL53L1_Error VL53L1_get_timeouts_us(
charlesmn 0:3ac96e360672 1132 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1133 uint32_t *pphasecal_config_timeout_us,
charlesmn 0:3ac96e360672 1134 uint32_t *pmm_config_timeout_us,
charlesmn 0:3ac96e360672 1135 uint32_t *prange_config_timeout_us)
charlesmn 0:3ac96e360672 1136 {
charlesmn 0:3ac96e360672 1137
charlesmn 0:3ac96e360672 1138
charlesmn 0:3ac96e360672 1139 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1140 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1141 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1142
charlesmn 0:3ac96e360672 1143 uint32_t macro_period_us = 0;
charlesmn 0:3ac96e360672 1144 uint16_t timeout_encoded = 0;
charlesmn 0:3ac96e360672 1145
charlesmn 0:3ac96e360672 1146 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1147
charlesmn 0:3ac96e360672 1148 if (pdev->stat_nvm.osc_measured__fast_osc__frequency == 0)
charlesmn 0:3ac96e360672 1149 status = VL53L1_ERROR_DIVISION_BY_ZERO;
charlesmn 0:3ac96e360672 1150
charlesmn 0:3ac96e360672 1151 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1152
charlesmn 0:3ac96e360672 1153
charlesmn 0:3ac96e360672 1154 macro_period_us =
charlesmn 0:3ac96e360672 1155 VL53L1_calc_macro_period_us(
charlesmn 0:3ac96e360672 1156 pdev->stat_nvm.osc_measured__fast_osc__frequency,
charlesmn 0:3ac96e360672 1157 pdev->tim_cfg.range_config__vcsel_period_a);
charlesmn 0:3ac96e360672 1158
charlesmn 0:3ac96e360672 1159
charlesmn 0:3ac96e360672 1160
charlesmn 0:3ac96e360672 1161 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1162 VL53L1_calc_timeout_us(
charlesmn 0:3ac96e360672 1163 (uint32_t)pdev->gen_cfg.phasecal_config__timeout_macrop,
charlesmn 0:3ac96e360672 1164 macro_period_us);
charlesmn 0:3ac96e360672 1165
charlesmn 0:3ac96e360672 1166
charlesmn 0:3ac96e360672 1167
charlesmn 0:3ac96e360672 1168 timeout_encoded =
charlesmn 0:3ac96e360672 1169 (uint16_t)pdev->tim_cfg.mm_config__timeout_macrop_a_hi;
charlesmn 0:3ac96e360672 1170 timeout_encoded = (timeout_encoded << 8) +
charlesmn 0:3ac96e360672 1171 (uint16_t)pdev->tim_cfg.mm_config__timeout_macrop_a_lo;
charlesmn 0:3ac96e360672 1172
charlesmn 0:3ac96e360672 1173 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1174 VL53L1_calc_decoded_timeout_us(
charlesmn 0:3ac96e360672 1175 timeout_encoded,
charlesmn 0:3ac96e360672 1176 macro_period_us);
charlesmn 0:3ac96e360672 1177
charlesmn 0:3ac96e360672 1178
charlesmn 0:3ac96e360672 1179
charlesmn 0:3ac96e360672 1180 timeout_encoded =
charlesmn 0:3ac96e360672 1181 (uint16_t)pdev->tim_cfg.range_config__timeout_macrop_a_hi;
charlesmn 0:3ac96e360672 1182 timeout_encoded = (timeout_encoded << 8) +
charlesmn 0:3ac96e360672 1183 (uint16_t)pdev->tim_cfg.range_config__timeout_macrop_a_lo;
charlesmn 0:3ac96e360672 1184
charlesmn 0:3ac96e360672 1185 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1186 VL53L1_calc_decoded_timeout_us(
charlesmn 0:3ac96e360672 1187 timeout_encoded,
charlesmn 0:3ac96e360672 1188 macro_period_us);
charlesmn 0:3ac96e360672 1189
charlesmn 0:3ac96e360672 1190 pdev->phasecal_config_timeout_us = *pphasecal_config_timeout_us;
charlesmn 0:3ac96e360672 1191 pdev->mm_config_timeout_us = *pmm_config_timeout_us;
charlesmn 0:3ac96e360672 1192 pdev->range_config_timeout_us = *prange_config_timeout_us;
charlesmn 0:3ac96e360672 1193
charlesmn 0:3ac96e360672 1194 }
charlesmn 0:3ac96e360672 1195
charlesmn 0:3ac96e360672 1196 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1197
charlesmn 0:3ac96e360672 1198 return status;
charlesmn 0:3ac96e360672 1199 }
charlesmn 0:3ac96e360672 1200
charlesmn 0:3ac96e360672 1201
charlesmn 0:3ac96e360672 1202 VL53L1_Error VL53L1_set_calibration_repeat_period(
charlesmn 0:3ac96e360672 1203 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1204 uint16_t cal_config__repeat_period)
charlesmn 0:3ac96e360672 1205 {
charlesmn 0:3ac96e360672 1206
charlesmn 0:3ac96e360672 1207
charlesmn 0:3ac96e360672 1208 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1209 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1210 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1211
charlesmn 0:3ac96e360672 1212 pdev->gen_cfg.cal_config__repeat_rate = cal_config__repeat_period;
charlesmn 0:3ac96e360672 1213
charlesmn 0:3ac96e360672 1214 return status;
charlesmn 0:3ac96e360672 1215
charlesmn 0:3ac96e360672 1216 }
charlesmn 0:3ac96e360672 1217
charlesmn 0:3ac96e360672 1218
charlesmn 0:3ac96e360672 1219 VL53L1_Error VL53L1_get_calibration_repeat_period(
charlesmn 0:3ac96e360672 1220 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1221 uint16_t *pcal_config__repeat_period)
charlesmn 0:3ac96e360672 1222 {
charlesmn 0:3ac96e360672 1223
charlesmn 0:3ac96e360672 1224
charlesmn 0:3ac96e360672 1225 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1226 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1227 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1228
charlesmn 0:3ac96e360672 1229 *pcal_config__repeat_period = pdev->gen_cfg.cal_config__repeat_rate;
charlesmn 0:3ac96e360672 1230
charlesmn 0:3ac96e360672 1231 return status;
charlesmn 0:3ac96e360672 1232
charlesmn 0:3ac96e360672 1233 }
charlesmn 0:3ac96e360672 1234
charlesmn 0:3ac96e360672 1235
charlesmn 0:3ac96e360672 1236 VL53L1_Error VL53L1_set_sequence_config_bit(
charlesmn 0:3ac96e360672 1237 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1238 VL53L1_DeviceSequenceConfig bit_id,
charlesmn 0:3ac96e360672 1239 uint8_t value)
charlesmn 0:3ac96e360672 1240 {
charlesmn 0:3ac96e360672 1241
charlesmn 0:3ac96e360672 1242
charlesmn 0:3ac96e360672 1243 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1244 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1245 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1246
charlesmn 0:3ac96e360672 1247 uint8_t bit_mask = 0x01;
charlesmn 0:3ac96e360672 1248 uint8_t clr_mask = 0xFF - bit_mask;
charlesmn 0:3ac96e360672 1249 uint8_t bit_value = value & bit_mask;
charlesmn 0:3ac96e360672 1250
charlesmn 0:3ac96e360672 1251 if (bit_id <= VL53L1_DEVICESEQUENCECONFIG_RANGE) {
charlesmn 0:3ac96e360672 1252
charlesmn 0:3ac96e360672 1253 if (bit_id > 0) {
charlesmn 0:3ac96e360672 1254 bit_mask = 0x01 << bit_id;
charlesmn 0:3ac96e360672 1255 bit_value = bit_value << bit_id;
charlesmn 0:3ac96e360672 1256 clr_mask = 0xFF - bit_mask;
charlesmn 0:3ac96e360672 1257 }
charlesmn 0:3ac96e360672 1258
charlesmn 0:3ac96e360672 1259 pdev->dyn_cfg.system__sequence_config =
charlesmn 0:3ac96e360672 1260 (pdev->dyn_cfg.system__sequence_config & clr_mask) |
charlesmn 0:3ac96e360672 1261 bit_value;
charlesmn 0:3ac96e360672 1262
charlesmn 0:3ac96e360672 1263 } else {
charlesmn 0:3ac96e360672 1264 status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn 0:3ac96e360672 1265 }
charlesmn 0:3ac96e360672 1266
charlesmn 0:3ac96e360672 1267 return status;
charlesmn 0:3ac96e360672 1268
charlesmn 0:3ac96e360672 1269 }
charlesmn 0:3ac96e360672 1270
charlesmn 0:3ac96e360672 1271
charlesmn 0:3ac96e360672 1272 VL53L1_Error VL53L1_get_sequence_config_bit(
charlesmn 0:3ac96e360672 1273 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1274 VL53L1_DeviceSequenceConfig bit_id,
charlesmn 0:3ac96e360672 1275 uint8_t *pvalue)
charlesmn 0:3ac96e360672 1276 {
charlesmn 0:3ac96e360672 1277
charlesmn 0:3ac96e360672 1278
charlesmn 0:3ac96e360672 1279 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1280 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1281 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1282
charlesmn 0:3ac96e360672 1283 uint8_t bit_mask = 0x01;
charlesmn 0:3ac96e360672 1284
charlesmn 0:3ac96e360672 1285 if (bit_id <= VL53L1_DEVICESEQUENCECONFIG_RANGE) {
charlesmn 0:3ac96e360672 1286
charlesmn 0:3ac96e360672 1287 if (bit_id > 0)
charlesmn 0:3ac96e360672 1288 bit_mask = 0x01 << bit_id;
charlesmn 0:3ac96e360672 1289
charlesmn 0:3ac96e360672 1290 *pvalue =
charlesmn 0:3ac96e360672 1291 pdev->dyn_cfg.system__sequence_config & bit_mask;
charlesmn 0:3ac96e360672 1292
charlesmn 0:3ac96e360672 1293 if (bit_id > 0)
charlesmn 0:3ac96e360672 1294 *pvalue = *pvalue >> bit_id;
charlesmn 0:3ac96e360672 1295
charlesmn 0:3ac96e360672 1296 } else {
charlesmn 0:3ac96e360672 1297 status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn 0:3ac96e360672 1298 }
charlesmn 0:3ac96e360672 1299
charlesmn 0:3ac96e360672 1300 return status;
charlesmn 0:3ac96e360672 1301 }
charlesmn 0:3ac96e360672 1302
charlesmn 0:3ac96e360672 1303
charlesmn 0:3ac96e360672 1304 VL53L1_Error VL53L1_set_interrupt_polarity(
charlesmn 0:3ac96e360672 1305 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1306 VL53L1_DeviceInterruptPolarity interrupt_polarity)
charlesmn 0:3ac96e360672 1307 {
charlesmn 0:3ac96e360672 1308
charlesmn 0:3ac96e360672 1309
charlesmn 0:3ac96e360672 1310 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1311 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1312 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1313
charlesmn 0:3ac96e360672 1314 pdev->stat_cfg.gpio_hv_mux__ctrl =
charlesmn 0:3ac96e360672 1315 (pdev->stat_cfg.gpio_hv_mux__ctrl &
charlesmn 0:3ac96e360672 1316 VL53L1_DEVICEINTERRUPTPOLARITY_CLEAR_MASK) |
charlesmn 0:3ac96e360672 1317 (interrupt_polarity &
charlesmn 0:3ac96e360672 1318 VL53L1_DEVICEINTERRUPTPOLARITY_BIT_MASK);
charlesmn 0:3ac96e360672 1319
charlesmn 0:3ac96e360672 1320 return status;
charlesmn 0:3ac96e360672 1321
charlesmn 0:3ac96e360672 1322 }
charlesmn 0:3ac96e360672 1323
charlesmn 0:3ac96e360672 1324
charlesmn 0:3ac96e360672 1325 VL53L1_Error VL53L1_set_refspadchar_config_struct(
charlesmn 0:3ac96e360672 1326 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1327 VL53L1_refspadchar_config_t *pdata)
charlesmn 0:3ac96e360672 1328 {
charlesmn 0:3ac96e360672 1329
charlesmn 0:3ac96e360672 1330
charlesmn 0:3ac96e360672 1331 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1332 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1333 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1334
charlesmn 0:3ac96e360672 1335 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1336
charlesmn 0:3ac96e360672 1337 pdev->refspadchar.device_test_mode = pdata->device_test_mode;
charlesmn 0:3ac96e360672 1338 pdev->refspadchar.VL53L1_p_009 = pdata->VL53L1_p_009;
charlesmn 0:3ac96e360672 1339 pdev->refspadchar.timeout_us = pdata->timeout_us;
charlesmn 0:3ac96e360672 1340 pdev->refspadchar.target_count_rate_mcps =
charlesmn 0:3ac96e360672 1341 pdata->target_count_rate_mcps;
charlesmn 0:3ac96e360672 1342 pdev->refspadchar.min_count_rate_limit_mcps =
charlesmn 0:3ac96e360672 1343 pdata->min_count_rate_limit_mcps;
charlesmn 0:3ac96e360672 1344 pdev->refspadchar.max_count_rate_limit_mcps =
charlesmn 0:3ac96e360672 1345 pdata->max_count_rate_limit_mcps;
charlesmn 0:3ac96e360672 1346
charlesmn 0:3ac96e360672 1347 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1348
charlesmn 0:3ac96e360672 1349 return status;
charlesmn 0:3ac96e360672 1350 }
charlesmn 0:3ac96e360672 1351
charlesmn 0:3ac96e360672 1352 VL53L1_Error VL53L1_get_refspadchar_config_struct(
charlesmn 0:3ac96e360672 1353 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1354 VL53L1_refspadchar_config_t *pdata)
charlesmn 0:3ac96e360672 1355 {
charlesmn 0:3ac96e360672 1356
charlesmn 0:3ac96e360672 1357
charlesmn 0:3ac96e360672 1358 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1359 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1360 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1361
charlesmn 0:3ac96e360672 1362 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1363
charlesmn 0:3ac96e360672 1364 pdata->device_test_mode = pdev->refspadchar.device_test_mode;
charlesmn 0:3ac96e360672 1365 pdata->VL53L1_p_009 = pdev->refspadchar.VL53L1_p_009;
charlesmn 0:3ac96e360672 1366 pdata->timeout_us = pdev->refspadchar.timeout_us;
charlesmn 0:3ac96e360672 1367 pdata->target_count_rate_mcps =
charlesmn 0:3ac96e360672 1368 pdev->refspadchar.target_count_rate_mcps;
charlesmn 0:3ac96e360672 1369 pdata->min_count_rate_limit_mcps =
charlesmn 0:3ac96e360672 1370 pdev->refspadchar.min_count_rate_limit_mcps;
charlesmn 0:3ac96e360672 1371 pdata->max_count_rate_limit_mcps =
charlesmn 0:3ac96e360672 1372 pdev->refspadchar.max_count_rate_limit_mcps;
charlesmn 0:3ac96e360672 1373
charlesmn 0:3ac96e360672 1374 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1375
charlesmn 0:3ac96e360672 1376 return status;
charlesmn 0:3ac96e360672 1377 }
charlesmn 0:3ac96e360672 1378
charlesmn 0:3ac96e360672 1379
charlesmn 0:3ac96e360672 1380
charlesmn 0:3ac96e360672 1381 VL53L1_Error VL53L1_set_range_ignore_threshold(
charlesmn 0:3ac96e360672 1382 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1383 uint8_t range_ignore_thresh_mult,
charlesmn 0:3ac96e360672 1384 uint16_t range_ignore_threshold_mcps)
charlesmn 0:3ac96e360672 1385 {
charlesmn 0:3ac96e360672 1386
charlesmn 0:3ac96e360672 1387
charlesmn 0:3ac96e360672 1388 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1389 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1390 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1391
charlesmn 0:3ac96e360672 1392 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps =
charlesmn 0:3ac96e360672 1393 range_ignore_threshold_mcps;
charlesmn 0:3ac96e360672 1394
charlesmn 0:3ac96e360672 1395 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult =
charlesmn 0:3ac96e360672 1396 range_ignore_thresh_mult;
charlesmn 0:3ac96e360672 1397
charlesmn 0:3ac96e360672 1398 return status;
charlesmn 0:3ac96e360672 1399
charlesmn 0:3ac96e360672 1400 }
charlesmn 0:3ac96e360672 1401
charlesmn 0:3ac96e360672 1402 VL53L1_Error VL53L1_get_range_ignore_threshold(
charlesmn 0:3ac96e360672 1403 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1404 uint8_t *prange_ignore_thresh_mult,
charlesmn 0:3ac96e360672 1405 uint16_t *prange_ignore_threshold_mcps_internal,
charlesmn 0:3ac96e360672 1406 uint16_t *prange_ignore_threshold_mcps_current)
charlesmn 0:3ac96e360672 1407 {
charlesmn 0:3ac96e360672 1408
charlesmn 0:3ac96e360672 1409
charlesmn 0:3ac96e360672 1410 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1411 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1412 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1413
charlesmn 0:3ac96e360672 1414 *prange_ignore_thresh_mult =
charlesmn 0:3ac96e360672 1415 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult;
charlesmn 0:3ac96e360672 1416
charlesmn 0:3ac96e360672 1417 *prange_ignore_threshold_mcps_current =
charlesmn 0:3ac96e360672 1418 pdev->stat_cfg.algo__range_ignore_threshold_mcps;
charlesmn 0:3ac96e360672 1419
charlesmn 0:3ac96e360672 1420 *prange_ignore_threshold_mcps_internal =
charlesmn 0:3ac96e360672 1421 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps;
charlesmn 0:3ac96e360672 1422
charlesmn 0:3ac96e360672 1423 return status;
charlesmn 0:3ac96e360672 1424
charlesmn 0:3ac96e360672 1425 }
charlesmn 0:3ac96e360672 1426
charlesmn 0:3ac96e360672 1427
charlesmn 0:3ac96e360672 1428
charlesmn 0:3ac96e360672 1429 VL53L1_Error VL53L1_get_interrupt_polarity(
charlesmn 0:3ac96e360672 1430 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1431 VL53L1_DeviceInterruptPolarity *pinterrupt_polarity)
charlesmn 0:3ac96e360672 1432 {
charlesmn 0:3ac96e360672 1433
charlesmn 0:3ac96e360672 1434
charlesmn 0:3ac96e360672 1435 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1436 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1437 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1438
charlesmn 0:3ac96e360672 1439 *pinterrupt_polarity =
charlesmn 0:3ac96e360672 1440 pdev->stat_cfg.gpio_hv_mux__ctrl &
charlesmn 0:3ac96e360672 1441 VL53L1_DEVICEINTERRUPTPOLARITY_BIT_MASK;
charlesmn 0:3ac96e360672 1442
charlesmn 0:3ac96e360672 1443 return status;
charlesmn 0:3ac96e360672 1444
charlesmn 0:3ac96e360672 1445 }
charlesmn 0:3ac96e360672 1446
charlesmn 0:3ac96e360672 1447
charlesmn 0:3ac96e360672 1448 VL53L1_Error VL53L1_set_user_zone(
charlesmn 0:3ac96e360672 1449 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1450 VL53L1_user_zone_t *puser_zone)
charlesmn 0:3ac96e360672 1451 {
charlesmn 0:3ac96e360672 1452
charlesmn 0:3ac96e360672 1453
charlesmn 0:3ac96e360672 1454 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1455 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1456
charlesmn 0:3ac96e360672 1457 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1458
charlesmn 0:3ac96e360672 1459
charlesmn 0:3ac96e360672 1460 VL53L1_encode_row_col(
charlesmn 0:3ac96e360672 1461 puser_zone->y_centre,
charlesmn 0:3ac96e360672 1462 puser_zone->x_centre,
charlesmn 0:3ac96e360672 1463 &(pdev->dyn_cfg.roi_config__user_roi_centre_spad));
charlesmn 0:3ac96e360672 1464
charlesmn 0:3ac96e360672 1465
charlesmn 0:3ac96e360672 1466 VL53L1_encode_zone_size(
charlesmn 0:3ac96e360672 1467 puser_zone->width,
charlesmn 0:3ac96e360672 1468 puser_zone->height,
charlesmn 0:3ac96e360672 1469 &(pdev->dyn_cfg.roi_config__user_roi_requested_global_xy_size));
charlesmn 0:3ac96e360672 1470
charlesmn 0:3ac96e360672 1471
charlesmn 0:3ac96e360672 1472
charlesmn 0:3ac96e360672 1473 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1474
charlesmn 0:3ac96e360672 1475 return status;
charlesmn 0:3ac96e360672 1476 }
charlesmn 0:3ac96e360672 1477
charlesmn 0:3ac96e360672 1478
charlesmn 0:3ac96e360672 1479 VL53L1_Error VL53L1_get_user_zone(
charlesmn 0:3ac96e360672 1480 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1481 VL53L1_user_zone_t *puser_zone)
charlesmn 0:3ac96e360672 1482 {
charlesmn 0:3ac96e360672 1483
charlesmn 0:3ac96e360672 1484
charlesmn 0:3ac96e360672 1485 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1486 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1487
charlesmn 0:3ac96e360672 1488 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1489
charlesmn 0:3ac96e360672 1490
charlesmn 0:3ac96e360672 1491 VL53L1_decode_row_col(
charlesmn 0:3ac96e360672 1492 pdev->dyn_cfg.roi_config__user_roi_centre_spad,
charlesmn 0:3ac96e360672 1493 &(puser_zone->y_centre),
charlesmn 0:3ac96e360672 1494 &(puser_zone->x_centre));
charlesmn 0:3ac96e360672 1495
charlesmn 0:3ac96e360672 1496
charlesmn 0:3ac96e360672 1497 VL53L1_decode_zone_size(
charlesmn 0:3ac96e360672 1498 pdev->dyn_cfg.roi_config__user_roi_requested_global_xy_size,
charlesmn 0:3ac96e360672 1499 &(puser_zone->width),
charlesmn 0:3ac96e360672 1500 &(puser_zone->height));
charlesmn 0:3ac96e360672 1501
charlesmn 0:3ac96e360672 1502 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1503
charlesmn 0:3ac96e360672 1504 return status;
charlesmn 0:3ac96e360672 1505 }
charlesmn 0:3ac96e360672 1506
charlesmn 0:3ac96e360672 1507
charlesmn 0:3ac96e360672 1508
charlesmn 0:3ac96e360672 1509 VL53L1_Error VL53L1_get_mode_mitigation_roi(
charlesmn 0:3ac96e360672 1510 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1511 VL53L1_user_zone_t *pmm_roi)
charlesmn 0:3ac96e360672 1512 {
charlesmn 0:3ac96e360672 1513
charlesmn 0:3ac96e360672 1514
charlesmn 0:3ac96e360672 1515 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1516 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1517
charlesmn 0:3ac96e360672 1518 uint8_t x = 0;
charlesmn 0:3ac96e360672 1519 uint8_t y = 0;
charlesmn 0:3ac96e360672 1520 uint8_t xy_size = 0;
charlesmn 0:3ac96e360672 1521
charlesmn 0:3ac96e360672 1522 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1523
charlesmn 0:3ac96e360672 1524
charlesmn 0:3ac96e360672 1525 VL53L1_decode_row_col(
charlesmn 0:3ac96e360672 1526 pdev->nvm_copy_data.roi_config__mode_roi_centre_spad,
charlesmn 0:3ac96e360672 1527 &y,
charlesmn 0:3ac96e360672 1528 &x);
charlesmn 0:3ac96e360672 1529
charlesmn 0:3ac96e360672 1530 pmm_roi->x_centre = x;
charlesmn 0:3ac96e360672 1531 pmm_roi->y_centre = y;
charlesmn 0:3ac96e360672 1532
charlesmn 0:3ac96e360672 1533
charlesmn 0:3ac96e360672 1534 xy_size = pdev->nvm_copy_data.roi_config__mode_roi_xy_size;
charlesmn 0:3ac96e360672 1535
charlesmn 0:3ac96e360672 1536 pmm_roi->height = xy_size >> 4;
charlesmn 0:3ac96e360672 1537 pmm_roi->width = xy_size & 0x0F;
charlesmn 0:3ac96e360672 1538
charlesmn 0:3ac96e360672 1539 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1540
charlesmn 0:3ac96e360672 1541 return status;
charlesmn 0:3ac96e360672 1542 }
charlesmn 0:3ac96e360672 1543
charlesmn 0:3ac96e360672 1544
charlesmn 0:3ac96e360672 1545 VL53L1_Error VL53L1_set_zone_config(
charlesmn 0:3ac96e360672 1546 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1547 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 1548 {
charlesmn 0:3ac96e360672 1549
charlesmn 0:3ac96e360672 1550
charlesmn 0:3ac96e360672 1551
charlesmn 0:3ac96e360672 1552 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1553 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1554
charlesmn 0:3ac96e360672 1555 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1556
charlesmn 0:3ac96e360672 1557
charlesmn 0:3ac96e360672 1558 memcpy(&(pdev->zone_cfg.user_zones), &(pzone_cfg->user_zones),
charlesmn 0:3ac96e360672 1559 sizeof(pdev->zone_cfg.user_zones));
charlesmn 0:3ac96e360672 1560
charlesmn 0:3ac96e360672 1561
charlesmn 0:3ac96e360672 1562 pdev->zone_cfg.max_zones = pzone_cfg->max_zones;
charlesmn 0:3ac96e360672 1563 pdev->zone_cfg.active_zones = pzone_cfg->active_zones;
charlesmn 0:3ac96e360672 1564
charlesmn 0:3ac96e360672 1565 status = VL53L1_init_zone_config_histogram_bins(&pdev->zone_cfg);
charlesmn 0:3ac96e360672 1566
charlesmn 0:3ac96e360672 1567
charlesmn 0:3ac96e360672 1568
charlesmn 0:3ac96e360672 1569 if (pzone_cfg->active_zones == 0)
charlesmn 0:3ac96e360672 1570 pdev->gen_cfg.global_config__stream_divider = 0;
charlesmn 0:3ac96e360672 1571 else if (pzone_cfg->active_zones < VL53L1_MAX_USER_ZONES)
charlesmn 0:3ac96e360672 1572 pdev->gen_cfg.global_config__stream_divider =
charlesmn 0:3ac96e360672 1573 pzone_cfg->active_zones + 1;
charlesmn 0:3ac96e360672 1574 else
charlesmn 0:3ac96e360672 1575 pdev->gen_cfg.global_config__stream_divider =
charlesmn 0:3ac96e360672 1576 VL53L1_MAX_USER_ZONES + 1;
charlesmn 0:3ac96e360672 1577
charlesmn 0:3ac96e360672 1578 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1579
charlesmn 0:3ac96e360672 1580 return status;
charlesmn 0:3ac96e360672 1581
charlesmn 0:3ac96e360672 1582 }
charlesmn 0:3ac96e360672 1583
charlesmn 0:3ac96e360672 1584
charlesmn 0:3ac96e360672 1585 VL53L1_Error VL53L1_get_zone_config(
charlesmn 0:3ac96e360672 1586 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1587 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 1588 {
charlesmn 0:3ac96e360672 1589
charlesmn 0:3ac96e360672 1590
charlesmn 0:3ac96e360672 1591 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1592 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1593
charlesmn 0:3ac96e360672 1594 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1595
charlesmn 0:3ac96e360672 1596
charlesmn 0:3ac96e360672 1597 memcpy(pzone_cfg, &(pdev->zone_cfg), sizeof(VL53L1_zone_config_t));
charlesmn 0:3ac96e360672 1598
charlesmn 0:3ac96e360672 1599 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1600
charlesmn 0:3ac96e360672 1601 return status;
charlesmn 0:3ac96e360672 1602 }
charlesmn 0:3ac96e360672 1603
charlesmn 0:3ac96e360672 1604 VL53L1_Error VL53L1_get_preset_mode_timing_cfg(
charlesmn 0:3ac96e360672 1605 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1606 VL53L1_DevicePresetModes device_preset_mode,
charlesmn 0:3ac96e360672 1607 uint16_t *pdss_config__target_total_rate_mcps,
charlesmn 0:3ac96e360672 1608 uint32_t *pphasecal_config_timeout_us,
charlesmn 0:3ac96e360672 1609 uint32_t *pmm_config_timeout_us,
charlesmn 0:3ac96e360672 1610 uint32_t *prange_config_timeout_us)
charlesmn 0:3ac96e360672 1611 {
charlesmn 0:3ac96e360672 1612 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1613 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1614
charlesmn 0:3ac96e360672 1615 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1616
charlesmn 0:3ac96e360672 1617
charlesmn 0:3ac96e360672 1618 switch (device_preset_mode) {
charlesmn 0:3ac96e360672 1619
charlesmn 0:3ac96e360672 1620 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING:
charlesmn 0:3ac96e360672 1621 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_SHORT_RANGE:
charlesmn 0:3ac96e360672 1622 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_LONG_RANGE:
charlesmn 0:3ac96e360672 1623 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM1_CAL:
charlesmn 0:3ac96e360672 1624 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM2_CAL:
charlesmn 0:3ac96e360672 1625 case VL53L1_DEVICEPRESETMODE_OLT:
charlesmn 0:3ac96e360672 1626 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1627 pdev->tuning_parms.tp_dss_target_lite_mcps;
charlesmn 0:3ac96e360672 1628 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1629 pdev->tuning_parms.tp_phasecal_timeout_lite_us;
charlesmn 0:3ac96e360672 1630 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1631 pdev->tuning_parms.tp_mm_timeout_lite_us;
charlesmn 0:3ac96e360672 1632 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1633 pdev->tuning_parms.tp_range_timeout_lite_us;
charlesmn 0:3ac96e360672 1634 break;
charlesmn 0:3ac96e360672 1635
charlesmn 0:3ac96e360672 1636 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING:
charlesmn 0:3ac96e360672 1637 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING_SHORT_RANGE:
charlesmn 0:3ac96e360672 1638 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING_LONG_RANGE:
charlesmn 0:3ac96e360672 1639 case VL53L1_DEVICEPRESETMODE_SINGLESHOT_RANGING:
charlesmn 0:3ac96e360672 1640 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1641 pdev->tuning_parms.tp_dss_target_timed_mcps;
charlesmn 0:3ac96e360672 1642 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1643 pdev->tuning_parms.tp_phasecal_timeout_timed_us;
charlesmn 0:3ac96e360672 1644 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1645 pdev->tuning_parms.tp_mm_timeout_timed_us;
charlesmn 0:3ac96e360672 1646 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1647 pdev->tuning_parms.tp_range_timeout_timed_us;
charlesmn 0:3ac96e360672 1648 break;
charlesmn 0:3ac96e360672 1649
charlesmn 0:3ac96e360672 1650 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_SHORT_RANGE:
charlesmn 0:3ac96e360672 1651 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_MEDIUM_RANGE:
charlesmn 0:3ac96e360672 1652 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_LONG_RANGE:
charlesmn 0:3ac96e360672 1653 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1654 pdev->tuning_parms.tp_dss_target_timed_mcps;
charlesmn 0:3ac96e360672 1655 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1656 pdev->tuning_parms.tp_phasecal_timeout_timed_us;
charlesmn 0:3ac96e360672 1657 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1658 pdev->tuning_parms.tp_mm_timeout_lpa_us;
charlesmn 0:3ac96e360672 1659 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1660 pdev->tuning_parms.tp_range_timeout_lpa_us;
charlesmn 0:3ac96e360672 1661 break;
charlesmn 0:3ac96e360672 1662
charlesmn 0:3ac96e360672 1663 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING:
charlesmn 0:3ac96e360672 1664 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_WITH_MM1:
charlesmn 0:3ac96e360672 1665 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_WITH_MM2:
charlesmn 0:3ac96e360672 1666 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_MM1_CAL:
charlesmn 0:3ac96e360672 1667 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_MM2_CAL:
charlesmn 0:3ac96e360672 1668 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_REF_ARRAY:
charlesmn 0:3ac96e360672 1669 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE:
charlesmn 0:3ac96e360672 1670 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE_MM1:
charlesmn 0:3ac96e360672 1671 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE_MM2:
charlesmn 0:3ac96e360672 1672 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_CHARACTERISATION:
charlesmn 0:3ac96e360672 1673 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1674 pdev->tuning_parms.tp_dss_target_histo_mcps;
charlesmn 0:3ac96e360672 1675 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1676 pdev->tuning_parms.tp_phasecal_timeout_hist_long_us;
charlesmn 0:3ac96e360672 1677 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1678 pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn 0:3ac96e360672 1679 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1680 pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn 0:3ac96e360672 1681
charlesmn 0:3ac96e360672 1682 break;
charlesmn 0:3ac96e360672 1683
charlesmn 0:3ac96e360672 1684 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE:
charlesmn 0:3ac96e360672 1685 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1686 pdev->tuning_parms.tp_dss_target_histo_mz_mcps;
charlesmn 0:3ac96e360672 1687 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1688 pdev->tuning_parms.tp_phasecal_timeout_mz_med_us;
charlesmn 0:3ac96e360672 1689 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1690 pdev->tuning_parms.tp_mm_timeout_mz_us;
charlesmn 0:3ac96e360672 1691 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1692 pdev->tuning_parms.tp_range_timeout_mz_us;
charlesmn 0:3ac96e360672 1693 break;
charlesmn 0:3ac96e360672 1694
charlesmn 0:3ac96e360672 1695 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE_SHORT_RANGE:
charlesmn 0:3ac96e360672 1696 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1697 pdev->tuning_parms.tp_dss_target_histo_mz_mcps;
charlesmn 0:3ac96e360672 1698 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1699 pdev->tuning_parms.tp_phasecal_timeout_mz_short_us;
charlesmn 0:3ac96e360672 1700 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1701 pdev->tuning_parms.tp_mm_timeout_mz_us;
charlesmn 0:3ac96e360672 1702 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1703 pdev->tuning_parms.tp_range_timeout_mz_us;
charlesmn 0:3ac96e360672 1704 break;
charlesmn 0:3ac96e360672 1705
charlesmn 0:3ac96e360672 1706 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE_LONG_RANGE:
charlesmn 0:3ac96e360672 1707 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1708 pdev->tuning_parms.tp_dss_target_histo_mz_mcps;
charlesmn 0:3ac96e360672 1709 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1710 pdev->tuning_parms.tp_phasecal_timeout_mz_long_us;
charlesmn 0:3ac96e360672 1711 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1712 pdev->tuning_parms.tp_mm_timeout_mz_us;
charlesmn 0:3ac96e360672 1713 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1714 pdev->tuning_parms.tp_range_timeout_mz_us;
charlesmn 0:3ac96e360672 1715 break;
charlesmn 0:3ac96e360672 1716
charlesmn 0:3ac96e360672 1717 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_SHORT_TIMING:
charlesmn 0:3ac96e360672 1718 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1719 pdev->tuning_parms.tp_dss_target_histo_mcps;
charlesmn 0:3ac96e360672 1720 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1721 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us;
charlesmn 0:3ac96e360672 1722 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1723 pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn 0:3ac96e360672 1724 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1725 pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn 0:3ac96e360672 1726 break;
charlesmn 0:3ac96e360672 1727
charlesmn 0:3ac96e360672 1728 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE:
charlesmn 0:3ac96e360672 1729 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE_MM1:
charlesmn 0:3ac96e360672 1730 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE_MM2:
charlesmn 0:3ac96e360672 1731 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1732 pdev->tuning_parms.tp_dss_target_histo_mcps;
charlesmn 0:3ac96e360672 1733 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1734 pdev->tuning_parms.tp_phasecal_timeout_hist_med_us;
charlesmn 0:3ac96e360672 1735 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1736 pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn 0:3ac96e360672 1737 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1738 pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn 0:3ac96e360672 1739 break;
charlesmn 0:3ac96e360672 1740
charlesmn 0:3ac96e360672 1741
charlesmn 0:3ac96e360672 1742 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE:
charlesmn 0:3ac96e360672 1743 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE_MM1:
charlesmn 0:3ac96e360672 1744 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE_MM2:
charlesmn 0:3ac96e360672 1745 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1746 pdev->tuning_parms.tp_dss_target_histo_mcps;
charlesmn 0:3ac96e360672 1747 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1748 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us;
charlesmn 0:3ac96e360672 1749 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1750 pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn 0:3ac96e360672 1751 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1752 pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn 0:3ac96e360672 1753 break;
charlesmn 0:3ac96e360672 1754
charlesmn 0:3ac96e360672 1755 case VL53L1_DEVICEPRESETMODE_SPECIAL_HISTOGRAM_SHORT_RANGE:
charlesmn 0:3ac96e360672 1756 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1757 pdev->tuning_parms.tp_dss_target_very_short_mcps;
charlesmn 0:3ac96e360672 1758 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1759 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us;
charlesmn 0:3ac96e360672 1760 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1761 pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn 0:3ac96e360672 1762 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1763 pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn 0:3ac96e360672 1764 break;
charlesmn 0:3ac96e360672 1765
charlesmn 0:3ac96e360672 1766 default:
charlesmn 0:3ac96e360672 1767 status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn 0:3ac96e360672 1768 break;
charlesmn 0:3ac96e360672 1769
charlesmn 0:3ac96e360672 1770 }
charlesmn 0:3ac96e360672 1771
charlesmn 0:3ac96e360672 1772 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1773
charlesmn 0:3ac96e360672 1774 return status;
charlesmn 0:3ac96e360672 1775 }
charlesmn 0:3ac96e360672 1776
charlesmn 0:3ac96e360672 1777
charlesmn 0:3ac96e360672 1778 VL53L1_Error VL53L1_set_preset_mode(
charlesmn 0:3ac96e360672 1779 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1780 VL53L1_DevicePresetModes device_preset_mode,
charlesmn 0:3ac96e360672 1781 uint16_t dss_config__target_total_rate_mcps,
charlesmn 0:3ac96e360672 1782 uint32_t phasecal_config_timeout_us,
charlesmn 0:3ac96e360672 1783 uint32_t mm_config_timeout_us,
charlesmn 0:3ac96e360672 1784 uint32_t range_config_timeout_us,
charlesmn 0:3ac96e360672 1785 uint32_t inter_measurement_period_ms)
charlesmn 0:3ac96e360672 1786 {
charlesmn 0:3ac96e360672 1787
charlesmn 0:3ac96e360672 1788
charlesmn 0:3ac96e360672 1789 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1790 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1791 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1792 VL53L1_LLDriverResults_t *pres =
charlesmn 0:3ac96e360672 1793 VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn 0:3ac96e360672 1794
charlesmn 0:3ac96e360672 1795 VL53L1_hist_post_process_config_t *phistpostprocess =
charlesmn 0:3ac96e360672 1796 &(pdev->histpostprocess);
charlesmn 0:3ac96e360672 1797
charlesmn 0:3ac96e360672 1798 VL53L1_static_config_t *pstatic = &(pdev->stat_cfg);
charlesmn 0:3ac96e360672 1799 VL53L1_histogram_config_t *phistogram = &(pdev->hist_cfg);
charlesmn 0:3ac96e360672 1800 VL53L1_general_config_t *pgeneral = &(pdev->gen_cfg);
charlesmn 0:3ac96e360672 1801 VL53L1_timing_config_t *ptiming = &(pdev->tim_cfg);
charlesmn 0:3ac96e360672 1802 VL53L1_dynamic_config_t *pdynamic = &(pdev->dyn_cfg);
charlesmn 0:3ac96e360672 1803 VL53L1_system_control_t *psystem = &(pdev->sys_ctrl);
charlesmn 0:3ac96e360672 1804 VL53L1_zone_config_t *pzone_cfg = &(pdev->zone_cfg);
charlesmn 0:3ac96e360672 1805 VL53L1_tuning_parm_storage_t *ptuning_parms = &(pdev->tuning_parms);
charlesmn 0:3ac96e360672 1806 VL53L1_low_power_auto_data_t *plpadata =
charlesmn 0:3ac96e360672 1807 &(pdev->low_power_auto_data);
charlesmn 0:3ac96e360672 1808
charlesmn 0:3ac96e360672 1809 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1810
charlesmn 0:3ac96e360672 1811
charlesmn 0:3ac96e360672 1812 pdev->preset_mode = device_preset_mode;
charlesmn 0:3ac96e360672 1813 pdev->mm_config_timeout_us = mm_config_timeout_us;
charlesmn 0:3ac96e360672 1814 pdev->range_config_timeout_us = range_config_timeout_us;
charlesmn 0:3ac96e360672 1815 pdev->inter_measurement_period_ms = inter_measurement_period_ms;
charlesmn 0:3ac96e360672 1816
charlesmn 0:3ac96e360672 1817
charlesmn 0:3ac96e360672 1818
charlesmn 0:3ac96e360672 1819 VL53L1_init_ll_driver_state(
charlesmn 0:3ac96e360672 1820 Dev,
charlesmn 0:3ac96e360672 1821 VL53L1_DEVICESTATE_SW_STANDBY);
charlesmn 0:3ac96e360672 1822
charlesmn 0:3ac96e360672 1823
charlesmn 0:3ac96e360672 1824
charlesmn 0:3ac96e360672 1825 switch (device_preset_mode) {
charlesmn 0:3ac96e360672 1826
charlesmn 0:3ac96e360672 1827 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING:
charlesmn 0:3ac96e360672 1828 status = VL53L1_preset_mode_standard_ranging(
charlesmn 0:3ac96e360672 1829 pstatic,
charlesmn 0:3ac96e360672 1830 phistogram,
charlesmn 0:3ac96e360672 1831 pgeneral,
charlesmn 0:3ac96e360672 1832 ptiming,
charlesmn 0:3ac96e360672 1833 pdynamic,
charlesmn 0:3ac96e360672 1834 psystem,
charlesmn 0:3ac96e360672 1835 ptuning_parms,
charlesmn 0:3ac96e360672 1836 pzone_cfg);
charlesmn 0:3ac96e360672 1837 break;
charlesmn 0:3ac96e360672 1838
charlesmn 0:3ac96e360672 1839 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_SHORT_RANGE:
charlesmn 0:3ac96e360672 1840 status = VL53L1_preset_mode_standard_ranging_short_range(
charlesmn 0:3ac96e360672 1841 pstatic,
charlesmn 0:3ac96e360672 1842 phistogram,
charlesmn 0:3ac96e360672 1843 pgeneral,
charlesmn 0:3ac96e360672 1844 ptiming,
charlesmn 0:3ac96e360672 1845 pdynamic,
charlesmn 0:3ac96e360672 1846 psystem,
charlesmn 0:3ac96e360672 1847 ptuning_parms,
charlesmn 0:3ac96e360672 1848 pzone_cfg);
charlesmn 0:3ac96e360672 1849 break;
charlesmn 0:3ac96e360672 1850
charlesmn 0:3ac96e360672 1851 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_LONG_RANGE:
charlesmn 0:3ac96e360672 1852 status = VL53L1_preset_mode_standard_ranging_long_range(
charlesmn 0:3ac96e360672 1853 pstatic,
charlesmn 0:3ac96e360672 1854 phistogram,
charlesmn 0:3ac96e360672 1855 pgeneral,
charlesmn 0:3ac96e360672 1856 ptiming,
charlesmn 0:3ac96e360672 1857 pdynamic,
charlesmn 0:3ac96e360672 1858 psystem,
charlesmn 0:3ac96e360672 1859 ptuning_parms,
charlesmn 0:3ac96e360672 1860 pzone_cfg);
charlesmn 0:3ac96e360672 1861 break;
charlesmn 0:3ac96e360672 1862
charlesmn 0:3ac96e360672 1863 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM1_CAL:
charlesmn 0:3ac96e360672 1864 status = VL53L1_preset_mode_standard_ranging_mm1_cal(
charlesmn 0:3ac96e360672 1865 pstatic,
charlesmn 0:3ac96e360672 1866 phistogram,
charlesmn 0:3ac96e360672 1867 pgeneral,
charlesmn 0:3ac96e360672 1868 ptiming,
charlesmn 0:3ac96e360672 1869 pdynamic,
charlesmn 0:3ac96e360672 1870 psystem,
charlesmn 0:3ac96e360672 1871 ptuning_parms,
charlesmn 0:3ac96e360672 1872 pzone_cfg);
charlesmn 0:3ac96e360672 1873 break;
charlesmn 0:3ac96e360672 1874
charlesmn 0:3ac96e360672 1875 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM2_CAL:
charlesmn 0:3ac96e360672 1876 status = VL53L1_preset_mode_standard_ranging_mm2_cal(
charlesmn 0:3ac96e360672 1877 pstatic,
charlesmn 0:3ac96e360672 1878 phistogram,
charlesmn 0:3ac96e360672 1879 pgeneral,
charlesmn 0:3ac96e360672 1880 ptiming,
charlesmn 0:3ac96e360672 1881 pdynamic,
charlesmn 0:3ac96e360672 1882 psystem,
charlesmn 0:3ac96e360672 1883 ptuning_parms,
charlesmn 0:3ac96e360672 1884 pzone_cfg);
charlesmn 0:3ac96e360672 1885 break;
charlesmn 0:3ac96e360672 1886
charlesmn 0:3ac96e360672 1887 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING:
charlesmn 0:3ac96e360672 1888 status = VL53L1_preset_mode_timed_ranging(
charlesmn 0:3ac96e360672 1889 pstatic,
charlesmn 0:3ac96e360672 1890 phistogram,
charlesmn 0:3ac96e360672 1891 pgeneral,
charlesmn 0:3ac96e360672 1892 ptiming,
charlesmn 0:3ac96e360672 1893 pdynamic,
charlesmn 0:3ac96e360672 1894 psystem,
charlesmn 0:3ac96e360672 1895 ptuning_parms,
charlesmn 0:3ac96e360672 1896 pzone_cfg);
charlesmn 0:3ac96e360672 1897 break;
charlesmn 0:3ac96e360672 1898
charlesmn 0:3ac96e360672 1899 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING_SHORT_RANGE:
charlesmn 0:3ac96e360672 1900 status = VL53L1_preset_mode_timed_ranging_short_range(
charlesmn 0:3ac96e360672 1901 pstatic,
charlesmn 0:3ac96e360672 1902 phistogram,
charlesmn 0:3ac96e360672 1903 pgeneral,
charlesmn 0:3ac96e360672 1904 ptiming,
charlesmn 0:3ac96e360672 1905 pdynamic,
charlesmn 0:3ac96e360672 1906 psystem,
charlesmn 0:3ac96e360672 1907 ptuning_parms,
charlesmn 0:3ac96e360672 1908 pzone_cfg);
charlesmn 0:3ac96e360672 1909 break;
charlesmn 0:3ac96e360672 1910
charlesmn 0:3ac96e360672 1911 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING_LONG_RANGE:
charlesmn 0:3ac96e360672 1912 status = VL53L1_preset_mode_timed_ranging_long_range(
charlesmn 0:3ac96e360672 1913 pstatic,
charlesmn 0:3ac96e360672 1914 phistogram,
charlesmn 0:3ac96e360672 1915 pgeneral,
charlesmn 0:3ac96e360672 1916 ptiming,
charlesmn 0:3ac96e360672 1917 pdynamic,
charlesmn 0:3ac96e360672 1918 psystem,
charlesmn 0:3ac96e360672 1919 ptuning_parms,
charlesmn 0:3ac96e360672 1920 pzone_cfg);
charlesmn 0:3ac96e360672 1921 break;
charlesmn 0:3ac96e360672 1922
charlesmn 0:3ac96e360672 1923 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING:
charlesmn 0:3ac96e360672 1924 status = VL53L1_preset_mode_histogram_ranging(
charlesmn 0:3ac96e360672 1925 phistpostprocess,
charlesmn 0:3ac96e360672 1926 pstatic,
charlesmn 0:3ac96e360672 1927 phistogram,
charlesmn 0:3ac96e360672 1928 pgeneral,
charlesmn 0:3ac96e360672 1929 ptiming,
charlesmn 0:3ac96e360672 1930 pdynamic,
charlesmn 0:3ac96e360672 1931 psystem,
charlesmn 0:3ac96e360672 1932 ptuning_parms,
charlesmn 0:3ac96e360672 1933 pzone_cfg);
charlesmn 0:3ac96e360672 1934 break;
charlesmn 0:3ac96e360672 1935
charlesmn 0:3ac96e360672 1936 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_WITH_MM1:
charlesmn 0:3ac96e360672 1937 status = VL53L1_preset_mode_histogram_ranging_with_mm1(
charlesmn 0:3ac96e360672 1938 phistpostprocess,
charlesmn 0:3ac96e360672 1939 pstatic,
charlesmn 0:3ac96e360672 1940 phistogram,
charlesmn 0:3ac96e360672 1941 pgeneral,
charlesmn 0:3ac96e360672 1942 ptiming,
charlesmn 0:3ac96e360672 1943 pdynamic,
charlesmn 0:3ac96e360672 1944 psystem,
charlesmn 0:3ac96e360672 1945 ptuning_parms,
charlesmn 0:3ac96e360672 1946 pzone_cfg);
charlesmn 0:3ac96e360672 1947 break;
charlesmn 0:3ac96e360672 1948
charlesmn 0:3ac96e360672 1949 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_WITH_MM2:
charlesmn 0:3ac96e360672 1950 status = VL53L1_preset_mode_histogram_ranging_with_mm2(
charlesmn 0:3ac96e360672 1951 phistpostprocess,
charlesmn 0:3ac96e360672 1952 pstatic,
charlesmn 0:3ac96e360672 1953 phistogram,
charlesmn 0:3ac96e360672 1954 pgeneral,
charlesmn 0:3ac96e360672 1955 ptiming,
charlesmn 0:3ac96e360672 1956 pdynamic,
charlesmn 0:3ac96e360672 1957 psystem,
charlesmn 0:3ac96e360672 1958 ptuning_parms,
charlesmn 0:3ac96e360672 1959 pzone_cfg);
charlesmn 0:3ac96e360672 1960 break;
charlesmn 0:3ac96e360672 1961
charlesmn 0:3ac96e360672 1962 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_MM1_CAL:
charlesmn 0:3ac96e360672 1963 status = VL53L1_preset_mode_histogram_ranging_mm1_cal(
charlesmn 0:3ac96e360672 1964 phistpostprocess,
charlesmn 0:3ac96e360672 1965 pstatic,
charlesmn 0:3ac96e360672 1966 phistogram,
charlesmn 0:3ac96e360672 1967 pgeneral,
charlesmn 0:3ac96e360672 1968 ptiming,
charlesmn 0:3ac96e360672 1969 pdynamic,
charlesmn 0:3ac96e360672 1970 psystem,
charlesmn 0:3ac96e360672 1971 ptuning_parms,
charlesmn 0:3ac96e360672 1972 pzone_cfg);
charlesmn 0:3ac96e360672 1973 break;
charlesmn 0:3ac96e360672 1974
charlesmn 0:3ac96e360672 1975 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_MM2_CAL:
charlesmn 0:3ac96e360672 1976 status = VL53L1_preset_mode_histogram_ranging_mm2_cal(
charlesmn 0:3ac96e360672 1977 phistpostprocess,
charlesmn 0:3ac96e360672 1978 pstatic,
charlesmn 0:3ac96e360672 1979 phistogram,
charlesmn 0:3ac96e360672 1980 pgeneral,
charlesmn 0:3ac96e360672 1981 ptiming,
charlesmn 0:3ac96e360672 1982 pdynamic,
charlesmn 0:3ac96e360672 1983 psystem,
charlesmn 0:3ac96e360672 1984 ptuning_parms,
charlesmn 0:3ac96e360672 1985 pzone_cfg);
charlesmn 0:3ac96e360672 1986 break;
charlesmn 0:3ac96e360672 1987
charlesmn 0:3ac96e360672 1988 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE:
charlesmn 0:3ac96e360672 1989 status = VL53L1_preset_mode_histogram_multizone(
charlesmn 0:3ac96e360672 1990 phistpostprocess,
charlesmn 0:3ac96e360672 1991 pstatic,
charlesmn 0:3ac96e360672 1992 phistogram,
charlesmn 0:3ac96e360672 1993 pgeneral,
charlesmn 0:3ac96e360672 1994 ptiming,
charlesmn 0:3ac96e360672 1995 pdynamic,
charlesmn 0:3ac96e360672 1996 psystem,
charlesmn 0:3ac96e360672 1997 ptuning_parms,
charlesmn 0:3ac96e360672 1998 pzone_cfg);
charlesmn 0:3ac96e360672 1999 break;
charlesmn 0:3ac96e360672 2000
charlesmn 0:3ac96e360672 2001 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE_SHORT_RANGE:
charlesmn 0:3ac96e360672 2002 status = VL53L1_preset_mode_histogram_multizone_short_range(
charlesmn 0:3ac96e360672 2003 phistpostprocess,
charlesmn 0:3ac96e360672 2004 pstatic,
charlesmn 0:3ac96e360672 2005 phistogram,
charlesmn 0:3ac96e360672 2006 pgeneral,
charlesmn 0:3ac96e360672 2007 ptiming,
charlesmn 0:3ac96e360672 2008 pdynamic,
charlesmn 0:3ac96e360672 2009 psystem,
charlesmn 0:3ac96e360672 2010 ptuning_parms,
charlesmn 0:3ac96e360672 2011 pzone_cfg);
charlesmn 0:3ac96e360672 2012 break;
charlesmn 0:3ac96e360672 2013
charlesmn 0:3ac96e360672 2014 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE_LONG_RANGE:
charlesmn 0:3ac96e360672 2015 status = VL53L1_preset_mode_histogram_multizone_long_range(
charlesmn 0:3ac96e360672 2016 phistpostprocess,
charlesmn 0:3ac96e360672 2017 pstatic,
charlesmn 0:3ac96e360672 2018 phistogram,
charlesmn 0:3ac96e360672 2019 pgeneral,
charlesmn 0:3ac96e360672 2020 ptiming,
charlesmn 0:3ac96e360672 2021 pdynamic,
charlesmn 0:3ac96e360672 2022 psystem,
charlesmn 0:3ac96e360672 2023 ptuning_parms,
charlesmn 0:3ac96e360672 2024 pzone_cfg);
charlesmn 0:3ac96e360672 2025 break;
charlesmn 0:3ac96e360672 2026
charlesmn 0:3ac96e360672 2027 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_REF_ARRAY:
charlesmn 0:3ac96e360672 2028 status = VL53L1_preset_mode_histogram_ranging_ref(
charlesmn 0:3ac96e360672 2029 phistpostprocess,
charlesmn 0:3ac96e360672 2030 pstatic,
charlesmn 0:3ac96e360672 2031 phistogram,
charlesmn 0:3ac96e360672 2032 pgeneral,
charlesmn 0:3ac96e360672 2033 ptiming,
charlesmn 0:3ac96e360672 2034 pdynamic,
charlesmn 0:3ac96e360672 2035 psystem,
charlesmn 0:3ac96e360672 2036 ptuning_parms,
charlesmn 0:3ac96e360672 2037 pzone_cfg);
charlesmn 0:3ac96e360672 2038 break;
charlesmn 0:3ac96e360672 2039
charlesmn 0:3ac96e360672 2040 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_SHORT_TIMING:
charlesmn 0:3ac96e360672 2041 status = VL53L1_preset_mode_histogram_ranging_short_timing(
charlesmn 0:3ac96e360672 2042 phistpostprocess,
charlesmn 0:3ac96e360672 2043 pstatic,
charlesmn 0:3ac96e360672 2044 phistogram,
charlesmn 0:3ac96e360672 2045 pgeneral,
charlesmn 0:3ac96e360672 2046 ptiming,
charlesmn 0:3ac96e360672 2047 pdynamic,
charlesmn 0:3ac96e360672 2048 psystem,
charlesmn 0:3ac96e360672 2049 ptuning_parms,
charlesmn 0:3ac96e360672 2050 pzone_cfg);
charlesmn 0:3ac96e360672 2051 break;
charlesmn 0:3ac96e360672 2052
charlesmn 0:3ac96e360672 2053 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE:
charlesmn 0:3ac96e360672 2054 status = VL53L1_preset_mode_histogram_long_range(
charlesmn 0:3ac96e360672 2055 phistpostprocess,
charlesmn 0:3ac96e360672 2056 pstatic,
charlesmn 0:3ac96e360672 2057 phistogram,
charlesmn 0:3ac96e360672 2058 pgeneral,
charlesmn 0:3ac96e360672 2059 ptiming,
charlesmn 0:3ac96e360672 2060 pdynamic,
charlesmn 0:3ac96e360672 2061 psystem,
charlesmn 0:3ac96e360672 2062 ptuning_parms,
charlesmn 0:3ac96e360672 2063 pzone_cfg);
charlesmn 0:3ac96e360672 2064 break;
charlesmn 0:3ac96e360672 2065
charlesmn 0:3ac96e360672 2066 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE_MM1:
charlesmn 0:3ac96e360672 2067 status = VL53L1_preset_mode_histogram_long_range_mm1(
charlesmn 0:3ac96e360672 2068 phistpostprocess,
charlesmn 0:3ac96e360672 2069 pstatic,
charlesmn 0:3ac96e360672 2070 phistogram,
charlesmn 0:3ac96e360672 2071 pgeneral,
charlesmn 0:3ac96e360672 2072 ptiming,
charlesmn 0:3ac96e360672 2073 pdynamic,
charlesmn 0:3ac96e360672 2074 psystem,
charlesmn 0:3ac96e360672 2075 ptuning_parms,
charlesmn 0:3ac96e360672 2076 pzone_cfg);
charlesmn 0:3ac96e360672 2077 break;
charlesmn 0:3ac96e360672 2078
charlesmn 0:3ac96e360672 2079 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE_MM2:
charlesmn 0:3ac96e360672 2080 status = VL53L1_preset_mode_histogram_long_range_mm2(
charlesmn 0:3ac96e360672 2081 phistpostprocess,
charlesmn 0:3ac96e360672 2082 pstatic,
charlesmn 0:3ac96e360672 2083 phistogram,
charlesmn 0:3ac96e360672 2084 pgeneral,
charlesmn 0:3ac96e360672 2085 ptiming,
charlesmn 0:3ac96e360672 2086 pdynamic,
charlesmn 0:3ac96e360672 2087 psystem,
charlesmn 0:3ac96e360672 2088 ptuning_parms,
charlesmn 0:3ac96e360672 2089 pzone_cfg);
charlesmn 0:3ac96e360672 2090 break;
charlesmn 0:3ac96e360672 2091
charlesmn 0:3ac96e360672 2092 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE:
charlesmn 0:3ac96e360672 2093 status = VL53L1_preset_mode_histogram_medium_range(
charlesmn 0:3ac96e360672 2094 phistpostprocess,
charlesmn 0:3ac96e360672 2095 pstatic,
charlesmn 0:3ac96e360672 2096 phistogram,
charlesmn 0:3ac96e360672 2097 pgeneral,
charlesmn 0:3ac96e360672 2098 ptiming,
charlesmn 0:3ac96e360672 2099 pdynamic,
charlesmn 0:3ac96e360672 2100 psystem,
charlesmn 0:3ac96e360672 2101 ptuning_parms,
charlesmn 0:3ac96e360672 2102 pzone_cfg);
charlesmn 0:3ac96e360672 2103 break;
charlesmn 0:3ac96e360672 2104
charlesmn 0:3ac96e360672 2105 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE_MM1:
charlesmn 0:3ac96e360672 2106 status = VL53L1_preset_mode_histogram_medium_range_mm1(
charlesmn 0:3ac96e360672 2107 phistpostprocess,
charlesmn 0:3ac96e360672 2108 pstatic,
charlesmn 0:3ac96e360672 2109 phistogram,
charlesmn 0:3ac96e360672 2110 pgeneral,
charlesmn 0:3ac96e360672 2111 ptiming,
charlesmn 0:3ac96e360672 2112 pdynamic,
charlesmn 0:3ac96e360672 2113 psystem,
charlesmn 0:3ac96e360672 2114 ptuning_parms,
charlesmn 0:3ac96e360672 2115 pzone_cfg);
charlesmn 0:3ac96e360672 2116 break;
charlesmn 0:3ac96e360672 2117
charlesmn 0:3ac96e360672 2118 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE_MM2:
charlesmn 0:3ac96e360672 2119 status = VL53L1_preset_mode_histogram_medium_range_mm2(
charlesmn 0:3ac96e360672 2120 phistpostprocess,
charlesmn 0:3ac96e360672 2121 pstatic,
charlesmn 0:3ac96e360672 2122 phistogram,
charlesmn 0:3ac96e360672 2123 pgeneral,
charlesmn 0:3ac96e360672 2124 ptiming,
charlesmn 0:3ac96e360672 2125 pdynamic,
charlesmn 0:3ac96e360672 2126 psystem,
charlesmn 0:3ac96e360672 2127 ptuning_parms,
charlesmn 0:3ac96e360672 2128 pzone_cfg);
charlesmn 0:3ac96e360672 2129 break;
charlesmn 0:3ac96e360672 2130
charlesmn 0:3ac96e360672 2131 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE:
charlesmn 0:3ac96e360672 2132 status = VL53L1_preset_mode_histogram_short_range(
charlesmn 0:3ac96e360672 2133 phistpostprocess,
charlesmn 0:3ac96e360672 2134 pstatic,
charlesmn 0:3ac96e360672 2135 phistogram,
charlesmn 0:3ac96e360672 2136 pgeneral,
charlesmn 0:3ac96e360672 2137 ptiming,
charlesmn 0:3ac96e360672 2138 pdynamic,
charlesmn 0:3ac96e360672 2139 psystem,
charlesmn 0:3ac96e360672 2140 ptuning_parms,
charlesmn 0:3ac96e360672 2141 pzone_cfg);
charlesmn 0:3ac96e360672 2142 break;
charlesmn 0:3ac96e360672 2143
charlesmn 0:3ac96e360672 2144 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE_MM1:
charlesmn 0:3ac96e360672 2145 status = VL53L1_preset_mode_histogram_short_range_mm1(
charlesmn 0:3ac96e360672 2146 phistpostprocess,
charlesmn 0:3ac96e360672 2147 pstatic,
charlesmn 0:3ac96e360672 2148 phistogram,
charlesmn 0:3ac96e360672 2149 pgeneral,
charlesmn 0:3ac96e360672 2150 ptiming,
charlesmn 0:3ac96e360672 2151 pdynamic,
charlesmn 0:3ac96e360672 2152 psystem,
charlesmn 0:3ac96e360672 2153 ptuning_parms,
charlesmn 0:3ac96e360672 2154 pzone_cfg);
charlesmn 0:3ac96e360672 2155 break;
charlesmn 0:3ac96e360672 2156
charlesmn 0:3ac96e360672 2157 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE_MM2:
charlesmn 0:3ac96e360672 2158 status = VL53L1_preset_mode_histogram_short_range_mm2(
charlesmn 0:3ac96e360672 2159 phistpostprocess,
charlesmn 0:3ac96e360672 2160 pstatic,
charlesmn 0:3ac96e360672 2161 phistogram,
charlesmn 0:3ac96e360672 2162 pgeneral,
charlesmn 0:3ac96e360672 2163 ptiming,
charlesmn 0:3ac96e360672 2164 pdynamic,
charlesmn 0:3ac96e360672 2165 psystem,
charlesmn 0:3ac96e360672 2166 ptuning_parms,
charlesmn 0:3ac96e360672 2167 pzone_cfg);
charlesmn 0:3ac96e360672 2168 break;
charlesmn 0:3ac96e360672 2169
charlesmn 0:3ac96e360672 2170 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_CHARACTERISATION:
charlesmn 0:3ac96e360672 2171 status = VL53L1_preset_mode_histogram_characterisation(
charlesmn 0:3ac96e360672 2172 phistpostprocess,
charlesmn 0:3ac96e360672 2173 pstatic,
charlesmn 0:3ac96e360672 2174 phistogram,
charlesmn 0:3ac96e360672 2175 pgeneral,
charlesmn 0:3ac96e360672 2176 ptiming,
charlesmn 0:3ac96e360672 2177 pdynamic,
charlesmn 0:3ac96e360672 2178 psystem,
charlesmn 0:3ac96e360672 2179 ptuning_parms,
charlesmn 0:3ac96e360672 2180 pzone_cfg);
charlesmn 0:3ac96e360672 2181 break;
charlesmn 0:3ac96e360672 2182
charlesmn 0:3ac96e360672 2183 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_XTALK_PLANAR:
charlesmn 0:3ac96e360672 2184 status = VL53L1_preset_mode_histogram_xtalk_planar(
charlesmn 0:3ac96e360672 2185 phistpostprocess,
charlesmn 0:3ac96e360672 2186 pstatic,
charlesmn 0:3ac96e360672 2187 phistogram,
charlesmn 0:3ac96e360672 2188 pgeneral,
charlesmn 0:3ac96e360672 2189 ptiming,
charlesmn 0:3ac96e360672 2190 pdynamic,
charlesmn 0:3ac96e360672 2191 psystem,
charlesmn 0:3ac96e360672 2192 ptuning_parms,
charlesmn 0:3ac96e360672 2193 pzone_cfg);
charlesmn 0:3ac96e360672 2194 break;
charlesmn 0:3ac96e360672 2195
charlesmn 0:3ac96e360672 2196 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_XTALK_MM1:
charlesmn 0:3ac96e360672 2197 status = VL53L1_preset_mode_histogram_xtalk_mm1(
charlesmn 0:3ac96e360672 2198 phistpostprocess,
charlesmn 0:3ac96e360672 2199 pstatic,
charlesmn 0:3ac96e360672 2200 phistogram,
charlesmn 0:3ac96e360672 2201 pgeneral,
charlesmn 0:3ac96e360672 2202 ptiming,
charlesmn 0:3ac96e360672 2203 pdynamic,
charlesmn 0:3ac96e360672 2204 psystem,
charlesmn 0:3ac96e360672 2205 ptuning_parms,
charlesmn 0:3ac96e360672 2206 pzone_cfg);
charlesmn 0:3ac96e360672 2207 break;
charlesmn 0:3ac96e360672 2208
charlesmn 0:3ac96e360672 2209 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_XTALK_MM2:
charlesmn 0:3ac96e360672 2210 status = VL53L1_preset_mode_histogram_xtalk_mm2(
charlesmn 0:3ac96e360672 2211 phistpostprocess,
charlesmn 0:3ac96e360672 2212 pstatic,
charlesmn 0:3ac96e360672 2213 phistogram,
charlesmn 0:3ac96e360672 2214 pgeneral,
charlesmn 0:3ac96e360672 2215 ptiming,
charlesmn 0:3ac96e360672 2216 pdynamic,
charlesmn 0:3ac96e360672 2217 psystem,
charlesmn 0:3ac96e360672 2218 ptuning_parms,
charlesmn 0:3ac96e360672 2219 pzone_cfg);
charlesmn 0:3ac96e360672 2220 break;
charlesmn 0:3ac96e360672 2221
charlesmn 0:3ac96e360672 2222 case VL53L1_DEVICEPRESETMODE_OLT:
charlesmn 0:3ac96e360672 2223 status = VL53L1_preset_mode_olt(
charlesmn 0:3ac96e360672 2224 pstatic,
charlesmn 0:3ac96e360672 2225 phistogram,
charlesmn 0:3ac96e360672 2226 pgeneral,
charlesmn 0:3ac96e360672 2227 ptiming,
charlesmn 0:3ac96e360672 2228 pdynamic,
charlesmn 0:3ac96e360672 2229 psystem,
charlesmn 0:3ac96e360672 2230 ptuning_parms,
charlesmn 0:3ac96e360672 2231 pzone_cfg);
charlesmn 0:3ac96e360672 2232 break;
charlesmn 0:3ac96e360672 2233
charlesmn 0:3ac96e360672 2234 case VL53L1_DEVICEPRESETMODE_SINGLESHOT_RANGING:
charlesmn 0:3ac96e360672 2235 status = VL53L1_preset_mode_singleshot_ranging(
charlesmn 0:3ac96e360672 2236 pstatic,
charlesmn 0:3ac96e360672 2237 phistogram,
charlesmn 0:3ac96e360672 2238 pgeneral,
charlesmn 0:3ac96e360672 2239 ptiming,
charlesmn 0:3ac96e360672 2240 pdynamic,
charlesmn 0:3ac96e360672 2241 psystem,
charlesmn 0:3ac96e360672 2242 ptuning_parms,
charlesmn 0:3ac96e360672 2243 pzone_cfg);
charlesmn 0:3ac96e360672 2244 break;
charlesmn 0:3ac96e360672 2245
charlesmn 0:3ac96e360672 2246 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_SHORT_RANGE:
charlesmn 0:3ac96e360672 2247 status = VL53L1_preset_mode_low_power_auto_short_ranging(
charlesmn 0:3ac96e360672 2248 pstatic,
charlesmn 0:3ac96e360672 2249 phistogram,
charlesmn 0:3ac96e360672 2250 pgeneral,
charlesmn 0:3ac96e360672 2251 ptiming,
charlesmn 0:3ac96e360672 2252 pdynamic,
charlesmn 0:3ac96e360672 2253 psystem,
charlesmn 0:3ac96e360672 2254 ptuning_parms,
charlesmn 0:3ac96e360672 2255 pzone_cfg,
charlesmn 0:3ac96e360672 2256 plpadata);
charlesmn 0:3ac96e360672 2257 break;
charlesmn 0:3ac96e360672 2258
charlesmn 0:3ac96e360672 2259 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_MEDIUM_RANGE:
charlesmn 0:3ac96e360672 2260 status = VL53L1_preset_mode_low_power_auto_ranging(
charlesmn 0:3ac96e360672 2261 pstatic,
charlesmn 0:3ac96e360672 2262 phistogram,
charlesmn 0:3ac96e360672 2263 pgeneral,
charlesmn 0:3ac96e360672 2264 ptiming,
charlesmn 0:3ac96e360672 2265 pdynamic,
charlesmn 0:3ac96e360672 2266 psystem,
charlesmn 0:3ac96e360672 2267 ptuning_parms,
charlesmn 0:3ac96e360672 2268 pzone_cfg,
charlesmn 0:3ac96e360672 2269 plpadata);
charlesmn 0:3ac96e360672 2270 break;
charlesmn 0:3ac96e360672 2271
charlesmn 0:3ac96e360672 2272 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_LONG_RANGE:
charlesmn 0:3ac96e360672 2273 status = VL53L1_preset_mode_low_power_auto_long_ranging(
charlesmn 0:3ac96e360672 2274 pstatic,
charlesmn 0:3ac96e360672 2275 phistogram,
charlesmn 0:3ac96e360672 2276 pgeneral,
charlesmn 0:3ac96e360672 2277 ptiming,
charlesmn 0:3ac96e360672 2278 pdynamic,
charlesmn 0:3ac96e360672 2279 psystem,
charlesmn 0:3ac96e360672 2280 ptuning_parms,
charlesmn 0:3ac96e360672 2281 pzone_cfg,
charlesmn 0:3ac96e360672 2282 plpadata);
charlesmn 0:3ac96e360672 2283 break;
charlesmn 0:3ac96e360672 2284
charlesmn 0:3ac96e360672 2285
charlesmn 0:3ac96e360672 2286 case VL53L1_DEVICEPRESETMODE_SPECIAL_HISTOGRAM_SHORT_RANGE:
charlesmn 0:3ac96e360672 2287 status = VL53L1_preset_mode_special_histogram_short_range(
charlesmn 0:3ac96e360672 2288 phistpostprocess,
charlesmn 0:3ac96e360672 2289 pstatic,
charlesmn 0:3ac96e360672 2290 phistogram,
charlesmn 0:3ac96e360672 2291 pgeneral,
charlesmn 0:3ac96e360672 2292 ptiming,
charlesmn 0:3ac96e360672 2293 pdynamic,
charlesmn 0:3ac96e360672 2294 psystem,
charlesmn 0:3ac96e360672 2295 ptuning_parms,
charlesmn 0:3ac96e360672 2296 pzone_cfg);
charlesmn 0:3ac96e360672 2297 break;
charlesmn 0:3ac96e360672 2298
charlesmn 0:3ac96e360672 2299 default:
charlesmn 0:3ac96e360672 2300 status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn 0:3ac96e360672 2301 break;
charlesmn 0:3ac96e360672 2302
charlesmn 0:3ac96e360672 2303 }
charlesmn 0:3ac96e360672 2304
charlesmn 0:3ac96e360672 2305
charlesmn 0:3ac96e360672 2306
charlesmn 0:3ac96e360672 2307 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 2308
charlesmn 0:3ac96e360672 2309 pstatic->dss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 2310 dss_config__target_total_rate_mcps;
charlesmn 0:3ac96e360672 2311 pdev->dss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 2312 dss_config__target_total_rate_mcps;
charlesmn 0:3ac96e360672 2313
charlesmn 0:3ac96e360672 2314 }
charlesmn 0:3ac96e360672 2315
charlesmn 0:3ac96e360672 2316
charlesmn 0:3ac96e360672 2317
charlesmn 0:3ac96e360672 2318 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 2319 status =
charlesmn 0:3ac96e360672 2320 VL53L1_set_timeouts_us(
charlesmn 0:3ac96e360672 2321 Dev,
charlesmn 0:3ac96e360672 2322 phasecal_config_timeout_us,
charlesmn 0:3ac96e360672 2323 mm_config_timeout_us,
charlesmn 0:3ac96e360672 2324 range_config_timeout_us);
charlesmn 0:3ac96e360672 2325
charlesmn 0:3ac96e360672 2326 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 2327 status =
charlesmn 0:3ac96e360672 2328 VL53L1_set_inter_measurement_period_ms(
charlesmn 0:3ac96e360672 2329 Dev,
charlesmn 0:3ac96e360672 2330 inter_measurement_period_ms);
charlesmn 0:3ac96e360672 2331
charlesmn 0:3ac96e360672 2332
charlesmn 0:3ac96e360672 2333
charlesmn 0:3ac96e360672 2334 V53L1_init_zone_results_structure(
charlesmn 0:3ac96e360672 2335 pdev->zone_cfg.active_zones+1,
charlesmn 0:3ac96e360672 2336 &(pres->zone_results));
charlesmn 0:3ac96e360672 2337
charlesmn 0:3ac96e360672 2338 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2339
charlesmn 0:3ac96e360672 2340 return status;
charlesmn 0:3ac96e360672 2341 }
charlesmn 0:3ac96e360672 2342
charlesmn 0:3ac96e360672 2343
charlesmn 0:3ac96e360672 2344 VL53L1_Error VL53L1_set_zone_preset(
charlesmn 0:3ac96e360672 2345 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2346 VL53L1_DeviceZonePreset zone_preset)
charlesmn 0:3ac96e360672 2347 {
charlesmn 0:3ac96e360672 2348
charlesmn 0:3ac96e360672 2349
charlesmn 0:3ac96e360672 2350 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2351 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2352
charlesmn 0:3ac96e360672 2353 VL53L1_general_config_t *pgeneral = &(pdev->gen_cfg);
charlesmn 0:3ac96e360672 2354 VL53L1_zone_config_t *pzone_cfg = &(pdev->zone_cfg);
charlesmn 0:3ac96e360672 2355
charlesmn 0:3ac96e360672 2356 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2357
charlesmn 0:3ac96e360672 2358
charlesmn 0:3ac96e360672 2359 pdev->zone_preset = zone_preset;
charlesmn 0:3ac96e360672 2360
charlesmn 0:3ac96e360672 2361
charlesmn 0:3ac96e360672 2362
charlesmn 0:3ac96e360672 2363 switch (zone_preset) {
charlesmn 0:3ac96e360672 2364
charlesmn 0:3ac96e360672 2365 case VL53L1_DEVICEZONEPRESET_XTALK_PLANAR:
charlesmn 0:3ac96e360672 2366 status =
charlesmn 0:3ac96e360672 2367 VL53L1_zone_preset_xtalk_planar(
charlesmn 0:3ac96e360672 2368 pgeneral,
charlesmn 0:3ac96e360672 2369 pzone_cfg);
charlesmn 0:3ac96e360672 2370 break;
charlesmn 0:3ac96e360672 2371
charlesmn 0:3ac96e360672 2372 case VL53L1_DEVICEZONEPRESET_1X1_SIZE_16X16:
charlesmn 0:3ac96e360672 2373 status =
charlesmn 0:3ac96e360672 2374 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 2375 8, 1, 1,
charlesmn 0:3ac96e360672 2376 8, 1, 1,
charlesmn 0:3ac96e360672 2377 15, 15,
charlesmn 0:3ac96e360672 2378 pzone_cfg);
charlesmn 0:3ac96e360672 2379 break;
charlesmn 0:3ac96e360672 2380
charlesmn 0:3ac96e360672 2381 case VL53L1_DEVICEZONEPRESET_1X2_SIZE_16X8:
charlesmn 0:3ac96e360672 2382 status =
charlesmn 0:3ac96e360672 2383 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 2384 8, 1, 1,
charlesmn 0:3ac96e360672 2385 4, 8, 2,
charlesmn 0:3ac96e360672 2386 15, 7,
charlesmn 0:3ac96e360672 2387 pzone_cfg);
charlesmn 0:3ac96e360672 2388 break;
charlesmn 0:3ac96e360672 2389
charlesmn 0:3ac96e360672 2390 case VL53L1_DEVICEZONEPRESET_2X1_SIZE_8X16:
charlesmn 0:3ac96e360672 2391 status =
charlesmn 0:3ac96e360672 2392 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 2393 4, 8, 2,
charlesmn 0:3ac96e360672 2394 8, 1, 1,
charlesmn 0:3ac96e360672 2395 7, 15,
charlesmn 0:3ac96e360672 2396 pzone_cfg);
charlesmn 0:3ac96e360672 2397 break;
charlesmn 0:3ac96e360672 2398
charlesmn 0:3ac96e360672 2399 case VL53L1_DEVICEZONEPRESET_2X2_SIZE_8X8:
charlesmn 0:3ac96e360672 2400 status =
charlesmn 0:3ac96e360672 2401 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 2402 4, 8, 2,
charlesmn 0:3ac96e360672 2403 4, 8, 2,
charlesmn 0:3ac96e360672 2404 7, 7,
charlesmn 0:3ac96e360672 2405 pzone_cfg);
charlesmn 0:3ac96e360672 2406 break;
charlesmn 0:3ac96e360672 2407
charlesmn 0:3ac96e360672 2408 case VL53L1_DEVICEZONEPRESET_3X3_SIZE_5X5:
charlesmn 0:3ac96e360672 2409 status =
charlesmn 0:3ac96e360672 2410 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 2411 2, 5, 3,
charlesmn 0:3ac96e360672 2412 2, 5, 3,
charlesmn 0:3ac96e360672 2413 4, 4,
charlesmn 0:3ac96e360672 2414 pzone_cfg);
charlesmn 0:3ac96e360672 2415 break;
charlesmn 0:3ac96e360672 2416
charlesmn 0:3ac96e360672 2417 case VL53L1_DEVICEZONEPRESET_4X4_SIZE_4X4:
charlesmn 0:3ac96e360672 2418 status =
charlesmn 0:3ac96e360672 2419 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 2420 2, 4, 4,
charlesmn 0:3ac96e360672 2421 2, 4, 4,
charlesmn 0:3ac96e360672 2422 3, 3,
charlesmn 0:3ac96e360672 2423 pzone_cfg);
charlesmn 0:3ac96e360672 2424 break;
charlesmn 0:3ac96e360672 2425
charlesmn 0:3ac96e360672 2426 case VL53L1_DEVICEZONEPRESET_5X5_SIZE_4X4:
charlesmn 0:3ac96e360672 2427 status =
charlesmn 0:3ac96e360672 2428 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 2429 2, 3, 5,
charlesmn 0:3ac96e360672 2430 2, 3, 5,
charlesmn 0:3ac96e360672 2431 3, 3,
charlesmn 0:3ac96e360672 2432 pzone_cfg);
charlesmn 0:3ac96e360672 2433 break;
charlesmn 0:3ac96e360672 2434
charlesmn 0:3ac96e360672 2435 case VL53L1_DEVICEZONEPRESET_11X11_SIZE_5X5:
charlesmn 0:3ac96e360672 2436 status =
charlesmn 0:3ac96e360672 2437 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 2438 3, 1, 11,
charlesmn 0:3ac96e360672 2439 3, 1, 11,
charlesmn 0:3ac96e360672 2440 4, 4,
charlesmn 0:3ac96e360672 2441 pzone_cfg);
charlesmn 0:3ac96e360672 2442 break;
charlesmn 0:3ac96e360672 2443
charlesmn 0:3ac96e360672 2444 case VL53L1_DEVICEZONEPRESET_13X13_SIZE_4X4:
charlesmn 0:3ac96e360672 2445 status =
charlesmn 0:3ac96e360672 2446 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 2447 2, 1, 13,
charlesmn 0:3ac96e360672 2448 2, 1, 13,
charlesmn 0:3ac96e360672 2449 3, 3,
charlesmn 0:3ac96e360672 2450 pzone_cfg);
charlesmn 0:3ac96e360672 2451
charlesmn 0:3ac96e360672 2452 break;
charlesmn 0:3ac96e360672 2453
charlesmn 0:3ac96e360672 2454 case VL53L1_DEVICEZONEPRESET_1X1_SIZE_4X4_POS_8X8:
charlesmn 0:3ac96e360672 2455 status =
charlesmn 0:3ac96e360672 2456 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 2457 8, 1, 1,
charlesmn 0:3ac96e360672 2458 8, 1, 1,
charlesmn 0:3ac96e360672 2459 3, 3,
charlesmn 0:3ac96e360672 2460 pzone_cfg);
charlesmn 0:3ac96e360672 2461 break;
charlesmn 0:3ac96e360672 2462
charlesmn 0:3ac96e360672 2463 }
charlesmn 0:3ac96e360672 2464
charlesmn 0:3ac96e360672 2465
charlesmn 0:3ac96e360672 2466
charlesmn 0:3ac96e360672 2467 if (pzone_cfg->active_zones == 0)
charlesmn 0:3ac96e360672 2468 pdev->gen_cfg.global_config__stream_divider = 0;
charlesmn 0:3ac96e360672 2469 else if (pzone_cfg->active_zones < VL53L1_MAX_USER_ZONES)
charlesmn 0:3ac96e360672 2470 pdev->gen_cfg.global_config__stream_divider =
charlesmn 0:3ac96e360672 2471 pzone_cfg->active_zones + 1;
charlesmn 0:3ac96e360672 2472 else
charlesmn 0:3ac96e360672 2473 pdev->gen_cfg.global_config__stream_divider =
charlesmn 0:3ac96e360672 2474 VL53L1_MAX_USER_ZONES + 1;
charlesmn 0:3ac96e360672 2475
charlesmn 0:3ac96e360672 2476 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2477
charlesmn 0:3ac96e360672 2478 return status;
charlesmn 0:3ac96e360672 2479 }
charlesmn 0:3ac96e360672 2480
charlesmn 0:3ac96e360672 2481
charlesmn 0:3ac96e360672 2482 VL53L1_Error VL53L1_enable_xtalk_compensation(
charlesmn 0:3ac96e360672 2483 VL53L1_DEV Dev)
charlesmn 0:3ac96e360672 2484 {
charlesmn 0:3ac96e360672 2485
charlesmn 0:3ac96e360672 2486
charlesmn 0:3ac96e360672 2487 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2488 uint32_t tempu32;
charlesmn 0:3ac96e360672 2489
charlesmn 0:3ac96e360672 2490 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2491 VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg);
charlesmn 0:3ac96e360672 2492 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn 0:3ac96e360672 2493 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer);
charlesmn 0:3ac96e360672 2494
charlesmn 0:3ac96e360672 2495 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2496
charlesmn 0:3ac96e360672 2497
charlesmn 0:3ac96e360672 2498 tempu32 = VL53L1_calc_crosstalk_plane_offset_with_margin(
charlesmn 0:3ac96e360672 2499 pC->algo__crosstalk_compensation_plane_offset_kcps,
charlesmn 0:3ac96e360672 2500 pC->lite_mode_crosstalk_margin_kcps);
charlesmn 0:3ac96e360672 2501 if (tempu32 > 0xFFFF)
charlesmn 0:3ac96e360672 2502 tempu32 = 0xFFFF;
charlesmn 0:3ac96e360672 2503
charlesmn 0:3ac96e360672 2504 pN->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 2505 (uint16_t)tempu32;
charlesmn 0:3ac96e360672 2506
charlesmn 0:3ac96e360672 2507 pN->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 2508 pC->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 2509
charlesmn 0:3ac96e360672 2510 pN->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 2511 pC->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 2512
charlesmn 0:3ac96e360672 2513
charlesmn 0:3ac96e360672 2514 pHP->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 2515 VL53L1_calc_crosstalk_plane_offset_with_margin(
charlesmn 0:3ac96e360672 2516 pC->algo__crosstalk_compensation_plane_offset_kcps,
charlesmn 0:3ac96e360672 2517 pC->histogram_mode_crosstalk_margin_kcps);
charlesmn 0:3ac96e360672 2518
charlesmn 0:3ac96e360672 2519 pHP->algo__crosstalk_compensation_x_plane_gradient_kcps
charlesmn 0:3ac96e360672 2520 = pC->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 2521 pHP->algo__crosstalk_compensation_y_plane_gradient_kcps
charlesmn 0:3ac96e360672 2522 = pC->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 2523
charlesmn 0:3ac96e360672 2524
charlesmn 0:3ac96e360672 2525
charlesmn 0:3ac96e360672 2526 pC->global_crosstalk_compensation_enable = 0x01;
charlesmn 0:3ac96e360672 2527
charlesmn 0:3ac96e360672 2528 pHP->algo__crosstalk_compensation_enable =
charlesmn 0:3ac96e360672 2529 pC->global_crosstalk_compensation_enable;
charlesmn 0:3ac96e360672 2530
charlesmn 0:3ac96e360672 2531
charlesmn 0:3ac96e360672 2532
charlesmn 0:3ac96e360672 2533
charlesmn 0:3ac96e360672 2534 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 2535 pC->crosstalk_range_ignore_threshold_rate_mcps =
charlesmn 0:3ac96e360672 2536 VL53L1_calc_range_ignore_threshold(
charlesmn 0:3ac96e360672 2537 pC->algo__crosstalk_compensation_plane_offset_kcps,
charlesmn 0:3ac96e360672 2538 pC->algo__crosstalk_compensation_x_plane_gradient_kcps,
charlesmn 0:3ac96e360672 2539 pC->algo__crosstalk_compensation_y_plane_gradient_kcps,
charlesmn 0:3ac96e360672 2540 pC->crosstalk_range_ignore_threshold_mult);
charlesmn 0:3ac96e360672 2541 }
charlesmn 0:3ac96e360672 2542
charlesmn 0:3ac96e360672 2543
charlesmn 0:3ac96e360672 2544
charlesmn 0:3ac96e360672 2545 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 2546 status =
charlesmn 0:3ac96e360672 2547 VL53L1_set_customer_nvm_managed(
charlesmn 0:3ac96e360672 2548 Dev,
charlesmn 0:3ac96e360672 2549 &(pdev->customer));
charlesmn 0:3ac96e360672 2550
charlesmn 0:3ac96e360672 2551 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2552
charlesmn 0:3ac96e360672 2553 return status;
charlesmn 0:3ac96e360672 2554
charlesmn 0:3ac96e360672 2555 }
charlesmn 0:3ac96e360672 2556
charlesmn 0:3ac96e360672 2557 void VL53L1_get_xtalk_compensation_enable(
charlesmn 0:3ac96e360672 2558 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2559 uint8_t *pcrosstalk_compensation_enable)
charlesmn 0:3ac96e360672 2560 {
charlesmn 0:3ac96e360672 2561
charlesmn 0:3ac96e360672 2562
charlesmn 0:3ac96e360672 2563 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2564
charlesmn 0:3ac96e360672 2565 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2566
charlesmn 0:3ac96e360672 2567
charlesmn 0:3ac96e360672 2568
charlesmn 0:3ac96e360672 2569 *pcrosstalk_compensation_enable =
charlesmn 0:3ac96e360672 2570 pdev->xtalk_cfg.global_crosstalk_compensation_enable;
charlesmn 0:3ac96e360672 2571
charlesmn 0:3ac96e360672 2572 }
charlesmn 0:3ac96e360672 2573
charlesmn 0:3ac96e360672 2574
charlesmn 0:3ac96e360672 2575 VL53L1_Error VL53L1_get_lite_xtalk_margin_kcps(
charlesmn 0:3ac96e360672 2576 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2577 int16_t *pxtalk_margin)
charlesmn 0:3ac96e360672 2578 {
charlesmn 0:3ac96e360672 2579
charlesmn 0:3ac96e360672 2580
charlesmn 0:3ac96e360672 2581
charlesmn 0:3ac96e360672 2582 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2583
charlesmn 0:3ac96e360672 2584 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2585
charlesmn 0:3ac96e360672 2586 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2587
charlesmn 0:3ac96e360672 2588 *pxtalk_margin = pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps;
charlesmn 0:3ac96e360672 2589
charlesmn 0:3ac96e360672 2590 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2591
charlesmn 0:3ac96e360672 2592 return status;
charlesmn 0:3ac96e360672 2593
charlesmn 0:3ac96e360672 2594 }
charlesmn 0:3ac96e360672 2595
charlesmn 0:3ac96e360672 2596 VL53L1_Error VL53L1_set_lite_xtalk_margin_kcps(
charlesmn 0:3ac96e360672 2597 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2598 int16_t xtalk_margin)
charlesmn 0:3ac96e360672 2599 {
charlesmn 0:3ac96e360672 2600
charlesmn 0:3ac96e360672 2601
charlesmn 0:3ac96e360672 2602
charlesmn 0:3ac96e360672 2603 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2604
charlesmn 0:3ac96e360672 2605 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2606
charlesmn 0:3ac96e360672 2607 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2608
charlesmn 0:3ac96e360672 2609 pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps = xtalk_margin;
charlesmn 0:3ac96e360672 2610
charlesmn 0:3ac96e360672 2611 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2612
charlesmn 0:3ac96e360672 2613 return status;
charlesmn 0:3ac96e360672 2614 }
charlesmn 0:3ac96e360672 2615
charlesmn 0:3ac96e360672 2616
charlesmn 0:3ac96e360672 2617 VL53L1_Error VL53L1_get_histogram_xtalk_margin_kcps(
charlesmn 0:3ac96e360672 2618 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2619 int16_t *pxtalk_margin)
charlesmn 0:3ac96e360672 2620 {
charlesmn 0:3ac96e360672 2621
charlesmn 0:3ac96e360672 2622
charlesmn 0:3ac96e360672 2623
charlesmn 0:3ac96e360672 2624 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2625
charlesmn 0:3ac96e360672 2626 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2627
charlesmn 0:3ac96e360672 2628 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2629
charlesmn 0:3ac96e360672 2630 *pxtalk_margin = pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps;
charlesmn 0:3ac96e360672 2631
charlesmn 0:3ac96e360672 2632 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2633
charlesmn 0:3ac96e360672 2634 return status;
charlesmn 0:3ac96e360672 2635
charlesmn 0:3ac96e360672 2636 }
charlesmn 0:3ac96e360672 2637
charlesmn 0:3ac96e360672 2638 VL53L1_Error VL53L1_set_histogram_xtalk_margin_kcps(
charlesmn 0:3ac96e360672 2639 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2640 int16_t xtalk_margin)
charlesmn 0:3ac96e360672 2641 {
charlesmn 0:3ac96e360672 2642
charlesmn 0:3ac96e360672 2643
charlesmn 0:3ac96e360672 2644
charlesmn 0:3ac96e360672 2645 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2646
charlesmn 0:3ac96e360672 2647 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2648
charlesmn 0:3ac96e360672 2649 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2650
charlesmn 0:3ac96e360672 2651 pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps = xtalk_margin;
charlesmn 0:3ac96e360672 2652
charlesmn 0:3ac96e360672 2653 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2654
charlesmn 0:3ac96e360672 2655 return status;
charlesmn 0:3ac96e360672 2656 }
charlesmn 0:3ac96e360672 2657
charlesmn 0:3ac96e360672 2658 VL53L1_Error VL53L1_restore_xtalk_nvm_default(
charlesmn 0:3ac96e360672 2659 VL53L1_DEV Dev)
charlesmn 0:3ac96e360672 2660 {
charlesmn 0:3ac96e360672 2661
charlesmn 0:3ac96e360672 2662
charlesmn 0:3ac96e360672 2663
charlesmn 0:3ac96e360672 2664 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2665
charlesmn 0:3ac96e360672 2666 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2667 VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg);
charlesmn 0:3ac96e360672 2668
charlesmn 0:3ac96e360672 2669 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2670
charlesmn 0:3ac96e360672 2671 pC->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 2672 pC->nvm_default__crosstalk_compensation_plane_offset_kcps;
charlesmn 0:3ac96e360672 2673 pC->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 2674 pC->nvm_default__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 2675 pC->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 2676 pC->nvm_default__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 2677
charlesmn 0:3ac96e360672 2678 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2679
charlesmn 0:3ac96e360672 2680 return status;
charlesmn 0:3ac96e360672 2681 }
charlesmn 0:3ac96e360672 2682
charlesmn 0:3ac96e360672 2683 VL53L1_Error VL53L1_disable_xtalk_compensation(
charlesmn 0:3ac96e360672 2684 VL53L1_DEV Dev)
charlesmn 0:3ac96e360672 2685 {
charlesmn 0:3ac96e360672 2686
charlesmn 0:3ac96e360672 2687
charlesmn 0:3ac96e360672 2688 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2689
charlesmn 0:3ac96e360672 2690 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2691 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn 0:3ac96e360672 2692 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer);
charlesmn 0:3ac96e360672 2693
charlesmn 0:3ac96e360672 2694 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2695
charlesmn 0:3ac96e360672 2696
charlesmn 0:3ac96e360672 2697 pN->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 2698 0x00;
charlesmn 0:3ac96e360672 2699
charlesmn 0:3ac96e360672 2700 pN->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 2701 0x00;
charlesmn 0:3ac96e360672 2702
charlesmn 0:3ac96e360672 2703 pN->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 2704 0x00;
charlesmn 0:3ac96e360672 2705
charlesmn 0:3ac96e360672 2706
charlesmn 0:3ac96e360672 2707
charlesmn 0:3ac96e360672 2708 pdev->xtalk_cfg.global_crosstalk_compensation_enable = 0x00;
charlesmn 0:3ac96e360672 2709
charlesmn 0:3ac96e360672 2710 pHP->algo__crosstalk_compensation_enable =
charlesmn 0:3ac96e360672 2711 pdev->xtalk_cfg.global_crosstalk_compensation_enable;
charlesmn 0:3ac96e360672 2712
charlesmn 0:3ac96e360672 2713
charlesmn 0:3ac96e360672 2714
charlesmn 0:3ac96e360672 2715 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 2716 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps =
charlesmn 0:3ac96e360672 2717 0x0000;
charlesmn 0:3ac96e360672 2718 }
charlesmn 0:3ac96e360672 2719
charlesmn 0:3ac96e360672 2720
charlesmn 0:3ac96e360672 2721
charlesmn 0:3ac96e360672 2722 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 2723 status =
charlesmn 0:3ac96e360672 2724 VL53L1_set_customer_nvm_managed(
charlesmn 0:3ac96e360672 2725 Dev,
charlesmn 0:3ac96e360672 2726 &(pdev->customer));
charlesmn 0:3ac96e360672 2727 }
charlesmn 0:3ac96e360672 2728 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2729
charlesmn 0:3ac96e360672 2730 return status;
charlesmn 0:3ac96e360672 2731
charlesmn 0:3ac96e360672 2732 }
charlesmn 0:3ac96e360672 2733
charlesmn 0:3ac96e360672 2734
charlesmn 0:3ac96e360672 2735 VL53L1_Error VL53L1_get_histogram_phase_consistency(
charlesmn 0:3ac96e360672 2736 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2737 uint8_t *pphase_consistency)
charlesmn 0:3ac96e360672 2738 {
charlesmn 0:3ac96e360672 2739
charlesmn 0:3ac96e360672 2740
charlesmn 0:3ac96e360672 2741
charlesmn 0:3ac96e360672 2742 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2743
charlesmn 0:3ac96e360672 2744 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2745 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn 0:3ac96e360672 2746
charlesmn 0:3ac96e360672 2747 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2748
charlesmn 0:3ac96e360672 2749 *pphase_consistency =
charlesmn 0:3ac96e360672 2750 pHP->algo__consistency_check__phase_tolerance;
charlesmn 0:3ac96e360672 2751
charlesmn 0:3ac96e360672 2752 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2753
charlesmn 0:3ac96e360672 2754 return status;
charlesmn 0:3ac96e360672 2755
charlesmn 0:3ac96e360672 2756 }
charlesmn 0:3ac96e360672 2757
charlesmn 0:3ac96e360672 2758 VL53L1_Error VL53L1_set_histogram_phase_consistency(
charlesmn 0:3ac96e360672 2759 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2760 uint8_t phase_consistency)
charlesmn 0:3ac96e360672 2761 {
charlesmn 0:3ac96e360672 2762
charlesmn 0:3ac96e360672 2763
charlesmn 0:3ac96e360672 2764
charlesmn 0:3ac96e360672 2765 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2766
charlesmn 0:3ac96e360672 2767 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2768
charlesmn 0:3ac96e360672 2769 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2770
charlesmn 0:3ac96e360672 2771 pdev->histpostprocess.algo__consistency_check__phase_tolerance =
charlesmn 0:3ac96e360672 2772 phase_consistency;
charlesmn 0:3ac96e360672 2773
charlesmn 0:3ac96e360672 2774 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2775
charlesmn 0:3ac96e360672 2776 return status;
charlesmn 0:3ac96e360672 2777
charlesmn 0:3ac96e360672 2778 }
charlesmn 0:3ac96e360672 2779
charlesmn 0:3ac96e360672 2780 VL53L1_Error VL53L1_get_histogram_event_consistency(
charlesmn 0:3ac96e360672 2781 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2782 uint8_t *pevent_consistency)
charlesmn 0:3ac96e360672 2783 {
charlesmn 0:3ac96e360672 2784
charlesmn 0:3ac96e360672 2785
charlesmn 0:3ac96e360672 2786
charlesmn 0:3ac96e360672 2787 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2788
charlesmn 0:3ac96e360672 2789 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2790
charlesmn 0:3ac96e360672 2791 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2792
charlesmn 0:3ac96e360672 2793 *pevent_consistency =
charlesmn 0:3ac96e360672 2794 pdev->histpostprocess.algo__consistency_check__event_sigma;
charlesmn 0:3ac96e360672 2795
charlesmn 0:3ac96e360672 2796 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2797
charlesmn 0:3ac96e360672 2798 return status;
charlesmn 0:3ac96e360672 2799
charlesmn 0:3ac96e360672 2800 }
charlesmn 0:3ac96e360672 2801
charlesmn 0:3ac96e360672 2802 VL53L1_Error VL53L1_set_histogram_event_consistency(
charlesmn 0:3ac96e360672 2803 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2804 uint8_t event_consistency)
charlesmn 0:3ac96e360672 2805 {
charlesmn 0:3ac96e360672 2806
charlesmn 0:3ac96e360672 2807
charlesmn 0:3ac96e360672 2808
charlesmn 0:3ac96e360672 2809 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2810
charlesmn 0:3ac96e360672 2811 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2812
charlesmn 0:3ac96e360672 2813 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2814
charlesmn 0:3ac96e360672 2815 pdev->histpostprocess.algo__consistency_check__event_sigma =
charlesmn 0:3ac96e360672 2816 event_consistency;
charlesmn 0:3ac96e360672 2817
charlesmn 0:3ac96e360672 2818 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2819
charlesmn 0:3ac96e360672 2820 return status;
charlesmn 0:3ac96e360672 2821
charlesmn 0:3ac96e360672 2822 }
charlesmn 0:3ac96e360672 2823
charlesmn 0:3ac96e360672 2824 VL53L1_Error VL53L1_get_histogram_ambient_threshold_sigma(
charlesmn 0:3ac96e360672 2825 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2826 uint8_t *pamb_thresh_sigma)
charlesmn 0:3ac96e360672 2827 {
charlesmn 0:3ac96e360672 2828
charlesmn 0:3ac96e360672 2829
charlesmn 0:3ac96e360672 2830
charlesmn 0:3ac96e360672 2831 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2832
charlesmn 0:3ac96e360672 2833 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2834
charlesmn 0:3ac96e360672 2835 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2836
charlesmn 0:3ac96e360672 2837 *pamb_thresh_sigma =
charlesmn 0:3ac96e360672 2838 pdev->histpostprocess.ambient_thresh_sigma1;
charlesmn 0:3ac96e360672 2839
charlesmn 0:3ac96e360672 2840 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2841
charlesmn 0:3ac96e360672 2842 return status;
charlesmn 0:3ac96e360672 2843
charlesmn 0:3ac96e360672 2844 }
charlesmn 0:3ac96e360672 2845
charlesmn 0:3ac96e360672 2846 VL53L1_Error VL53L1_set_histogram_ambient_threshold_sigma(
charlesmn 0:3ac96e360672 2847 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2848 uint8_t amb_thresh_sigma)
charlesmn 0:3ac96e360672 2849 {
charlesmn 0:3ac96e360672 2850
charlesmn 0:3ac96e360672 2851
charlesmn 0:3ac96e360672 2852
charlesmn 0:3ac96e360672 2853 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2854
charlesmn 0:3ac96e360672 2855 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2856
charlesmn 0:3ac96e360672 2857 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2858
charlesmn 0:3ac96e360672 2859 pdev->histpostprocess.ambient_thresh_sigma1 =
charlesmn 0:3ac96e360672 2860 amb_thresh_sigma;
charlesmn 0:3ac96e360672 2861
charlesmn 0:3ac96e360672 2862 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2863
charlesmn 0:3ac96e360672 2864 return status;
charlesmn 0:3ac96e360672 2865
charlesmn 0:3ac96e360672 2866 }
charlesmn 0:3ac96e360672 2867
charlesmn 0:3ac96e360672 2868 VL53L1_Error VL53L1_get_lite_sigma_threshold(
charlesmn 0:3ac96e360672 2869 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2870 uint16_t *plite_sigma)
charlesmn 0:3ac96e360672 2871 {
charlesmn 0:3ac96e360672 2872
charlesmn 0:3ac96e360672 2873
charlesmn 0:3ac96e360672 2874
charlesmn 0:3ac96e360672 2875 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2876
charlesmn 0:3ac96e360672 2877 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2878
charlesmn 0:3ac96e360672 2879 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2880
charlesmn 0:3ac96e360672 2881 *plite_sigma =
charlesmn 0:3ac96e360672 2882 pdev->tim_cfg.range_config__sigma_thresh;
charlesmn 0:3ac96e360672 2883
charlesmn 0:3ac96e360672 2884 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2885
charlesmn 0:3ac96e360672 2886 return status;
charlesmn 0:3ac96e360672 2887
charlesmn 0:3ac96e360672 2888 }
charlesmn 0:3ac96e360672 2889
charlesmn 0:3ac96e360672 2890 VL53L1_Error VL53L1_set_lite_sigma_threshold(
charlesmn 0:3ac96e360672 2891 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2892 uint16_t lite_sigma)
charlesmn 0:3ac96e360672 2893 {
charlesmn 0:3ac96e360672 2894
charlesmn 0:3ac96e360672 2895
charlesmn 0:3ac96e360672 2896
charlesmn 0:3ac96e360672 2897 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2898
charlesmn 0:3ac96e360672 2899 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2900
charlesmn 0:3ac96e360672 2901 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2902
charlesmn 0:3ac96e360672 2903 pdev->tim_cfg.range_config__sigma_thresh = lite_sigma;
charlesmn 0:3ac96e360672 2904
charlesmn 0:3ac96e360672 2905 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2906
charlesmn 0:3ac96e360672 2907 return status;
charlesmn 0:3ac96e360672 2908
charlesmn 0:3ac96e360672 2909 }
charlesmn 0:3ac96e360672 2910
charlesmn 0:3ac96e360672 2911 VL53L1_Error VL53L1_get_lite_min_count_rate(
charlesmn 0:3ac96e360672 2912 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2913 uint16_t *plite_mincountrate)
charlesmn 0:3ac96e360672 2914 {
charlesmn 0:3ac96e360672 2915
charlesmn 0:3ac96e360672 2916
charlesmn 0:3ac96e360672 2917
charlesmn 0:3ac96e360672 2918 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2919
charlesmn 0:3ac96e360672 2920 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2921
charlesmn 0:3ac96e360672 2922 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2923
charlesmn 0:3ac96e360672 2924 *plite_mincountrate =
charlesmn 0:3ac96e360672 2925 pdev->tim_cfg.range_config__min_count_rate_rtn_limit_mcps;
charlesmn 0:3ac96e360672 2926
charlesmn 0:3ac96e360672 2927 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2928
charlesmn 0:3ac96e360672 2929 return status;
charlesmn 0:3ac96e360672 2930
charlesmn 0:3ac96e360672 2931 }
charlesmn 0:3ac96e360672 2932
charlesmn 0:3ac96e360672 2933 VL53L1_Error VL53L1_set_lite_min_count_rate(
charlesmn 0:3ac96e360672 2934 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2935 uint16_t lite_mincountrate)
charlesmn 0:3ac96e360672 2936 {
charlesmn 0:3ac96e360672 2937
charlesmn 0:3ac96e360672 2938
charlesmn 0:3ac96e360672 2939
charlesmn 0:3ac96e360672 2940 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2941
charlesmn 0:3ac96e360672 2942 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2943
charlesmn 0:3ac96e360672 2944 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2945
charlesmn 0:3ac96e360672 2946 pdev->tim_cfg.range_config__min_count_rate_rtn_limit_mcps =
charlesmn 0:3ac96e360672 2947 lite_mincountrate;
charlesmn 0:3ac96e360672 2948
charlesmn 0:3ac96e360672 2949 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2950
charlesmn 0:3ac96e360672 2951 return status;
charlesmn 0:3ac96e360672 2952
charlesmn 0:3ac96e360672 2953 }
charlesmn 0:3ac96e360672 2954
charlesmn 0:3ac96e360672 2955
charlesmn 0:3ac96e360672 2956 VL53L1_Error VL53L1_get_xtalk_detect_config(
charlesmn 0:3ac96e360672 2957 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2958 int16_t *pmax_valid_range_mm,
charlesmn 0:3ac96e360672 2959 int16_t *pmin_valid_range_mm,
charlesmn 0:3ac96e360672 2960 uint16_t *pmax_valid_rate_kcps,
charlesmn 0:3ac96e360672 2961 uint16_t *pmax_sigma_mm)
charlesmn 0:3ac96e360672 2962 {
charlesmn 0:3ac96e360672 2963
charlesmn 0:3ac96e360672 2964
charlesmn 0:3ac96e360672 2965
charlesmn 0:3ac96e360672 2966 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2967
charlesmn 0:3ac96e360672 2968 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2969
charlesmn 0:3ac96e360672 2970 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2971
charlesmn 0:3ac96e360672 2972 *pmax_valid_range_mm =
charlesmn 0:3ac96e360672 2973 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm;
charlesmn 0:3ac96e360672 2974 *pmin_valid_range_mm =
charlesmn 0:3ac96e360672 2975 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm;
charlesmn 0:3ac96e360672 2976 *pmax_valid_rate_kcps =
charlesmn 0:3ac96e360672 2977 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps;
charlesmn 0:3ac96e360672 2978 *pmax_sigma_mm =
charlesmn 0:3ac96e360672 2979 pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm;
charlesmn 0:3ac96e360672 2980
charlesmn 0:3ac96e360672 2981 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2982
charlesmn 0:3ac96e360672 2983 return status;
charlesmn 0:3ac96e360672 2984
charlesmn 0:3ac96e360672 2985 }
charlesmn 0:3ac96e360672 2986
charlesmn 0:3ac96e360672 2987 VL53L1_Error VL53L1_set_xtalk_detect_config(
charlesmn 0:3ac96e360672 2988 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2989 int16_t max_valid_range_mm,
charlesmn 0:3ac96e360672 2990 int16_t min_valid_range_mm,
charlesmn 0:3ac96e360672 2991 uint16_t max_valid_rate_kcps,
charlesmn 0:3ac96e360672 2992 uint16_t max_sigma_mm)
charlesmn 0:3ac96e360672 2993 {
charlesmn 0:3ac96e360672 2994
charlesmn 0:3ac96e360672 2995
charlesmn 0:3ac96e360672 2996
charlesmn 0:3ac96e360672 2997 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2998
charlesmn 0:3ac96e360672 2999 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3000
charlesmn 0:3ac96e360672 3001 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3002
charlesmn 0:3ac96e360672 3003 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm =
charlesmn 0:3ac96e360672 3004 max_valid_range_mm;
charlesmn 0:3ac96e360672 3005 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm =
charlesmn 0:3ac96e360672 3006 min_valid_range_mm;
charlesmn 0:3ac96e360672 3007 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps =
charlesmn 0:3ac96e360672 3008 max_valid_rate_kcps;
charlesmn 0:3ac96e360672 3009 pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm =
charlesmn 0:3ac96e360672 3010 max_sigma_mm;
charlesmn 0:3ac96e360672 3011
charlesmn 0:3ac96e360672 3012 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3013
charlesmn 0:3ac96e360672 3014 return status;
charlesmn 0:3ac96e360672 3015
charlesmn 0:3ac96e360672 3016 }
charlesmn 0:3ac96e360672 3017
charlesmn 0:3ac96e360672 3018 VL53L1_Error VL53L1_get_target_order_mode(
charlesmn 0:3ac96e360672 3019 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3020 VL53L1_HistTargetOrder *phist_target_order)
charlesmn 0:3ac96e360672 3021 {
charlesmn 0:3ac96e360672 3022
charlesmn 0:3ac96e360672 3023
charlesmn 0:3ac96e360672 3024
charlesmn 0:3ac96e360672 3025 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3026
charlesmn 0:3ac96e360672 3027 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3028
charlesmn 0:3ac96e360672 3029 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3030
charlesmn 0:3ac96e360672 3031 *phist_target_order =
charlesmn 0:3ac96e360672 3032 pdev->histpostprocess.hist_target_order;
charlesmn 0:3ac96e360672 3033
charlesmn 0:3ac96e360672 3034 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3035
charlesmn 0:3ac96e360672 3036 return status;
charlesmn 0:3ac96e360672 3037
charlesmn 0:3ac96e360672 3038 }
charlesmn 0:3ac96e360672 3039
charlesmn 0:3ac96e360672 3040 VL53L1_Error VL53L1_set_target_order_mode(
charlesmn 0:3ac96e360672 3041 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3042 VL53L1_HistTargetOrder hist_target_order)
charlesmn 0:3ac96e360672 3043 {
charlesmn 0:3ac96e360672 3044
charlesmn 0:3ac96e360672 3045
charlesmn 0:3ac96e360672 3046
charlesmn 0:3ac96e360672 3047 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3048
charlesmn 0:3ac96e360672 3049 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3050
charlesmn 0:3ac96e360672 3051 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3052
charlesmn 0:3ac96e360672 3053 pdev->histpostprocess.hist_target_order = hist_target_order;
charlesmn 0:3ac96e360672 3054
charlesmn 0:3ac96e360672 3055 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3056
charlesmn 0:3ac96e360672 3057 return status;
charlesmn 0:3ac96e360672 3058
charlesmn 0:3ac96e360672 3059 }
charlesmn 0:3ac96e360672 3060
charlesmn 0:3ac96e360672 3061
charlesmn 0:3ac96e360672 3062 VL53L1_Error VL53L1_get_dmax_reflectance_values(
charlesmn 0:3ac96e360672 3063 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3064 VL53L1_dmax_reflectance_array_t *pdmax_reflectances)
charlesmn 0:3ac96e360672 3065 {
charlesmn 0:3ac96e360672 3066
charlesmn 0:3ac96e360672 3067 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3068
charlesmn 0:3ac96e360672 3069 uint8_t i = 0;
charlesmn 0:3ac96e360672 3070
charlesmn 0:3ac96e360672 3071 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3072
charlesmn 0:3ac96e360672 3073 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3074
charlesmn 0:3ac96e360672 3075
charlesmn 0:3ac96e360672 3076
charlesmn 0:3ac96e360672 3077 for (i = 0; i < VL53L1_MAX_AMBIENT_DMAX_VALUES; i++) {
charlesmn 0:3ac96e360672 3078 pdmax_reflectances->target_reflectance_for_dmax[i] =
charlesmn 0:3ac96e360672 3079 pdev->dmax_cfg.target_reflectance_for_dmax_calc[i];
charlesmn 0:3ac96e360672 3080 }
charlesmn 0:3ac96e360672 3081
charlesmn 0:3ac96e360672 3082 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3083
charlesmn 0:3ac96e360672 3084 return status;
charlesmn 0:3ac96e360672 3085
charlesmn 0:3ac96e360672 3086 }
charlesmn 0:3ac96e360672 3087
charlesmn 0:3ac96e360672 3088 VL53L1_Error VL53L1_set_dmax_reflectance_values(
charlesmn 0:3ac96e360672 3089 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3090 VL53L1_dmax_reflectance_array_t *pdmax_reflectances)
charlesmn 0:3ac96e360672 3091 {
charlesmn 0:3ac96e360672 3092
charlesmn 0:3ac96e360672 3093 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3094
charlesmn 0:3ac96e360672 3095 uint8_t i = 0;
charlesmn 0:3ac96e360672 3096
charlesmn 0:3ac96e360672 3097 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3098
charlesmn 0:3ac96e360672 3099 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3100
charlesmn 0:3ac96e360672 3101
charlesmn 0:3ac96e360672 3102
charlesmn 0:3ac96e360672 3103 for (i = 0; i < VL53L1_MAX_AMBIENT_DMAX_VALUES; i++) {
charlesmn 0:3ac96e360672 3104 pdev->dmax_cfg.target_reflectance_for_dmax_calc[i] =
charlesmn 0:3ac96e360672 3105 pdmax_reflectances->target_reflectance_for_dmax[i];
charlesmn 0:3ac96e360672 3106 }
charlesmn 0:3ac96e360672 3107
charlesmn 0:3ac96e360672 3108 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3109
charlesmn 0:3ac96e360672 3110 return status;
charlesmn 0:3ac96e360672 3111
charlesmn 0:3ac96e360672 3112 }
charlesmn 0:3ac96e360672 3113
charlesmn 0:3ac96e360672 3114 VL53L1_Error VL53L1_get_vhv_loopbound(
charlesmn 0:3ac96e360672 3115 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3116 uint8_t *pvhv_loopbound)
charlesmn 0:3ac96e360672 3117 {
charlesmn 0:3ac96e360672 3118
charlesmn 0:3ac96e360672 3119
charlesmn 0:3ac96e360672 3120
charlesmn 0:3ac96e360672 3121 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3122
charlesmn 0:3ac96e360672 3123 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3124
charlesmn 0:3ac96e360672 3125 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3126
charlesmn 0:3ac96e360672 3127 *pvhv_loopbound =
charlesmn 0:3ac96e360672 3128 pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound / 4;
charlesmn 0:3ac96e360672 3129
charlesmn 0:3ac96e360672 3130 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3131
charlesmn 0:3ac96e360672 3132 return status;
charlesmn 0:3ac96e360672 3133
charlesmn 0:3ac96e360672 3134 }
charlesmn 0:3ac96e360672 3135
charlesmn 0:3ac96e360672 3136
charlesmn 0:3ac96e360672 3137
charlesmn 0:3ac96e360672 3138 VL53L1_Error VL53L1_set_vhv_loopbound(
charlesmn 0:3ac96e360672 3139 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3140 uint8_t vhv_loopbound)
charlesmn 0:3ac96e360672 3141 {
charlesmn 0:3ac96e360672 3142
charlesmn 0:3ac96e360672 3143
charlesmn 0:3ac96e360672 3144
charlesmn 0:3ac96e360672 3145 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3146
charlesmn 0:3ac96e360672 3147 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3148
charlesmn 0:3ac96e360672 3149 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3150
charlesmn 0:3ac96e360672 3151 pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound =
charlesmn 0:3ac96e360672 3152 (pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound & 0x03) +
charlesmn 0:3ac96e360672 3153 (vhv_loopbound * 4);
charlesmn 0:3ac96e360672 3154
charlesmn 0:3ac96e360672 3155 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3156
charlesmn 0:3ac96e360672 3157 return status;
charlesmn 0:3ac96e360672 3158
charlesmn 0:3ac96e360672 3159 }
charlesmn 0:3ac96e360672 3160
charlesmn 0:3ac96e360672 3161
charlesmn 0:3ac96e360672 3162
charlesmn 0:3ac96e360672 3163 VL53L1_Error VL53L1_get_vhv_config(
charlesmn 0:3ac96e360672 3164 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3165 uint8_t *pvhv_init_en,
charlesmn 0:3ac96e360672 3166 uint8_t *pvhv_init_value)
charlesmn 0:3ac96e360672 3167 {
charlesmn 0:3ac96e360672 3168
charlesmn 0:3ac96e360672 3169
charlesmn 0:3ac96e360672 3170
charlesmn 0:3ac96e360672 3171
charlesmn 0:3ac96e360672 3172
charlesmn 0:3ac96e360672 3173 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3174
charlesmn 0:3ac96e360672 3175 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3176
charlesmn 0:3ac96e360672 3177 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3178
charlesmn 0:3ac96e360672 3179 *pvhv_init_en = (pdev->stat_nvm.vhv_config__init & 0x80) >> 7;
charlesmn 0:3ac96e360672 3180 *pvhv_init_value =
charlesmn 0:3ac96e360672 3181 (pdev->stat_nvm.vhv_config__init & 0x7F);
charlesmn 0:3ac96e360672 3182
charlesmn 0:3ac96e360672 3183 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3184
charlesmn 0:3ac96e360672 3185 return status;
charlesmn 0:3ac96e360672 3186
charlesmn 0:3ac96e360672 3187 }
charlesmn 0:3ac96e360672 3188
charlesmn 0:3ac96e360672 3189
charlesmn 0:3ac96e360672 3190
charlesmn 0:3ac96e360672 3191 VL53L1_Error VL53L1_set_vhv_config(
charlesmn 0:3ac96e360672 3192 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3193 uint8_t vhv_init_en,
charlesmn 0:3ac96e360672 3194 uint8_t vhv_init_value)
charlesmn 0:3ac96e360672 3195 {
charlesmn 0:3ac96e360672 3196
charlesmn 0:3ac96e360672 3197
charlesmn 0:3ac96e360672 3198
charlesmn 0:3ac96e360672 3199 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3200
charlesmn 0:3ac96e360672 3201 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3202
charlesmn 0:3ac96e360672 3203 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3204
charlesmn 0:3ac96e360672 3205 pdev->stat_nvm.vhv_config__init =
charlesmn 0:3ac96e360672 3206 ((vhv_init_en & 0x01) << 7) +
charlesmn 0:3ac96e360672 3207 (vhv_init_value & 0x7F);
charlesmn 0:3ac96e360672 3208
charlesmn 0:3ac96e360672 3209 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3210
charlesmn 0:3ac96e360672 3211 return status;
charlesmn 0:3ac96e360672 3212
charlesmn 0:3ac96e360672 3213 }
charlesmn 0:3ac96e360672 3214
charlesmn 0:3ac96e360672 3215
charlesmn 0:3ac96e360672 3216
charlesmn 0:3ac96e360672 3217 VL53L1_Error VL53L1_init_and_start_range(
charlesmn 0:3ac96e360672 3218 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3219 uint8_t measurement_mode,
charlesmn 0:3ac96e360672 3220 VL53L1_DeviceConfigLevel device_config_level)
charlesmn 0:3ac96e360672 3221 {
charlesmn 0:3ac96e360672 3222
charlesmn 0:3ac96e360672 3223
charlesmn 0:3ac96e360672 3224 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3225 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3226 VL53L1_LLDriverResults_t *pres =
charlesmn 0:3ac96e360672 3227 VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn 0:3ac96e360672 3228
charlesmn 0:3ac96e360672 3229 uint8_t buffer[VL53L1_MAX_I2C_XFER_SIZE];
charlesmn 0:3ac96e360672 3230
charlesmn 0:3ac96e360672 3231 VL53L1_static_nvm_managed_t *pstatic_nvm = &(pdev->stat_nvm);
charlesmn 0:3ac96e360672 3232 VL53L1_customer_nvm_managed_t *pcustomer_nvm = &(pdev->customer);
charlesmn 0:3ac96e360672 3233 VL53L1_static_config_t *pstatic = &(pdev->stat_cfg);
charlesmn 0:3ac96e360672 3234 VL53L1_general_config_t *pgeneral = &(pdev->gen_cfg);
charlesmn 0:3ac96e360672 3235 VL53L1_timing_config_t *ptiming = &(pdev->tim_cfg);
charlesmn 0:3ac96e360672 3236 VL53L1_dynamic_config_t *pdynamic = &(pdev->dyn_cfg);
charlesmn 0:3ac96e360672 3237 VL53L1_system_control_t *psystem = &(pdev->sys_ctrl);
charlesmn 0:3ac96e360672 3238
charlesmn 0:3ac96e360672 3239 VL53L1_ll_driver_state_t *pstate = &(pdev->ll_state);
charlesmn 0:3ac96e360672 3240 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer);
charlesmn 0:3ac96e360672 3241
charlesmn 0:3ac96e360672 3242 uint8_t *pbuffer = &buffer[0];
charlesmn 0:3ac96e360672 3243 uint16_t i = 0;
charlesmn 0:3ac96e360672 3244 uint16_t i2c_index = 0;
charlesmn 0:3ac96e360672 3245 uint16_t i2c_buffer_offset_bytes = 0;
charlesmn 0:3ac96e360672 3246 uint16_t i2c_buffer_size_bytes = 0;
charlesmn 0:3ac96e360672 3247
charlesmn 0:3ac96e360672 3248 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3249
charlesmn 0:3ac96e360672 3250
charlesmn 0:3ac96e360672 3251 pdev->measurement_mode = measurement_mode;
charlesmn 0:3ac96e360672 3252
charlesmn 0:3ac96e360672 3253
charlesmn 0:3ac96e360672 3254
charlesmn 0:3ac96e360672 3255 psystem->system__mode_start =
charlesmn 0:3ac96e360672 3256 (psystem->system__mode_start &
charlesmn 0:3ac96e360672 3257 VL53L1_DEVICEMEASUREMENTMODE_STOP_MASK) |
charlesmn 0:3ac96e360672 3258 measurement_mode;
charlesmn 0:3ac96e360672 3259
charlesmn 0:3ac96e360672 3260
charlesmn 0:3ac96e360672 3261
charlesmn 0:3ac96e360672 3262 status =
charlesmn 0:3ac96e360672 3263 VL53L1_set_user_zone(
charlesmn 0:3ac96e360672 3264 Dev,
charlesmn 0:3ac96e360672 3265 &(pdev->zone_cfg.user_zones[pdev->ll_state.cfg_zone_id]));
charlesmn 0:3ac96e360672 3266
charlesmn 0:3ac96e360672 3267
charlesmn 0:3ac96e360672 3268 if (pdev->zone_cfg.active_zones > 0) {
charlesmn 0:3ac96e360672 3269 status =
charlesmn 0:3ac96e360672 3270 VL53L1_set_zone_dss_config(
charlesmn 0:3ac96e360672 3271 Dev,
charlesmn 0:3ac96e360672 3272 &(pres->zone_dyn_cfgs.VL53L1_p_002[pdev->ll_state.cfg_zone_id])
charlesmn 0:3ac96e360672 3273 );
charlesmn 0:3ac96e360672 3274 }
charlesmn 0:3ac96e360672 3275
charlesmn 0:3ac96e360672 3276
charlesmn 0:3ac96e360672 3277
charlesmn 0:3ac96e360672 3278
charlesmn 0:3ac96e360672 3279 if (((pdev->sys_ctrl.system__mode_start &
charlesmn 0:3ac96e360672 3280 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM) == 0x00) &&
charlesmn 0:3ac96e360672 3281 (pdev->xtalk_cfg.global_crosstalk_compensation_enable
charlesmn 0:3ac96e360672 3282 == 0x01)) {
charlesmn 0:3ac96e360672 3283 pdev->stat_cfg.algo__range_ignore_threshold_mcps =
charlesmn 0:3ac96e360672 3284 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps;
charlesmn 0:3ac96e360672 3285 }
charlesmn 0:3ac96e360672 3286
charlesmn 0:3ac96e360672 3287
charlesmn 0:3ac96e360672 3288
charlesmn 0:3ac96e360672 3289
charlesmn 0:3ac96e360672 3290
charlesmn 0:3ac96e360672 3291 if (pdev->low_power_auto_data.low_power_auto_range_count == 0xFF)
charlesmn 0:3ac96e360672 3292 pdev->low_power_auto_data.low_power_auto_range_count = 0x0;
charlesmn 0:3ac96e360672 3293
charlesmn 0:3ac96e360672 3294
charlesmn 0:3ac96e360672 3295 if ((pdev->low_power_auto_data.is_low_power_auto_mode == 1) &&
charlesmn 0:3ac96e360672 3296 (pdev->low_power_auto_data.low_power_auto_range_count == 0)) {
charlesmn 0:3ac96e360672 3297
charlesmn 0:3ac96e360672 3298 pdev->low_power_auto_data.saved_interrupt_config =
charlesmn 0:3ac96e360672 3299 pdev->gen_cfg.system__interrupt_config_gpio;
charlesmn 0:3ac96e360672 3300
charlesmn 0:3ac96e360672 3301 pdev->gen_cfg.system__interrupt_config_gpio = 1 << 5;
charlesmn 0:3ac96e360672 3302
charlesmn 0:3ac96e360672 3303 if ((pdev->dyn_cfg.system__sequence_config & (
charlesmn 0:3ac96e360672 3304 VL53L1_SEQUENCE_MM1_EN | VL53L1_SEQUENCE_MM2_EN)) ==
charlesmn 0:3ac96e360672 3305 0x0) {
charlesmn 0:3ac96e360672 3306 pN->algo__part_to_part_range_offset_mm =
charlesmn 0:3ac96e360672 3307 (pN->mm_config__outer_offset_mm << 2);
charlesmn 0:3ac96e360672 3308 } else {
charlesmn 0:3ac96e360672 3309 pN->algo__part_to_part_range_offset_mm = 0x0;
charlesmn 0:3ac96e360672 3310 }
charlesmn 0:3ac96e360672 3311
charlesmn 0:3ac96e360672 3312
charlesmn 0:3ac96e360672 3313 if (device_config_level <
charlesmn 0:3ac96e360672 3314 VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS) {
charlesmn 0:3ac96e360672 3315 device_config_level =
charlesmn 0:3ac96e360672 3316 VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS;
charlesmn 0:3ac96e360672 3317 }
charlesmn 0:3ac96e360672 3318 }
charlesmn 0:3ac96e360672 3319
charlesmn 0:3ac96e360672 3320 if ((pdev->low_power_auto_data.is_low_power_auto_mode == 1) &&
charlesmn 0:3ac96e360672 3321 (pdev->low_power_auto_data.low_power_auto_range_count == 1)) {
charlesmn 0:3ac96e360672 3322
charlesmn 0:3ac96e360672 3323 pdev->gen_cfg.system__interrupt_config_gpio =
charlesmn 0:3ac96e360672 3324 pdev->low_power_auto_data.saved_interrupt_config;
charlesmn 0:3ac96e360672 3325
charlesmn 0:3ac96e360672 3326
charlesmn 0:3ac96e360672 3327 device_config_level = VL53L1_DEVICECONFIGLEVEL_FULL;
charlesmn 0:3ac96e360672 3328 }
charlesmn 0:3ac96e360672 3329
charlesmn 0:3ac96e360672 3330
charlesmn 0:3ac96e360672 3331
charlesmn 0:3ac96e360672 3332
charlesmn 0:3ac96e360672 3333
charlesmn 0:3ac96e360672 3334 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3335 status = VL53L1_save_cfg_data(Dev);
charlesmn 0:3ac96e360672 3336
charlesmn 0:3ac96e360672 3337
charlesmn 0:3ac96e360672 3338
charlesmn 0:3ac96e360672 3339 switch (device_config_level) {
charlesmn 0:3ac96e360672 3340 case VL53L1_DEVICECONFIGLEVEL_FULL:
charlesmn 0:3ac96e360672 3341 i2c_index = VL53L1_STATIC_NVM_MANAGED_I2C_INDEX;
charlesmn 0:3ac96e360672 3342 break;
charlesmn 0:3ac96e360672 3343 case VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS:
charlesmn 0:3ac96e360672 3344 i2c_index = VL53L1_CUSTOMER_NVM_MANAGED_I2C_INDEX;
charlesmn 0:3ac96e360672 3345 break;
charlesmn 0:3ac96e360672 3346 case VL53L1_DEVICECONFIGLEVEL_STATIC_ONWARDS:
charlesmn 0:3ac96e360672 3347 i2c_index = VL53L1_STATIC_CONFIG_I2C_INDEX;
charlesmn 0:3ac96e360672 3348 break;
charlesmn 0:3ac96e360672 3349 case VL53L1_DEVICECONFIGLEVEL_GENERAL_ONWARDS:
charlesmn 0:3ac96e360672 3350 i2c_index = VL53L1_GENERAL_CONFIG_I2C_INDEX;
charlesmn 0:3ac96e360672 3351 break;
charlesmn 0:3ac96e360672 3352 case VL53L1_DEVICECONFIGLEVEL_TIMING_ONWARDS:
charlesmn 0:3ac96e360672 3353 i2c_index = VL53L1_TIMING_CONFIG_I2C_INDEX;
charlesmn 0:3ac96e360672 3354 break;
charlesmn 0:3ac96e360672 3355 case VL53L1_DEVICECONFIGLEVEL_DYNAMIC_ONWARDS:
charlesmn 0:3ac96e360672 3356 i2c_index = VL53L1_DYNAMIC_CONFIG_I2C_INDEX;
charlesmn 0:3ac96e360672 3357 break;
charlesmn 0:3ac96e360672 3358 default:
charlesmn 0:3ac96e360672 3359 i2c_index = VL53L1_SYSTEM_CONTROL_I2C_INDEX;
charlesmn 0:3ac96e360672 3360 break;
charlesmn 0:3ac96e360672 3361 }
charlesmn 0:3ac96e360672 3362
charlesmn 0:3ac96e360672 3363
charlesmn 0:3ac96e360672 3364
charlesmn 0:3ac96e360672 3365 i2c_buffer_size_bytes =
charlesmn 0:3ac96e360672 3366 (VL53L1_SYSTEM_CONTROL_I2C_INDEX +
charlesmn 0:3ac96e360672 3367 VL53L1_SYSTEM_CONTROL_I2C_SIZE_BYTES) -
charlesmn 0:3ac96e360672 3368 i2c_index;
charlesmn 0:3ac96e360672 3369
charlesmn 0:3ac96e360672 3370
charlesmn 0:3ac96e360672 3371
charlesmn 0:3ac96e360672 3372 pbuffer = &buffer[0];
charlesmn 0:3ac96e360672 3373 for (i = 0; i < i2c_buffer_size_bytes; i++)
charlesmn 0:3ac96e360672 3374 *pbuffer++ = 0;
charlesmn 0:3ac96e360672 3375
charlesmn 0:3ac96e360672 3376
charlesmn 0:3ac96e360672 3377
charlesmn 0:3ac96e360672 3378 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_FULL &&
charlesmn 0:3ac96e360672 3379 status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3380
charlesmn 0:3ac96e360672 3381 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 3382 VL53L1_STATIC_NVM_MANAGED_I2C_INDEX - i2c_index;
charlesmn 0:3ac96e360672 3383
charlesmn 0:3ac96e360672 3384 status =
charlesmn 0:3ac96e360672 3385 VL53L1_i2c_encode_static_nvm_managed(
charlesmn 0:3ac96e360672 3386 pstatic_nvm,
charlesmn 0:3ac96e360672 3387 VL53L1_STATIC_NVM_MANAGED_I2C_SIZE_BYTES,
charlesmn 0:3ac96e360672 3388 &buffer[i2c_buffer_offset_bytes]);
charlesmn 0:3ac96e360672 3389 }
charlesmn 0:3ac96e360672 3390
charlesmn 0:3ac96e360672 3391 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS &&
charlesmn 0:3ac96e360672 3392 status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3393
charlesmn 0:3ac96e360672 3394 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 3395 VL53L1_CUSTOMER_NVM_MANAGED_I2C_INDEX - i2c_index;
charlesmn 0:3ac96e360672 3396
charlesmn 0:3ac96e360672 3397 status =
charlesmn 0:3ac96e360672 3398 VL53L1_i2c_encode_customer_nvm_managed(
charlesmn 0:3ac96e360672 3399 pcustomer_nvm,
charlesmn 0:3ac96e360672 3400 VL53L1_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES,
charlesmn 0:3ac96e360672 3401 &buffer[i2c_buffer_offset_bytes]);
charlesmn 0:3ac96e360672 3402 }
charlesmn 0:3ac96e360672 3403
charlesmn 0:3ac96e360672 3404 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_STATIC_ONWARDS &&
charlesmn 0:3ac96e360672 3405 status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3406
charlesmn 0:3ac96e360672 3407 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 3408 VL53L1_STATIC_CONFIG_I2C_INDEX - i2c_index;
charlesmn 0:3ac96e360672 3409
charlesmn 0:3ac96e360672 3410 status =
charlesmn 0:3ac96e360672 3411 VL53L1_i2c_encode_static_config(
charlesmn 0:3ac96e360672 3412 pstatic,
charlesmn 0:3ac96e360672 3413 VL53L1_STATIC_CONFIG_I2C_SIZE_BYTES,
charlesmn 0:3ac96e360672 3414 &buffer[i2c_buffer_offset_bytes]);
charlesmn 0:3ac96e360672 3415 }
charlesmn 0:3ac96e360672 3416
charlesmn 0:3ac96e360672 3417 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_GENERAL_ONWARDS &&
charlesmn 0:3ac96e360672 3418 status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3419
charlesmn 0:3ac96e360672 3420 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 3421 VL53L1_GENERAL_CONFIG_I2C_INDEX - i2c_index;
charlesmn 0:3ac96e360672 3422
charlesmn 0:3ac96e360672 3423 status =
charlesmn 0:3ac96e360672 3424 VL53L1_i2c_encode_general_config(
charlesmn 0:3ac96e360672 3425 pgeneral,
charlesmn 0:3ac96e360672 3426 VL53L1_GENERAL_CONFIG_I2C_SIZE_BYTES,
charlesmn 0:3ac96e360672 3427 &buffer[i2c_buffer_offset_bytes]);
charlesmn 0:3ac96e360672 3428 }
charlesmn 0:3ac96e360672 3429
charlesmn 0:3ac96e360672 3430 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_TIMING_ONWARDS &&
charlesmn 0:3ac96e360672 3431 status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3432
charlesmn 0:3ac96e360672 3433 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 3434 VL53L1_TIMING_CONFIG_I2C_INDEX - i2c_index;
charlesmn 0:3ac96e360672 3435
charlesmn 0:3ac96e360672 3436 status =
charlesmn 0:3ac96e360672 3437 VL53L1_i2c_encode_timing_config(
charlesmn 0:3ac96e360672 3438 ptiming,
charlesmn 0:3ac96e360672 3439 VL53L1_TIMING_CONFIG_I2C_SIZE_BYTES,
charlesmn 0:3ac96e360672 3440 &buffer[i2c_buffer_offset_bytes]);
charlesmn 0:3ac96e360672 3441 }
charlesmn 0:3ac96e360672 3442
charlesmn 0:3ac96e360672 3443 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_DYNAMIC_ONWARDS &&
charlesmn 0:3ac96e360672 3444 status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3445
charlesmn 0:3ac96e360672 3446 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 3447 VL53L1_DYNAMIC_CONFIG_I2C_INDEX - i2c_index;
charlesmn 0:3ac96e360672 3448
charlesmn 0:3ac96e360672 3449
charlesmn 0:3ac96e360672 3450 if ((psystem->system__mode_start &
charlesmn 0:3ac96e360672 3451 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK) ==
charlesmn 0:3ac96e360672 3452 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK) {
charlesmn 0:3ac96e360672 3453 pdynamic->system__grouped_parameter_hold_0 =
charlesmn 0:3ac96e360672 3454 pstate->cfg_gph_id | 0x01;
charlesmn 0:3ac96e360672 3455 pdynamic->system__grouped_parameter_hold_1 =
charlesmn 0:3ac96e360672 3456 pstate->cfg_gph_id | 0x01;
charlesmn 0:3ac96e360672 3457 pdynamic->system__grouped_parameter_hold =
charlesmn 0:3ac96e360672 3458 pstate->cfg_gph_id;
charlesmn 0:3ac96e360672 3459 }
charlesmn 0:3ac96e360672 3460 status =
charlesmn 0:3ac96e360672 3461 VL53L1_i2c_encode_dynamic_config(
charlesmn 0:3ac96e360672 3462 pdynamic,
charlesmn 0:3ac96e360672 3463 VL53L1_DYNAMIC_CONFIG_I2C_SIZE_BYTES,
charlesmn 0:3ac96e360672 3464 &buffer[i2c_buffer_offset_bytes]);
charlesmn 0:3ac96e360672 3465 }
charlesmn 0:3ac96e360672 3466
charlesmn 0:3ac96e360672 3467 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3468
charlesmn 0:3ac96e360672 3469 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 3470 VL53L1_SYSTEM_CONTROL_I2C_INDEX - i2c_index;
charlesmn 0:3ac96e360672 3471
charlesmn 0:3ac96e360672 3472 status =
charlesmn 0:3ac96e360672 3473 VL53L1_i2c_encode_system_control(
charlesmn 0:3ac96e360672 3474 psystem,
charlesmn 0:3ac96e360672 3475 VL53L1_SYSTEM_CONTROL_I2C_SIZE_BYTES,
charlesmn 0:3ac96e360672 3476 &buffer[i2c_buffer_offset_bytes]);
charlesmn 0:3ac96e360672 3477 }
charlesmn 0:3ac96e360672 3478
charlesmn 0:3ac96e360672 3479
charlesmn 0:3ac96e360672 3480
charlesmn 0:3ac96e360672 3481 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3482 status =
charlesmn 0:3ac96e360672 3483 VL53L1_WriteMulti(
charlesmn 0:3ac96e360672 3484 Dev,
charlesmn 0:3ac96e360672 3485 i2c_index,
charlesmn 0:3ac96e360672 3486 buffer,
charlesmn 0:3ac96e360672 3487 (uint32_t)i2c_buffer_size_bytes);
charlesmn 0:3ac96e360672 3488 }
charlesmn 0:3ac96e360672 3489
charlesmn 0:3ac96e360672 3490
charlesmn 0:3ac96e360672 3491 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3492 status = VL53L1_update_ll_driver_rd_state(Dev);
charlesmn 0:3ac96e360672 3493
charlesmn 0:3ac96e360672 3494 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3495 status = VL53L1_update_ll_driver_cfg_state(Dev);
charlesmn 0:3ac96e360672 3496
charlesmn 0:3ac96e360672 3497 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3498
charlesmn 0:3ac96e360672 3499 return status;
charlesmn 0:3ac96e360672 3500 }
charlesmn 0:3ac96e360672 3501
charlesmn 0:3ac96e360672 3502
charlesmn 0:3ac96e360672 3503 VL53L1_Error VL53L1_stop_range(
charlesmn 0:3ac96e360672 3504 VL53L1_DEV Dev)
charlesmn 0:3ac96e360672 3505 {
charlesmn 0:3ac96e360672 3506
charlesmn 0:3ac96e360672 3507
charlesmn 0:3ac96e360672 3508 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3509
charlesmn 0:3ac96e360672 3510 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 3511 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3512 VL53L1_LLDriverResults_t *pres =
charlesmn 0:3ac96e360672 3513 VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn 0:3ac96e360672 3514
charlesmn 0:3ac96e360672 3515
charlesmn 0:3ac96e360672 3516
charlesmn 0:3ac96e360672 3517 pdev->sys_ctrl.system__mode_start =
charlesmn 0:3ac96e360672 3518 (pdev->sys_ctrl.system__mode_start &
charlesmn 0:3ac96e360672 3519 VL53L1_DEVICEMEASUREMENTMODE_STOP_MASK) |
charlesmn 0:3ac96e360672 3520 VL53L1_DEVICEMEASUREMENTMODE_ABORT;
charlesmn 0:3ac96e360672 3521
charlesmn 0:3ac96e360672 3522 status = VL53L1_set_system_control(
charlesmn 0:3ac96e360672 3523 Dev,
charlesmn 0:3ac96e360672 3524 &pdev->sys_ctrl);
charlesmn 0:3ac96e360672 3525
charlesmn 0:3ac96e360672 3526
charlesmn 0:3ac96e360672 3527 pdev->sys_ctrl.system__mode_start =
charlesmn 0:3ac96e360672 3528 (pdev->sys_ctrl.system__mode_start &
charlesmn 0:3ac96e360672 3529 VL53L1_DEVICEMEASUREMENTMODE_STOP_MASK);
charlesmn 0:3ac96e360672 3530
charlesmn 0:3ac96e360672 3531
charlesmn 0:3ac96e360672 3532 VL53L1_init_ll_driver_state(
charlesmn 0:3ac96e360672 3533 Dev,
charlesmn 0:3ac96e360672 3534 VL53L1_DEVICESTATE_SW_STANDBY);
charlesmn 0:3ac96e360672 3535
charlesmn 0:3ac96e360672 3536
charlesmn 0:3ac96e360672 3537 V53L1_init_zone_results_structure(
charlesmn 0:3ac96e360672 3538 pdev->zone_cfg.active_zones+1,
charlesmn 0:3ac96e360672 3539 &(pres->zone_results));
charlesmn 0:3ac96e360672 3540
charlesmn 0:3ac96e360672 3541
charlesmn 0:3ac96e360672 3542 V53L1_init_zone_dss_configs(Dev);
charlesmn 0:3ac96e360672 3543
charlesmn 0:3ac96e360672 3544
charlesmn 0:3ac96e360672 3545 if (pdev->low_power_auto_data.is_low_power_auto_mode == 1)
charlesmn 0:3ac96e360672 3546 VL53L1_low_power_auto_data_stop_range(Dev);
charlesmn 0:3ac96e360672 3547
charlesmn 0:3ac96e360672 3548 return status;
charlesmn 0:3ac96e360672 3549 }
charlesmn 0:3ac96e360672 3550
charlesmn 0:3ac96e360672 3551
charlesmn 0:3ac96e360672 3552 VL53L1_Error VL53L1_get_measurement_results(
charlesmn 0:3ac96e360672 3553 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3554 VL53L1_DeviceResultsLevel device_results_level)
charlesmn 0:3ac96e360672 3555 {
charlesmn 0:3ac96e360672 3556
charlesmn 0:3ac96e360672 3557
charlesmn 0:3ac96e360672 3558 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3559 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3560
charlesmn 0:3ac96e360672 3561 uint8_t buffer[VL53L1_MAX_I2C_XFER_SIZE];
charlesmn 0:3ac96e360672 3562
charlesmn 0:3ac96e360672 3563 VL53L1_system_results_t *psystem_results = &(pdev->sys_results);
charlesmn 0:3ac96e360672 3564 VL53L1_core_results_t *pcore_results = &(pdev->core_results);
charlesmn 0:3ac96e360672 3565 VL53L1_debug_results_t *pdebug_results = &(pdev->dbg_results);
charlesmn 0:3ac96e360672 3566
charlesmn 0:3ac96e360672 3567 uint16_t i2c_index = VL53L1_SYSTEM_RESULTS_I2C_INDEX;
charlesmn 0:3ac96e360672 3568 uint16_t i2c_buffer_offset_bytes = 0;
charlesmn 0:3ac96e360672 3569 uint16_t i2c_buffer_size_bytes = 0;
charlesmn 0:3ac96e360672 3570
charlesmn 0:3ac96e360672 3571 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3572
charlesmn 0:3ac96e360672 3573
charlesmn 0:3ac96e360672 3574
charlesmn 0:3ac96e360672 3575 switch (device_results_level) {
charlesmn 0:3ac96e360672 3576 case VL53L1_DEVICERESULTSLEVEL_FULL:
charlesmn 0:3ac96e360672 3577 i2c_buffer_size_bytes =
charlesmn 0:3ac96e360672 3578 (VL53L1_DEBUG_RESULTS_I2C_INDEX +
charlesmn 0:3ac96e360672 3579 VL53L1_DEBUG_RESULTS_I2C_SIZE_BYTES) -
charlesmn 0:3ac96e360672 3580 i2c_index;
charlesmn 0:3ac96e360672 3581 break;
charlesmn 0:3ac96e360672 3582 case VL53L1_DEVICERESULTSLEVEL_UPTO_CORE:
charlesmn 0:3ac96e360672 3583 i2c_buffer_size_bytes =
charlesmn 0:3ac96e360672 3584 (VL53L1_CORE_RESULTS_I2C_INDEX +
charlesmn 0:3ac96e360672 3585 VL53L1_CORE_RESULTS_I2C_SIZE_BYTES) -
charlesmn 0:3ac96e360672 3586 i2c_index;
charlesmn 0:3ac96e360672 3587 break;
charlesmn 0:3ac96e360672 3588 default:
charlesmn 0:3ac96e360672 3589 i2c_buffer_size_bytes =
charlesmn 0:3ac96e360672 3590 VL53L1_SYSTEM_RESULTS_I2C_SIZE_BYTES;
charlesmn 0:3ac96e360672 3591 break;
charlesmn 0:3ac96e360672 3592 }
charlesmn 0:3ac96e360672 3593
charlesmn 0:3ac96e360672 3594
charlesmn 0:3ac96e360672 3595
charlesmn 0:3ac96e360672 3596 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3597 status =
charlesmn 0:3ac96e360672 3598 VL53L1_ReadMulti(
charlesmn 0:3ac96e360672 3599 Dev,
charlesmn 0:3ac96e360672 3600 i2c_index,
charlesmn 0:3ac96e360672 3601 buffer,
charlesmn 0:3ac96e360672 3602 (uint32_t)i2c_buffer_size_bytes);
charlesmn 0:3ac96e360672 3603
charlesmn 0:3ac96e360672 3604
charlesmn 0:3ac96e360672 3605
charlesmn 0:3ac96e360672 3606 if (device_results_level >= VL53L1_DEVICERESULTSLEVEL_FULL &&
charlesmn 0:3ac96e360672 3607 status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3608
charlesmn 0:3ac96e360672 3609 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 3610 VL53L1_DEBUG_RESULTS_I2C_INDEX - i2c_index;
charlesmn 0:3ac96e360672 3611
charlesmn 0:3ac96e360672 3612 status =
charlesmn 0:3ac96e360672 3613 VL53L1_i2c_decode_debug_results(
charlesmn 0:3ac96e360672 3614 VL53L1_DEBUG_RESULTS_I2C_SIZE_BYTES,
charlesmn 0:3ac96e360672 3615 &buffer[i2c_buffer_offset_bytes],
charlesmn 0:3ac96e360672 3616 pdebug_results);
charlesmn 0:3ac96e360672 3617 }
charlesmn 0:3ac96e360672 3618
charlesmn 0:3ac96e360672 3619 if (device_results_level >= VL53L1_DEVICERESULTSLEVEL_UPTO_CORE &&
charlesmn 0:3ac96e360672 3620 status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3621
charlesmn 0:3ac96e360672 3622 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 3623 VL53L1_CORE_RESULTS_I2C_INDEX - i2c_index;
charlesmn 0:3ac96e360672 3624
charlesmn 0:3ac96e360672 3625 status =
charlesmn 0:3ac96e360672 3626 VL53L1_i2c_decode_core_results(
charlesmn 0:3ac96e360672 3627 VL53L1_CORE_RESULTS_I2C_SIZE_BYTES,
charlesmn 0:3ac96e360672 3628 &buffer[i2c_buffer_offset_bytes],
charlesmn 0:3ac96e360672 3629 pcore_results);
charlesmn 0:3ac96e360672 3630 }
charlesmn 0:3ac96e360672 3631
charlesmn 0:3ac96e360672 3632 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3633
charlesmn 0:3ac96e360672 3634 i2c_buffer_offset_bytes = 0;
charlesmn 0:3ac96e360672 3635 status =
charlesmn 0:3ac96e360672 3636 VL53L1_i2c_decode_system_results(
charlesmn 0:3ac96e360672 3637 VL53L1_SYSTEM_RESULTS_I2C_SIZE_BYTES,
charlesmn 0:3ac96e360672 3638 &buffer[i2c_buffer_offset_bytes],
charlesmn 0:3ac96e360672 3639 psystem_results);
charlesmn 0:3ac96e360672 3640 }
charlesmn 0:3ac96e360672 3641
charlesmn 0:3ac96e360672 3642 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3643
charlesmn 0:3ac96e360672 3644 return status;
charlesmn 0:3ac96e360672 3645 }
charlesmn 0:3ac96e360672 3646
charlesmn 0:3ac96e360672 3647
charlesmn 0:3ac96e360672 3648 VL53L1_Error VL53L1_get_device_results(
charlesmn 0:3ac96e360672 3649 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3650 VL53L1_DeviceResultsLevel device_results_level,
charlesmn 0:3ac96e360672 3651 VL53L1_range_results_t *prange_results)
charlesmn 0:3ac96e360672 3652 {
charlesmn 0:3ac96e360672 3653
charlesmn 0:3ac96e360672 3654
charlesmn 0:3ac96e360672 3655 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3656
charlesmn 0:3ac96e360672 3657 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 3658 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3659 VL53L1_LLDriverResults_t *pres =
charlesmn 0:3ac96e360672 3660 VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn 0:3ac96e360672 3661
charlesmn 0:3ac96e360672 3662 VL53L1_range_results_t *presults =
charlesmn 0:3ac96e360672 3663 &(pres->range_results);
charlesmn 0:3ac96e360672 3664 VL53L1_zone_objects_t *pobjects =
charlesmn 0:3ac96e360672 3665 &(pres->zone_results.VL53L1_p_002[0]);
charlesmn 0:3ac96e360672 3666 VL53L1_ll_driver_state_t *pstate =
charlesmn 0:3ac96e360672 3667 &(pdev->ll_state);
charlesmn 0:3ac96e360672 3668 VL53L1_zone_config_t *pzone_cfg =
charlesmn 0:3ac96e360672 3669 &(pdev->zone_cfg);
charlesmn 0:3ac96e360672 3670 VL53L1_zone_hist_info_t *phist_info =
charlesmn 0:3ac96e360672 3671 &(pres->zone_hists.VL53L1_p_002[0]);
charlesmn 0:3ac96e360672 3672
charlesmn 0:3ac96e360672 3673 VL53L1_dmax_calibration_data_t dmax_cal;
charlesmn 0:3ac96e360672 3674 VL53L1_dmax_calibration_data_t *pdmax_cal = &dmax_cal;
charlesmn 0:3ac96e360672 3675 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn 0:3ac96e360672 3676 VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg);
charlesmn 0:3ac96e360672 3677 VL53L1_low_power_auto_data_t *pL = &(pdev->low_power_auto_data);
charlesmn 0:3ac96e360672 3678 VL53L1_histogram_bin_data_t *pHD = &(pdev->hist_data);
charlesmn 0:3ac96e360672 3679 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer);
charlesmn 0:3ac96e360672 3680 VL53L1_zone_histograms_t *pZH = &(pres->zone_hists);
charlesmn 0:3ac96e360672 3681 VL53L1_xtalk_calibration_results_t *pXCR = &(pdev->xtalk_cal);
charlesmn 0:3ac96e360672 3682 uint8_t tmp8;
charlesmn 0:3ac96e360672 3683 uint8_t zid;
charlesmn 0:3ac96e360672 3684 uint8_t i;
charlesmn 0:3ac96e360672 3685 uint8_t histo_merge_nb, idx;
charlesmn 0:3ac96e360672 3686 uint8_t merge_enabled;
charlesmn 0:3ac96e360672 3687 VL53L1_range_data_t *pdata;
charlesmn 0:3ac96e360672 3688
charlesmn 0:3ac96e360672 3689 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3690
charlesmn 0:3ac96e360672 3691 merge_enabled = (pdev->tuning_parms.tp_hist_merge == 1) &&
charlesmn 0:3ac96e360672 3692 (VL53L1DevDataGet(Dev, CurrentParameters.PresetMode) ==
charlesmn 0:3ac96e360672 3693 VL53L1_PRESETMODE_RANGING);
charlesmn 0:3ac96e360672 3694
lugandc 18:0696efe39d08 3695 presults->fmt_total_enabled_spads = pdev->fmt_total_enabled_spads;
charlesmn 0:3ac96e360672 3696 if ((pdev->sys_ctrl.system__mode_start &
charlesmn 0:3ac96e360672 3697 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM)
charlesmn 0:3ac96e360672 3698 == VL53L1_DEVICESCHEDULERMODE_HISTOGRAM) {
charlesmn 0:3ac96e360672 3699
charlesmn 0:3ac96e360672 3700
charlesmn 0:3ac96e360672 3701
charlesmn 0:3ac96e360672 3702 status = VL53L1_get_histogram_bin_data(
charlesmn 0:3ac96e360672 3703 Dev,
charlesmn 0:3ac96e360672 3704 &(pdev->hist_data));
charlesmn 0:3ac96e360672 3705
charlesmn 0:3ac96e360672 3706
charlesmn 0:3ac96e360672 3707
charlesmn 0:3ac96e360672 3708
charlesmn 0:3ac96e360672 3709 if (status == VL53L1_ERROR_NONE &&
charlesmn 0:3ac96e360672 3710 pHD->number_of_ambient_bins == 0) {
charlesmn 0:3ac96e360672 3711 zid = pdev->ll_state.rd_zone_id;
charlesmn 0:3ac96e360672 3712 status = VL53L1_hist_copy_and_scale_ambient_info(
charlesmn 0:3ac96e360672 3713 &(pZH->VL53L1_p_002[zid]),
charlesmn 0:3ac96e360672 3714 &(pdev->hist_data));
charlesmn 0:3ac96e360672 3715 }
charlesmn 0:3ac96e360672 3716
charlesmn 0:3ac96e360672 3717
charlesmn 0:3ac96e360672 3718 if (status != VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3719 goto UPDATE_DYNAMIC_CONFIG;
charlesmn 0:3ac96e360672 3720
charlesmn 0:3ac96e360672 3721 VL53L1_compute_histo_merge_nb(Dev, &histo_merge_nb);
charlesmn 0:3ac96e360672 3722 if (histo_merge_nb == 0)
charlesmn 0:3ac96e360672 3723 histo_merge_nb = 1;
charlesmn 0:3ac96e360672 3724 idx = histo_merge_nb - 1;
charlesmn 0:3ac96e360672 3725 if (merge_enabled)
charlesmn 0:3ac96e360672 3726 pC->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 3727 pXCR->algo__xtalk_cpo_HistoMerge_kcps[idx];
charlesmn 0:3ac96e360672 3728
charlesmn 0:3ac96e360672 3729 pHP->gain_factor =
charlesmn 0:3ac96e360672 3730 pdev->gain_cal.histogram_ranging_gain_factor;
charlesmn 0:3ac96e360672 3731
charlesmn 0:3ac96e360672 3732 pHP->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 3733 VL53L1_calc_crosstalk_plane_offset_with_margin(
charlesmn 0:3ac96e360672 3734 pC->algo__crosstalk_compensation_plane_offset_kcps,
charlesmn 0:3ac96e360672 3735 pC->histogram_mode_crosstalk_margin_kcps);
charlesmn 0:3ac96e360672 3736
charlesmn 0:3ac96e360672 3737 pHP->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 3738 pC->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 3739 pHP->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 3740 pC->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 3741
charlesmn 0:3ac96e360672 3742 pdev->dmax_cfg.ambient_thresh_sigma =
charlesmn 0:3ac96e360672 3743 pHP->ambient_thresh_sigma1;
charlesmn 0:3ac96e360672 3744 pdev->dmax_cfg.min_ambient_thresh_events =
charlesmn 0:3ac96e360672 3745 pHP->min_ambient_thresh_events;
charlesmn 0:3ac96e360672 3746 pdev->dmax_cfg.signal_total_events_limit =
charlesmn 0:3ac96e360672 3747 pHP->signal_total_events_limit;
charlesmn 0:3ac96e360672 3748 pdev->dmax_cfg.dss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 3749 pdev->stat_cfg.dss_config__target_total_rate_mcps;
charlesmn 0:3ac96e360672 3750 pdev->dmax_cfg.dss_config__aperture_attenuation =
charlesmn 0:3ac96e360672 3751 pdev->gen_cfg.dss_config__aperture_attenuation;
charlesmn 0:3ac96e360672 3752
charlesmn 0:3ac96e360672 3753 pHP->algo__crosstalk_detect_max_valid_range_mm =
charlesmn 0:3ac96e360672 3754 pC->algo__crosstalk_detect_max_valid_range_mm;
charlesmn 0:3ac96e360672 3755 pHP->algo__crosstalk_detect_min_valid_range_mm =
charlesmn 0:3ac96e360672 3756 pC->algo__crosstalk_detect_min_valid_range_mm;
charlesmn 0:3ac96e360672 3757 pHP->algo__crosstalk_detect_max_valid_rate_kcps =
charlesmn 0:3ac96e360672 3758 pC->algo__crosstalk_detect_max_valid_rate_kcps;
charlesmn 0:3ac96e360672 3759 pHP->algo__crosstalk_detect_max_sigma_mm =
charlesmn 0:3ac96e360672 3760 pC->algo__crosstalk_detect_max_sigma_mm;
charlesmn 0:3ac96e360672 3761
charlesmn 0:3ac96e360672 3762
charlesmn 0:3ac96e360672 3763
charlesmn 0:3ac96e360672 3764 VL53L1_copy_rtn_good_spads_to_buffer(
charlesmn 0:3ac96e360672 3765 &(pdev->nvm_copy_data),
charlesmn 0:3ac96e360672 3766 &(pdev->rtn_good_spads[0]));
charlesmn 0:3ac96e360672 3767
charlesmn 0:3ac96e360672 3768
charlesmn 0:3ac96e360672 3769
charlesmn 0:3ac96e360672 3770 switch (pdev->offset_correction_mode) {
charlesmn 0:3ac96e360672 3771
charlesmn 0:3ac96e360672 3772 case VL53L1_OFFSETCORRECTIONMODE__MM1_MM2_OFFSETS:
charlesmn 0:3ac96e360672 3773 tmp8 = pdev->gen_cfg.dss_config__aperture_attenuation;
charlesmn 0:3ac96e360672 3774
charlesmn 0:3ac96e360672 3775 VL53L1_hist_combine_mm1_mm2_offsets(
charlesmn 0:3ac96e360672 3776 pN->mm_config__inner_offset_mm,
charlesmn 0:3ac96e360672 3777 pN->mm_config__outer_offset_mm,
charlesmn 0:3ac96e360672 3778 pdev->nvm_copy_data.roi_config__mode_roi_centre_spad,
charlesmn 0:3ac96e360672 3779 pdev->nvm_copy_data.roi_config__mode_roi_xy_size,
charlesmn 0:3ac96e360672 3780 pHD->roi_config__user_roi_centre_spad,
charlesmn 0:3ac96e360672 3781 pHD->roi_config__user_roi_requested_global_xy_size,
charlesmn 0:3ac96e360672 3782 &(pdev->add_off_cal_data),
charlesmn 0:3ac96e360672 3783 &(pdev->rtn_good_spads[0]),
charlesmn 0:3ac96e360672 3784 (uint16_t)tmp8,
charlesmn 0:3ac96e360672 3785 &(pHP->range_offset_mm));
charlesmn 0:3ac96e360672 3786 break;
charlesmn 0:3ac96e360672 3787 case VL53L1_OFFSETCORRECTIONMODE__PER_ZONE_OFFSETS:
charlesmn 0:3ac96e360672 3788 zid = pdev->ll_state.rd_zone_id;
charlesmn 0:3ac96e360672 3789 pHP->range_offset_mm = (int16_t)(
charlesmn 0:3ac96e360672 3790 pres->zone_cal.VL53L1_p_002[zid].range_mm_offset);
charlesmn 0:3ac96e360672 3791 break;
charlesmn 0:3ac96e360672 3792 case VL53L1_OFFSETCORRECTIONMODE__PER_VCSEL_OFFSETS:
charlesmn 0:3ac96e360672 3793 select_offset_per_vcsel(
charlesmn 0:3ac96e360672 3794 pdev,
charlesmn 0:3ac96e360672 3795 &(pHP->range_offset_mm));
charlesmn 0:3ac96e360672 3796 pHP->range_offset_mm *= 4;
charlesmn 0:3ac96e360672 3797 break;
charlesmn 0:3ac96e360672 3798 default:
charlesmn 0:3ac96e360672 3799 pHP->range_offset_mm = 0;
charlesmn 0:3ac96e360672 3800 break;
charlesmn 0:3ac96e360672 3801
charlesmn 0:3ac96e360672 3802 }
charlesmn 0:3ac96e360672 3803
charlesmn 0:3ac96e360672 3804
charlesmn 0:3ac96e360672 3805
charlesmn 0:3ac96e360672 3806 if (status != VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3807 goto UPDATE_DYNAMIC_CONFIG;
charlesmn 0:3ac96e360672 3808
charlesmn 0:3ac96e360672 3809
charlesmn 0:3ac96e360672 3810 VL53L1_calc_max_effective_spads(
charlesmn 0:3ac96e360672 3811 pHD->roi_config__user_roi_centre_spad,
charlesmn 0:3ac96e360672 3812 pHD->roi_config__user_roi_requested_global_xy_size,
charlesmn 0:3ac96e360672 3813 &(pdev->rtn_good_spads[0]),
charlesmn 0:3ac96e360672 3814 (uint16_t)pdev->gen_cfg.dss_config__aperture_attenuation,
charlesmn 0:3ac96e360672 3815 &(pdev->dmax_cfg.max_effective_spads));
charlesmn 0:3ac96e360672 3816
charlesmn 0:3ac96e360672 3817 status =
charlesmn 0:3ac96e360672 3818 VL53L1_get_dmax_calibration_data(
charlesmn 0:3ac96e360672 3819 Dev,
charlesmn 0:3ac96e360672 3820 pdev->dmax_mode,
charlesmn 0:3ac96e360672 3821 pdev->ll_state.rd_zone_id,
charlesmn 0:3ac96e360672 3822 pdmax_cal);
charlesmn 0:3ac96e360672 3823
charlesmn 0:3ac96e360672 3824
charlesmn 0:3ac96e360672 3825
charlesmn 0:3ac96e360672 3826 if (status != VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3827 goto UPDATE_DYNAMIC_CONFIG;
charlesmn 0:3ac96e360672 3828
charlesmn 0:3ac96e360672 3829 status = VL53L1_ipp_hist_process_data(
charlesmn 0:3ac96e360672 3830 Dev,
charlesmn 0:3ac96e360672 3831 pdmax_cal,
charlesmn 0:3ac96e360672 3832 &(pdev->dmax_cfg),
charlesmn 0:3ac96e360672 3833 &(pdev->histpostprocess),
charlesmn 0:3ac96e360672 3834 &(pdev->hist_data),
charlesmn 0:3ac96e360672 3835 &(pdev->xtalk_shapes),
charlesmn 0:3ac96e360672 3836 pdev->wArea1,
charlesmn 0:3ac96e360672 3837 pdev->wArea2,
charlesmn 0:3ac96e360672 3838 &histo_merge_nb,
charlesmn 0:3ac96e360672 3839 presults);
charlesmn 0:3ac96e360672 3840
charlesmn 0:3ac96e360672 3841 if ((merge_enabled) && (histo_merge_nb > 1))
charlesmn 0:3ac96e360672 3842 for (i = 0; i < VL53L1_MAX_RANGE_RESULTS; i++) {
charlesmn 0:3ac96e360672 3843 pdata = &(presults->VL53L1_p_002[i]);
charlesmn 0:3ac96e360672 3844 pdata->VL53L1_p_020 /= histo_merge_nb;
charlesmn 0:3ac96e360672 3845 pdata->VL53L1_p_021 /= histo_merge_nb;
charlesmn 0:3ac96e360672 3846 pdata->VL53L1_p_013 /= histo_merge_nb;
charlesmn 0:3ac96e360672 3847 pdata->peak_signal_count_rate_mcps /= histo_merge_nb;
charlesmn 0:3ac96e360672 3848 pdata->avg_signal_count_rate_mcps /= histo_merge_nb;
charlesmn 0:3ac96e360672 3849 pdata->ambient_count_rate_mcps /= histo_merge_nb;
charlesmn 0:3ac96e360672 3850 pdata->VL53L1_p_012 /= histo_merge_nb;
charlesmn 0:3ac96e360672 3851 }
charlesmn 0:3ac96e360672 3852
charlesmn 0:3ac96e360672 3853
charlesmn 0:3ac96e360672 3854 if (status != VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3855 goto UPDATE_DYNAMIC_CONFIG;
charlesmn 0:3ac96e360672 3856
charlesmn 0:3ac96e360672 3857 status = VL53L1_hist_wrap_dmax(
charlesmn 0:3ac96e360672 3858 &(pdev->histpostprocess),
charlesmn 0:3ac96e360672 3859 &(pdev->hist_data),
charlesmn 0:3ac96e360672 3860 &(presults->wrap_dmax_mm));
charlesmn 0:3ac96e360672 3861
charlesmn 0:3ac96e360672 3862
charlesmn 0:3ac96e360672 3863 if (status != VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3864 goto UPDATE_DYNAMIC_CONFIG;
charlesmn 0:3ac96e360672 3865
charlesmn 0:3ac96e360672 3866 zid = pdev->ll_state.rd_zone_id;
charlesmn 0:3ac96e360672 3867 status = VL53L1_hist_phase_consistency_check(
charlesmn 0:3ac96e360672 3868 Dev,
charlesmn 0:3ac96e360672 3869 &(pZH->VL53L1_p_002[zid]),
charlesmn 0:3ac96e360672 3870 &(pres->zone_results.VL53L1_p_002[zid]),
charlesmn 0:3ac96e360672 3871 presults);
charlesmn 0:3ac96e360672 3872
charlesmn 0:3ac96e360672 3873
charlesmn 0:3ac96e360672 3874 if (status != VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3875 goto UPDATE_DYNAMIC_CONFIG;
charlesmn 0:3ac96e360672 3876
charlesmn 0:3ac96e360672 3877 zid = pdev->ll_state.rd_zone_id;
charlesmn 0:3ac96e360672 3878 status = VL53L1_hist_xmonitor_consistency_check(
charlesmn 0:3ac96e360672 3879 Dev,
charlesmn 0:3ac96e360672 3880 &(pZH->VL53L1_p_002[zid]),
charlesmn 0:3ac96e360672 3881 &(pres->zone_results.VL53L1_p_002[zid]),
charlesmn 0:3ac96e360672 3882 &(presults->xmonitor));
charlesmn 0:3ac96e360672 3883
charlesmn 0:3ac96e360672 3884
charlesmn 0:3ac96e360672 3885 if (status != VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3886 goto UPDATE_DYNAMIC_CONFIG;
charlesmn 0:3ac96e360672 3887
charlesmn 0:3ac96e360672 3888
charlesmn 0:3ac96e360672 3889 zid = pdev->ll_state.rd_zone_id;
charlesmn 0:3ac96e360672 3890 pZH->max_zones = VL53L1_MAX_USER_ZONES;
charlesmn 0:3ac96e360672 3891 pZH->active_zones =
charlesmn 0:3ac96e360672 3892 pdev->zone_cfg.active_zones+1;
charlesmn 0:3ac96e360672 3893 pHD->zone_id = zid;
charlesmn 0:3ac96e360672 3894
charlesmn 0:3ac96e360672 3895 if (zid <
charlesmn 0:3ac96e360672 3896 pres->zone_results.max_zones) {
charlesmn 0:3ac96e360672 3897
charlesmn 0:3ac96e360672 3898 phist_info =
charlesmn 0:3ac96e360672 3899 &(pZH->VL53L1_p_002[zid]);
charlesmn 0:3ac96e360672 3900
charlesmn 0:3ac96e360672 3901 phist_info->rd_device_state =
charlesmn 0:3ac96e360672 3902 pHD->rd_device_state;
charlesmn 0:3ac96e360672 3903
charlesmn 0:3ac96e360672 3904 phist_info->number_of_ambient_bins =
charlesmn 0:3ac96e360672 3905 pHD->number_of_ambient_bins;
charlesmn 0:3ac96e360672 3906
charlesmn 0:3ac96e360672 3907 phist_info->result__dss_actual_effective_spads =
charlesmn 0:3ac96e360672 3908 pHD->result__dss_actual_effective_spads;
charlesmn 0:3ac96e360672 3909
charlesmn 0:3ac96e360672 3910 phist_info->VL53L1_p_009 =
charlesmn 0:3ac96e360672 3911 pHD->VL53L1_p_009;
charlesmn 0:3ac96e360672 3912
charlesmn 0:3ac96e360672 3913 phist_info->total_periods_elapsed =
charlesmn 0:3ac96e360672 3914 pHD->total_periods_elapsed;
charlesmn 0:3ac96e360672 3915
charlesmn 0:3ac96e360672 3916 phist_info->ambient_events_sum =
charlesmn 0:3ac96e360672 3917 pHD->ambient_events_sum;
charlesmn 0:3ac96e360672 3918 }
charlesmn 0:3ac96e360672 3919
charlesmn 0:3ac96e360672 3920
charlesmn 0:3ac96e360672 3921
charlesmn 0:3ac96e360672 3922 if (status != VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3923 goto UPDATE_DYNAMIC_CONFIG;
charlesmn 0:3ac96e360672 3924
charlesmn 0:3ac96e360672 3925 VL53L1_hist_copy_results_to_sys_and_core(
charlesmn 0:3ac96e360672 3926 &(pdev->hist_data),
charlesmn 0:3ac96e360672 3927 presults,
charlesmn 0:3ac96e360672 3928 &(pdev->sys_results),
charlesmn 0:3ac96e360672 3929 &(pdev->core_results));
charlesmn 0:3ac96e360672 3930
charlesmn 0:3ac96e360672 3931
charlesmn 0:3ac96e360672 3932 UPDATE_DYNAMIC_CONFIG:
charlesmn 0:3ac96e360672 3933 if (pzone_cfg->active_zones > 0) {
charlesmn 0:3ac96e360672 3934 if (pstate->rd_device_state !=
charlesmn 0:3ac96e360672 3935 VL53L1_DEVICESTATE_RANGING_WAIT_GPH_SYNC) {
charlesmn 0:3ac96e360672 3936 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3937 status = VL53L1_dynamic_zone_update(
charlesmn 0:3ac96e360672 3938 Dev, presults);
charlesmn 0:3ac96e360672 3939 }
charlesmn 0:3ac96e360672 3940 }
charlesmn 0:3ac96e360672 3941
charlesmn 0:3ac96e360672 3942
charlesmn 0:3ac96e360672 3943 for (i = 0; i < VL53L1_MAX_USER_ZONES; i++) {
charlesmn 0:3ac96e360672 3944 pzone_cfg->bin_config[i] =
charlesmn 0:3ac96e360672 3945 ((pdev->ll_state.cfg_internal_stream_count)
charlesmn 0:3ac96e360672 3946 & 0x01) ?
charlesmn 0:3ac96e360672 3947 VL53L1_ZONECONFIG_BINCONFIG__HIGHAMB :
charlesmn 0:3ac96e360672 3948 VL53L1_ZONECONFIG_BINCONFIG__LOWAMB;
charlesmn 0:3ac96e360672 3949 }
charlesmn 0:3ac96e360672 3950
charlesmn 0:3ac96e360672 3951 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3952 status = VL53L1_multizone_hist_bins_update(Dev);
charlesmn 0:3ac96e360672 3953
charlesmn 0:3ac96e360672 3954 }
charlesmn 0:3ac96e360672 3955
charlesmn 0:3ac96e360672 3956
charlesmn 0:3ac96e360672 3957
charlesmn 0:3ac96e360672 3958 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3959 status = VL53L1_dynamic_xtalk_correction_corrector(Dev);
charlesmn 0:3ac96e360672 3960
charlesmn 0:3ac96e360672 3961 #ifdef VL53L1_LOG_ENABLE
charlesmn 0:3ac96e360672 3962 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3963 VL53L1_print_histogram_bin_data(
charlesmn 0:3ac96e360672 3964 &(pdev->hist_data),
charlesmn 0:3ac96e360672 3965 "get_device_results():pdev->lldata.hist_data.",
charlesmn 0:3ac96e360672 3966 VL53L1_TRACE_MODULE_HISTOGRAM_DATA);
charlesmn 0:3ac96e360672 3967 #endif
charlesmn 0:3ac96e360672 3968
charlesmn 0:3ac96e360672 3969 if (merge_enabled)
charlesmn 0:3ac96e360672 3970 pC->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 3971 pXCR->algo__xtalk_cpo_HistoMerge_kcps[0];
charlesmn 0:3ac96e360672 3972 } else {
charlesmn 0:3ac96e360672 3973
charlesmn 0:3ac96e360672 3974 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3975 status = VL53L1_get_measurement_results(
charlesmn 0:3ac96e360672 3976 Dev,
charlesmn 0:3ac96e360672 3977 device_results_level);
charlesmn 0:3ac96e360672 3978
charlesmn 0:3ac96e360672 3979 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3980 VL53L1_copy_sys_and_core_results_to_range_results(
charlesmn 0:3ac96e360672 3981 (int32_t)pdev->gain_cal.standard_ranging_gain_factor,
charlesmn 0:3ac96e360672 3982 &(pdev->sys_results),
charlesmn 0:3ac96e360672 3983 &(pdev->core_results),
charlesmn 0:3ac96e360672 3984 presults);
charlesmn 0:3ac96e360672 3985
charlesmn 0:3ac96e360672 3986
charlesmn 0:3ac96e360672 3987
charlesmn 0:3ac96e360672 3988 if (pL->is_low_power_auto_mode == 1) {
charlesmn 0:3ac96e360672 3989
charlesmn 0:3ac96e360672 3990 if ((status == VL53L1_ERROR_NONE) &&
charlesmn 0:3ac96e360672 3991 (pL->low_power_auto_range_count == 0)) {
charlesmn 0:3ac96e360672 3992
charlesmn 0:3ac96e360672 3993 status =
charlesmn 0:3ac96e360672 3994 VL53L1_low_power_auto_setup_manual_calibration(
charlesmn 0:3ac96e360672 3995 Dev);
charlesmn 0:3ac96e360672 3996 pL->low_power_auto_range_count = 1;
charlesmn 0:3ac96e360672 3997 } else if ((status == VL53L1_ERROR_NONE) &&
charlesmn 0:3ac96e360672 3998 (pL->low_power_auto_range_count == 1)) {
charlesmn 0:3ac96e360672 3999 pL->low_power_auto_range_count = 2;
charlesmn 0:3ac96e360672 4000 }
charlesmn 0:3ac96e360672 4001
charlesmn 0:3ac96e360672 4002
charlesmn 0:3ac96e360672 4003 if ((pL->low_power_auto_range_count != 0xFF) &&
charlesmn 0:3ac96e360672 4004 (status == VL53L1_ERROR_NONE)) {
charlesmn 0:3ac96e360672 4005 status = VL53L1_low_power_auto_update_DSS(
charlesmn 0:3ac96e360672 4006 Dev);
charlesmn 0:3ac96e360672 4007 }
charlesmn 0:3ac96e360672 4008 }
charlesmn 0:3ac96e360672 4009
charlesmn 0:3ac96e360672 4010 }
charlesmn 0:3ac96e360672 4011
charlesmn 0:3ac96e360672 4012
charlesmn 0:3ac96e360672 4013 presults->cfg_device_state = pdev->ll_state.cfg_device_state;
charlesmn 0:3ac96e360672 4014 presults->rd_device_state = pdev->ll_state.rd_device_state;
charlesmn 0:3ac96e360672 4015 presults->zone_id = pdev->ll_state.rd_zone_id;
charlesmn 0:3ac96e360672 4016
charlesmn 0:3ac96e360672 4017 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 4018
charlesmn 0:3ac96e360672 4019
charlesmn 0:3ac96e360672 4020 pres->zone_results.max_zones = VL53L1_MAX_USER_ZONES;
charlesmn 0:3ac96e360672 4021 pres->zone_results.active_zones = pdev->zone_cfg.active_zones+1;
charlesmn 0:3ac96e360672 4022 zid = pdev->ll_state.rd_zone_id;
charlesmn 0:3ac96e360672 4023
charlesmn 0:3ac96e360672 4024 if (zid < pres->zone_results.max_zones) {
charlesmn 0:3ac96e360672 4025
charlesmn 0:3ac96e360672 4026 pobjects =
charlesmn 0:3ac96e360672 4027 &(pres->zone_results.VL53L1_p_002[zid]);
charlesmn 0:3ac96e360672 4028
charlesmn 0:3ac96e360672 4029 pobjects->cfg_device_state =
charlesmn 0:3ac96e360672 4030 presults->cfg_device_state;
charlesmn 0:3ac96e360672 4031 pobjects->rd_device_state = presults->rd_device_state;
charlesmn 0:3ac96e360672 4032 pobjects->zone_id = presults->zone_id;
charlesmn 0:3ac96e360672 4033 pobjects->stream_count = presults->stream_count;
charlesmn 0:3ac96e360672 4034
charlesmn 0:3ac96e360672 4035
charlesmn 0:3ac96e360672 4036
charlesmn 0:3ac96e360672 4037 pobjects->xmonitor.VL53L1_p_020 =
charlesmn 0:3ac96e360672 4038 presults->xmonitor.VL53L1_p_020;
charlesmn 0:3ac96e360672 4039 pobjects->xmonitor.VL53L1_p_021 =
charlesmn 0:3ac96e360672 4040 presults->xmonitor.VL53L1_p_021;
charlesmn 0:3ac96e360672 4041 pobjects->xmonitor.VL53L1_p_014 =
charlesmn 0:3ac96e360672 4042 presults->xmonitor.VL53L1_p_014;
charlesmn 0:3ac96e360672 4043 pobjects->xmonitor.range_status =
charlesmn 0:3ac96e360672 4044 presults->xmonitor.range_status;
charlesmn 0:3ac96e360672 4045
charlesmn 0:3ac96e360672 4046 pobjects->max_objects = presults->max_results;
charlesmn 0:3ac96e360672 4047 pobjects->active_objects = presults->active_results;
charlesmn 0:3ac96e360672 4048
charlesmn 0:3ac96e360672 4049 for (i = 0; i < presults->active_results; i++) {
charlesmn 0:3ac96e360672 4050 pobjects->VL53L1_p_002[i].VL53L1_p_020 =
charlesmn 0:3ac96e360672 4051 presults->VL53L1_p_002[i].VL53L1_p_020;
charlesmn 0:3ac96e360672 4052 pobjects->VL53L1_p_002[i].VL53L1_p_021 =
charlesmn 0:3ac96e360672 4053 presults->VL53L1_p_002[i].VL53L1_p_021;
charlesmn 0:3ac96e360672 4054 pobjects->VL53L1_p_002[i].VL53L1_p_014 =
charlesmn 0:3ac96e360672 4055 presults->VL53L1_p_002[i].VL53L1_p_014;
charlesmn 0:3ac96e360672 4056 pobjects->VL53L1_p_002[i].range_status =
charlesmn 0:3ac96e360672 4057 presults->VL53L1_p_002[i].range_status;
charlesmn 0:3ac96e360672 4058 }
charlesmn 0:3ac96e360672 4059
charlesmn 0:3ac96e360672 4060
charlesmn 0:3ac96e360672 4061 }
charlesmn 0:3ac96e360672 4062 }
charlesmn 0:3ac96e360672 4063
charlesmn 0:3ac96e360672 4064
charlesmn 0:3ac96e360672 4065
charlesmn 0:3ac96e360672 4066 memcpy(
charlesmn 0:3ac96e360672 4067 prange_results,
charlesmn 0:3ac96e360672 4068 presults,
charlesmn 0:3ac96e360672 4069 sizeof(VL53L1_range_results_t));
charlesmn 0:3ac96e360672 4070
charlesmn 0:3ac96e360672 4071
charlesmn 0:3ac96e360672 4072
charlesmn 0:3ac96e360672 4073 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 4074 status = VL53L1_check_ll_driver_rd_state(Dev);
charlesmn 0:3ac96e360672 4075
charlesmn 0:3ac96e360672 4076 #ifdef VL53L1_LOG_ENABLE
charlesmn 0:3ac96e360672 4077 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 4078 VL53L1_print_range_results(
charlesmn 0:3ac96e360672 4079 presults,
charlesmn 0:3ac96e360672 4080 "get_device_results():pdev->llresults.range_results.",
charlesmn 0:3ac96e360672 4081 VL53L1_TRACE_MODULE_RANGE_RESULTS_DATA);
charlesmn 0:3ac96e360672 4082 #endif
charlesmn 0:3ac96e360672 4083
charlesmn 0:3ac96e360672 4084 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4085
charlesmn 0:3ac96e360672 4086 return status;
charlesmn 0:3ac96e360672 4087 }
charlesmn 0:3ac96e360672 4088
charlesmn 0:3ac96e360672 4089
charlesmn 0:3ac96e360672 4090 VL53L1_Error VL53L1_clear_interrupt_and_enable_next_range(
charlesmn 0:3ac96e360672 4091 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4092 uint8_t measurement_mode)
charlesmn 0:3ac96e360672 4093 {
charlesmn 0:3ac96e360672 4094
charlesmn 0:3ac96e360672 4095
charlesmn 0:3ac96e360672 4096
charlesmn 0:3ac96e360672 4097 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4098
charlesmn 0:3ac96e360672 4099 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4100
charlesmn 0:3ac96e360672 4101
charlesmn 0:3ac96e360672 4102
charlesmn 0:3ac96e360672 4103
charlesmn 0:3ac96e360672 4104
charlesmn 0:3ac96e360672 4105
charlesmn 0:3ac96e360672 4106
charlesmn 0:3ac96e360672 4107
charlesmn 0:3ac96e360672 4108
charlesmn 0:3ac96e360672 4109
charlesmn 0:3ac96e360672 4110 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 4111 status = VL53L1_init_and_start_range(
charlesmn 0:3ac96e360672 4112 Dev,
charlesmn 0:3ac96e360672 4113 measurement_mode,
charlesmn 0:3ac96e360672 4114 VL53L1_DEVICECONFIGLEVEL_GENERAL_ONWARDS);
charlesmn 0:3ac96e360672 4115
charlesmn 0:3ac96e360672 4116 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4117
charlesmn 0:3ac96e360672 4118 return status;
charlesmn 0:3ac96e360672 4119 }
charlesmn 0:3ac96e360672 4120
charlesmn 0:3ac96e360672 4121
charlesmn 0:3ac96e360672 4122 VL53L1_Error VL53L1_get_histogram_bin_data(
charlesmn 0:3ac96e360672 4123 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4124 VL53L1_histogram_bin_data_t *pdata)
charlesmn 0:3ac96e360672 4125 {
charlesmn 0:3ac96e360672 4126
charlesmn 0:3ac96e360672 4127
charlesmn 0:3ac96e360672 4128 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4129 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 4130 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4131 VL53L1_LLDriverResults_t *pres =
charlesmn 0:3ac96e360672 4132 VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn 0:3ac96e360672 4133
charlesmn 0:3ac96e360672 4134 VL53L1_zone_private_dyn_cfg_t *pzone_dyn_cfg;
charlesmn 0:3ac96e360672 4135
charlesmn 0:3ac96e360672 4136 VL53L1_static_nvm_managed_t *pstat_nvm = &(pdev->stat_nvm);
charlesmn 0:3ac96e360672 4137 VL53L1_static_config_t *pstat_cfg = &(pdev->stat_cfg);
charlesmn 0:3ac96e360672 4138 VL53L1_general_config_t *pgen_cfg = &(pdev->gen_cfg);
charlesmn 0:3ac96e360672 4139 VL53L1_timing_config_t *ptim_cfg = &(pdev->tim_cfg);
charlesmn 0:3ac96e360672 4140 VL53L1_range_results_t *presults = &(pres->range_results);
charlesmn 0:3ac96e360672 4141
charlesmn 0:3ac96e360672 4142 uint8_t buffer[VL53L1_MAX_I2C_XFER_SIZE];
charlesmn 0:3ac96e360672 4143 uint8_t *pbuffer = &buffer[0];
charlesmn 0:3ac96e360672 4144 uint8_t bin_23_0 = 0x00;
charlesmn 0:3ac96e360672 4145 uint16_t bin = 0;
charlesmn 0:3ac96e360672 4146 uint16_t i2c_buffer_offset_bytes = 0;
charlesmn 0:3ac96e360672 4147 uint16_t encoded_timeout = 0;
charlesmn 0:3ac96e360672 4148 uint32_t pll_period_us = 0;
charlesmn 0:3ac96e360672 4149 uint32_t periods_elapsed_tmp = 0;
charlesmn 0:3ac96e360672 4150 uint8_t i = 0;
charlesmn 0:3ac96e360672 4151 int32_t hist_merge = 0;
charlesmn 0:3ac96e360672 4152
charlesmn 0:3ac96e360672 4153 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4154
charlesmn 0:3ac96e360672 4155
charlesmn 0:3ac96e360672 4156
charlesmn 0:3ac96e360672 4157 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 4158 status = VL53L1_ReadMulti(
charlesmn 0:3ac96e360672 4159 Dev,
charlesmn 0:3ac96e360672 4160 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX,
charlesmn 0:3ac96e360672 4161 pbuffer,
charlesmn 0:3ac96e360672 4162 VL53L1_HISTOGRAM_BIN_DATA_I2C_SIZE_BYTES);
charlesmn 0:3ac96e360672 4163
charlesmn 0:3ac96e360672 4164
charlesmn 0:3ac96e360672 4165
charlesmn 0:3ac96e360672 4166 pdata->result__interrupt_status = *(pbuffer + 0);
charlesmn 0:3ac96e360672 4167 pdata->result__range_status = *(pbuffer + 1);
charlesmn 0:3ac96e360672 4168 pdata->result__report_status = *(pbuffer + 2);
charlesmn 0:3ac96e360672 4169 pdata->result__stream_count = *(pbuffer + 3);
charlesmn 0:3ac96e360672 4170 pdata->result__dss_actual_effective_spads =
charlesmn 0:3ac96e360672 4171 VL53L1_i2c_decode_uint16_t(2, pbuffer + 4);
charlesmn 0:3ac96e360672 4172
charlesmn 0:3ac96e360672 4173
charlesmn 0:3ac96e360672 4174
charlesmn 0:3ac96e360672 4175 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 4176 VL53L1_PHASECAL_RESULT__REFERENCE_PHASE -
charlesmn 0:3ac96e360672 4177 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX;
charlesmn 0:3ac96e360672 4178
charlesmn 0:3ac96e360672 4179 pbuffer = &buffer[i2c_buffer_offset_bytes];
charlesmn 0:3ac96e360672 4180
charlesmn 0:3ac96e360672 4181 pdata->phasecal_result__reference_phase =
charlesmn 0:3ac96e360672 4182 VL53L1_i2c_decode_uint16_t(2, pbuffer);
charlesmn 0:3ac96e360672 4183
charlesmn 0:3ac96e360672 4184 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 4185 VL53L1_PHASECAL_RESULT__VCSEL_START -
charlesmn 0:3ac96e360672 4186 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX;
charlesmn 0:3ac96e360672 4187
charlesmn 0:3ac96e360672 4188 pdata->phasecal_result__vcsel_start = buffer[i2c_buffer_offset_bytes];
charlesmn 0:3ac96e360672 4189
charlesmn 0:3ac96e360672 4190
charlesmn 0:3ac96e360672 4191
charlesmn 0:3ac96e360672 4192 pdev->dbg_results.phasecal_result__reference_phase =
charlesmn 0:3ac96e360672 4193 pdata->phasecal_result__reference_phase;
charlesmn 0:3ac96e360672 4194 pdev->dbg_results.phasecal_result__vcsel_start =
charlesmn 0:3ac96e360672 4195 pdata->phasecal_result__vcsel_start;
charlesmn 0:3ac96e360672 4196
charlesmn 0:3ac96e360672 4197
charlesmn 0:3ac96e360672 4198
charlesmn 0:3ac96e360672 4199 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 4200 VL53L1_RESULT__HISTOGRAM_BIN_23_0_MSB -
charlesmn 0:3ac96e360672 4201 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX;
charlesmn 0:3ac96e360672 4202
charlesmn 0:3ac96e360672 4203 bin_23_0 = buffer[i2c_buffer_offset_bytes] << 2;
charlesmn 0:3ac96e360672 4204
charlesmn 0:3ac96e360672 4205 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 4206 VL53L1_RESULT__HISTOGRAM_BIN_23_0_LSB -
charlesmn 0:3ac96e360672 4207 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX;
charlesmn 0:3ac96e360672 4208
charlesmn 0:3ac96e360672 4209 bin_23_0 += buffer[i2c_buffer_offset_bytes];
charlesmn 0:3ac96e360672 4210
charlesmn 0:3ac96e360672 4211 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 4212 VL53L1_RESULT__HISTOGRAM_BIN_23_0 -
charlesmn 0:3ac96e360672 4213 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX;
charlesmn 0:3ac96e360672 4214
charlesmn 0:3ac96e360672 4215 buffer[i2c_buffer_offset_bytes] = bin_23_0;
charlesmn 0:3ac96e360672 4216
charlesmn 0:3ac96e360672 4217
charlesmn 0:3ac96e360672 4218
charlesmn 0:3ac96e360672 4219 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 4220 VL53L1_RESULT__HISTOGRAM_BIN_0_2 -
charlesmn 0:3ac96e360672 4221 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX;
charlesmn 0:3ac96e360672 4222
charlesmn 0:3ac96e360672 4223 pbuffer = &buffer[i2c_buffer_offset_bytes];
charlesmn 0:3ac96e360672 4224 for (bin = 0; bin < VL53L1_HISTOGRAM_BUFFER_SIZE; bin++) {
charlesmn 0:3ac96e360672 4225 pdata->bin_data[bin] =
charlesmn 0:3ac96e360672 4226 (int32_t)VL53L1_i2c_decode_uint32_t(3, pbuffer);
charlesmn 0:3ac96e360672 4227 pbuffer += 3;
charlesmn 0:3ac96e360672 4228 }
charlesmn 0:3ac96e360672 4229
charlesmn 0:3ac96e360672 4230 VL53L1_get_tuning_parm(Dev, VL53L1_TUNINGPARM_HIST_MERGE,
charlesmn 0:3ac96e360672 4231 &hist_merge);
charlesmn 0:3ac96e360672 4232
charlesmn 0:3ac96e360672 4233 if (pdata->result__stream_count == 0) {
charlesmn 0:3ac96e360672 4234
charlesmn 0:3ac96e360672 4235 memset(pdev->multi_bins_rec, 0, sizeof(pdev->multi_bins_rec));
charlesmn 0:3ac96e360672 4236 pdev->bin_rec_pos = 0;
charlesmn 0:3ac96e360672 4237 pdev->pos_before_next_recom = 0;
charlesmn 0:3ac96e360672 4238 }
charlesmn 0:3ac96e360672 4239
charlesmn 0:3ac96e360672 4240 if (hist_merge == 1)
charlesmn 0:3ac96e360672 4241 vl53l1_histo_merge(Dev, pdata);
charlesmn 0:3ac96e360672 4242
charlesmn 0:3ac96e360672 4243
charlesmn 0:3ac96e360672 4244 pdata->zone_id = pdev->ll_state.rd_zone_id;
charlesmn 0:3ac96e360672 4245 pdata->VL53L1_p_022 = 0;
charlesmn 0:3ac96e360672 4246 pdata->VL53L1_p_023 = VL53L1_HISTOGRAM_BUFFER_SIZE;
charlesmn 0:3ac96e360672 4247 pdata->VL53L1_p_024 = VL53L1_HISTOGRAM_BUFFER_SIZE;
charlesmn 0:3ac96e360672 4248
charlesmn 0:3ac96e360672 4249 pdata->cal_config__vcsel_start = pgen_cfg->cal_config__vcsel_start;
charlesmn 0:3ac96e360672 4250
charlesmn 0:3ac96e360672 4251
charlesmn 0:3ac96e360672 4252
charlesmn 0:3ac96e360672 4253 pdata->vcsel_width =
charlesmn 0:3ac96e360672 4254 ((uint16_t)pgen_cfg->global_config__vcsel_width) << 4;
charlesmn 0:3ac96e360672 4255 pdata->vcsel_width +=
charlesmn 0:3ac96e360672 4256 (uint16_t)pstat_cfg->ana_config__vcsel_pulse_width_offset;
charlesmn 0:3ac96e360672 4257
charlesmn 0:3ac96e360672 4258
charlesmn 0:3ac96e360672 4259 pdata->VL53L1_p_019 =
charlesmn 0:3ac96e360672 4260 pstat_nvm->osc_measured__fast_osc__frequency;
charlesmn 0:3ac96e360672 4261
charlesmn 0:3ac96e360672 4262
charlesmn 0:3ac96e360672 4263
charlesmn 0:3ac96e360672 4264 VL53L1_hist_get_bin_sequence_config(Dev, pdata);
charlesmn 0:3ac96e360672 4265
charlesmn 0:3ac96e360672 4266
charlesmn 0:3ac96e360672 4267
charlesmn 0:3ac96e360672 4268 if (pdev->ll_state.rd_timing_status == 0) {
charlesmn 0:3ac96e360672 4269
charlesmn 0:3ac96e360672 4270 encoded_timeout =
charlesmn 0:3ac96e360672 4271 (ptim_cfg->range_config__timeout_macrop_a_hi << 8)
charlesmn 0:3ac96e360672 4272 + ptim_cfg->range_config__timeout_macrop_a_lo;
charlesmn 0:3ac96e360672 4273 pdata->VL53L1_p_009 = ptim_cfg->range_config__vcsel_period_a;
charlesmn 0:3ac96e360672 4274 } else {
charlesmn 0:3ac96e360672 4275
charlesmn 0:3ac96e360672 4276 encoded_timeout =
charlesmn 0:3ac96e360672 4277 (ptim_cfg->range_config__timeout_macrop_b_hi << 8)
charlesmn 0:3ac96e360672 4278 + ptim_cfg->range_config__timeout_macrop_b_lo;
charlesmn 0:3ac96e360672 4279 pdata->VL53L1_p_009 = ptim_cfg->range_config__vcsel_period_b;
charlesmn 0:3ac96e360672 4280 }
charlesmn 0:3ac96e360672 4281
charlesmn 0:3ac96e360672 4282
charlesmn 0:3ac96e360672 4283
charlesmn 0:3ac96e360672 4284 pdata->number_of_ambient_bins = 0;
charlesmn 0:3ac96e360672 4285
charlesmn 0:3ac96e360672 4286 for (i = 0; i < 6; i++) {
charlesmn 0:3ac96e360672 4287 if ((pdata->bin_seq[i] & 0x07) == 0x07)
charlesmn 0:3ac96e360672 4288 pdata->number_of_ambient_bins =
charlesmn 0:3ac96e360672 4289 pdata->number_of_ambient_bins + 0x04;
charlesmn 0:3ac96e360672 4290 }
charlesmn 0:3ac96e360672 4291
charlesmn 0:3ac96e360672 4292 pdata->total_periods_elapsed =
charlesmn 0:3ac96e360672 4293 VL53L1_decode_timeout(encoded_timeout);
charlesmn 0:3ac96e360672 4294
charlesmn 0:3ac96e360672 4295
charlesmn 0:3ac96e360672 4296
charlesmn 0:3ac96e360672 4297
charlesmn 0:3ac96e360672 4298 pll_period_us =
charlesmn 0:3ac96e360672 4299 VL53L1_calc_pll_period_us(pdata->VL53L1_p_019);
charlesmn 0:3ac96e360672 4300
charlesmn 0:3ac96e360672 4301
charlesmn 0:3ac96e360672 4302
charlesmn 0:3ac96e360672 4303 periods_elapsed_tmp = pdata->total_periods_elapsed + 1;
charlesmn 0:3ac96e360672 4304
charlesmn 0:3ac96e360672 4305
charlesmn 0:3ac96e360672 4306
charlesmn 0:3ac96e360672 4307 pdata->peak_duration_us =
charlesmn 0:3ac96e360672 4308 VL53L1_duration_maths(
charlesmn 0:3ac96e360672 4309 pll_period_us,
charlesmn 0:3ac96e360672 4310 (uint32_t)pdata->vcsel_width,
charlesmn 0:3ac96e360672 4311 VL53L1_RANGING_WINDOW_VCSEL_PERIODS,
charlesmn 0:3ac96e360672 4312 periods_elapsed_tmp);
charlesmn 0:3ac96e360672 4313
charlesmn 0:3ac96e360672 4314 pdata->woi_duration_us = 0;
charlesmn 0:3ac96e360672 4315
charlesmn 0:3ac96e360672 4316
charlesmn 0:3ac96e360672 4317
charlesmn 0:3ac96e360672 4318 VL53L1_hist_calc_zero_distance_phase(pdata);
charlesmn 0:3ac96e360672 4319
charlesmn 0:3ac96e360672 4320
charlesmn 0:3ac96e360672 4321
charlesmn 0:3ac96e360672 4322 VL53L1_hist_estimate_ambient_from_ambient_bins(pdata);
charlesmn 0:3ac96e360672 4323
charlesmn 0:3ac96e360672 4324
charlesmn 0:3ac96e360672 4325
charlesmn 0:3ac96e360672 4326 pdata->cfg_device_state = pdev->ll_state.cfg_device_state;
charlesmn 0:3ac96e360672 4327 pdata->rd_device_state = pdev->ll_state.rd_device_state;
charlesmn 0:3ac96e360672 4328
charlesmn 0:3ac96e360672 4329
charlesmn 0:3ac96e360672 4330
charlesmn 0:3ac96e360672 4331 pzone_dyn_cfg = &(pres->zone_dyn_cfgs.VL53L1_p_002[pdata->zone_id]);
charlesmn 0:3ac96e360672 4332
charlesmn 0:3ac96e360672 4333 pdata->roi_config__user_roi_centre_spad =
charlesmn 0:3ac96e360672 4334 pzone_dyn_cfg->roi_config__user_roi_centre_spad;
charlesmn 0:3ac96e360672 4335 pdata->roi_config__user_roi_requested_global_xy_size =
charlesmn 0:3ac96e360672 4336 pzone_dyn_cfg->roi_config__user_roi_requested_global_xy_size;
charlesmn 0:3ac96e360672 4337
charlesmn 0:3ac96e360672 4338
charlesmn 0:3ac96e360672 4339
charlesmn 0:3ac96e360672 4340 presults->device_status = VL53L1_DEVICEERROR_NOUPDATE;
charlesmn 0:3ac96e360672 4341
charlesmn 0:3ac96e360672 4342
charlesmn 0:3ac96e360672 4343
charlesmn 0:3ac96e360672 4344 switch (pdata->result__range_status &
charlesmn 0:3ac96e360672 4345 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK) {
charlesmn 0:3ac96e360672 4346
charlesmn 0:3ac96e360672 4347 case VL53L1_DEVICEERROR_VCSELCONTINUITYTESTFAILURE:
charlesmn 0:3ac96e360672 4348 case VL53L1_DEVICEERROR_VCSELWATCHDOGTESTFAILURE:
charlesmn 0:3ac96e360672 4349 case VL53L1_DEVICEERROR_NOVHVVALUEFOUND:
charlesmn 0:3ac96e360672 4350 case VL53L1_DEVICEERROR_USERROICLIP:
charlesmn 0:3ac96e360672 4351 case VL53L1_DEVICEERROR_MULTCLIPFAIL:
charlesmn 0:3ac96e360672 4352
charlesmn 0:3ac96e360672 4353 presults->device_status = (pdata->result__range_status &
charlesmn 0:3ac96e360672 4354 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK);
charlesmn 0:3ac96e360672 4355
charlesmn 0:3ac96e360672 4356 status = VL53L1_ERROR_RANGE_ERROR;
charlesmn 0:3ac96e360672 4357
charlesmn 0:3ac96e360672 4358 break;
charlesmn 0:3ac96e360672 4359
charlesmn 0:3ac96e360672 4360 }
charlesmn 0:3ac96e360672 4361
charlesmn 0:3ac96e360672 4362 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4363
charlesmn 0:3ac96e360672 4364 return status;
charlesmn 0:3ac96e360672 4365 }
charlesmn 0:3ac96e360672 4366
charlesmn 0:3ac96e360672 4367
charlesmn 0:3ac96e360672 4368 void VL53L1_copy_sys_and_core_results_to_range_results(
charlesmn 0:3ac96e360672 4369 int32_t gain_factor,
charlesmn 0:3ac96e360672 4370 VL53L1_system_results_t *psys,
charlesmn 0:3ac96e360672 4371 VL53L1_core_results_t *pcore,
charlesmn 0:3ac96e360672 4372 VL53L1_range_results_t *presults)
charlesmn 0:3ac96e360672 4373 {
charlesmn 0:3ac96e360672 4374 uint8_t i = 0;
charlesmn 0:3ac96e360672 4375
charlesmn 0:3ac96e360672 4376 VL53L1_range_data_t *pdata;
charlesmn 0:3ac96e360672 4377 int32_t range_mm = 0;
charlesmn 0:3ac96e360672 4378 uint32_t tmpu32 = 0;
charlesmn 0:3ac96e360672 4379 uint16_t rpscr_crosstalk_corrected_mcps_sd0;
charlesmn 0:3ac96e360672 4380 uint16_t rmmo_effective_spads_sd0;
charlesmn 0:3ac96e360672 4381 uint16_t rmmi_effective_spads_sd0;
charlesmn 0:3ac96e360672 4382
charlesmn 0:3ac96e360672 4383 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4384
charlesmn 0:3ac96e360672 4385
charlesmn 0:3ac96e360672 4386
charlesmn 0:3ac96e360672 4387 presults->zone_id = 0;
charlesmn 0:3ac96e360672 4388 presults->stream_count = psys->result__stream_count;
charlesmn 0:3ac96e360672 4389 presults->wrap_dmax_mm = 0;
charlesmn 0:3ac96e360672 4390 presults->max_results = VL53L1_MAX_RANGE_RESULTS;
charlesmn 0:3ac96e360672 4391 presults->active_results = 1;
charlesmn 0:3ac96e360672 4392 rpscr_crosstalk_corrected_mcps_sd0 =
charlesmn 0:3ac96e360672 4393 psys->result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0;
charlesmn 0:3ac96e360672 4394 rmmo_effective_spads_sd0 =
charlesmn 0:3ac96e360672 4395 psys->result__mm_outer_actual_effective_spads_sd0;
charlesmn 0:3ac96e360672 4396 rmmi_effective_spads_sd0 =
charlesmn 0:3ac96e360672 4397 psys->result__mm_inner_actual_effective_spads_sd0;
charlesmn 0:3ac96e360672 4398
charlesmn 0:3ac96e360672 4399
charlesmn 0:3ac96e360672 4400 for (i = 0; i < VL53L1_MAX_AMBIENT_DMAX_VALUES; i++)
charlesmn 0:3ac96e360672 4401 presults->VL53L1_p_007[i] = 0;
charlesmn 0:3ac96e360672 4402
charlesmn 0:3ac96e360672 4403 pdata = &(presults->VL53L1_p_002[0]);
charlesmn 0:3ac96e360672 4404
charlesmn 0:3ac96e360672 4405 for (i = 0; i < 2; i++) {
charlesmn 0:3ac96e360672 4406
charlesmn 0:3ac96e360672 4407 pdata->range_id = i;
charlesmn 0:3ac96e360672 4408 pdata->time_stamp = 0;
charlesmn 0:3ac96e360672 4409
charlesmn 0:3ac96e360672 4410 if ((psys->result__stream_count == 0) &&
charlesmn 0:3ac96e360672 4411 ((psys->result__range_status &
charlesmn 0:3ac96e360672 4412 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK) ==
charlesmn 0:3ac96e360672 4413 VL53L1_DEVICEERROR_RANGECOMPLETE)) {
charlesmn 0:3ac96e360672 4414 pdata->range_status =
charlesmn 0:3ac96e360672 4415 VL53L1_DEVICEERROR_RANGECOMPLETE_NO_WRAP_CHECK;
charlesmn 0:3ac96e360672 4416 } else {
charlesmn 0:3ac96e360672 4417 pdata->range_status =
charlesmn 0:3ac96e360672 4418 psys->result__range_status &
charlesmn 0:3ac96e360672 4419 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK;
charlesmn 0:3ac96e360672 4420 }
charlesmn 0:3ac96e360672 4421
charlesmn 0:3ac96e360672 4422 pdata->VL53L1_p_015 = 0;
charlesmn 0:3ac96e360672 4423 pdata->VL53L1_p_022 = 0;
charlesmn 0:3ac96e360672 4424 pdata->VL53L1_p_025 = 0;
charlesmn 0:3ac96e360672 4425 pdata->VL53L1_p_026 = 0;
charlesmn 0:3ac96e360672 4426 pdata->VL53L1_p_016 = 0;
charlesmn 0:3ac96e360672 4427 pdata->VL53L1_p_027 = 0;
charlesmn 0:3ac96e360672 4428
charlesmn 0:3ac96e360672 4429 switch (i) {
charlesmn 0:3ac96e360672 4430
charlesmn 0:3ac96e360672 4431 case 0:
charlesmn 0:3ac96e360672 4432 if (psys->result__report_status ==
charlesmn 0:3ac96e360672 4433 VL53L1_DEVICEREPORTSTATUS_MM1)
charlesmn 0:3ac96e360672 4434 pdata->VL53L1_p_006 =
charlesmn 0:3ac96e360672 4435 rmmi_effective_spads_sd0;
charlesmn 0:3ac96e360672 4436 else if (psys->result__report_status ==
charlesmn 0:3ac96e360672 4437 VL53L1_DEVICEREPORTSTATUS_MM2)
charlesmn 0:3ac96e360672 4438 pdata->VL53L1_p_006 =
charlesmn 0:3ac96e360672 4439 rmmo_effective_spads_sd0;
charlesmn 0:3ac96e360672 4440 else
charlesmn 0:3ac96e360672 4441 pdata->VL53L1_p_006 =
charlesmn 0:3ac96e360672 4442 psys->result__dss_actual_effective_spads_sd0;
charlesmn 0:3ac96e360672 4443
charlesmn 0:3ac96e360672 4444 pdata->peak_signal_count_rate_mcps =
charlesmn 0:3ac96e360672 4445 rpscr_crosstalk_corrected_mcps_sd0;
charlesmn 0:3ac96e360672 4446 pdata->avg_signal_count_rate_mcps =
charlesmn 0:3ac96e360672 4447 psys->result__avg_signal_count_rate_mcps_sd0;
charlesmn 0:3ac96e360672 4448 pdata->ambient_count_rate_mcps =
charlesmn 0:3ac96e360672 4449 psys->result__ambient_count_rate_mcps_sd0;
charlesmn 0:3ac96e360672 4450
charlesmn 0:3ac96e360672 4451
charlesmn 0:3ac96e360672 4452
charlesmn 0:3ac96e360672 4453
charlesmn 0:3ac96e360672 4454 tmpu32 = ((uint32_t)psys->result__sigma_sd0 << 5);
charlesmn 0:3ac96e360672 4455 if (tmpu32 > 0xFFFF)
charlesmn 0:3ac96e360672 4456 tmpu32 = 0xFFFF;
charlesmn 0:3ac96e360672 4457
charlesmn 0:3ac96e360672 4458 pdata->VL53L1_p_005 = (uint16_t)tmpu32;
charlesmn 0:3ac96e360672 4459
charlesmn 0:3ac96e360672 4460
charlesmn 0:3ac96e360672 4461
charlesmn 0:3ac96e360672 4462 pdata->VL53L1_p_014 =
charlesmn 0:3ac96e360672 4463 psys->result__phase_sd0;
charlesmn 0:3ac96e360672 4464
charlesmn 0:3ac96e360672 4465 range_mm = (int32_t)(
charlesmn 0:3ac96e360672 4466 psys->result__final_crosstalk_corrected_range_mm_sd0);
charlesmn 0:3ac96e360672 4467
charlesmn 0:3ac96e360672 4468
charlesmn 0:3ac96e360672 4469 range_mm *= gain_factor;
charlesmn 0:3ac96e360672 4470 range_mm += 0x0400;
charlesmn 0:3ac96e360672 4471 range_mm /= 0x0800;
charlesmn 0:3ac96e360672 4472
charlesmn 0:3ac96e360672 4473 pdata->median_range_mm = (int16_t)range_mm;
charlesmn 0:3ac96e360672 4474
charlesmn 0:3ac96e360672 4475 pdata->VL53L1_p_021 =
charlesmn 0:3ac96e360672 4476 pcore->result_core__ranging_total_events_sd0;
charlesmn 0:3ac96e360672 4477 pdata->VL53L1_p_013 =
charlesmn 0:3ac96e360672 4478 pcore->result_core__signal_total_events_sd0;
charlesmn 0:3ac96e360672 4479 pdata->total_periods_elapsed =
charlesmn 0:3ac96e360672 4480 pcore->result_core__total_periods_elapsed_sd0;
charlesmn 0:3ac96e360672 4481 pdata->VL53L1_p_020 =
charlesmn 0:3ac96e360672 4482 pcore->result_core__ambient_window_events_sd0;
charlesmn 0:3ac96e360672 4483
charlesmn 0:3ac96e360672 4484 break;
charlesmn 0:3ac96e360672 4485 case 1:
charlesmn 0:3ac96e360672 4486
charlesmn 0:3ac96e360672 4487 pdata->VL53L1_p_006 =
charlesmn 0:3ac96e360672 4488 psys->result__dss_actual_effective_spads_sd1;
charlesmn 0:3ac96e360672 4489 pdata->peak_signal_count_rate_mcps =
charlesmn 0:3ac96e360672 4490 psys->result__peak_signal_count_rate_mcps_sd1;
charlesmn 0:3ac96e360672 4491 pdata->avg_signal_count_rate_mcps =
charlesmn 0:3ac96e360672 4492 0xFFFF;
charlesmn 0:3ac96e360672 4493 pdata->ambient_count_rate_mcps =
charlesmn 0:3ac96e360672 4494 psys->result__ambient_count_rate_mcps_sd1;
charlesmn 0:3ac96e360672 4495
charlesmn 0:3ac96e360672 4496
charlesmn 0:3ac96e360672 4497
charlesmn 0:3ac96e360672 4498
charlesmn 0:3ac96e360672 4499 tmpu32 = ((uint32_t)psys->result__sigma_sd1 << 5);
charlesmn 0:3ac96e360672 4500 if (tmpu32 > 0xFFFF)
charlesmn 0:3ac96e360672 4501 tmpu32 = 0xFFFF;
charlesmn 0:3ac96e360672 4502
charlesmn 0:3ac96e360672 4503 pdata->VL53L1_p_005 = (uint16_t)tmpu32;
charlesmn 0:3ac96e360672 4504
charlesmn 0:3ac96e360672 4505
charlesmn 0:3ac96e360672 4506
charlesmn 0:3ac96e360672 4507 pdata->VL53L1_p_014 =
charlesmn 0:3ac96e360672 4508 psys->result__phase_sd1;
charlesmn 0:3ac96e360672 4509
charlesmn 0:3ac96e360672 4510 range_mm = (int32_t)(
charlesmn 0:3ac96e360672 4511 psys->result__final_crosstalk_corrected_range_mm_sd1);
charlesmn 0:3ac96e360672 4512
charlesmn 0:3ac96e360672 4513
charlesmn 0:3ac96e360672 4514 range_mm *= gain_factor;
charlesmn 0:3ac96e360672 4515 range_mm += 0x0400;
charlesmn 0:3ac96e360672 4516 range_mm /= 0x0800;
charlesmn 0:3ac96e360672 4517
charlesmn 0:3ac96e360672 4518 pdata->median_range_mm = (int16_t)range_mm;
charlesmn 0:3ac96e360672 4519
charlesmn 0:3ac96e360672 4520 pdata->VL53L1_p_021 =
charlesmn 0:3ac96e360672 4521 pcore->result_core__ranging_total_events_sd1;
charlesmn 0:3ac96e360672 4522 pdata->VL53L1_p_013 =
charlesmn 0:3ac96e360672 4523 pcore->result_core__signal_total_events_sd1;
charlesmn 0:3ac96e360672 4524 pdata->total_periods_elapsed =
charlesmn 0:3ac96e360672 4525 pcore->result_core__total_periods_elapsed_sd1;
charlesmn 0:3ac96e360672 4526 pdata->VL53L1_p_020 =
charlesmn 0:3ac96e360672 4527 pcore->result_core__ambient_window_events_sd1;
charlesmn 0:3ac96e360672 4528
charlesmn 0:3ac96e360672 4529 break;
charlesmn 0:3ac96e360672 4530 }
charlesmn 0:3ac96e360672 4531
charlesmn 0:3ac96e360672 4532
charlesmn 0:3ac96e360672 4533 pdata->VL53L1_p_028 = pdata->VL53L1_p_014;
charlesmn 0:3ac96e360672 4534 pdata->VL53L1_p_029 = pdata->VL53L1_p_014;
charlesmn 0:3ac96e360672 4535 pdata->min_range_mm = pdata->median_range_mm;
charlesmn 0:3ac96e360672 4536 pdata->max_range_mm = pdata->median_range_mm;
charlesmn 0:3ac96e360672 4537
charlesmn 0:3ac96e360672 4538 pdata++;
charlesmn 0:3ac96e360672 4539 }
charlesmn 0:3ac96e360672 4540
charlesmn 0:3ac96e360672 4541
charlesmn 0:3ac96e360672 4542
charlesmn 0:3ac96e360672 4543 presults->device_status = VL53L1_DEVICEERROR_NOUPDATE;
charlesmn 0:3ac96e360672 4544
charlesmn 0:3ac96e360672 4545
charlesmn 0:3ac96e360672 4546
charlesmn 0:3ac96e360672 4547 switch (psys->result__range_status &
charlesmn 0:3ac96e360672 4548 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK) {
charlesmn 0:3ac96e360672 4549
charlesmn 0:3ac96e360672 4550 case VL53L1_DEVICEERROR_VCSELCONTINUITYTESTFAILURE:
charlesmn 0:3ac96e360672 4551 case VL53L1_DEVICEERROR_VCSELWATCHDOGTESTFAILURE:
charlesmn 0:3ac96e360672 4552 case VL53L1_DEVICEERROR_NOVHVVALUEFOUND:
charlesmn 0:3ac96e360672 4553 case VL53L1_DEVICEERROR_USERROICLIP:
charlesmn 0:3ac96e360672 4554 case VL53L1_DEVICEERROR_MULTCLIPFAIL:
charlesmn 0:3ac96e360672 4555
charlesmn 0:3ac96e360672 4556 presults->device_status = (psys->result__range_status &
charlesmn 0:3ac96e360672 4557 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK);
charlesmn 0:3ac96e360672 4558
charlesmn 0:3ac96e360672 4559 presults->VL53L1_p_002[0].range_status =
charlesmn 0:3ac96e360672 4560 VL53L1_DEVICEERROR_NOUPDATE;
charlesmn 0:3ac96e360672 4561 break;
charlesmn 0:3ac96e360672 4562
charlesmn 0:3ac96e360672 4563 }
charlesmn 0:3ac96e360672 4564
charlesmn 0:3ac96e360672 4565 LOG_FUNCTION_END(0);
charlesmn 0:3ac96e360672 4566 }
charlesmn 0:3ac96e360672 4567
charlesmn 0:3ac96e360672 4568
charlesmn 0:3ac96e360672 4569 VL53L1_Error VL53L1_set_zone_dss_config(
charlesmn 0:3ac96e360672 4570 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4571 VL53L1_zone_private_dyn_cfg_t *pzone_dyn_cfg)
charlesmn 0:3ac96e360672 4572 {
charlesmn 0:3ac96e360672 4573
charlesmn 0:3ac96e360672 4574
charlesmn 0:3ac96e360672 4575
charlesmn 0:3ac96e360672 4576 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4577
charlesmn 0:3ac96e360672 4578 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4579 VL53L1_ll_driver_state_t *pstate = &(pdev->ll_state);
charlesmn 0:3ac96e360672 4580
charlesmn 0:3ac96e360672 4581 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4582
charlesmn 0:3ac96e360672 4583 if (pstate->cfg_device_state ==
charlesmn 0:3ac96e360672 4584 VL53L1_DEVICESTATE_RANGING_DSS_MANUAL) {
charlesmn 0:3ac96e360672 4585 pdev->gen_cfg.dss_config__roi_mode_control =
charlesmn 0:3ac96e360672 4586 VL53L1_DSS_CONTROL__MODE_EFFSPADS;
charlesmn 0:3ac96e360672 4587 pdev->gen_cfg.dss_config__manual_effective_spads_select =
charlesmn 0:3ac96e360672 4588 pzone_dyn_cfg->dss_requested_effective_spad_count;
charlesmn 0:3ac96e360672 4589 } else {
charlesmn 0:3ac96e360672 4590 pdev->gen_cfg.dss_config__roi_mode_control =
charlesmn 0:3ac96e360672 4591 VL53L1_DSS_CONTROL__MODE_TARGET_RATE;
charlesmn 0:3ac96e360672 4592 }
charlesmn 0:3ac96e360672 4593
charlesmn 0:3ac96e360672 4594 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4595 return status;
charlesmn 0:3ac96e360672 4596 }
charlesmn 0:3ac96e360672 4597
charlesmn 0:3ac96e360672 4598
charlesmn 0:3ac96e360672 4599 VL53L1_Error VL53L1_calc_ambient_dmax(
charlesmn 0:3ac96e360672 4600 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4601 uint16_t target_reflectance,
charlesmn 0:3ac96e360672 4602 int16_t *pambient_dmax_mm)
charlesmn 0:3ac96e360672 4603 {
charlesmn 0:3ac96e360672 4604 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4605
charlesmn 0:3ac96e360672 4606 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 4607 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4608
charlesmn 0:3ac96e360672 4609 VL53L1_dmax_calibration_data_t dmax_cal;
charlesmn 0:3ac96e360672 4610 VL53L1_dmax_calibration_data_t *pdmax_cal = &dmax_cal;
charlesmn 0:3ac96e360672 4611
charlesmn 0:3ac96e360672 4612 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4613
charlesmn 0:3ac96e360672 4614
charlesmn 0:3ac96e360672 4615
charlesmn 0:3ac96e360672 4616 status =
charlesmn 0:3ac96e360672 4617 VL53L1_get_dmax_calibration_data(
charlesmn 0:3ac96e360672 4618 Dev,
charlesmn 0:3ac96e360672 4619 pdev->debug_mode,
charlesmn 0:3ac96e360672 4620 pdev->ll_state.rd_zone_id,
charlesmn 0:3ac96e360672 4621 pdmax_cal);
charlesmn 0:3ac96e360672 4622
charlesmn 0:3ac96e360672 4623
charlesmn 0:3ac96e360672 4624
charlesmn 0:3ac96e360672 4625 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 4626 status =
charlesmn 0:3ac96e360672 4627 VL53L1_ipp_hist_ambient_dmax(
charlesmn 0:3ac96e360672 4628 Dev,
charlesmn 0:3ac96e360672 4629 target_reflectance,
charlesmn 0:3ac96e360672 4630 &(pdev->fmt_dmax_cal),
charlesmn 0:3ac96e360672 4631 &(pdev->dmax_cfg),
charlesmn 0:3ac96e360672 4632 &(pdev->hist_data),
charlesmn 0:3ac96e360672 4633 pambient_dmax_mm);
charlesmn 0:3ac96e360672 4634
charlesmn 0:3ac96e360672 4635 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4636
charlesmn 0:3ac96e360672 4637 return status;
charlesmn 0:3ac96e360672 4638 }
charlesmn 0:3ac96e360672 4639
charlesmn 0:3ac96e360672 4640
charlesmn 0:3ac96e360672 4641
charlesmn 0:3ac96e360672 4642 VL53L1_Error VL53L1_set_GPIO_interrupt_config(
charlesmn 0:3ac96e360672 4643 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4644 VL53L1_GPIO_Interrupt_Mode intr_mode_distance,
charlesmn 0:3ac96e360672 4645 VL53L1_GPIO_Interrupt_Mode intr_mode_rate,
charlesmn 0:3ac96e360672 4646 uint8_t intr_new_measure_ready,
charlesmn 0:3ac96e360672 4647 uint8_t intr_no_target,
charlesmn 0:3ac96e360672 4648 uint8_t intr_combined_mode,
charlesmn 0:3ac96e360672 4649 uint16_t thresh_distance_high,
charlesmn 0:3ac96e360672 4650 uint16_t thresh_distance_low,
charlesmn 0:3ac96e360672 4651 uint16_t thresh_rate_high,
charlesmn 0:3ac96e360672 4652 uint16_t thresh_rate_low
charlesmn 0:3ac96e360672 4653 )
charlesmn 0:3ac96e360672 4654 {
charlesmn 0:3ac96e360672 4655 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4656
charlesmn 0:3ac96e360672 4657 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4658 VL53L1_GPIO_interrupt_config_t *pintconf =
charlesmn 0:3ac96e360672 4659 &(pdev->gpio_interrupt_config);
charlesmn 0:3ac96e360672 4660
charlesmn 0:3ac96e360672 4661 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4662
charlesmn 0:3ac96e360672 4663
charlesmn 0:3ac96e360672 4664 pintconf->intr_mode_distance = intr_mode_distance;
charlesmn 0:3ac96e360672 4665 pintconf->intr_mode_rate = intr_mode_rate;
charlesmn 0:3ac96e360672 4666 pintconf->intr_new_measure_ready = intr_new_measure_ready;
charlesmn 0:3ac96e360672 4667 pintconf->intr_no_target = intr_no_target;
charlesmn 0:3ac96e360672 4668 pintconf->intr_combined_mode = intr_combined_mode;
charlesmn 0:3ac96e360672 4669 pintconf->threshold_distance_high = thresh_distance_high;
charlesmn 0:3ac96e360672 4670 pintconf->threshold_distance_low = thresh_distance_low;
charlesmn 0:3ac96e360672 4671 pintconf->threshold_rate_high = thresh_rate_high;
charlesmn 0:3ac96e360672 4672 pintconf->threshold_rate_low = thresh_rate_low;
charlesmn 0:3ac96e360672 4673
charlesmn 0:3ac96e360672 4674
charlesmn 0:3ac96e360672 4675 pdev->gen_cfg.system__interrupt_config_gpio =
charlesmn 0:3ac96e360672 4676 VL53L1_encode_GPIO_interrupt_config(pintconf);
charlesmn 0:3ac96e360672 4677
charlesmn 0:3ac96e360672 4678
charlesmn 0:3ac96e360672 4679
charlesmn 0:3ac96e360672 4680 status = VL53L1_set_GPIO_thresholds_from_struct(
charlesmn 0:3ac96e360672 4681 Dev,
charlesmn 0:3ac96e360672 4682 pintconf);
charlesmn 0:3ac96e360672 4683
charlesmn 0:3ac96e360672 4684 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4685 return status;
charlesmn 0:3ac96e360672 4686 }
charlesmn 0:3ac96e360672 4687
charlesmn 0:3ac96e360672 4688
charlesmn 0:3ac96e360672 4689
charlesmn 0:3ac96e360672 4690 VL53L1_Error VL53L1_set_GPIO_interrupt_config_struct(
charlesmn 0:3ac96e360672 4691 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4692 VL53L1_GPIO_interrupt_config_t intconf)
charlesmn 0:3ac96e360672 4693 {
charlesmn 0:3ac96e360672 4694 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4695
charlesmn 0:3ac96e360672 4696 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4697 VL53L1_GPIO_interrupt_config_t *pintconf =
charlesmn 0:3ac96e360672 4698 &(pdev->gpio_interrupt_config);
charlesmn 0:3ac96e360672 4699
charlesmn 0:3ac96e360672 4700 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4701
charlesmn 0:3ac96e360672 4702
charlesmn 0:3ac96e360672 4703 memcpy(pintconf, &(intconf), sizeof(VL53L1_GPIO_interrupt_config_t));
charlesmn 0:3ac96e360672 4704
charlesmn 0:3ac96e360672 4705
charlesmn 0:3ac96e360672 4706 pdev->gen_cfg.system__interrupt_config_gpio =
charlesmn 0:3ac96e360672 4707 VL53L1_encode_GPIO_interrupt_config(pintconf);
charlesmn 0:3ac96e360672 4708
charlesmn 0:3ac96e360672 4709
charlesmn 0:3ac96e360672 4710 status = VL53L1_set_GPIO_thresholds_from_struct(
charlesmn 0:3ac96e360672 4711 Dev,
charlesmn 0:3ac96e360672 4712 pintconf);
charlesmn 0:3ac96e360672 4713
charlesmn 0:3ac96e360672 4714 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4715 return status;
charlesmn 0:3ac96e360672 4716 }
charlesmn 0:3ac96e360672 4717
charlesmn 0:3ac96e360672 4718
charlesmn 0:3ac96e360672 4719
charlesmn 0:3ac96e360672 4720 VL53L1_Error VL53L1_get_GPIO_interrupt_config(
charlesmn 0:3ac96e360672 4721 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4722 VL53L1_GPIO_interrupt_config_t *pintconf)
charlesmn 0:3ac96e360672 4723 {
charlesmn 0:3ac96e360672 4724 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4725
charlesmn 0:3ac96e360672 4726 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4727
charlesmn 0:3ac96e360672 4728 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4729
charlesmn 0:3ac96e360672 4730
charlesmn 0:3ac96e360672 4731 pdev->gpio_interrupt_config = VL53L1_decode_GPIO_interrupt_config(
charlesmn 0:3ac96e360672 4732 pdev->gen_cfg.system__interrupt_config_gpio);
charlesmn 0:3ac96e360672 4733
charlesmn 0:3ac96e360672 4734
charlesmn 0:3ac96e360672 4735 pdev->gpio_interrupt_config.threshold_distance_high =
charlesmn 0:3ac96e360672 4736 pdev->dyn_cfg.system__thresh_high;
charlesmn 0:3ac96e360672 4737 pdev->gpio_interrupt_config.threshold_distance_low =
charlesmn 0:3ac96e360672 4738 pdev->dyn_cfg.system__thresh_low;
charlesmn 0:3ac96e360672 4739
charlesmn 0:3ac96e360672 4740 pdev->gpio_interrupt_config.threshold_rate_high =
charlesmn 0:3ac96e360672 4741 pdev->gen_cfg.system__thresh_rate_high;
charlesmn 0:3ac96e360672 4742 pdev->gpio_interrupt_config.threshold_rate_low =
charlesmn 0:3ac96e360672 4743 pdev->gen_cfg.system__thresh_rate_low;
charlesmn 0:3ac96e360672 4744
charlesmn 0:3ac96e360672 4745 if (pintconf == &(pdev->gpio_interrupt_config)) {
charlesmn 0:3ac96e360672 4746
charlesmn 0:3ac96e360672 4747 } else {
charlesmn 0:3ac96e360672 4748
charlesmn 0:3ac96e360672 4749
charlesmn 0:3ac96e360672 4750 memcpy(pintconf, &(pdev->gpio_interrupt_config),
charlesmn 0:3ac96e360672 4751 sizeof(VL53L1_GPIO_interrupt_config_t));
charlesmn 0:3ac96e360672 4752 }
charlesmn 0:3ac96e360672 4753
charlesmn 0:3ac96e360672 4754 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4755 return status;
charlesmn 0:3ac96e360672 4756 }
charlesmn 0:3ac96e360672 4757
charlesmn 0:3ac96e360672 4758
charlesmn 0:3ac96e360672 4759 VL53L1_Error VL53L1_set_dmax_mode(
charlesmn 0:3ac96e360672 4760 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4761 VL53L1_DeviceDmaxMode dmax_mode)
charlesmn 0:3ac96e360672 4762 {
charlesmn 0:3ac96e360672 4763
charlesmn 0:3ac96e360672 4764
charlesmn 0:3ac96e360672 4765 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4766
charlesmn 0:3ac96e360672 4767 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4768
charlesmn 0:3ac96e360672 4769 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4770
charlesmn 0:3ac96e360672 4771 pdev->dmax_mode = dmax_mode;
charlesmn 0:3ac96e360672 4772
charlesmn 0:3ac96e360672 4773 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4774
charlesmn 0:3ac96e360672 4775 return status;
charlesmn 0:3ac96e360672 4776 }
charlesmn 0:3ac96e360672 4777
charlesmn 0:3ac96e360672 4778
charlesmn 0:3ac96e360672 4779 VL53L1_Error VL53L1_get_dmax_mode(
charlesmn 0:3ac96e360672 4780 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4781 VL53L1_DeviceDmaxMode *pdmax_mode)
charlesmn 0:3ac96e360672 4782 {
charlesmn 0:3ac96e360672 4783
charlesmn 0:3ac96e360672 4784
charlesmn 0:3ac96e360672 4785 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4786
charlesmn 0:3ac96e360672 4787 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4788
charlesmn 0:3ac96e360672 4789 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4790
charlesmn 0:3ac96e360672 4791 *pdmax_mode = pdev->dmax_mode;
charlesmn 0:3ac96e360672 4792
charlesmn 0:3ac96e360672 4793 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4794
charlesmn 0:3ac96e360672 4795 return status;
charlesmn 0:3ac96e360672 4796 }
charlesmn 0:3ac96e360672 4797
charlesmn 0:3ac96e360672 4798
charlesmn 0:3ac96e360672 4799 VL53L1_Error VL53L1_get_dmax_calibration_data(
charlesmn 0:3ac96e360672 4800 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4801 VL53L1_DeviceDmaxMode dmax_mode,
charlesmn 0:3ac96e360672 4802 uint8_t zone_id,
charlesmn 0:3ac96e360672 4803 VL53L1_dmax_calibration_data_t *pdmax_cal)
charlesmn 0:3ac96e360672 4804 {
charlesmn 0:3ac96e360672 4805
charlesmn 0:3ac96e360672 4806
charlesmn 0:3ac96e360672 4807 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4808
charlesmn 0:3ac96e360672 4809 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 4810 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4811 VL53L1_LLDriverResults_t *pres =
charlesmn 0:3ac96e360672 4812 VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn 0:3ac96e360672 4813
charlesmn 0:3ac96e360672 4814 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4815
charlesmn 0:3ac96e360672 4816 switch (dmax_mode) {
charlesmn 0:3ac96e360672 4817
charlesmn 0:3ac96e360672 4818 case VL53L1_DEVICEDMAXMODE__PER_ZONE_CAL_DATA:
charlesmn 0:3ac96e360672 4819 pdmax_cal->ref__actual_effective_spads =
charlesmn 0:3ac96e360672 4820 (uint16_t)pres->zone_cal.VL53L1_p_002[zone_id].effective_spads;
charlesmn 0:3ac96e360672 4821 pdmax_cal->ref__peak_signal_count_rate_mcps =
charlesmn 0:3ac96e360672 4822 (uint16_t)pres->zone_cal.VL53L1_p_002[zone_id].peak_rate_mcps;
charlesmn 0:3ac96e360672 4823 pdmax_cal->ref__distance_mm =
charlesmn 0:3ac96e360672 4824 pres->zone_cal.cal_distance_mm;
charlesmn 0:3ac96e360672 4825 pdmax_cal->ref_reflectance_pc =
charlesmn 0:3ac96e360672 4826 pres->zone_cal.cal_reflectance_pc;
charlesmn 0:3ac96e360672 4827 pdmax_cal->coverglass_transmission = 0x0100;
charlesmn 0:3ac96e360672 4828 break;
charlesmn 0:3ac96e360672 4829
charlesmn 0:3ac96e360672 4830 case VL53L1_DEVICEDMAXMODE__CUST_CAL_DATA:
charlesmn 0:3ac96e360672 4831 memcpy(
charlesmn 0:3ac96e360672 4832 pdmax_cal,
charlesmn 0:3ac96e360672 4833 &(pdev->cust_dmax_cal),
charlesmn 0:3ac96e360672 4834 sizeof(VL53L1_dmax_calibration_data_t));
charlesmn 0:3ac96e360672 4835 break;
charlesmn 0:3ac96e360672 4836
charlesmn 0:3ac96e360672 4837 case VL53L1_DEVICEDMAXMODE__FMT_CAL_DATA:
charlesmn 0:3ac96e360672 4838 memcpy(
charlesmn 0:3ac96e360672 4839 pdmax_cal,
charlesmn 0:3ac96e360672 4840 &(pdev->fmt_dmax_cal),
charlesmn 0:3ac96e360672 4841 sizeof(VL53L1_dmax_calibration_data_t));
charlesmn 0:3ac96e360672 4842 break;
charlesmn 0:3ac96e360672 4843
charlesmn 0:3ac96e360672 4844 default:
charlesmn 0:3ac96e360672 4845 status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn 0:3ac96e360672 4846 break;
charlesmn 0:3ac96e360672 4847
charlesmn 0:3ac96e360672 4848 }
charlesmn 0:3ac96e360672 4849
charlesmn 0:3ac96e360672 4850 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4851
charlesmn 0:3ac96e360672 4852 return status;
charlesmn 0:3ac96e360672 4853 }
charlesmn 0:3ac96e360672 4854
charlesmn 0:3ac96e360672 4855
charlesmn 0:3ac96e360672 4856 VL53L1_Error VL53L1_set_hist_dmax_config(
charlesmn 0:3ac96e360672 4857 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4858 VL53L1_hist_gen3_dmax_config_t *pdmax_cfg)
charlesmn 0:3ac96e360672 4859 {
charlesmn 0:3ac96e360672 4860
charlesmn 0:3ac96e360672 4861
charlesmn 0:3ac96e360672 4862
charlesmn 0:3ac96e360672 4863 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4864
charlesmn 0:3ac96e360672 4865 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4866
charlesmn 0:3ac96e360672 4867 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4868
charlesmn 0:3ac96e360672 4869
charlesmn 0:3ac96e360672 4870 memcpy(
charlesmn 0:3ac96e360672 4871 &(pdev->dmax_cfg),
charlesmn 0:3ac96e360672 4872 pdmax_cfg,
charlesmn 0:3ac96e360672 4873 sizeof(VL53L1_hist_gen3_dmax_config_t));
charlesmn 0:3ac96e360672 4874
charlesmn 0:3ac96e360672 4875 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4876
charlesmn 0:3ac96e360672 4877 return status;
charlesmn 0:3ac96e360672 4878 }
charlesmn 0:3ac96e360672 4879
charlesmn 0:3ac96e360672 4880
charlesmn 0:3ac96e360672 4881 VL53L1_Error VL53L1_get_hist_dmax_config(
charlesmn 0:3ac96e360672 4882 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4883 VL53L1_hist_gen3_dmax_config_t *pdmax_cfg)
charlesmn 0:3ac96e360672 4884 {
charlesmn 0:3ac96e360672 4885
charlesmn 0:3ac96e360672 4886
charlesmn 0:3ac96e360672 4887
charlesmn 0:3ac96e360672 4888 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4889
charlesmn 0:3ac96e360672 4890 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4891
charlesmn 0:3ac96e360672 4892 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4893
charlesmn 0:3ac96e360672 4894
charlesmn 0:3ac96e360672 4895 memcpy(
charlesmn 0:3ac96e360672 4896 pdmax_cfg,
charlesmn 0:3ac96e360672 4897 &(pdev->dmax_cfg),
charlesmn 0:3ac96e360672 4898 sizeof(VL53L1_hist_gen3_dmax_config_t));
charlesmn 0:3ac96e360672 4899
charlesmn 0:3ac96e360672 4900 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4901
charlesmn 0:3ac96e360672 4902 return status;
charlesmn 0:3ac96e360672 4903 }
charlesmn 0:3ac96e360672 4904
charlesmn 0:3ac96e360672 4905
charlesmn 0:3ac96e360672 4906 VL53L1_Error VL53L1_set_offset_calibration_mode(
charlesmn 0:3ac96e360672 4907 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4908 VL53L1_OffsetCalibrationMode offset_cal_mode)
charlesmn 0:3ac96e360672 4909 {
charlesmn 0:3ac96e360672 4910
charlesmn 0:3ac96e360672 4911
charlesmn 0:3ac96e360672 4912
charlesmn 0:3ac96e360672 4913 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4914
charlesmn 0:3ac96e360672 4915 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4916
charlesmn 0:3ac96e360672 4917 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4918
charlesmn 0:3ac96e360672 4919 pdev->offset_calibration_mode = offset_cal_mode;
charlesmn 0:3ac96e360672 4920
charlesmn 0:3ac96e360672 4921 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4922
charlesmn 0:3ac96e360672 4923 return status;
charlesmn 0:3ac96e360672 4924 }
charlesmn 0:3ac96e360672 4925
charlesmn 0:3ac96e360672 4926
charlesmn 0:3ac96e360672 4927 VL53L1_Error VL53L1_get_offset_calibration_mode(
charlesmn 0:3ac96e360672 4928 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4929 VL53L1_OffsetCalibrationMode *poffset_cal_mode)
charlesmn 0:3ac96e360672 4930 {
charlesmn 0:3ac96e360672 4931
charlesmn 0:3ac96e360672 4932
charlesmn 0:3ac96e360672 4933
charlesmn 0:3ac96e360672 4934 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4935
charlesmn 0:3ac96e360672 4936 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4937
charlesmn 0:3ac96e360672 4938 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4939
charlesmn 0:3ac96e360672 4940 *poffset_cal_mode = pdev->offset_calibration_mode;
charlesmn 0:3ac96e360672 4941
charlesmn 0:3ac96e360672 4942 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4943
charlesmn 0:3ac96e360672 4944 return status;
charlesmn 0:3ac96e360672 4945 }
charlesmn 0:3ac96e360672 4946
charlesmn 0:3ac96e360672 4947
charlesmn 0:3ac96e360672 4948 VL53L1_Error VL53L1_set_offset_correction_mode(
charlesmn 0:3ac96e360672 4949 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4950 VL53L1_OffsetCorrectionMode offset_cor_mode)
charlesmn 0:3ac96e360672 4951 {
charlesmn 0:3ac96e360672 4952
charlesmn 0:3ac96e360672 4953
charlesmn 0:3ac96e360672 4954
charlesmn 0:3ac96e360672 4955 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4956
charlesmn 0:3ac96e360672 4957 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4958
charlesmn 0:3ac96e360672 4959 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4960
charlesmn 0:3ac96e360672 4961 pdev->offset_correction_mode = offset_cor_mode;
charlesmn 0:3ac96e360672 4962
charlesmn 0:3ac96e360672 4963 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4964
charlesmn 0:3ac96e360672 4965 return status;
charlesmn 0:3ac96e360672 4966 }
charlesmn 0:3ac96e360672 4967
charlesmn 0:3ac96e360672 4968
charlesmn 0:3ac96e360672 4969 VL53L1_Error VL53L1_get_offset_correction_mode(
charlesmn 0:3ac96e360672 4970 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4971 VL53L1_OffsetCorrectionMode *poffset_cor_mode)
charlesmn 0:3ac96e360672 4972 {
charlesmn 0:3ac96e360672 4973
charlesmn 0:3ac96e360672 4974
charlesmn 0:3ac96e360672 4975
charlesmn 0:3ac96e360672 4976 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4977
charlesmn 0:3ac96e360672 4978 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4979
charlesmn 0:3ac96e360672 4980 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4981
charlesmn 0:3ac96e360672 4982 *poffset_cor_mode = pdev->offset_correction_mode;
charlesmn 0:3ac96e360672 4983
charlesmn 0:3ac96e360672 4984 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4985
charlesmn 0:3ac96e360672 4986 return status;
charlesmn 0:3ac96e360672 4987 }
charlesmn 0:3ac96e360672 4988
charlesmn 0:3ac96e360672 4989
charlesmn 0:3ac96e360672 4990
charlesmn 0:3ac96e360672 4991
charlesmn 0:3ac96e360672 4992 VL53L1_Error VL53L1_set_zone_calibration_data(
charlesmn 0:3ac96e360672 4993 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4994 VL53L1_zone_calibration_results_t *pzone_cal)
charlesmn 0:3ac96e360672 4995 {
charlesmn 0:3ac96e360672 4996
charlesmn 0:3ac96e360672 4997
charlesmn 0:3ac96e360672 4998
charlesmn 0:3ac96e360672 4999 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 5000
charlesmn 0:3ac96e360672 5001 VL53L1_LLDriverResults_t *pres = VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn 0:3ac96e360672 5002
charlesmn 0:3ac96e360672 5003 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 5004
charlesmn 0:3ac96e360672 5005 if (pzone_cal->struct_version !=
charlesmn 0:3ac96e360672 5006 VL53L1_LL_ZONE_CALIBRATION_DATA_STRUCT_VERSION)
charlesmn 0:3ac96e360672 5007 status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn 0:3ac96e360672 5008
charlesmn 0:3ac96e360672 5009
charlesmn 0:3ac96e360672 5010 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 5011
charlesmn 0:3ac96e360672 5012 memcpy(
charlesmn 0:3ac96e360672 5013 &(pres->zone_cal),
charlesmn 0:3ac96e360672 5014 pzone_cal,
charlesmn 0:3ac96e360672 5015 sizeof(VL53L1_zone_calibration_results_t));
charlesmn 0:3ac96e360672 5016
charlesmn 0:3ac96e360672 5017 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 5018
charlesmn 0:3ac96e360672 5019 return status;
charlesmn 0:3ac96e360672 5020 }
charlesmn 0:3ac96e360672 5021
charlesmn 0:3ac96e360672 5022
charlesmn 0:3ac96e360672 5023 VL53L1_Error VL53L1_get_zone_calibration_data(
charlesmn 0:3ac96e360672 5024 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 5025 VL53L1_zone_calibration_results_t *pzone_cal)
charlesmn 0:3ac96e360672 5026 {
charlesmn 0:3ac96e360672 5027
charlesmn 0:3ac96e360672 5028
charlesmn 0:3ac96e360672 5029
charlesmn 0:3ac96e360672 5030 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 5031
charlesmn 0:3ac96e360672 5032 VL53L1_LLDriverResults_t *pres = VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn 0:3ac96e360672 5033
charlesmn 0:3ac96e360672 5034 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 5035
charlesmn 0:3ac96e360672 5036
charlesmn 0:3ac96e360672 5037 memcpy(
charlesmn 0:3ac96e360672 5038 pzone_cal,
charlesmn 0:3ac96e360672 5039 &(pres->zone_cal),
charlesmn 0:3ac96e360672 5040 sizeof(VL53L1_zone_calibration_results_t));
charlesmn 0:3ac96e360672 5041
charlesmn 0:3ac96e360672 5042 pzone_cal->struct_version =
charlesmn 0:3ac96e360672 5043 VL53L1_LL_ZONE_CALIBRATION_DATA_STRUCT_VERSION;
charlesmn 0:3ac96e360672 5044
charlesmn 0:3ac96e360672 5045 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 5046
charlesmn 0:3ac96e360672 5047 return status;
charlesmn 0:3ac96e360672 5048 }
charlesmn 0:3ac96e360672 5049
charlesmn 0:3ac96e360672 5050
charlesmn 0:3ac96e360672 5051 VL53L1_Error VL53L1_get_tuning_debug_data(
charlesmn 0:3ac96e360672 5052 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 5053 VL53L1_tuning_parameters_t *ptun_data)
charlesmn 0:3ac96e360672 5054 {
charlesmn 0:3ac96e360672 5055
charlesmn 0:3ac96e360672 5056
charlesmn 0:3ac96e360672 5057 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 5058
charlesmn 0:3ac96e360672 5059 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 5060 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn 0:3ac96e360672 5061 VL53L1_xtalkextract_config_t *pXC = &(pdev->xtalk_extract_cfg);
charlesmn 0:3ac96e360672 5062
charlesmn 0:3ac96e360672 5063 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 5064
charlesmn 0:3ac96e360672 5065 ptun_data->vl53l1_tuningparm_version =
charlesmn 0:3ac96e360672 5066 pdev->tuning_parms.tp_tuning_parm_version;
charlesmn 0:3ac96e360672 5067
charlesmn 0:3ac96e360672 5068 ptun_data->vl53l1_tuningparm_key_table_version =
charlesmn 0:3ac96e360672 5069 pdev->tuning_parms.tp_tuning_parm_key_table_version;
charlesmn 0:3ac96e360672 5070
charlesmn 0:3ac96e360672 5071
charlesmn 0:3ac96e360672 5072 ptun_data->vl53l1_tuningparm_lld_version =
charlesmn 0:3ac96e360672 5073 pdev->tuning_parms.tp_tuning_parm_lld_version;
charlesmn 0:3ac96e360672 5074
charlesmn 0:3ac96e360672 5075 ptun_data->vl53l1_tuningparm_hist_algo_select =
charlesmn 0:3ac96e360672 5076 pHP->hist_algo_select;
charlesmn 0:3ac96e360672 5077
charlesmn 0:3ac96e360672 5078 ptun_data->vl53l1_tuningparm_hist_target_order =
charlesmn 0:3ac96e360672 5079 pHP->hist_target_order;
charlesmn 0:3ac96e360672 5080
charlesmn 0:3ac96e360672 5081 ptun_data->vl53l1_tuningparm_hist_filter_woi_0 =
charlesmn 0:3ac96e360672 5082 pHP->filter_woi0;
charlesmn 0:3ac96e360672 5083
charlesmn 0:3ac96e360672 5084 ptun_data->vl53l1_tuningparm_hist_filter_woi_1 =
charlesmn 0:3ac96e360672 5085 pHP->filter_woi1;
charlesmn 0:3ac96e360672 5086
charlesmn 0:3ac96e360672 5087 ptun_data->vl53l1_tuningparm_hist_amb_est_method =
charlesmn 0:3ac96e360672 5088 pHP->hist_amb_est_method;
charlesmn 0:3ac96e360672 5089
charlesmn 0:3ac96e360672 5090 ptun_data->vl53l1_tuningparm_hist_amb_thresh_sigma_0 =
charlesmn 0:3ac96e360672 5091 pHP->ambient_thresh_sigma0;
charlesmn 0:3ac96e360672 5092
charlesmn 0:3ac96e360672 5093 ptun_data->vl53l1_tuningparm_hist_amb_thresh_sigma_1 =
charlesmn 0:3ac96e360672 5094 pHP->ambient_thresh_sigma1;
charlesmn 0:3ac96e360672 5095
charlesmn 0:3ac96e360672 5096 ptun_data->vl53l1_tuningparm_hist_min_amb_thresh_events =
charlesmn 0:3ac96e360672 5097 pHP->min_ambient_thresh_events;
charlesmn 0:3ac96e360672 5098
charlesmn 0:3ac96e360672 5099 ptun_data->vl53l1_tuningparm_hist_amb_events_scaler =
charlesmn 0:3ac96e360672 5100 pHP->ambient_thresh_events_scaler;
charlesmn 0:3ac96e360672 5101
charlesmn 0:3ac96e360672 5102 ptun_data->vl53l1_tuningparm_hist_noise_threshold =
charlesmn 0:3ac96e360672 5103 pHP->noise_threshold;
charlesmn 0:3ac96e360672 5104
charlesmn 0:3ac96e360672 5105 ptun_data->vl53l1_tuningparm_hist_signal_total_events_limit =
charlesmn 0:3ac96e360672 5106 pHP->signal_total_events_limit;
charlesmn 0:3ac96e360672 5107
charlesmn 0:3ac96e360672 5108 ptun_data->vl53l1_tuningparm_hist_sigma_est_ref_mm =
charlesmn 0:3ac96e360672 5109 pHP->sigma_estimator__sigma_ref_mm;
charlesmn 0:3ac96e360672 5110
charlesmn 0:3ac96e360672 5111 ptun_data->vl53l1_tuningparm_hist_sigma_thresh_mm =
charlesmn 0:3ac96e360672 5112 pHP->sigma_thresh;
charlesmn 0:3ac96e360672 5113
charlesmn 0:3ac96e360672 5114 ptun_data->vl53l1_tuningparm_hist_gain_factor =
charlesmn 0:3ac96e360672 5115 pdev->gain_cal.histogram_ranging_gain_factor;
charlesmn 0:3ac96e360672 5116
charlesmn 0:3ac96e360672 5117 ptun_data->vl53l1_tuningparm_consistency_hist_phase_tolerance =
charlesmn 0:3ac96e360672 5118 pHP->algo__consistency_check__phase_tolerance;
charlesmn 0:3ac96e360672 5119
charlesmn 0:3ac96e360672 5120 ptun_data->vl53l1_tuningparm_consistency_hist_min_max_tolerance_mm =
charlesmn 0:3ac96e360672 5121 pHP->algo__consistency_check__min_max_tolerance;
charlesmn 0:3ac96e360672 5122
charlesmn 0:3ac96e360672 5123 ptun_data->vl53l1_tuningparm_consistency_hist_event_sigma =
charlesmn 0:3ac96e360672 5124 pHP->algo__consistency_check__event_sigma;
charlesmn 0:3ac96e360672 5125
charlesmn 0:3ac96e360672 5126 ptun_data->vl53l1_tuningparm_consistency_hist_event_sigma_min_spad_limit
charlesmn 0:3ac96e360672 5127 = pHP->algo__consistency_check__event_min_spad_count;
charlesmn 0:3ac96e360672 5128
charlesmn 0:3ac96e360672 5129 ptun_data->vl53l1_tuningparm_initial_phase_rtn_histo_long_range =
charlesmn 0:3ac96e360672 5130 pdev->tuning_parms.tp_init_phase_rtn_hist_long;
charlesmn 0:3ac96e360672 5131
charlesmn 0:3ac96e360672 5132 ptun_data->vl53l1_tuningparm_initial_phase_rtn_histo_med_range =
charlesmn 0:3ac96e360672 5133 pdev->tuning_parms.tp_init_phase_rtn_hist_med;
charlesmn 0:3ac96e360672 5134
charlesmn 0:3ac96e360672 5135 ptun_data->vl53l1_tuningparm_initial_phase_rtn_histo_short_range =
charlesmn 0:3ac96e360672 5136 pdev->tuning_parms.tp_init_phase_rtn_hist_short;
charlesmn 0:3ac96e360672 5137
charlesmn 0:3ac96e360672 5138 ptun_data->vl53l1_tuningparm_initial_phase_ref_histo_long_range =
charlesmn 0:3ac96e360672 5139 pdev->tuning_parms.tp_init_phase_ref_hist_long;
charlesmn 0:3ac96e360672 5140
charlesmn 0:3ac96e360672 5141 ptun_data->vl53l1_tuningparm_initial_phase_ref_histo_med_range =
charlesmn 0:3ac96e360672 5142 pdev->tuning_parms.tp_init_phase_ref_hist_med;
charlesmn 0:3ac96e360672 5143
charlesmn 0:3ac96e360672 5144 ptun_data->vl53l1_tuningparm_initial_phase_ref_histo_short_range =
charlesmn 0:3ac96e360672 5145 pdev->tuning_parms.tp_init_phase_ref_hist_short;
charlesmn 0:3ac96e360672 5146
charlesmn 0:3ac96e360672 5147 ptun_data->vl53l1_tuningparm_xtalk_detect_min_valid_range_mm =
charlesmn 0:3ac96e360672 5148 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm;
charlesmn 0:3ac96e360672 5149
charlesmn 0:3ac96e360672 5150 ptun_data->vl53l1_tuningparm_xtalk_detect_max_valid_range_mm =
charlesmn 0:3ac96e360672 5151 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm;
charlesmn 0:3ac96e360672 5152
charlesmn 0:3ac96e360672 5153 ptun_data->vl53l1_tuningparm_xtalk_detect_max_sigma_mm =
charlesmn 0:3ac96e360672 5154 pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm;
charlesmn 0:3ac96e360672 5155
charlesmn 0:3ac96e360672 5156 ptun_data->vl53l1_tuningparm_xtalk_detect_min_max_tolerance =
charlesmn 0:3ac96e360672 5157 pHP->algo__crosstalk_detect_min_max_tolerance;
charlesmn 0:3ac96e360672 5158
charlesmn 0:3ac96e360672 5159 ptun_data->vl53l1_tuningparm_xtalk_detect_max_valid_rate_kcps =
charlesmn 0:3ac96e360672 5160 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps;
charlesmn 0:3ac96e360672 5161
charlesmn 0:3ac96e360672 5162 ptun_data->vl53l1_tuningparm_xtalk_detect_event_sigma =
charlesmn 0:3ac96e360672 5163 pHP->algo__crosstalk_detect_event_sigma;
charlesmn 0:3ac96e360672 5164
charlesmn 0:3ac96e360672 5165 ptun_data->vl53l1_tuningparm_hist_xtalk_margin_kcps =
charlesmn 0:3ac96e360672 5166 pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps;
charlesmn 0:3ac96e360672 5167
charlesmn 0:3ac96e360672 5168 ptun_data->vl53l1_tuningparm_consistency_lite_phase_tolerance =
charlesmn 0:3ac96e360672 5169 pdev->tuning_parms.tp_consistency_lite_phase_tolerance;
charlesmn 0:3ac96e360672 5170
charlesmn 0:3ac96e360672 5171 ptun_data->vl53l1_tuningparm_phasecal_target =
charlesmn 0:3ac96e360672 5172 pdev->tuning_parms.tp_phasecal_target;
charlesmn 0:3ac96e360672 5173
charlesmn 0:3ac96e360672 5174 ptun_data->vl53l1_tuningparm_lite_cal_repeat_rate =
charlesmn 0:3ac96e360672 5175 pdev->tuning_parms.tp_cal_repeat_rate;
charlesmn 0:3ac96e360672 5176
charlesmn 0:3ac96e360672 5177 ptun_data->vl53l1_tuningparm_lite_ranging_gain_factor =
charlesmn 0:3ac96e360672 5178 pdev->gain_cal.standard_ranging_gain_factor;
charlesmn 0:3ac96e360672 5179
charlesmn 0:3ac96e360672 5180 ptun_data->vl53l1_tuningparm_lite_min_clip_mm =
charlesmn 0:3ac96e360672 5181 pdev->tuning_parms.tp_lite_min_clip;
charlesmn 0:3ac96e360672 5182
charlesmn 0:3ac96e360672 5183 ptun_data->vl53l1_tuningparm_lite_long_sigma_thresh_mm =
charlesmn 0:3ac96e360672 5184 pdev->tuning_parms.tp_lite_long_sigma_thresh_mm;
charlesmn 0:3ac96e360672 5185
charlesmn 0:3ac96e360672 5186 ptun_data->vl53l1_tuningparm_lite_med_sigma_thresh_mm =
charlesmn 0:3ac96e360672 5187 pdev->tuning_parms.tp_lite_med_sigma_thresh_mm;
charlesmn 0:3ac96e360672 5188
charlesmn 0:3ac96e360672 5189 ptun_data->vl53l1_tuningparm_lite_short_sigma_thresh_mm =
charlesmn 0:3ac96e360672 5190 pdev->tuning_parms.tp_lite_short_sigma_thresh_mm;
charlesmn 0:3ac96e360672 5191
charlesmn 0:3ac96e360672 5192 ptun_data->vl53l1_tuningparm_lite_long_min_count_rate_rtn_mcps =
charlesmn 0:3ac96e360672 5193 pdev->tuning_parms.tp_lite_long_min_count_rate_rtn_mcps;
charlesmn 0:3ac96e360672 5194
charlesmn 0:3ac96e360672 5195 ptun_data->vl53l1_tuningparm_lite_med_min_count_rate_rtn_mcps =
charlesmn 0:3ac96e360672 5196 pdev->tuning_parms.tp_lite_med_min_count_rate_rtn_mcps;
charlesmn 0:3ac96e360672 5197
charlesmn 0:3ac96e360672 5198 ptun_data->vl53l1_tuningparm_lite_short_min_count_rate_rtn_mcps =
charlesmn 0:3ac96e360672 5199 pdev->tuning_parms.tp_lite_short_min_count_rate_rtn_mcps;
charlesmn 0:3ac96e360672 5200
charlesmn 0:3ac96e360672 5201 ptun_data->vl53l1_tuningparm_lite_sigma_est_pulse_width =
charlesmn 0:3ac96e360672 5202 pdev->tuning_parms.tp_lite_sigma_est_pulse_width_ns;
charlesmn 0:3ac96e360672 5203
charlesmn 0:3ac96e360672 5204 ptun_data->vl53l1_tuningparm_lite_sigma_est_amb_width_ns =
charlesmn 0:3ac96e360672 5205 pdev->tuning_parms.tp_lite_sigma_est_amb_width_ns;
charlesmn 0:3ac96e360672 5206
charlesmn 0:3ac96e360672 5207 ptun_data->vl53l1_tuningparm_lite_sigma_ref_mm =
charlesmn 0:3ac96e360672 5208 pdev->tuning_parms.tp_lite_sigma_ref_mm;
charlesmn 0:3ac96e360672 5209
charlesmn 0:3ac96e360672 5210 ptun_data->vl53l1_tuningparm_lite_rit_mult =
charlesmn 0:3ac96e360672 5211 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult;
charlesmn 0:3ac96e360672 5212
charlesmn 0:3ac96e360672 5213 ptun_data->vl53l1_tuningparm_lite_seed_config =
charlesmn 0:3ac96e360672 5214 pdev->tuning_parms.tp_lite_seed_cfg;
charlesmn 0:3ac96e360672 5215
charlesmn 0:3ac96e360672 5216 ptun_data->vl53l1_tuningparm_lite_quantifier =
charlesmn 0:3ac96e360672 5217 pdev->tuning_parms.tp_lite_quantifier;
charlesmn 0:3ac96e360672 5218
charlesmn 0:3ac96e360672 5219 ptun_data->vl53l1_tuningparm_lite_first_order_select =
charlesmn 0:3ac96e360672 5220 pdev->tuning_parms.tp_lite_first_order_select;
charlesmn 0:3ac96e360672 5221
charlesmn 0:3ac96e360672 5222 ptun_data->vl53l1_tuningparm_lite_xtalk_margin_kcps =
charlesmn 0:3ac96e360672 5223 pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps;
charlesmn 0:3ac96e360672 5224
charlesmn 0:3ac96e360672 5225 ptun_data->vl53l1_tuningparm_initial_phase_rtn_lite_long_range =
charlesmn 0:3ac96e360672 5226 pdev->tuning_parms.tp_init_phase_rtn_lite_long;
charlesmn 0:3ac96e360672 5227
charlesmn 0:3ac96e360672 5228 ptun_data->vl53l1_tuningparm_initial_phase_rtn_lite_med_range =
charlesmn 0:3ac96e360672 5229 pdev->tuning_parms.tp_init_phase_rtn_lite_med;
charlesmn 0:3ac96e360672 5230
charlesmn 0:3ac96e360672 5231 ptun_data->vl53l1_tuningparm_initial_phase_rtn_lite_short_range =
charlesmn 0:3ac96e360672 5232 pdev->tuning_parms.tp_init_phase_rtn_lite_short;
charlesmn 0:3ac96e360672 5233
charlesmn 0:3ac96e360672 5234 ptun_data->vl53l1_tuningparm_initial_phase_ref_lite_long_range =
charlesmn 0:3ac96e360672 5235 pdev->tuning_parms.tp_init_phase_ref_lite_long;
charlesmn 0:3ac96e360672 5236
charlesmn 0:3ac96e360672 5237 ptun_data->vl53l1_tuningparm_initial_phase_ref_lite_med_range =
charlesmn 0:3ac96e360672 5238 pdev->tuning_parms.tp_init_phase_ref_lite_med;
charlesmn 0:3ac96e360672 5239
charlesmn 0:3ac96e360672 5240 ptun_data->vl53l1_tuningparm_initial_phase_ref_lite_short_range =
charlesmn 0:3ac96e360672 5241 pdev->tuning_parms.tp_init_phase_ref_lite_short;
charlesmn 0:3ac96e360672 5242
charlesmn 0:3ac96e360672 5243 ptun_data->vl53l1_tuningparm_timed_seed_config =
charlesmn 0:3ac96e360672 5244 pdev->tuning_parms.tp_timed_seed_cfg;
charlesmn 0:3ac96e360672 5245
charlesmn 0:3ac96e360672 5246 ptun_data->vl53l1_tuningparm_dmax_cfg_signal_thresh_sigma =
charlesmn 0:3ac96e360672 5247 pdev->dmax_cfg.signal_thresh_sigma;
charlesmn 0:3ac96e360672 5248
charlesmn 0:3ac96e360672 5249 ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_0 =
charlesmn 0:3ac96e360672 5250 pdev->dmax_cfg.target_reflectance_for_dmax_calc[0];
charlesmn 0:3ac96e360672 5251
charlesmn 0:3ac96e360672 5252 ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_1 =
charlesmn 0:3ac96e360672 5253 pdev->dmax_cfg.target_reflectance_for_dmax_calc[1];
charlesmn 0:3ac96e360672 5254
charlesmn 0:3ac96e360672 5255 ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_2 =
charlesmn 0:3ac96e360672 5256 pdev->dmax_cfg.target_reflectance_for_dmax_calc[2];
charlesmn 0:3ac96e360672 5257
charlesmn 0:3ac96e360672 5258 ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_3 =
charlesmn 0:3ac96e360672 5259 pdev->dmax_cfg.target_reflectance_for_dmax_calc[3];
charlesmn 0:3ac96e360672 5260
charlesmn 0:3ac96e360672 5261 ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_4 =
charlesmn 0:3ac96e360672 5262 pdev->dmax_cfg.target_reflectance_for_dmax_calc[4];
charlesmn 0:3ac96e360672 5263
charlesmn 0:3ac96e360672 5264 ptun_data->vl53l1_tuningparm_vhv_loopbound =
charlesmn 0:3ac96e360672 5265 pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound;
charlesmn 0:3ac96e360672 5266
charlesmn 0:3ac96e360672 5267 ptun_data->vl53l1_tuningparm_refspadchar_device_test_mode =
charlesmn 0:3ac96e360672 5268 pdev->refspadchar.device_test_mode;
charlesmn 0:3ac96e360672 5269
charlesmn 0:3ac96e360672 5270 ptun_data->vl53l1_tuningparm_refspadchar_vcsel_period =
charlesmn 0:3ac96e360672 5271 pdev->refspadchar.VL53L1_p_009;
charlesmn 0:3ac96e360672 5272
charlesmn 0:3ac96e360672 5273 ptun_data->vl53l1_tuningparm_refspadchar_phasecal_timeout_us =
charlesmn 0:3ac96e360672 5274 pdev->refspadchar.timeout_us;
charlesmn 0:3ac96e360672 5275
charlesmn 0:3ac96e360672 5276 ptun_data->vl53l1_tuningparm_refspadchar_target_count_rate_mcps =
charlesmn 0:3ac96e360672 5277 pdev->refspadchar.target_count_rate_mcps;
charlesmn 0:3ac96e360672 5278
charlesmn 0:3ac96e360672 5279 ptun_data->vl53l1_tuningparm_refspadchar_min_countrate_limit_mcps =
charlesmn 0:3ac96e360672 5280 pdev->refspadchar.min_count_rate_limit_mcps;
charlesmn 0:3ac96e360672 5281
charlesmn 0:3ac96e360672 5282 ptun_data->vl53l1_tuningparm_refspadchar_max_countrate_limit_mcps =
charlesmn 0:3ac96e360672 5283 pdev->refspadchar.max_count_rate_limit_mcps;
charlesmn 0:3ac96e360672 5284
charlesmn 0:3ac96e360672 5285 ptun_data->vl53l1_tuningparm_xtalk_extract_num_of_samples =
charlesmn 0:3ac96e360672 5286 pXC->num_of_samples;
charlesmn 0:3ac96e360672 5287
charlesmn 0:3ac96e360672 5288 ptun_data->vl53l1_tuningparm_xtalk_extract_min_filter_thresh_mm =
charlesmn 0:3ac96e360672 5289 pXC->algo__crosstalk_extract_min_valid_range_mm;
charlesmn 0:3ac96e360672 5290
charlesmn 0:3ac96e360672 5291 ptun_data->vl53l1_tuningparm_xtalk_extract_max_filter_thresh_mm =
charlesmn 0:3ac96e360672 5292 pXC->algo__crosstalk_extract_max_valid_range_mm;
charlesmn 0:3ac96e360672 5293
charlesmn 0:3ac96e360672 5294 ptun_data->vl53l1_tuningparm_xtalk_extract_dss_rate_mcps =
charlesmn 0:3ac96e360672 5295 pXC->dss_config__target_total_rate_mcps;
charlesmn 0:3ac96e360672 5296
charlesmn 0:3ac96e360672 5297 ptun_data->vl53l1_tuningparm_xtalk_extract_phasecal_timeout_us =
charlesmn 0:3ac96e360672 5298 pXC->phasecal_config_timeout_us;
charlesmn 0:3ac96e360672 5299
charlesmn 0:3ac96e360672 5300 ptun_data->vl53l1_tuningparm_xtalk_extract_max_valid_rate_kcps =
charlesmn 0:3ac96e360672 5301 pXC->algo__crosstalk_extract_max_valid_rate_kcps;
charlesmn 0:3ac96e360672 5302
charlesmn 0:3ac96e360672 5303 ptun_data->vl53l1_tuningparm_xtalk_extract_sigma_threshold_mm =
charlesmn 0:3ac96e360672 5304 pXC->algo__crosstalk_extract_max_sigma_mm;
charlesmn 0:3ac96e360672 5305
charlesmn 0:3ac96e360672 5306 ptun_data->vl53l1_tuningparm_xtalk_extract_dss_timeout_us =
charlesmn 0:3ac96e360672 5307 pXC->mm_config_timeout_us;
charlesmn 0:3ac96e360672 5308
charlesmn 0:3ac96e360672 5309 ptun_data->vl53l1_tuningparm_xtalk_extract_bin_timeout_us =
charlesmn 0:3ac96e360672 5310 pXC->range_config_timeout_us;
charlesmn 0:3ac96e360672 5311
charlesmn 0:3ac96e360672 5312 ptun_data->vl53l1_tuningparm_offset_cal_dss_rate_mcps =
charlesmn 0:3ac96e360672 5313 pdev->offsetcal_cfg.dss_config__target_total_rate_mcps;
charlesmn 0:3ac96e360672 5314
charlesmn 0:3ac96e360672 5315 ptun_data->vl53l1_tuningparm_offset_cal_phasecal_timeout_us =
charlesmn 0:3ac96e360672 5316 pdev->offsetcal_cfg.phasecal_config_timeout_us;
charlesmn 0:3ac96e360672 5317
charlesmn 0:3ac96e360672 5318 ptun_data->vl53l1_tuningparm_offset_cal_mm_timeout_us =
charlesmn 0:3ac96e360672 5319 pdev->offsetcal_cfg.mm_config_timeout_us;
charlesmn 0:3ac96e360672 5320
charlesmn 0:3ac96e360672 5321 ptun_data->vl53l1_tuningparm_offset_cal_range_timeout_us =
charlesmn 0:3ac96e360672 5322 pdev->offsetcal_cfg.range_config_timeout_us;
charlesmn 0:3ac96e360672 5323
charlesmn 0:3ac96e360672 5324 ptun_data->vl53l1_tuningparm_offset_cal_pre_samples =
charlesmn 0:3ac96e360672 5325 pdev->offsetcal_cfg.pre_num_of_samples;
charlesmn 0:3ac96e360672 5326
charlesmn 0:3ac96e360672 5327 ptun_data->vl53l1_tuningparm_offset_cal_mm1_samples =
charlesmn 0:3ac96e360672 5328 pdev->offsetcal_cfg.mm1_num_of_samples;
charlesmn 0:3ac96e360672 5329
charlesmn 0:3ac96e360672 5330 ptun_data->vl53l1_tuningparm_offset_cal_mm2_samples =
charlesmn 0:3ac96e360672 5331 pdev->offsetcal_cfg.mm2_num_of_samples;
charlesmn 0:3ac96e360672 5332
charlesmn 0:3ac96e360672 5333 ptun_data->vl53l1_tuningparm_zone_cal_dss_rate_mcps =
charlesmn 0:3ac96e360672 5334 pdev->zonecal_cfg.dss_config__target_total_rate_mcps;
charlesmn 0:3ac96e360672 5335
charlesmn 0:3ac96e360672 5336 ptun_data->vl53l1_tuningparm_zone_cal_phasecal_timeout_us =
charlesmn 0:3ac96e360672 5337 pdev->zonecal_cfg.phasecal_config_timeout_us;
charlesmn 0:3ac96e360672 5338
charlesmn 0:3ac96e360672 5339 ptun_data->vl53l1_tuningparm_zone_cal_dss_timeout_us =
charlesmn 0:3ac96e360672 5340 pdev->zonecal_cfg.mm_config_timeout_us;
charlesmn 0:3ac96e360672 5341
charlesmn 0:3ac96e360672 5342 ptun_data->vl53l1_tuningparm_zone_cal_phasecal_num_samples =
charlesmn 0:3ac96e360672 5343 pdev->zonecal_cfg.phasecal_num_of_samples;
charlesmn 0:3ac96e360672 5344
charlesmn 0:3ac96e360672 5345 ptun_data->vl53l1_tuningparm_zone_cal_range_timeout_us =
charlesmn 0:3ac96e360672 5346 pdev->zonecal_cfg.range_config_timeout_us;
charlesmn 0:3ac96e360672 5347
charlesmn 0:3ac96e360672 5348 ptun_data->vl53l1_tuningparm_zone_cal_zone_num_samples =
charlesmn 0:3ac96e360672 5349 pdev->zonecal_cfg.zone_num_of_samples;
charlesmn 0:3ac96e360672 5350
charlesmn 0:3ac96e360672 5351 ptun_data->vl53l1_tuningparm_spadmap_vcsel_period =
charlesmn 0:3ac96e360672 5352 pdev->ssc_cfg.VL53L1_p_009;
charlesmn 0:3ac96e360672 5353
charlesmn 0:3ac96e360672 5354 ptun_data->vl53l1_tuningparm_spadmap_vcsel_start =
charlesmn 0:3ac96e360672 5355 pdev->ssc_cfg.vcsel_start;
charlesmn 0:3ac96e360672 5356
charlesmn 0:3ac96e360672 5357 ptun_data->vl53l1_tuningparm_spadmap_rate_limit_mcps =
charlesmn 0:3ac96e360672 5358 pdev->ssc_cfg.rate_limit_mcps;
charlesmn 0:3ac96e360672 5359
charlesmn 0:3ac96e360672 5360 ptun_data->vl53l1_tuningparm_lite_dss_config_target_total_rate_mcps =
charlesmn 0:3ac96e360672 5361 pdev->tuning_parms.tp_dss_target_lite_mcps;
charlesmn 0:3ac96e360672 5362
charlesmn 0:3ac96e360672 5363 ptun_data->vl53l1_tuningparm_ranging_dss_config_target_total_rate_mcps =
charlesmn 0:3ac96e360672 5364 pdev->tuning_parms.tp_dss_target_histo_mcps;
charlesmn 0:3ac96e360672 5365
charlesmn 0:3ac96e360672 5366 ptun_data->vl53l1_tuningparm_mz_dss_config_target_total_rate_mcps =
charlesmn 0:3ac96e360672 5367 pdev->tuning_parms.tp_dss_target_histo_mz_mcps;
charlesmn 0:3ac96e360672 5368
charlesmn 0:3ac96e360672 5369 ptun_data->vl53l1_tuningparm_timed_dss_config_target_total_rate_mcps =
charlesmn 0:3ac96e360672 5370 pdev->tuning_parms.tp_dss_target_timed_mcps;
charlesmn 0:3ac96e360672 5371
charlesmn 0:3ac96e360672 5372 ptun_data->vl53l1_tuningparm_lite_phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 5373 pdev->tuning_parms.tp_phasecal_timeout_lite_us;
charlesmn 0:3ac96e360672 5374
charlesmn 0:3ac96e360672 5375 ptun_data->vl53l1_tuningparm_ranging_long_phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 5376 pdev->tuning_parms.tp_phasecal_timeout_hist_long_us;
charlesmn 0:3ac96e360672 5377
charlesmn 0:3ac96e360672 5378 ptun_data->vl53l1_tuningparm_ranging_med_phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 5379 pdev->tuning_parms.tp_phasecal_timeout_hist_med_us;
charlesmn 0:3ac96e360672 5380
charlesmn 0:3ac96e360672 5381 ptun_data->vl53l1_tuningparm_ranging_short_phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 5382 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us;
charlesmn 0:3ac96e360672 5383
charlesmn 0:3ac96e360672 5384 ptun_data->vl53l1_tuningparm_mz_long_phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 5385 pdev->tuning_parms.tp_phasecal_timeout_mz_long_us;
charlesmn 0:3ac96e360672 5386
charlesmn 0:3ac96e360672 5387 ptun_data->vl53l1_tuningparm_mz_med_phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 5388 pdev->tuning_parms.tp_phasecal_timeout_mz_med_us;
charlesmn 0:3ac96e360672 5389
charlesmn 0:3ac96e360672 5390 ptun_data->vl53l1_tuningparm_mz_short_phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 5391 pdev->tuning_parms.tp_phasecal_timeout_mz_short_us;
charlesmn 0:3ac96e360672 5392
charlesmn 0:3ac96e360672 5393 ptun_data->vl53l1_tuningparm_timed_phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 5394 pdev->tuning_parms.tp_phasecal_timeout_timed_us;
charlesmn 0:3ac96e360672 5395
charlesmn 0:3ac96e360672 5396 ptun_data->vl53l1_tuningparm_lite_mm_config_timeout_us =
charlesmn 0:3ac96e360672 5397 pdev->tuning_parms.tp_mm_timeout_lite_us;
charlesmn 0:3ac96e360672 5398
charlesmn 0:3ac96e360672 5399 ptun_data->vl53l1_tuningparm_ranging_mm_config_timeout_us =
charlesmn 0:3ac96e360672 5400 pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn 0:3ac96e360672 5401
charlesmn 0:3ac96e360672 5402 ptun_data->vl53l1_tuningparm_mz_mm_config_timeout_us =
charlesmn 0:3ac96e360672 5403 pdev->tuning_parms.tp_mm_timeout_mz_us;
charlesmn 0:3ac96e360672 5404
charlesmn 0:3ac96e360672 5405 ptun_data->vl53l1_tuningparm_timed_mm_config_timeout_us =
charlesmn 0:3ac96e360672 5406 pdev->tuning_parms.tp_mm_timeout_timed_us;
charlesmn 0:3ac96e360672 5407
charlesmn 0:3ac96e360672 5408 ptun_data->vl53l1_tuningparm_lite_range_config_timeout_us =
charlesmn 0:3ac96e360672 5409 pdev->tuning_parms.tp_range_timeout_lite_us;
charlesmn 0:3ac96e360672 5410
charlesmn 0:3ac96e360672 5411 ptun_data->vl53l1_tuningparm_ranging_range_config_timeout_us =
charlesmn 0:3ac96e360672 5412 pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn 0:3ac96e360672 5413
charlesmn 0:3ac96e360672 5414 ptun_data->vl53l1_tuningparm_mz_range_config_timeout_us =
charlesmn 0:3ac96e360672 5415 pdev->tuning_parms.tp_range_timeout_mz_us;
charlesmn 0:3ac96e360672 5416
charlesmn 0:3ac96e360672 5417 ptun_data->vl53l1_tuningparm_timed_range_config_timeout_us =
charlesmn 0:3ac96e360672 5418 pdev->tuning_parms.tp_range_timeout_timed_us;
charlesmn 0:3ac96e360672 5419
charlesmn 0:3ac96e360672 5420 ptun_data->vl53l1_tuningparm_dynxtalk_smudge_margin =
charlesmn 0:3ac96e360672 5421 pdev->smudge_correct_config.smudge_margin;
charlesmn 0:3ac96e360672 5422
charlesmn 0:3ac96e360672 5423 ptun_data->vl53l1_tuningparm_dynxtalk_noise_margin =
charlesmn 0:3ac96e360672 5424 pdev->smudge_correct_config.noise_margin;
charlesmn 0:3ac96e360672 5425
charlesmn 0:3ac96e360672 5426 ptun_data->vl53l1_tuningparm_dynxtalk_xtalk_offset_limit =
charlesmn 0:3ac96e360672 5427 pdev->smudge_correct_config.user_xtalk_offset_limit;
charlesmn 0:3ac96e360672 5428
charlesmn 0:3ac96e360672 5429 ptun_data->vl53l1_tuningparm_dynxtalk_xtalk_offset_limit_hi =
charlesmn 0:3ac96e360672 5430 pdev->smudge_correct_config.user_xtalk_offset_limit_hi;
charlesmn 0:3ac96e360672 5431
charlesmn 0:3ac96e360672 5432 ptun_data->vl53l1_tuningparm_dynxtalk_sample_limit =
charlesmn 0:3ac96e360672 5433 pdev->smudge_correct_config.sample_limit;
charlesmn 0:3ac96e360672 5434
charlesmn 0:3ac96e360672 5435 ptun_data->vl53l1_tuningparm_dynxtalk_single_xtalk_delta =
charlesmn 0:3ac96e360672 5436 pdev->smudge_correct_config.single_xtalk_delta;
charlesmn 0:3ac96e360672 5437
charlesmn 0:3ac96e360672 5438 ptun_data->vl53l1_tuningparm_dynxtalk_averaged_xtalk_delta =
charlesmn 0:3ac96e360672 5439 pdev->smudge_correct_config.averaged_xtalk_delta;
charlesmn 0:3ac96e360672 5440
charlesmn 0:3ac96e360672 5441 ptun_data->vl53l1_tuningparm_dynxtalk_clip_limit =
charlesmn 0:3ac96e360672 5442 pdev->smudge_correct_config.smudge_corr_clip_limit;
charlesmn 0:3ac96e360672 5443
charlesmn 0:3ac96e360672 5444 ptun_data->vl53l1_tuningparm_dynxtalk_scaler_calc_method =
charlesmn 0:3ac96e360672 5445 pdev->smudge_correct_config.scaler_calc_method;
charlesmn 0:3ac96e360672 5446
charlesmn 0:3ac96e360672 5447 ptun_data->vl53l1_tuningparm_dynxtalk_xgradient_scaler =
charlesmn 0:3ac96e360672 5448 pdev->smudge_correct_config.x_gradient_scaler;
charlesmn 0:3ac96e360672 5449
charlesmn 0:3ac96e360672 5450 ptun_data->vl53l1_tuningparm_dynxtalk_ygradient_scaler =
charlesmn 0:3ac96e360672 5451 pdev->smudge_correct_config.y_gradient_scaler;
charlesmn 0:3ac96e360672 5452
charlesmn 0:3ac96e360672 5453 ptun_data->vl53l1_tuningparm_dynxtalk_user_scaler_set =
charlesmn 0:3ac96e360672 5454 pdev->smudge_correct_config.user_scaler_set;
charlesmn 0:3ac96e360672 5455
charlesmn 0:3ac96e360672 5456 ptun_data->vl53l1_tuningparm_dynxtalk_smudge_cor_single_apply =
charlesmn 0:3ac96e360672 5457 pdev->smudge_correct_config.smudge_corr_single_apply;
charlesmn 0:3ac96e360672 5458
charlesmn 0:3ac96e360672 5459 ptun_data->vl53l1_tuningparm_dynxtalk_xtalk_amb_threshold =
charlesmn 0:3ac96e360672 5460 pdev->smudge_correct_config.smudge_corr_ambient_threshold;
charlesmn 0:3ac96e360672 5461
charlesmn 0:3ac96e360672 5462 ptun_data->vl53l1_tuningparm_dynxtalk_nodetect_amb_threshold_kcps =
charlesmn 0:3ac96e360672 5463 pdev->smudge_correct_config.nodetect_ambient_threshold;
charlesmn 0:3ac96e360672 5464
charlesmn 0:3ac96e360672 5465 ptun_data->vl53l1_tuningparm_dynxtalk_nodetect_sample_limit =
charlesmn 0:3ac96e360672 5466 pdev->smudge_correct_config.nodetect_sample_limit;
charlesmn 0:3ac96e360672 5467
charlesmn 0:3ac96e360672 5468 ptun_data->vl53l1_tuningparm_dynxtalk_nodetect_xtalk_offset_kcps =
charlesmn 0:3ac96e360672 5469 pdev->smudge_correct_config.nodetect_xtalk_offset;
charlesmn 0:3ac96e360672 5470
charlesmn 0:3ac96e360672 5471 ptun_data->vl53l1_tuningparm_dynxtalk_nodetect_min_range_mm =
charlesmn 0:3ac96e360672 5472 pdev->smudge_correct_config.nodetect_min_range_mm;
charlesmn 0:3ac96e360672 5473
charlesmn 0:3ac96e360672 5474 ptun_data->vl53l1_tuningparm_lowpowerauto_vhv_loop_bound =
charlesmn 0:3ac96e360672 5475 pdev->low_power_auto_data.vhv_loop_bound;
charlesmn 0:3ac96e360672 5476
charlesmn 0:3ac96e360672 5477 ptun_data->vl53l1_tuningparm_lowpowerauto_mm_config_timeout_us =
charlesmn 0:3ac96e360672 5478 pdev->tuning_parms.tp_mm_timeout_lpa_us;
charlesmn 0:3ac96e360672 5479
charlesmn 0:3ac96e360672 5480 ptun_data->vl53l1_tuningparm_lowpowerauto_range_config_timeout_us =
charlesmn 0:3ac96e360672 5481 pdev->tuning_parms.tp_range_timeout_lpa_us;
charlesmn 0:3ac96e360672 5482
charlesmn 0:3ac96e360672 5483 ptun_data->vl53l1_tuningparm_very_short_dss_rate_mcps =
charlesmn 0:3ac96e360672 5484 pdev->tuning_parms.tp_dss_target_very_short_mcps;
charlesmn 0:3ac96e360672 5485
charlesmn 0:3ac96e360672 5486 ptun_data->vl53l1_tuningparm_phasecal_patch_power =
charlesmn 0:3ac96e360672 5487 pdev->tuning_parms.tp_phasecal_patch_power;
charlesmn 0:3ac96e360672 5488
charlesmn 0:3ac96e360672 5489 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 5490
charlesmn 0:3ac96e360672 5491 return status;
charlesmn 0:3ac96e360672 5492 }
charlesmn 0:3ac96e360672 5493
charlesmn 0:3ac96e360672 5494
charlesmn 0:3ac96e360672 5495
charlesmn 0:3ac96e360672 5496
charlesmn 0:3ac96e360672 5497
charlesmn 0:3ac96e360672 5498 VL53L1_Error VL53L1_get_tuning_parm(
charlesmn 0:3ac96e360672 5499 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 5500 VL53L1_TuningParms tuning_parm_key,
charlesmn 0:3ac96e360672 5501 int32_t *ptuning_parm_value)
charlesmn 0:3ac96e360672 5502 {
charlesmn 0:3ac96e360672 5503
charlesmn 0:3ac96e360672 5504
charlesmn 0:3ac96e360672 5505
charlesmn 0:3ac96e360672 5506 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 5507
charlesmn 0:3ac96e360672 5508 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 5509 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn 0:3ac96e360672 5510 VL53L1_xtalkextract_config_t *pXC = &(pdev->xtalk_extract_cfg);
charlesmn 0:3ac96e360672 5511
charlesmn 0:3ac96e360672 5512 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 5513
charlesmn 0:3ac96e360672 5514 switch (tuning_parm_key) {
charlesmn 0:3ac96e360672 5515
charlesmn 0:3ac96e360672 5516 case VL53L1_TUNINGPARM_VERSION:
charlesmn 0:3ac96e360672 5517 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5518 (int32_t)pdev->tuning_parms.tp_tuning_parm_version;
charlesmn 0:3ac96e360672 5519 break;
charlesmn 0:3ac96e360672 5520 case VL53L1_TUNINGPARM_KEY_TABLE_VERSION:
charlesmn 0:3ac96e360672 5521 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5522 (int32_t)pdev->tuning_parms.tp_tuning_parm_key_table_version;
charlesmn 0:3ac96e360672 5523 break;
charlesmn 0:3ac96e360672 5524 case VL53L1_TUNINGPARM_LLD_VERSION:
charlesmn 0:3ac96e360672 5525 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5526 (int32_t)pdev->tuning_parms.tp_tuning_parm_lld_version;
charlesmn 0:3ac96e360672 5527 break;
charlesmn 0:3ac96e360672 5528 case VL53L1_TUNINGPARM_HIST_ALGO_SELECT:
charlesmn 0:3ac96e360672 5529 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5530 (int32_t)pHP->hist_algo_select;
charlesmn 0:3ac96e360672 5531 break;
charlesmn 0:3ac96e360672 5532 case VL53L1_TUNINGPARM_HIST_TARGET_ORDER:
charlesmn 0:3ac96e360672 5533 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5534 (int32_t)pHP->hist_target_order;
charlesmn 0:3ac96e360672 5535 break;
charlesmn 0:3ac96e360672 5536 case VL53L1_TUNINGPARM_HIST_FILTER_WOI_0:
charlesmn 0:3ac96e360672 5537 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5538 (int32_t)pHP->filter_woi0;
charlesmn 0:3ac96e360672 5539 break;
charlesmn 0:3ac96e360672 5540 case VL53L1_TUNINGPARM_HIST_FILTER_WOI_1:
charlesmn 0:3ac96e360672 5541 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5542 (int32_t)pHP->filter_woi1;
charlesmn 0:3ac96e360672 5543 break;
charlesmn 0:3ac96e360672 5544 case VL53L1_TUNINGPARM_HIST_AMB_EST_METHOD:
charlesmn 0:3ac96e360672 5545 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5546 (int32_t)pHP->hist_amb_est_method;
charlesmn 0:3ac96e360672 5547 break;
charlesmn 0:3ac96e360672 5548 case VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_0:
charlesmn 0:3ac96e360672 5549 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5550 (int32_t)pHP->ambient_thresh_sigma0;
charlesmn 0:3ac96e360672 5551 break;
charlesmn 0:3ac96e360672 5552 case VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_1:
charlesmn 0:3ac96e360672 5553 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5554 (int32_t)pHP->ambient_thresh_sigma1;
charlesmn 0:3ac96e360672 5555 break;
charlesmn 0:3ac96e360672 5556 case VL53L1_TUNINGPARM_HIST_MIN_AMB_THRESH_EVENTS:
charlesmn 0:3ac96e360672 5557 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5558 (int32_t)pHP->min_ambient_thresh_events;
charlesmn 0:3ac96e360672 5559 break;
charlesmn 0:3ac96e360672 5560 case VL53L1_TUNINGPARM_HIST_AMB_EVENTS_SCALER:
charlesmn 0:3ac96e360672 5561 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5562 (int32_t)pHP->ambient_thresh_events_scaler;
charlesmn 0:3ac96e360672 5563 break;
charlesmn 0:3ac96e360672 5564 case VL53L1_TUNINGPARM_HIST_NOISE_THRESHOLD:
charlesmn 0:3ac96e360672 5565 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5566 (int32_t)pHP->noise_threshold;
charlesmn 0:3ac96e360672 5567 break;
charlesmn 0:3ac96e360672 5568 case VL53L1_TUNINGPARM_HIST_SIGNAL_TOTAL_EVENTS_LIMIT:
charlesmn 0:3ac96e360672 5569 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5570 (int32_t)pHP->signal_total_events_limit;
charlesmn 0:3ac96e360672 5571 break;
charlesmn 0:3ac96e360672 5572 case VL53L1_TUNINGPARM_HIST_SIGMA_EST_REF_MM:
charlesmn 0:3ac96e360672 5573 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5574 (int32_t)pHP->sigma_estimator__sigma_ref_mm;
charlesmn 0:3ac96e360672 5575 break;
charlesmn 0:3ac96e360672 5576 case VL53L1_TUNINGPARM_HIST_SIGMA_THRESH_MM:
charlesmn 0:3ac96e360672 5577 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5578 (int32_t)pHP->sigma_thresh;
charlesmn 0:3ac96e360672 5579 break;
charlesmn 0:3ac96e360672 5580 case VL53L1_TUNINGPARM_HIST_GAIN_FACTOR:
charlesmn 0:3ac96e360672 5581 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5582 (int32_t)pdev->gain_cal.histogram_ranging_gain_factor;
charlesmn 0:3ac96e360672 5583 break;
charlesmn 0:3ac96e360672 5584 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_PHASE_TOLERANCE:
charlesmn 0:3ac96e360672 5585 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5586 (int32_t)pHP->algo__consistency_check__phase_tolerance;
charlesmn 0:3ac96e360672 5587 break;
charlesmn 0:3ac96e360672 5588 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_MIN_MAX_TOLERANCE_MM:
charlesmn 0:3ac96e360672 5589 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5590 (int32_t)pHP->algo__consistency_check__min_max_tolerance;
charlesmn 0:3ac96e360672 5591 break;
charlesmn 0:3ac96e360672 5592 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA:
charlesmn 0:3ac96e360672 5593 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5594 (int32_t)pHP->algo__consistency_check__event_sigma;
charlesmn 0:3ac96e360672 5595 break;
charlesmn 0:3ac96e360672 5596 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_MIN_SPAD_LIMIT:
charlesmn 0:3ac96e360672 5597 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5598 (int32_t)pHP->algo__consistency_check__event_min_spad_count;
charlesmn 0:3ac96e360672 5599 break;
charlesmn 0:3ac96e360672 5600 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_LONG_RANGE:
charlesmn 0:3ac96e360672 5601 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5602 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_hist_long;
charlesmn 0:3ac96e360672 5603 break;
charlesmn 0:3ac96e360672 5604 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_MED_RANGE:
charlesmn 0:3ac96e360672 5605 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5606 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_hist_med;
charlesmn 0:3ac96e360672 5607 break;
charlesmn 0:3ac96e360672 5608 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_SHORT_RANGE:
charlesmn 0:3ac96e360672 5609 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5610 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_hist_short;
charlesmn 0:3ac96e360672 5611 break;
charlesmn 0:3ac96e360672 5612 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_LONG_RANGE:
charlesmn 0:3ac96e360672 5613 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5614 (int32_t)pdev->tuning_parms.tp_init_phase_ref_hist_long;
charlesmn 0:3ac96e360672 5615 break;
charlesmn 0:3ac96e360672 5616 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_MED_RANGE:
charlesmn 0:3ac96e360672 5617 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5618 (int32_t)pdev->tuning_parms.tp_init_phase_ref_hist_med;
charlesmn 0:3ac96e360672 5619 break;
charlesmn 0:3ac96e360672 5620 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_SHORT_RANGE:
charlesmn 0:3ac96e360672 5621 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5622 (int32_t)pdev->tuning_parms.tp_init_phase_ref_hist_short;
charlesmn 0:3ac96e360672 5623 break;
charlesmn 0:3ac96e360672 5624 case VL53L1_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM:
charlesmn 0:3ac96e360672 5625 *ptuning_parm_value = (int32_t)(
charlesmn 0:3ac96e360672 5626 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm);
charlesmn 0:3ac96e360672 5627 break;
charlesmn 0:3ac96e360672 5628 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM:
charlesmn 0:3ac96e360672 5629 *ptuning_parm_value = (int32_t)(
charlesmn 0:3ac96e360672 5630 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm);
charlesmn 0:3ac96e360672 5631 break;
charlesmn 0:3ac96e360672 5632 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM:
charlesmn 0:3ac96e360672 5633 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5634 (int32_t)pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm;
charlesmn 0:3ac96e360672 5635 break;
charlesmn 0:3ac96e360672 5636 case VL53L1_TUNINGPARM_XTALK_DETECT_MIN_MAX_TOLERANCE:
charlesmn 0:3ac96e360672 5637 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5638 (int32_t)pHP->algo__crosstalk_detect_min_max_tolerance;
charlesmn 0:3ac96e360672 5639 break;
charlesmn 0:3ac96e360672 5640 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS:
charlesmn 0:3ac96e360672 5641 *ptuning_parm_value = (int32_t)(
charlesmn 0:3ac96e360672 5642 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps);
charlesmn 0:3ac96e360672 5643 break;
charlesmn 0:3ac96e360672 5644 case VL53L1_TUNINGPARM_XTALK_DETECT_EVENT_SIGMA:
charlesmn 0:3ac96e360672 5645 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5646 (int32_t)pHP->algo__crosstalk_detect_event_sigma;
charlesmn 0:3ac96e360672 5647 break;
charlesmn 0:3ac96e360672 5648 case VL53L1_TUNINGPARM_HIST_XTALK_MARGIN_KCPS:
charlesmn 0:3ac96e360672 5649 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5650 (int32_t)pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps;
charlesmn 0:3ac96e360672 5651 break;
charlesmn 0:3ac96e360672 5652 case VL53L1_TUNINGPARM_CONSISTENCY_LITE_PHASE_TOLERANCE:
charlesmn 0:3ac96e360672 5653 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5654 (int32_t)pdev->tuning_parms.tp_consistency_lite_phase_tolerance;
charlesmn 0:3ac96e360672 5655 break;
charlesmn 0:3ac96e360672 5656 case VL53L1_TUNINGPARM_PHASECAL_TARGET:
charlesmn 0:3ac96e360672 5657 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5658 (int32_t)pdev->tuning_parms.tp_phasecal_target;
charlesmn 0:3ac96e360672 5659 break;
charlesmn 0:3ac96e360672 5660 case VL53L1_TUNINGPARM_LITE_CAL_REPEAT_RATE:
charlesmn 0:3ac96e360672 5661 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5662 (int32_t)pdev->tuning_parms.tp_cal_repeat_rate;
charlesmn 0:3ac96e360672 5663 break;
charlesmn 0:3ac96e360672 5664 case VL53L1_TUNINGPARM_LITE_RANGING_GAIN_FACTOR:
charlesmn 0:3ac96e360672 5665 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5666 (int32_t)pdev->gain_cal.standard_ranging_gain_factor;
charlesmn 0:3ac96e360672 5667 break;
charlesmn 0:3ac96e360672 5668 case VL53L1_TUNINGPARM_LITE_MIN_CLIP_MM:
charlesmn 0:3ac96e360672 5669 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5670 (int32_t)pdev->tuning_parms.tp_lite_min_clip;
charlesmn 0:3ac96e360672 5671 break;
charlesmn 0:3ac96e360672 5672 case VL53L1_TUNINGPARM_LITE_LONG_SIGMA_THRESH_MM:
charlesmn 0:3ac96e360672 5673 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5674 (int32_t)pdev->tuning_parms.tp_lite_long_sigma_thresh_mm;
charlesmn 0:3ac96e360672 5675 break;
charlesmn 0:3ac96e360672 5676 case VL53L1_TUNINGPARM_LITE_MED_SIGMA_THRESH_MM:
charlesmn 0:3ac96e360672 5677 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5678 (int32_t)pdev->tuning_parms.tp_lite_med_sigma_thresh_mm;
charlesmn 0:3ac96e360672 5679 break;
charlesmn 0:3ac96e360672 5680 case VL53L1_TUNINGPARM_LITE_SHORT_SIGMA_THRESH_MM:
charlesmn 0:3ac96e360672 5681 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5682 (int32_t)pdev->tuning_parms.tp_lite_short_sigma_thresh_mm;
charlesmn 0:3ac96e360672 5683 break;
charlesmn 0:3ac96e360672 5684 case VL53L1_TUNINGPARM_LITE_LONG_MIN_COUNT_RATE_RTN_MCPS:
charlesmn 0:3ac96e360672 5685 *ptuning_parm_value = (int32_t)(
charlesmn 0:3ac96e360672 5686 pdev->tuning_parms.tp_lite_long_min_count_rate_rtn_mcps);
charlesmn 0:3ac96e360672 5687 break;
charlesmn 0:3ac96e360672 5688 case VL53L1_TUNINGPARM_LITE_MED_MIN_COUNT_RATE_RTN_MCPS:
charlesmn 0:3ac96e360672 5689 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5690 (int32_t)pdev->tuning_parms.tp_lite_med_min_count_rate_rtn_mcps;
charlesmn 0:3ac96e360672 5691 break;
charlesmn 0:3ac96e360672 5692 case VL53L1_TUNINGPARM_LITE_SHORT_MIN_COUNT_RATE_RTN_MCPS:
charlesmn 0:3ac96e360672 5693 *ptuning_parm_value = (int32_t)(
charlesmn 0:3ac96e360672 5694 pdev->tuning_parms.tp_lite_short_min_count_rate_rtn_mcps);
charlesmn 0:3ac96e360672 5695 break;
charlesmn 0:3ac96e360672 5696 case VL53L1_TUNINGPARM_LITE_SIGMA_EST_PULSE_WIDTH:
charlesmn 0:3ac96e360672 5697 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5698 (int32_t)pdev->tuning_parms.tp_lite_sigma_est_pulse_width_ns;
charlesmn 0:3ac96e360672 5699 break;
charlesmn 0:3ac96e360672 5700 case VL53L1_TUNINGPARM_LITE_SIGMA_EST_AMB_WIDTH_NS:
charlesmn 0:3ac96e360672 5701 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5702 (int32_t)pdev->tuning_parms.tp_lite_sigma_est_amb_width_ns;
charlesmn 0:3ac96e360672 5703 break;
charlesmn 0:3ac96e360672 5704 case VL53L1_TUNINGPARM_LITE_SIGMA_REF_MM:
charlesmn 0:3ac96e360672 5705 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5706 (int32_t)pdev->tuning_parms.tp_lite_sigma_ref_mm;
charlesmn 0:3ac96e360672 5707 break;
charlesmn 0:3ac96e360672 5708 case VL53L1_TUNINGPARM_LITE_RIT_MULT:
charlesmn 0:3ac96e360672 5709 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5710 (int32_t)pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult;
charlesmn 0:3ac96e360672 5711 break;
charlesmn 0:3ac96e360672 5712 case VL53L1_TUNINGPARM_LITE_SEED_CONFIG:
charlesmn 0:3ac96e360672 5713 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5714 (int32_t)pdev->tuning_parms.tp_lite_seed_cfg;
charlesmn 0:3ac96e360672 5715 break;
charlesmn 0:3ac96e360672 5716 case VL53L1_TUNINGPARM_LITE_QUANTIFIER:
charlesmn 0:3ac96e360672 5717 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5718 (int32_t)pdev->tuning_parms.tp_lite_quantifier;
charlesmn 0:3ac96e360672 5719 break;
charlesmn 0:3ac96e360672 5720 case VL53L1_TUNINGPARM_LITE_FIRST_ORDER_SELECT:
charlesmn 0:3ac96e360672 5721 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5722 (int32_t)pdev->tuning_parms.tp_lite_first_order_select;
charlesmn 0:3ac96e360672 5723 break;
charlesmn 0:3ac96e360672 5724 case VL53L1_TUNINGPARM_LITE_XTALK_MARGIN_KCPS:
charlesmn 0:3ac96e360672 5725 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5726 (int32_t)pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps;
charlesmn 0:3ac96e360672 5727 break;
charlesmn 0:3ac96e360672 5728 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_LONG_RANGE:
charlesmn 0:3ac96e360672 5729 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5730 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_lite_long;
charlesmn 0:3ac96e360672 5731 break;
charlesmn 0:3ac96e360672 5732 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_MED_RANGE:
charlesmn 0:3ac96e360672 5733 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5734 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_lite_med;
charlesmn 0:3ac96e360672 5735 break;
charlesmn 0:3ac96e360672 5736 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_SHORT_RANGE:
charlesmn 0:3ac96e360672 5737 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5738 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_lite_short;
charlesmn 0:3ac96e360672 5739 break;
charlesmn 0:3ac96e360672 5740 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_LONG_RANGE:
charlesmn 0:3ac96e360672 5741 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5742 (int32_t)pdev->tuning_parms.tp_init_phase_ref_lite_long;
charlesmn 0:3ac96e360672 5743 break;
charlesmn 0:3ac96e360672 5744 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_MED_RANGE:
charlesmn 0:3ac96e360672 5745 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5746 (int32_t)pdev->tuning_parms.tp_init_phase_ref_lite_med;
charlesmn 0:3ac96e360672 5747 break;
charlesmn 0:3ac96e360672 5748 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_SHORT_RANGE:
charlesmn 0:3ac96e360672 5749 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5750 (int32_t)pdev->tuning_parms.tp_init_phase_ref_lite_short;
charlesmn 0:3ac96e360672 5751 break;
charlesmn 0:3ac96e360672 5752 case VL53L1_TUNINGPARM_TIMED_SEED_CONFIG:
charlesmn 0:3ac96e360672 5753 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5754 (int32_t)pdev->tuning_parms.tp_timed_seed_cfg;
charlesmn 0:3ac96e360672 5755 break;
charlesmn 0:3ac96e360672 5756 case VL53L1_TUNINGPARM_DMAX_CFG_SIGNAL_THRESH_SIGMA:
charlesmn 0:3ac96e360672 5757 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5758 (int32_t)pdev->dmax_cfg.signal_thresh_sigma;
charlesmn 0:3ac96e360672 5759 break;
charlesmn 0:3ac96e360672 5760 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_0:
charlesmn 0:3ac96e360672 5761 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5762 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[0];
charlesmn 0:3ac96e360672 5763 break;
charlesmn 0:3ac96e360672 5764 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_1:
charlesmn 0:3ac96e360672 5765 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5766 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[1];
charlesmn 0:3ac96e360672 5767 break;
charlesmn 0:3ac96e360672 5768 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_2:
charlesmn 0:3ac96e360672 5769 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5770 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[2];
charlesmn 0:3ac96e360672 5771 break;
charlesmn 0:3ac96e360672 5772 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_3:
charlesmn 0:3ac96e360672 5773 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5774 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[3];
charlesmn 0:3ac96e360672 5775 break;
charlesmn 0:3ac96e360672 5776 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_4:
charlesmn 0:3ac96e360672 5777 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5778 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[4];
charlesmn 0:3ac96e360672 5779 break;
charlesmn 0:3ac96e360672 5780 case VL53L1_TUNINGPARM_VHV_LOOPBOUND:
charlesmn 0:3ac96e360672 5781 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5782 (int32_t)pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound;
charlesmn 0:3ac96e360672 5783 break;
charlesmn 0:3ac96e360672 5784 case VL53L1_TUNINGPARM_REFSPADCHAR_DEVICE_TEST_MODE:
charlesmn 0:3ac96e360672 5785 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5786 (int32_t)pdev->refspadchar.device_test_mode;
charlesmn 0:3ac96e360672 5787 break;
charlesmn 0:3ac96e360672 5788 case VL53L1_TUNINGPARM_REFSPADCHAR_VCSEL_PERIOD:
charlesmn 0:3ac96e360672 5789 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5790 (int32_t)pdev->refspadchar.VL53L1_p_009;
charlesmn 0:3ac96e360672 5791 break;
charlesmn 0:3ac96e360672 5792 case VL53L1_TUNINGPARM_REFSPADCHAR_PHASECAL_TIMEOUT_US:
charlesmn 0:3ac96e360672 5793 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5794 (int32_t)pdev->refspadchar.timeout_us;
charlesmn 0:3ac96e360672 5795 break;
charlesmn 0:3ac96e360672 5796 case VL53L1_TUNINGPARM_REFSPADCHAR_TARGET_COUNT_RATE_MCPS:
charlesmn 0:3ac96e360672 5797 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5798 (int32_t)pdev->refspadchar.target_count_rate_mcps;
charlesmn 0:3ac96e360672 5799 break;
charlesmn 0:3ac96e360672 5800 case VL53L1_TUNINGPARM_REFSPADCHAR_MIN_COUNTRATE_LIMIT_MCPS:
charlesmn 0:3ac96e360672 5801 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5802 (int32_t)pdev->refspadchar.min_count_rate_limit_mcps;
charlesmn 0:3ac96e360672 5803 break;
charlesmn 0:3ac96e360672 5804 case VL53L1_TUNINGPARM_REFSPADCHAR_MAX_COUNTRATE_LIMIT_MCPS:
charlesmn 0:3ac96e360672 5805 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5806 (int32_t)pdev->refspadchar.max_count_rate_limit_mcps;
charlesmn 0:3ac96e360672 5807 break;
charlesmn 0:3ac96e360672 5808 case VL53L1_TUNINGPARM_XTALK_EXTRACT_NUM_OF_SAMPLES:
charlesmn 0:3ac96e360672 5809 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5810 (int32_t)pXC->num_of_samples;
charlesmn 0:3ac96e360672 5811 break;
charlesmn 0:3ac96e360672 5812 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MIN_FILTER_THRESH_MM:
charlesmn 0:3ac96e360672 5813 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5814 (int32_t)pXC->algo__crosstalk_extract_min_valid_range_mm;
charlesmn 0:3ac96e360672 5815 break;
charlesmn 0:3ac96e360672 5816 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_FILTER_THRESH_MM:
charlesmn 0:3ac96e360672 5817 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5818 (int32_t)pXC->algo__crosstalk_extract_max_valid_range_mm;
charlesmn 0:3ac96e360672 5819 break;
charlesmn 0:3ac96e360672 5820 case VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_RATE_MCPS:
charlesmn 0:3ac96e360672 5821 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5822 (int32_t)pXC->dss_config__target_total_rate_mcps;
charlesmn 0:3ac96e360672 5823 break;
charlesmn 0:3ac96e360672 5824 case VL53L1_TUNINGPARM_XTALK_EXTRACT_PHASECAL_TIMEOUT_US:
charlesmn 0:3ac96e360672 5825 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5826 (int32_t)pXC->phasecal_config_timeout_us;
charlesmn 0:3ac96e360672 5827 break;
charlesmn 0:3ac96e360672 5828 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_VALID_RATE_KCPS:
charlesmn 0:3ac96e360672 5829 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5830 (int32_t)pXC->algo__crosstalk_extract_max_valid_rate_kcps;
charlesmn 0:3ac96e360672 5831 break;
charlesmn 0:3ac96e360672 5832 case VL53L1_TUNINGPARM_XTALK_EXTRACT_SIGMA_THRESHOLD_MM:
charlesmn 0:3ac96e360672 5833 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5834 (int32_t)pXC->algo__crosstalk_extract_max_sigma_mm;
charlesmn 0:3ac96e360672 5835 break;
charlesmn 0:3ac96e360672 5836 case VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_TIMEOUT_US:
charlesmn 0:3ac96e360672 5837 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5838 (int32_t)pXC->mm_config_timeout_us;
charlesmn 0:3ac96e360672 5839 break;
charlesmn 0:3ac96e360672 5840 case VL53L1_TUNINGPARM_XTALK_EXTRACT_BIN_TIMEOUT_US:
charlesmn 0:3ac96e360672 5841 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5842 (int32_t)pXC->range_config_timeout_us;
charlesmn 0:3ac96e360672 5843 break;
charlesmn 0:3ac96e360672 5844 case VL53L1_TUNINGPARM_OFFSET_CAL_DSS_RATE_MCPS:
charlesmn 0:3ac96e360672 5845 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5846 (int32_t)pdev->offsetcal_cfg.dss_config__target_total_rate_mcps;
charlesmn 0:3ac96e360672 5847 break;
charlesmn 0:3ac96e360672 5848 case VL53L1_TUNINGPARM_OFFSET_CAL_PHASECAL_TIMEOUT_US:
charlesmn 0:3ac96e360672 5849 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5850 (int32_t)pdev->offsetcal_cfg.phasecal_config_timeout_us;
charlesmn 0:3ac96e360672 5851 break;
charlesmn 0:3ac96e360672 5852 case VL53L1_TUNINGPARM_OFFSET_CAL_MM_TIMEOUT_US:
charlesmn 0:3ac96e360672 5853 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5854 (int32_t)pdev->offsetcal_cfg.mm_config_timeout_us;
charlesmn 0:3ac96e360672 5855 break;
charlesmn 0:3ac96e360672 5856 case VL53L1_TUNINGPARM_OFFSET_CAL_RANGE_TIMEOUT_US:
charlesmn 0:3ac96e360672 5857 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5858 (int32_t)pdev->offsetcal_cfg.range_config_timeout_us;
charlesmn 0:3ac96e360672 5859 break;
charlesmn 0:3ac96e360672 5860 case VL53L1_TUNINGPARM_OFFSET_CAL_PRE_SAMPLES:
charlesmn 0:3ac96e360672 5861 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5862 (int32_t)pdev->offsetcal_cfg.pre_num_of_samples;
charlesmn 0:3ac96e360672 5863 break;
charlesmn 0:3ac96e360672 5864 case VL53L1_TUNINGPARM_OFFSET_CAL_MM1_SAMPLES:
charlesmn 0:3ac96e360672 5865 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5866 (int32_t)pdev->offsetcal_cfg.mm1_num_of_samples;
charlesmn 0:3ac96e360672 5867 break;
charlesmn 0:3ac96e360672 5868 case VL53L1_TUNINGPARM_OFFSET_CAL_MM2_SAMPLES:
charlesmn 0:3ac96e360672 5869 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5870 (int32_t)pdev->offsetcal_cfg.mm2_num_of_samples;
charlesmn 0:3ac96e360672 5871 break;
charlesmn 0:3ac96e360672 5872 case VL53L1_TUNINGPARM_ZONE_CAL_DSS_RATE_MCPS:
charlesmn 0:3ac96e360672 5873 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5874 (int32_t)pdev->zonecal_cfg.dss_config__target_total_rate_mcps;
charlesmn 0:3ac96e360672 5875 break;
charlesmn 0:3ac96e360672 5876 case VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_TIMEOUT_US:
charlesmn 0:3ac96e360672 5877 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5878 (int32_t)pdev->zonecal_cfg.phasecal_config_timeout_us;
charlesmn 0:3ac96e360672 5879 break;
charlesmn 0:3ac96e360672 5880 case VL53L1_TUNINGPARM_ZONE_CAL_DSS_TIMEOUT_US:
charlesmn 0:3ac96e360672 5881 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5882 (int32_t)pdev->zonecal_cfg.mm_config_timeout_us;
charlesmn 0:3ac96e360672 5883 break;
charlesmn 0:3ac96e360672 5884 case VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_NUM_SAMPLES:
charlesmn 0:3ac96e360672 5885 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5886 (int32_t)pdev->zonecal_cfg.phasecal_num_of_samples;
charlesmn 0:3ac96e360672 5887 break;
charlesmn 0:3ac96e360672 5888 case VL53L1_TUNINGPARM_ZONE_CAL_RANGE_TIMEOUT_US:
charlesmn 0:3ac96e360672 5889 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5890 (int32_t)pdev->zonecal_cfg.range_config_timeout_us;
charlesmn 0:3ac96e360672 5891 break;
charlesmn 0:3ac96e360672 5892 case VL53L1_TUNINGPARM_ZONE_CAL_ZONE_NUM_SAMPLES:
charlesmn 0:3ac96e360672 5893 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5894 (int32_t)pdev->zonecal_cfg.zone_num_of_samples;
charlesmn 0:3ac96e360672 5895 break;
charlesmn 0:3ac96e360672 5896 case VL53L1_TUNINGPARM_SPADMAP_VCSEL_PERIOD:
charlesmn 0:3ac96e360672 5897 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5898 (int32_t)pdev->ssc_cfg.VL53L1_p_009;
charlesmn 0:3ac96e360672 5899 break;
charlesmn 0:3ac96e360672 5900 case VL53L1_TUNINGPARM_SPADMAP_VCSEL_START:
charlesmn 0:3ac96e360672 5901 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5902 (int32_t)pdev->ssc_cfg.vcsel_start;
charlesmn 0:3ac96e360672 5903 break;
charlesmn 0:3ac96e360672 5904 case VL53L1_TUNINGPARM_SPADMAP_RATE_LIMIT_MCPS:
charlesmn 0:3ac96e360672 5905 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5906 (int32_t)pdev->ssc_cfg.rate_limit_mcps;
charlesmn 0:3ac96e360672 5907 break;
charlesmn 0:3ac96e360672 5908 case VL53L1_TUNINGPARM_LITE_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn 0:3ac96e360672 5909 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5910 (int32_t)pdev->tuning_parms.tp_dss_target_lite_mcps;
charlesmn 0:3ac96e360672 5911 break;
charlesmn 0:3ac96e360672 5912 case VL53L1_TUNINGPARM_RANGING_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn 0:3ac96e360672 5913 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5914 (int32_t)pdev->tuning_parms.tp_dss_target_histo_mcps;
charlesmn 0:3ac96e360672 5915 break;
charlesmn 0:3ac96e360672 5916 case VL53L1_TUNINGPARM_MZ_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn 0:3ac96e360672 5917 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5918 (int32_t)pdev->tuning_parms.tp_dss_target_histo_mz_mcps;
charlesmn 0:3ac96e360672 5919 break;
charlesmn 0:3ac96e360672 5920 case VL53L1_TUNINGPARM_TIMED_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn 0:3ac96e360672 5921 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5922 (int32_t)pdev->tuning_parms.tp_dss_target_timed_mcps;
charlesmn 0:3ac96e360672 5923 break;
charlesmn 0:3ac96e360672 5924 case VL53L1_TUNINGPARM_LITE_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5925 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5926 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_lite_us;
charlesmn 0:3ac96e360672 5927 break;
charlesmn 0:3ac96e360672 5928 case VL53L1_TUNINGPARM_RANGING_LONG_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5929 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5930 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_hist_long_us;
charlesmn 0:3ac96e360672 5931 break;
charlesmn 0:3ac96e360672 5932 case VL53L1_TUNINGPARM_RANGING_MED_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5933 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5934 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_hist_med_us;
charlesmn 0:3ac96e360672 5935 break;
charlesmn 0:3ac96e360672 5936 case VL53L1_TUNINGPARM_RANGING_SHORT_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5937 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5938 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_hist_short_us;
charlesmn 0:3ac96e360672 5939 break;
charlesmn 0:3ac96e360672 5940 case VL53L1_TUNINGPARM_MZ_LONG_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5941 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5942 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_mz_long_us;
charlesmn 0:3ac96e360672 5943 break;
charlesmn 0:3ac96e360672 5944 case VL53L1_TUNINGPARM_MZ_MED_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5945 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5946 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_mz_med_us;
charlesmn 0:3ac96e360672 5947 break;
charlesmn 0:3ac96e360672 5948 case VL53L1_TUNINGPARM_MZ_SHORT_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5949 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5950 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_mz_short_us;
charlesmn 0:3ac96e360672 5951 break;
charlesmn 0:3ac96e360672 5952 case VL53L1_TUNINGPARM_TIMED_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5953 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5954 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_timed_us;
charlesmn 0:3ac96e360672 5955 break;
charlesmn 0:3ac96e360672 5956 case VL53L1_TUNINGPARM_LITE_MM_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5957 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5958 (int32_t)pdev->tuning_parms.tp_mm_timeout_lite_us;
charlesmn 0:3ac96e360672 5959 break;
charlesmn 0:3ac96e360672 5960 case VL53L1_TUNINGPARM_RANGING_MM_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5961 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5962 (int32_t)pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn 0:3ac96e360672 5963 break;
charlesmn 0:3ac96e360672 5964 case VL53L1_TUNINGPARM_MZ_MM_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5965 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5966 (int32_t)pdev->tuning_parms.tp_mm_timeout_mz_us;
charlesmn 0:3ac96e360672 5967 break;
charlesmn 0:3ac96e360672 5968 case VL53L1_TUNINGPARM_TIMED_MM_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5969 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5970 (int32_t)pdev->tuning_parms.tp_mm_timeout_timed_us;
charlesmn 0:3ac96e360672 5971 break;
charlesmn 0:3ac96e360672 5972 case VL53L1_TUNINGPARM_LITE_RANGE_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5973 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5974 (int32_t)pdev->tuning_parms.tp_range_timeout_lite_us;
charlesmn 0:3ac96e360672 5975 break;
charlesmn 0:3ac96e360672 5976 case VL53L1_TUNINGPARM_RANGING_RANGE_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5977 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5978 (int32_t)pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn 0:3ac96e360672 5979 break;
charlesmn 0:3ac96e360672 5980 case VL53L1_TUNINGPARM_MZ_RANGE_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5981 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5982 (int32_t)pdev->tuning_parms.tp_range_timeout_mz_us;
charlesmn 0:3ac96e360672 5983 break;
charlesmn 0:3ac96e360672 5984 case VL53L1_TUNINGPARM_TIMED_RANGE_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5985 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5986 (int32_t)pdev->tuning_parms.tp_range_timeout_timed_us;
charlesmn 0:3ac96e360672 5987 break;
charlesmn 0:3ac96e360672 5988 case VL53L1_TUNINGPARM_DYNXTALK_SMUDGE_MARGIN:
charlesmn 0:3ac96e360672 5989 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5990 (int32_t)pdev->smudge_correct_config.smudge_margin;
charlesmn 0:3ac96e360672 5991 break;
charlesmn 0:3ac96e360672 5992 case VL53L1_TUNINGPARM_DYNXTALK_NOISE_MARGIN:
charlesmn 0:3ac96e360672 5993 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5994 (int32_t)pdev->smudge_correct_config.noise_margin;
charlesmn 0:3ac96e360672 5995 break;
charlesmn 0:3ac96e360672 5996 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT:
charlesmn 0:3ac96e360672 5997 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5998 (int32_t)pdev->smudge_correct_config.user_xtalk_offset_limit;
charlesmn 0:3ac96e360672 5999 break;
charlesmn 0:3ac96e360672 6000 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT_HI:
charlesmn 0:3ac96e360672 6001 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6002 (int32_t)pdev->smudge_correct_config.user_xtalk_offset_limit_hi;
charlesmn 0:3ac96e360672 6003 break;
charlesmn 0:3ac96e360672 6004 case VL53L1_TUNINGPARM_DYNXTALK_SAMPLE_LIMIT:
charlesmn 0:3ac96e360672 6005 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6006 (int32_t)pdev->smudge_correct_config.sample_limit;
charlesmn 0:3ac96e360672 6007 break;
charlesmn 0:3ac96e360672 6008 case VL53L1_TUNINGPARM_DYNXTALK_SINGLE_XTALK_DELTA:
charlesmn 0:3ac96e360672 6009 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6010 (int32_t)pdev->smudge_correct_config.single_xtalk_delta;
charlesmn 0:3ac96e360672 6011 break;
charlesmn 0:3ac96e360672 6012 case VL53L1_TUNINGPARM_DYNXTALK_AVERAGED_XTALK_DELTA:
charlesmn 0:3ac96e360672 6013 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6014 (int32_t)pdev->smudge_correct_config.averaged_xtalk_delta;
charlesmn 0:3ac96e360672 6015 break;
charlesmn 0:3ac96e360672 6016 case VL53L1_TUNINGPARM_DYNXTALK_CLIP_LIMIT:
charlesmn 0:3ac96e360672 6017 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6018 (int32_t)pdev->smudge_correct_config.smudge_corr_clip_limit;
charlesmn 0:3ac96e360672 6019 break;
charlesmn 0:3ac96e360672 6020 case VL53L1_TUNINGPARM_DYNXTALK_SCALER_CALC_METHOD:
charlesmn 0:3ac96e360672 6021 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6022 (int32_t)pdev->smudge_correct_config.scaler_calc_method;
charlesmn 0:3ac96e360672 6023 break;
charlesmn 0:3ac96e360672 6024 case VL53L1_TUNINGPARM_DYNXTALK_XGRADIENT_SCALER:
charlesmn 0:3ac96e360672 6025 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6026 (int32_t)pdev->smudge_correct_config.x_gradient_scaler;
charlesmn 0:3ac96e360672 6027 break;
charlesmn 0:3ac96e360672 6028 case VL53L1_TUNINGPARM_DYNXTALK_YGRADIENT_SCALER:
charlesmn 0:3ac96e360672 6029 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6030 (int32_t)pdev->smudge_correct_config.y_gradient_scaler;
charlesmn 0:3ac96e360672 6031 break;
charlesmn 0:3ac96e360672 6032 case VL53L1_TUNINGPARM_DYNXTALK_USER_SCALER_SET:
charlesmn 0:3ac96e360672 6033 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6034 (int32_t)pdev->smudge_correct_config.user_scaler_set;
charlesmn 0:3ac96e360672 6035 break;
charlesmn 0:3ac96e360672 6036 case VL53L1_TUNINGPARM_DYNXTALK_SMUDGE_COR_SINGLE_APPLY:
charlesmn 0:3ac96e360672 6037 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6038 (int32_t)pdev->smudge_correct_config.smudge_corr_single_apply;
charlesmn 0:3ac96e360672 6039 break;
charlesmn 0:3ac96e360672 6040 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_AMB_THRESHOLD:
charlesmn 0:3ac96e360672 6041 *ptuning_parm_value = (int32_t)(
charlesmn 0:3ac96e360672 6042 pdev->smudge_correct_config.smudge_corr_ambient_threshold);
charlesmn 0:3ac96e360672 6043 break;
charlesmn 0:3ac96e360672 6044 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_AMB_THRESHOLD_KCPS:
charlesmn 0:3ac96e360672 6045 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6046 (int32_t)pdev->smudge_correct_config.nodetect_ambient_threshold;
charlesmn 0:3ac96e360672 6047 break;
charlesmn 0:3ac96e360672 6048 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_SAMPLE_LIMIT:
charlesmn 0:3ac96e360672 6049 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6050 (int32_t)pdev->smudge_correct_config.nodetect_sample_limit;
charlesmn 0:3ac96e360672 6051 break;
charlesmn 0:3ac96e360672 6052 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_XTALK_OFFSET_KCPS:
charlesmn 0:3ac96e360672 6053 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6054 (int32_t)pdev->smudge_correct_config.nodetect_xtalk_offset;
charlesmn 0:3ac96e360672 6055 break;
charlesmn 0:3ac96e360672 6056 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_MIN_RANGE_MM:
charlesmn 0:3ac96e360672 6057 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6058 (int32_t)pdev->smudge_correct_config.nodetect_min_range_mm;
charlesmn 0:3ac96e360672 6059 break;
charlesmn 0:3ac96e360672 6060 case VL53L1_TUNINGPARM_LOWPOWERAUTO_VHV_LOOP_BOUND:
charlesmn 0:3ac96e360672 6061 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6062 (int32_t)pdev->low_power_auto_data.vhv_loop_bound;
charlesmn 0:3ac96e360672 6063 break;
charlesmn 0:3ac96e360672 6064 case VL53L1_TUNINGPARM_LOWPOWERAUTO_MM_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6065 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6066 (int32_t)pdev->tuning_parms.tp_mm_timeout_lpa_us;
charlesmn 0:3ac96e360672 6067 break;
charlesmn 0:3ac96e360672 6068 case VL53L1_TUNINGPARM_LOWPOWERAUTO_RANGE_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6069 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6070 (int32_t)pdev->tuning_parms.tp_range_timeout_lpa_us;
charlesmn 0:3ac96e360672 6071 break;
charlesmn 0:3ac96e360672 6072 case VL53L1_TUNINGPARM_VERY_SHORT_DSS_RATE_MCPS:
charlesmn 0:3ac96e360672 6073 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6074 (int32_t)pdev->tuning_parms.tp_dss_target_very_short_mcps;
charlesmn 0:3ac96e360672 6075 break;
charlesmn 0:3ac96e360672 6076 case VL53L1_TUNINGPARM_PHASECAL_PATCH_POWER:
charlesmn 0:3ac96e360672 6077 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6078 (int32_t) pdev->tuning_parms.tp_phasecal_patch_power;
charlesmn 0:3ac96e360672 6079 break;
charlesmn 0:3ac96e360672 6080 case VL53L1_TUNINGPARM_HIST_MERGE:
charlesmn 0:3ac96e360672 6081 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6082 (int32_t) pdev->tuning_parms.tp_hist_merge;
charlesmn 0:3ac96e360672 6083 break;
charlesmn 0:3ac96e360672 6084 case VL53L1_TUNINGPARM_RESET_MERGE_THRESHOLD:
charlesmn 0:3ac96e360672 6085 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6086 (int32_t) pdev->tuning_parms.tp_reset_merge_threshold;
charlesmn 0:3ac96e360672 6087 break;
charlesmn 0:3ac96e360672 6088 case VL53L1_TUNINGPARM_HIST_MERGE_MAX_SIZE:
charlesmn 0:3ac96e360672 6089 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6090 (int32_t) pdev->tuning_parms.tp_hist_merge_max_size;
charlesmn 0:3ac96e360672 6091 break;
charlesmn 0:3ac96e360672 6092 case VL53L1_TUNINGPARM_DYNXTALK_MAX_SMUDGE_FACTOR:
charlesmn 0:3ac96e360672 6093 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6094 pdev->smudge_correct_config.max_smudge_factor;
charlesmn 0:3ac96e360672 6095 break;
charlesmn 0:3ac96e360672 6096
charlesmn 0:3ac96e360672 6097 case VL53L1_TUNINGPARM_UWR_ENABLE:
charlesmn 0:3ac96e360672 6098 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6099 pdev->tuning_parms.tp_uwr_enable;
charlesmn 0:3ac96e360672 6100 break;
charlesmn 0:3ac96e360672 6101 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MIN:
charlesmn 0:3ac96e360672 6102 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6103 pdev->tuning_parms.tp_uwr_med_z_1_min;
charlesmn 0:3ac96e360672 6104 break;
charlesmn 0:3ac96e360672 6105 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MAX:
charlesmn 0:3ac96e360672 6106 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6107 pdev->tuning_parms.tp_uwr_med_z_1_max;
charlesmn 0:3ac96e360672 6108 break;
charlesmn 0:3ac96e360672 6109 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MIN:
charlesmn 0:3ac96e360672 6110 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6111 pdev->tuning_parms.tp_uwr_med_z_2_min;
charlesmn 0:3ac96e360672 6112 break;
charlesmn 0:3ac96e360672 6113 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MAX:
charlesmn 0:3ac96e360672 6114 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6115 pdev->tuning_parms.tp_uwr_med_z_2_max;
charlesmn 0:3ac96e360672 6116 break;
charlesmn 0:3ac96e360672 6117 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MIN:
charlesmn 0:3ac96e360672 6118 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6119 pdev->tuning_parms.tp_uwr_med_z_3_min;
charlesmn 0:3ac96e360672 6120 break;
charlesmn 0:3ac96e360672 6121 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MAX:
charlesmn 0:3ac96e360672 6122 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6123 pdev->tuning_parms.tp_uwr_med_z_3_max;
charlesmn 0:3ac96e360672 6124 break;
charlesmn 0:3ac96e360672 6125 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MIN:
charlesmn 0:3ac96e360672 6126 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6127 pdev->tuning_parms.tp_uwr_med_z_4_min;
charlesmn 0:3ac96e360672 6128 break;
charlesmn 0:3ac96e360672 6129 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MAX:
charlesmn 0:3ac96e360672 6130 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6131 pdev->tuning_parms.tp_uwr_med_z_4_max;
charlesmn 0:3ac96e360672 6132 break;
charlesmn 0:3ac96e360672 6133 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MIN:
charlesmn 0:3ac96e360672 6134 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6135 pdev->tuning_parms.tp_uwr_med_z_5_min;
charlesmn 0:3ac96e360672 6136 break;
charlesmn 0:3ac96e360672 6137 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MAX:
charlesmn 0:3ac96e360672 6138 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6139 pdev->tuning_parms.tp_uwr_med_z_5_max;
charlesmn 0:3ac96e360672 6140 break;
charlesmn 0:3ac96e360672 6141 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MIN:
charlesmn 0:3ac96e360672 6142 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6143 pdev->tuning_parms.tp_uwr_med_z_6_min;
charlesmn 0:3ac96e360672 6144 break;
charlesmn 0:3ac96e360672 6145 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MAX:
charlesmn 0:3ac96e360672 6146 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6147 pdev->tuning_parms.tp_uwr_med_z_6_max;
charlesmn 0:3ac96e360672 6148 break;
charlesmn 0:3ac96e360672 6149 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEA:
charlesmn 0:3ac96e360672 6150 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6151 pdev->tuning_parms.tp_uwr_med_corr_z_1_rangea;
charlesmn 0:3ac96e360672 6152 break;
charlesmn 0:3ac96e360672 6153 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEB:
charlesmn 0:3ac96e360672 6154 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6155 pdev->tuning_parms.tp_uwr_med_corr_z_1_rangeb;
charlesmn 0:3ac96e360672 6156 break;
charlesmn 0:3ac96e360672 6157 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEA:
charlesmn 0:3ac96e360672 6158 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6159 pdev->tuning_parms.tp_uwr_med_corr_z_2_rangea;
charlesmn 0:3ac96e360672 6160 break;
charlesmn 0:3ac96e360672 6161 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEB:
charlesmn 0:3ac96e360672 6162 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6163 pdev->tuning_parms.tp_uwr_med_corr_z_2_rangeb;
charlesmn 0:3ac96e360672 6164 break;
charlesmn 0:3ac96e360672 6165 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEA:
charlesmn 0:3ac96e360672 6166 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6167 pdev->tuning_parms.tp_uwr_med_corr_z_3_rangea;
charlesmn 0:3ac96e360672 6168 break;
charlesmn 0:3ac96e360672 6169 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEB:
charlesmn 0:3ac96e360672 6170 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6171 pdev->tuning_parms.tp_uwr_med_corr_z_3_rangeb;
charlesmn 0:3ac96e360672 6172 break;
charlesmn 0:3ac96e360672 6173 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEA:
charlesmn 0:3ac96e360672 6174 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6175 pdev->tuning_parms.tp_uwr_med_corr_z_4_rangea;
charlesmn 0:3ac96e360672 6176 break;
charlesmn 0:3ac96e360672 6177 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEB:
charlesmn 0:3ac96e360672 6178 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6179 pdev->tuning_parms.tp_uwr_med_corr_z_4_rangeb;
charlesmn 0:3ac96e360672 6180 break;
charlesmn 0:3ac96e360672 6181 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEA:
charlesmn 0:3ac96e360672 6182 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6183 pdev->tuning_parms.tp_uwr_med_corr_z_5_rangea;
charlesmn 0:3ac96e360672 6184 break;
charlesmn 0:3ac96e360672 6185 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEB:
charlesmn 0:3ac96e360672 6186 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6187 pdev->tuning_parms.tp_uwr_med_corr_z_5_rangeb;
charlesmn 0:3ac96e360672 6188 break;
charlesmn 0:3ac96e360672 6189 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEA:
charlesmn 0:3ac96e360672 6190 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6191 pdev->tuning_parms.tp_uwr_med_corr_z_6_rangea;
charlesmn 0:3ac96e360672 6192 break;
charlesmn 0:3ac96e360672 6193 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEB:
charlesmn 0:3ac96e360672 6194 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6195 pdev->tuning_parms.tp_uwr_med_corr_z_6_rangeb;
charlesmn 0:3ac96e360672 6196 break;
charlesmn 0:3ac96e360672 6197 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MIN:
charlesmn 0:3ac96e360672 6198 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6199 pdev->tuning_parms.tp_uwr_lng_z_1_min;
charlesmn 0:3ac96e360672 6200 break;
charlesmn 0:3ac96e360672 6201 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MAX:
charlesmn 0:3ac96e360672 6202 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6203 pdev->tuning_parms.tp_uwr_lng_z_1_max;
charlesmn 0:3ac96e360672 6204 break;
charlesmn 0:3ac96e360672 6205 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MIN:
charlesmn 0:3ac96e360672 6206 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6207 pdev->tuning_parms.tp_uwr_lng_z_2_min;
charlesmn 0:3ac96e360672 6208 break;
charlesmn 0:3ac96e360672 6209 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MAX:
charlesmn 0:3ac96e360672 6210 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6211 pdev->tuning_parms.tp_uwr_lng_z_2_max;
charlesmn 0:3ac96e360672 6212 break;
charlesmn 0:3ac96e360672 6213 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MIN:
charlesmn 0:3ac96e360672 6214 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6215 pdev->tuning_parms.tp_uwr_lng_z_3_min;
charlesmn 0:3ac96e360672 6216 break;
charlesmn 0:3ac96e360672 6217 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MAX:
charlesmn 0:3ac96e360672 6218 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6219 pdev->tuning_parms.tp_uwr_lng_z_3_max;
charlesmn 0:3ac96e360672 6220 break;
charlesmn 0:3ac96e360672 6221 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MIN:
charlesmn 0:3ac96e360672 6222 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6223 pdev->tuning_parms.tp_uwr_lng_z_4_min;
charlesmn 0:3ac96e360672 6224 break;
charlesmn 0:3ac96e360672 6225 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MAX:
charlesmn 0:3ac96e360672 6226 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6227 pdev->tuning_parms.tp_uwr_lng_z_4_max;
charlesmn 0:3ac96e360672 6228 break;
charlesmn 0:3ac96e360672 6229 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MIN:
charlesmn 0:3ac96e360672 6230 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6231 pdev->tuning_parms.tp_uwr_lng_z_5_min;
charlesmn 0:3ac96e360672 6232 break;
charlesmn 0:3ac96e360672 6233 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MAX:
charlesmn 0:3ac96e360672 6234 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6235 pdev->tuning_parms.tp_uwr_lng_z_5_max;
charlesmn 0:3ac96e360672 6236 break;
charlesmn 0:3ac96e360672 6237 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEA:
charlesmn 0:3ac96e360672 6238 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6239 pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangea;
charlesmn 0:3ac96e360672 6240 break;
charlesmn 0:3ac96e360672 6241 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEB:
charlesmn 0:3ac96e360672 6242 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6243 pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangeb;
charlesmn 0:3ac96e360672 6244 break;
charlesmn 0:3ac96e360672 6245 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEA:
charlesmn 0:3ac96e360672 6246 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6247 pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangea;
charlesmn 0:3ac96e360672 6248 break;
charlesmn 0:3ac96e360672 6249 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEB:
charlesmn 0:3ac96e360672 6250 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6251 pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangeb;
charlesmn 0:3ac96e360672 6252 break;
charlesmn 0:3ac96e360672 6253 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEA:
charlesmn 0:3ac96e360672 6254 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6255 pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangea;
charlesmn 0:3ac96e360672 6256 break;
charlesmn 0:3ac96e360672 6257 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEB:
charlesmn 0:3ac96e360672 6258 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6259 pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangeb;
charlesmn 0:3ac96e360672 6260 break;
charlesmn 0:3ac96e360672 6261 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEA:
charlesmn 0:3ac96e360672 6262 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6263 pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangea;
charlesmn 0:3ac96e360672 6264 break;
charlesmn 0:3ac96e360672 6265 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEB:
charlesmn 0:3ac96e360672 6266 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6267 pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangeb;
charlesmn 0:3ac96e360672 6268 break;
charlesmn 0:3ac96e360672 6269 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEA:
charlesmn 0:3ac96e360672 6270 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6271 pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangea;
charlesmn 0:3ac96e360672 6272 break;
charlesmn 0:3ac96e360672 6273 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEB:
charlesmn 0:3ac96e360672 6274 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6275 pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangeb;
charlesmn 0:3ac96e360672 6276 break;
lugandc 18:0696efe39d08 6277 case VL53L1_TUNINGPARM_MIN_SIGNAL_SECONDARY_TARGETS:
lugandc 18:0696efe39d08 6278 *ptuning_parm_value =
lugandc 18:0696efe39d08 6279 pdev->tuning_parms.tp_min_signal_secondary_targets;
lugandc 18:0696efe39d08 6280 break;
charlesmn 0:3ac96e360672 6281
charlesmn 0:3ac96e360672 6282 default:
charlesmn 0:3ac96e360672 6283 *ptuning_parm_value = 0x7FFFFFFF;
charlesmn 0:3ac96e360672 6284 status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn 0:3ac96e360672 6285 break;
charlesmn 0:3ac96e360672 6286
charlesmn 0:3ac96e360672 6287 }
charlesmn 0:3ac96e360672 6288
charlesmn 0:3ac96e360672 6289 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 6290
charlesmn 0:3ac96e360672 6291 return status;
charlesmn 0:3ac96e360672 6292 }
charlesmn 0:3ac96e360672 6293
charlesmn 0:3ac96e360672 6294 VL53L1_Error VL53L1_set_tuning_parm(
charlesmn 0:3ac96e360672 6295 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 6296 VL53L1_TuningParms tuning_parm_key,
charlesmn 0:3ac96e360672 6297 int32_t tuning_parm_value)
charlesmn 0:3ac96e360672 6298 {
charlesmn 0:3ac96e360672 6299
charlesmn 0:3ac96e360672 6300
charlesmn 0:3ac96e360672 6301
charlesmn 0:3ac96e360672 6302 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 6303
charlesmn 0:3ac96e360672 6304 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 6305 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn 0:3ac96e360672 6306 VL53L1_xtalkextract_config_t *pXC = &(pdev->xtalk_extract_cfg);
charlesmn 0:3ac96e360672 6307
charlesmn 0:3ac96e360672 6308 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 6309
charlesmn 0:3ac96e360672 6310 switch (tuning_parm_key) {
charlesmn 0:3ac96e360672 6311
charlesmn 0:3ac96e360672 6312 case VL53L1_TUNINGPARM_VERSION:
charlesmn 0:3ac96e360672 6313 pdev->tuning_parms.tp_tuning_parm_version =
charlesmn 0:3ac96e360672 6314 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6315 break;
charlesmn 0:3ac96e360672 6316 case VL53L1_TUNINGPARM_KEY_TABLE_VERSION:
charlesmn 0:3ac96e360672 6317 pdev->tuning_parms.tp_tuning_parm_key_table_version =
charlesmn 0:3ac96e360672 6318 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6319
charlesmn 0:3ac96e360672 6320
charlesmn 0:3ac96e360672 6321
charlesmn 0:3ac96e360672 6322 if ((uint16_t)tuning_parm_value
charlesmn 0:3ac96e360672 6323 != VL53L1_TUNINGPARM_KEY_TABLE_VERSION_DEFAULT)
charlesmn 0:3ac96e360672 6324 status = VL53L1_ERROR_TUNING_PARM_KEY_MISMATCH;
charlesmn 0:3ac96e360672 6325
charlesmn 0:3ac96e360672 6326 break;
charlesmn 0:3ac96e360672 6327 case VL53L1_TUNINGPARM_LLD_VERSION:
charlesmn 0:3ac96e360672 6328 pdev->tuning_parms.tp_tuning_parm_lld_version =
charlesmn 0:3ac96e360672 6329 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6330 break;
charlesmn 0:3ac96e360672 6331 case VL53L1_TUNINGPARM_HIST_ALGO_SELECT:
charlesmn 0:3ac96e360672 6332 pHP->hist_algo_select =
charlesmn 0:3ac96e360672 6333 (VL53L1_HistAlgoSelect)tuning_parm_value;
charlesmn 0:3ac96e360672 6334 break;
charlesmn 0:3ac96e360672 6335 case VL53L1_TUNINGPARM_HIST_TARGET_ORDER:
charlesmn 0:3ac96e360672 6336 pHP->hist_target_order =
charlesmn 0:3ac96e360672 6337 (VL53L1_HistTargetOrder)tuning_parm_value;
charlesmn 0:3ac96e360672 6338 break;
charlesmn 0:3ac96e360672 6339 case VL53L1_TUNINGPARM_HIST_FILTER_WOI_0:
charlesmn 0:3ac96e360672 6340 pHP->filter_woi0 =
charlesmn 0:3ac96e360672 6341 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6342 break;
charlesmn 0:3ac96e360672 6343 case VL53L1_TUNINGPARM_HIST_FILTER_WOI_1:
charlesmn 0:3ac96e360672 6344 pHP->filter_woi1 =
charlesmn 0:3ac96e360672 6345 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6346 break;
charlesmn 0:3ac96e360672 6347 case VL53L1_TUNINGPARM_HIST_AMB_EST_METHOD:
charlesmn 0:3ac96e360672 6348 pHP->hist_amb_est_method =
charlesmn 0:3ac96e360672 6349 (VL53L1_HistAmbEstMethod)tuning_parm_value;
charlesmn 0:3ac96e360672 6350 break;
charlesmn 0:3ac96e360672 6351 case VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_0:
charlesmn 0:3ac96e360672 6352 pHP->ambient_thresh_sigma0 =
charlesmn 0:3ac96e360672 6353 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6354 break;
charlesmn 0:3ac96e360672 6355 case VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_1:
charlesmn 0:3ac96e360672 6356 pHP->ambient_thresh_sigma1 =
charlesmn 0:3ac96e360672 6357 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6358 break;
charlesmn 0:3ac96e360672 6359 case VL53L1_TUNINGPARM_HIST_MIN_AMB_THRESH_EVENTS:
charlesmn 0:3ac96e360672 6360 pHP->min_ambient_thresh_events =
charlesmn 0:3ac96e360672 6361 (int32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6362 break;
charlesmn 0:3ac96e360672 6363 case VL53L1_TUNINGPARM_HIST_AMB_EVENTS_SCALER:
charlesmn 0:3ac96e360672 6364 pHP->ambient_thresh_events_scaler =
charlesmn 0:3ac96e360672 6365 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6366 break;
charlesmn 0:3ac96e360672 6367 case VL53L1_TUNINGPARM_HIST_NOISE_THRESHOLD:
charlesmn 0:3ac96e360672 6368 pHP->noise_threshold =
charlesmn 0:3ac96e360672 6369 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6370 break;
charlesmn 0:3ac96e360672 6371 case VL53L1_TUNINGPARM_HIST_SIGNAL_TOTAL_EVENTS_LIMIT:
charlesmn 0:3ac96e360672 6372 pHP->signal_total_events_limit =
charlesmn 0:3ac96e360672 6373 (int32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6374 break;
charlesmn 0:3ac96e360672 6375 case VL53L1_TUNINGPARM_HIST_SIGMA_EST_REF_MM:
charlesmn 0:3ac96e360672 6376 pHP->sigma_estimator__sigma_ref_mm =
charlesmn 0:3ac96e360672 6377 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6378 break;
charlesmn 0:3ac96e360672 6379 case VL53L1_TUNINGPARM_HIST_SIGMA_THRESH_MM:
charlesmn 0:3ac96e360672 6380 pHP->sigma_thresh =
charlesmn 0:3ac96e360672 6381 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6382 break;
charlesmn 0:3ac96e360672 6383 case VL53L1_TUNINGPARM_HIST_GAIN_FACTOR:
charlesmn 0:3ac96e360672 6384 pdev->gain_cal.histogram_ranging_gain_factor =
charlesmn 0:3ac96e360672 6385 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6386 break;
charlesmn 0:3ac96e360672 6387 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_PHASE_TOLERANCE:
charlesmn 0:3ac96e360672 6388 pHP->algo__consistency_check__phase_tolerance =
charlesmn 0:3ac96e360672 6389 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6390 break;
charlesmn 0:3ac96e360672 6391 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_MIN_MAX_TOLERANCE_MM:
charlesmn 0:3ac96e360672 6392 pHP->algo__consistency_check__min_max_tolerance =
charlesmn 0:3ac96e360672 6393 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6394 break;
charlesmn 0:3ac96e360672 6395 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA:
charlesmn 0:3ac96e360672 6396 pHP->algo__consistency_check__event_sigma =
charlesmn 0:3ac96e360672 6397 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6398 break;
charlesmn 0:3ac96e360672 6399 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_MIN_SPAD_LIMIT:
charlesmn 0:3ac96e360672 6400 pHP->algo__consistency_check__event_min_spad_count =
charlesmn 0:3ac96e360672 6401 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6402 break;
charlesmn 0:3ac96e360672 6403 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_LONG_RANGE:
charlesmn 0:3ac96e360672 6404 pdev->tuning_parms.tp_init_phase_rtn_hist_long =
charlesmn 0:3ac96e360672 6405 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6406 break;
charlesmn 0:3ac96e360672 6407 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_MED_RANGE:
charlesmn 0:3ac96e360672 6408 pdev->tuning_parms.tp_init_phase_rtn_hist_med =
charlesmn 0:3ac96e360672 6409 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6410 break;
charlesmn 0:3ac96e360672 6411 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_SHORT_RANGE:
charlesmn 0:3ac96e360672 6412 pdev->tuning_parms.tp_init_phase_rtn_hist_short =
charlesmn 0:3ac96e360672 6413 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6414 break;
charlesmn 0:3ac96e360672 6415 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_LONG_RANGE:
charlesmn 0:3ac96e360672 6416 pdev->tuning_parms.tp_init_phase_ref_hist_long =
charlesmn 0:3ac96e360672 6417 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6418 break;
charlesmn 0:3ac96e360672 6419 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_MED_RANGE:
charlesmn 0:3ac96e360672 6420 pdev->tuning_parms.tp_init_phase_ref_hist_med =
charlesmn 0:3ac96e360672 6421 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6422 break;
charlesmn 0:3ac96e360672 6423 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_SHORT_RANGE:
charlesmn 0:3ac96e360672 6424 pdev->tuning_parms.tp_init_phase_ref_hist_short =
charlesmn 0:3ac96e360672 6425 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6426 break;
charlesmn 0:3ac96e360672 6427 case VL53L1_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM:
charlesmn 0:3ac96e360672 6428 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm =
charlesmn 0:3ac96e360672 6429 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6430 break;
charlesmn 0:3ac96e360672 6431 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM:
charlesmn 0:3ac96e360672 6432 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm =
charlesmn 0:3ac96e360672 6433 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6434 break;
charlesmn 0:3ac96e360672 6435 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM:
charlesmn 0:3ac96e360672 6436 pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm =
charlesmn 0:3ac96e360672 6437 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6438 break;
charlesmn 0:3ac96e360672 6439 case VL53L1_TUNINGPARM_XTALK_DETECT_MIN_MAX_TOLERANCE:
charlesmn 0:3ac96e360672 6440 pHP->algo__crosstalk_detect_min_max_tolerance =
charlesmn 0:3ac96e360672 6441 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6442 break;
charlesmn 0:3ac96e360672 6443 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS:
charlesmn 0:3ac96e360672 6444 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps =
charlesmn 0:3ac96e360672 6445 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6446 break;
charlesmn 0:3ac96e360672 6447 case VL53L1_TUNINGPARM_XTALK_DETECT_EVENT_SIGMA:
charlesmn 0:3ac96e360672 6448 pHP->algo__crosstalk_detect_event_sigma =
charlesmn 0:3ac96e360672 6449 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6450 break;
charlesmn 0:3ac96e360672 6451 case VL53L1_TUNINGPARM_HIST_XTALK_MARGIN_KCPS:
charlesmn 0:3ac96e360672 6452 pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps =
charlesmn 0:3ac96e360672 6453 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6454 break;
charlesmn 0:3ac96e360672 6455 case VL53L1_TUNINGPARM_CONSISTENCY_LITE_PHASE_TOLERANCE:
charlesmn 0:3ac96e360672 6456 pdev->tuning_parms.tp_consistency_lite_phase_tolerance =
charlesmn 0:3ac96e360672 6457 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6458 break;
charlesmn 0:3ac96e360672 6459 case VL53L1_TUNINGPARM_PHASECAL_TARGET:
charlesmn 0:3ac96e360672 6460 pdev->tuning_parms.tp_phasecal_target =
charlesmn 0:3ac96e360672 6461 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6462 break;
charlesmn 0:3ac96e360672 6463 case VL53L1_TUNINGPARM_LITE_CAL_REPEAT_RATE:
charlesmn 0:3ac96e360672 6464 pdev->tuning_parms.tp_cal_repeat_rate =
charlesmn 0:3ac96e360672 6465 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6466 break;
charlesmn 0:3ac96e360672 6467 case VL53L1_TUNINGPARM_LITE_RANGING_GAIN_FACTOR:
charlesmn 0:3ac96e360672 6468 pdev->gain_cal.standard_ranging_gain_factor =
charlesmn 0:3ac96e360672 6469 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6470 break;
charlesmn 0:3ac96e360672 6471 case VL53L1_TUNINGPARM_LITE_MIN_CLIP_MM:
charlesmn 0:3ac96e360672 6472 pdev->tuning_parms.tp_lite_min_clip =
charlesmn 0:3ac96e360672 6473 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6474 break;
charlesmn 0:3ac96e360672 6475 case VL53L1_TUNINGPARM_LITE_LONG_SIGMA_THRESH_MM:
charlesmn 0:3ac96e360672 6476 pdev->tuning_parms.tp_lite_long_sigma_thresh_mm =
charlesmn 0:3ac96e360672 6477 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6478 break;
charlesmn 0:3ac96e360672 6479 case VL53L1_TUNINGPARM_LITE_MED_SIGMA_THRESH_MM:
charlesmn 0:3ac96e360672 6480 pdev->tuning_parms.tp_lite_med_sigma_thresh_mm =
charlesmn 0:3ac96e360672 6481 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6482 break;
charlesmn 0:3ac96e360672 6483 case VL53L1_TUNINGPARM_LITE_SHORT_SIGMA_THRESH_MM:
charlesmn 0:3ac96e360672 6484 pdev->tuning_parms.tp_lite_short_sigma_thresh_mm =
charlesmn 0:3ac96e360672 6485 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6486 break;
charlesmn 0:3ac96e360672 6487 case VL53L1_TUNINGPARM_LITE_LONG_MIN_COUNT_RATE_RTN_MCPS:
charlesmn 0:3ac96e360672 6488 pdev->tuning_parms.tp_lite_long_min_count_rate_rtn_mcps =
charlesmn 0:3ac96e360672 6489 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6490 break;
charlesmn 0:3ac96e360672 6491 case VL53L1_TUNINGPARM_LITE_MED_MIN_COUNT_RATE_RTN_MCPS:
charlesmn 0:3ac96e360672 6492 pdev->tuning_parms.tp_lite_med_min_count_rate_rtn_mcps =
charlesmn 0:3ac96e360672 6493 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6494 break;
charlesmn 0:3ac96e360672 6495 case VL53L1_TUNINGPARM_LITE_SHORT_MIN_COUNT_RATE_RTN_MCPS:
charlesmn 0:3ac96e360672 6496 pdev->tuning_parms.tp_lite_short_min_count_rate_rtn_mcps =
charlesmn 0:3ac96e360672 6497 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6498 break;
charlesmn 0:3ac96e360672 6499 case VL53L1_TUNINGPARM_LITE_SIGMA_EST_PULSE_WIDTH:
charlesmn 0:3ac96e360672 6500 pdev->tuning_parms.tp_lite_sigma_est_pulse_width_ns =
charlesmn 0:3ac96e360672 6501 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6502 break;
charlesmn 0:3ac96e360672 6503 case VL53L1_TUNINGPARM_LITE_SIGMA_EST_AMB_WIDTH_NS:
charlesmn 0:3ac96e360672 6504 pdev->tuning_parms.tp_lite_sigma_est_amb_width_ns =
charlesmn 0:3ac96e360672 6505 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6506 break;
charlesmn 0:3ac96e360672 6507 case VL53L1_TUNINGPARM_LITE_SIGMA_REF_MM:
charlesmn 0:3ac96e360672 6508 pdev->tuning_parms.tp_lite_sigma_ref_mm =
charlesmn 0:3ac96e360672 6509 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6510 break;
charlesmn 0:3ac96e360672 6511 case VL53L1_TUNINGPARM_LITE_RIT_MULT:
charlesmn 0:3ac96e360672 6512 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult =
charlesmn 0:3ac96e360672 6513 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6514 break;
charlesmn 0:3ac96e360672 6515 case VL53L1_TUNINGPARM_LITE_SEED_CONFIG:
charlesmn 0:3ac96e360672 6516 pdev->tuning_parms.tp_lite_seed_cfg =
charlesmn 0:3ac96e360672 6517 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6518 break;
charlesmn 0:3ac96e360672 6519 case VL53L1_TUNINGPARM_LITE_QUANTIFIER:
charlesmn 0:3ac96e360672 6520 pdev->tuning_parms.tp_lite_quantifier =
charlesmn 0:3ac96e360672 6521 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6522 break;
charlesmn 0:3ac96e360672 6523 case VL53L1_TUNINGPARM_LITE_FIRST_ORDER_SELECT:
charlesmn 0:3ac96e360672 6524 pdev->tuning_parms.tp_lite_first_order_select =
charlesmn 0:3ac96e360672 6525 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6526 break;
charlesmn 0:3ac96e360672 6527 case VL53L1_TUNINGPARM_LITE_XTALK_MARGIN_KCPS:
charlesmn 0:3ac96e360672 6528 pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps =
charlesmn 0:3ac96e360672 6529 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6530 break;
charlesmn 0:3ac96e360672 6531 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_LONG_RANGE:
charlesmn 0:3ac96e360672 6532 pdev->tuning_parms.tp_init_phase_rtn_lite_long =
charlesmn 0:3ac96e360672 6533 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6534 break;
charlesmn 0:3ac96e360672 6535 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_MED_RANGE:
charlesmn 0:3ac96e360672 6536 pdev->tuning_parms.tp_init_phase_rtn_lite_med =
charlesmn 0:3ac96e360672 6537 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6538 break;
charlesmn 0:3ac96e360672 6539 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_SHORT_RANGE:
charlesmn 0:3ac96e360672 6540 pdev->tuning_parms.tp_init_phase_rtn_lite_short =
charlesmn 0:3ac96e360672 6541 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6542 break;
charlesmn 0:3ac96e360672 6543 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_LONG_RANGE:
charlesmn 0:3ac96e360672 6544 pdev->tuning_parms.tp_init_phase_ref_lite_long =
charlesmn 0:3ac96e360672 6545 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6546 break;
charlesmn 0:3ac96e360672 6547 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_MED_RANGE:
charlesmn 0:3ac96e360672 6548 pdev->tuning_parms.tp_init_phase_ref_lite_med =
charlesmn 0:3ac96e360672 6549 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6550 break;
charlesmn 0:3ac96e360672 6551 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_SHORT_RANGE:
charlesmn 0:3ac96e360672 6552 pdev->tuning_parms.tp_init_phase_ref_lite_short =
charlesmn 0:3ac96e360672 6553 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6554 break;
charlesmn 0:3ac96e360672 6555 case VL53L1_TUNINGPARM_TIMED_SEED_CONFIG:
charlesmn 0:3ac96e360672 6556 pdev->tuning_parms.tp_timed_seed_cfg =
charlesmn 0:3ac96e360672 6557 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6558 break;
charlesmn 0:3ac96e360672 6559 case VL53L1_TUNINGPARM_DMAX_CFG_SIGNAL_THRESH_SIGMA:
charlesmn 0:3ac96e360672 6560 pdev->dmax_cfg.signal_thresh_sigma =
charlesmn 0:3ac96e360672 6561 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6562 break;
charlesmn 0:3ac96e360672 6563 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_0:
charlesmn 0:3ac96e360672 6564 pdev->dmax_cfg.target_reflectance_for_dmax_calc[0] =
charlesmn 0:3ac96e360672 6565 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6566 break;
charlesmn 0:3ac96e360672 6567 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_1:
charlesmn 0:3ac96e360672 6568 pdev->dmax_cfg.target_reflectance_for_dmax_calc[1] =
charlesmn 0:3ac96e360672 6569 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6570 break;
charlesmn 0:3ac96e360672 6571 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_2:
charlesmn 0:3ac96e360672 6572 pdev->dmax_cfg.target_reflectance_for_dmax_calc[2] =
charlesmn 0:3ac96e360672 6573 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6574 break;
charlesmn 0:3ac96e360672 6575 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_3:
charlesmn 0:3ac96e360672 6576 pdev->dmax_cfg.target_reflectance_for_dmax_calc[3] =
charlesmn 0:3ac96e360672 6577 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6578 break;
charlesmn 0:3ac96e360672 6579 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_4:
charlesmn 0:3ac96e360672 6580 pdev->dmax_cfg.target_reflectance_for_dmax_calc[4] =
charlesmn 0:3ac96e360672 6581 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6582 break;
charlesmn 0:3ac96e360672 6583 case VL53L1_TUNINGPARM_VHV_LOOPBOUND:
charlesmn 0:3ac96e360672 6584 pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound =
charlesmn 0:3ac96e360672 6585 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6586 break;
charlesmn 0:3ac96e360672 6587 case VL53L1_TUNINGPARM_REFSPADCHAR_DEVICE_TEST_MODE:
charlesmn 0:3ac96e360672 6588 pdev->refspadchar.device_test_mode =
charlesmn 0:3ac96e360672 6589 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6590 break;
charlesmn 0:3ac96e360672 6591 case VL53L1_TUNINGPARM_REFSPADCHAR_VCSEL_PERIOD:
charlesmn 0:3ac96e360672 6592 pdev->refspadchar.VL53L1_p_009 =
charlesmn 0:3ac96e360672 6593 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6594 break;
charlesmn 0:3ac96e360672 6595 case VL53L1_TUNINGPARM_REFSPADCHAR_PHASECAL_TIMEOUT_US:
charlesmn 0:3ac96e360672 6596 pdev->refspadchar.timeout_us =
charlesmn 0:3ac96e360672 6597 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6598 break;
charlesmn 0:3ac96e360672 6599 case VL53L1_TUNINGPARM_REFSPADCHAR_TARGET_COUNT_RATE_MCPS:
charlesmn 0:3ac96e360672 6600 pdev->refspadchar.target_count_rate_mcps =
charlesmn 0:3ac96e360672 6601 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6602 break;
charlesmn 0:3ac96e360672 6603 case VL53L1_TUNINGPARM_REFSPADCHAR_MIN_COUNTRATE_LIMIT_MCPS:
charlesmn 0:3ac96e360672 6604 pdev->refspadchar.min_count_rate_limit_mcps =
charlesmn 0:3ac96e360672 6605 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6606 break;
charlesmn 0:3ac96e360672 6607 case VL53L1_TUNINGPARM_REFSPADCHAR_MAX_COUNTRATE_LIMIT_MCPS:
charlesmn 0:3ac96e360672 6608 pdev->refspadchar.max_count_rate_limit_mcps =
charlesmn 0:3ac96e360672 6609 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6610 break;
charlesmn 0:3ac96e360672 6611 case VL53L1_TUNINGPARM_XTALK_EXTRACT_NUM_OF_SAMPLES:
charlesmn 0:3ac96e360672 6612 pXC->num_of_samples =
charlesmn 0:3ac96e360672 6613 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6614 break;
charlesmn 0:3ac96e360672 6615 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MIN_FILTER_THRESH_MM:
charlesmn 0:3ac96e360672 6616 pXC->algo__crosstalk_extract_min_valid_range_mm =
charlesmn 0:3ac96e360672 6617 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6618 break;
charlesmn 0:3ac96e360672 6619 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_FILTER_THRESH_MM:
charlesmn 0:3ac96e360672 6620 pXC->algo__crosstalk_extract_max_valid_range_mm =
charlesmn 0:3ac96e360672 6621 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6622 break;
charlesmn 0:3ac96e360672 6623 case VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_RATE_MCPS:
charlesmn 0:3ac96e360672 6624 pXC->dss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 6625 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6626 break;
charlesmn 0:3ac96e360672 6627 case VL53L1_TUNINGPARM_XTALK_EXTRACT_PHASECAL_TIMEOUT_US:
charlesmn 0:3ac96e360672 6628 pXC->phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 6629 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6630 break;
charlesmn 0:3ac96e360672 6631 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_VALID_RATE_KCPS:
charlesmn 0:3ac96e360672 6632 pXC->algo__crosstalk_extract_max_valid_rate_kcps =
charlesmn 0:3ac96e360672 6633 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6634 break;
charlesmn 0:3ac96e360672 6635 case VL53L1_TUNINGPARM_XTALK_EXTRACT_SIGMA_THRESHOLD_MM:
charlesmn 0:3ac96e360672 6636 pXC->algo__crosstalk_extract_max_sigma_mm =
charlesmn 0:3ac96e360672 6637 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6638 break;
charlesmn 0:3ac96e360672 6639 case VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_TIMEOUT_US:
charlesmn 0:3ac96e360672 6640 pXC->mm_config_timeout_us =
charlesmn 0:3ac96e360672 6641 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6642 break;
charlesmn 0:3ac96e360672 6643 case VL53L1_TUNINGPARM_XTALK_EXTRACT_BIN_TIMEOUT_US:
charlesmn 0:3ac96e360672 6644 pXC->range_config_timeout_us =
charlesmn 0:3ac96e360672 6645 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6646 break;
charlesmn 0:3ac96e360672 6647 case VL53L1_TUNINGPARM_OFFSET_CAL_DSS_RATE_MCPS:
charlesmn 0:3ac96e360672 6648 pdev->offsetcal_cfg.dss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 6649 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6650 break;
charlesmn 0:3ac96e360672 6651 case VL53L1_TUNINGPARM_OFFSET_CAL_PHASECAL_TIMEOUT_US:
charlesmn 0:3ac96e360672 6652 pdev->offsetcal_cfg.phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 6653 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6654 break;
charlesmn 0:3ac96e360672 6655 case VL53L1_TUNINGPARM_OFFSET_CAL_MM_TIMEOUT_US:
charlesmn 0:3ac96e360672 6656 pdev->offsetcal_cfg.mm_config_timeout_us =
charlesmn 0:3ac96e360672 6657 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6658 break;
charlesmn 0:3ac96e360672 6659 case VL53L1_TUNINGPARM_OFFSET_CAL_RANGE_TIMEOUT_US:
charlesmn 0:3ac96e360672 6660 pdev->offsetcal_cfg.range_config_timeout_us =
charlesmn 0:3ac96e360672 6661 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6662 break;
charlesmn 0:3ac96e360672 6663 case VL53L1_TUNINGPARM_OFFSET_CAL_PRE_SAMPLES:
charlesmn 0:3ac96e360672 6664 pdev->offsetcal_cfg.pre_num_of_samples =
charlesmn 0:3ac96e360672 6665 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6666 break;
charlesmn 0:3ac96e360672 6667 case VL53L1_TUNINGPARM_OFFSET_CAL_MM1_SAMPLES:
charlesmn 0:3ac96e360672 6668 pdev->offsetcal_cfg.mm1_num_of_samples =
charlesmn 0:3ac96e360672 6669 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6670 break;
charlesmn 0:3ac96e360672 6671 case VL53L1_TUNINGPARM_OFFSET_CAL_MM2_SAMPLES:
charlesmn 0:3ac96e360672 6672 pdev->offsetcal_cfg.mm2_num_of_samples =
charlesmn 0:3ac96e360672 6673 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6674 break;
charlesmn 0:3ac96e360672 6675 case VL53L1_TUNINGPARM_ZONE_CAL_DSS_RATE_MCPS:
charlesmn 0:3ac96e360672 6676 pdev->zonecal_cfg.dss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 6677 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6678 break;
charlesmn 0:3ac96e360672 6679 case VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_TIMEOUT_US:
charlesmn 0:3ac96e360672 6680 pdev->zonecal_cfg.phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 6681 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6682 break;
charlesmn 0:3ac96e360672 6683 case VL53L1_TUNINGPARM_ZONE_CAL_DSS_TIMEOUT_US:
charlesmn 0:3ac96e360672 6684 pdev->zonecal_cfg.mm_config_timeout_us =
charlesmn 0:3ac96e360672 6685 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6686 break;
charlesmn 0:3ac96e360672 6687 case VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_NUM_SAMPLES:
charlesmn 0:3ac96e360672 6688 pdev->zonecal_cfg.phasecal_num_of_samples =
charlesmn 0:3ac96e360672 6689 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6690 break;
charlesmn 0:3ac96e360672 6691 case VL53L1_TUNINGPARM_ZONE_CAL_RANGE_TIMEOUT_US:
charlesmn 0:3ac96e360672 6692 pdev->zonecal_cfg.range_config_timeout_us =
charlesmn 0:3ac96e360672 6693 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6694 break;
charlesmn 0:3ac96e360672 6695 case VL53L1_TUNINGPARM_ZONE_CAL_ZONE_NUM_SAMPLES:
charlesmn 0:3ac96e360672 6696 pdev->zonecal_cfg.zone_num_of_samples =
charlesmn 0:3ac96e360672 6697 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6698 break;
charlesmn 0:3ac96e360672 6699 case VL53L1_TUNINGPARM_SPADMAP_VCSEL_PERIOD:
charlesmn 0:3ac96e360672 6700 pdev->ssc_cfg.VL53L1_p_009 =
charlesmn 0:3ac96e360672 6701 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6702 break;
charlesmn 0:3ac96e360672 6703 case VL53L1_TUNINGPARM_SPADMAP_VCSEL_START:
charlesmn 0:3ac96e360672 6704 pdev->ssc_cfg.vcsel_start =
charlesmn 0:3ac96e360672 6705 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6706 break;
charlesmn 0:3ac96e360672 6707 case VL53L1_TUNINGPARM_SPADMAP_RATE_LIMIT_MCPS:
charlesmn 0:3ac96e360672 6708 pdev->ssc_cfg.rate_limit_mcps =
charlesmn 0:3ac96e360672 6709 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6710 break;
charlesmn 0:3ac96e360672 6711 case VL53L1_TUNINGPARM_LITE_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn 0:3ac96e360672 6712 pdev->tuning_parms.tp_dss_target_lite_mcps =
charlesmn 0:3ac96e360672 6713 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6714 break;
charlesmn 0:3ac96e360672 6715 case VL53L1_TUNINGPARM_RANGING_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn 0:3ac96e360672 6716 pdev->tuning_parms.tp_dss_target_histo_mcps =
charlesmn 0:3ac96e360672 6717 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6718 break;
charlesmn 0:3ac96e360672 6719 case VL53L1_TUNINGPARM_MZ_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn 0:3ac96e360672 6720 pdev->tuning_parms.tp_dss_target_histo_mz_mcps =
charlesmn 0:3ac96e360672 6721 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6722 break;
charlesmn 0:3ac96e360672 6723 case VL53L1_TUNINGPARM_TIMED_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn 0:3ac96e360672 6724 pdev->tuning_parms.tp_dss_target_timed_mcps =
charlesmn 0:3ac96e360672 6725 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6726 break;
charlesmn 0:3ac96e360672 6727 case VL53L1_TUNINGPARM_LITE_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6728 pdev->tuning_parms.tp_phasecal_timeout_lite_us =
charlesmn 0:3ac96e360672 6729 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6730 break;
charlesmn 0:3ac96e360672 6731 case VL53L1_TUNINGPARM_RANGING_LONG_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6732 pdev->tuning_parms.tp_phasecal_timeout_hist_long_us =
charlesmn 0:3ac96e360672 6733 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6734 break;
charlesmn 0:3ac96e360672 6735 case VL53L1_TUNINGPARM_RANGING_MED_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6736 pdev->tuning_parms.tp_phasecal_timeout_hist_med_us =
charlesmn 0:3ac96e360672 6737 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6738 break;
charlesmn 0:3ac96e360672 6739 case VL53L1_TUNINGPARM_RANGING_SHORT_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6740 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us =
charlesmn 0:3ac96e360672 6741 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6742 break;
charlesmn 0:3ac96e360672 6743 case VL53L1_TUNINGPARM_MZ_LONG_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6744 pdev->tuning_parms.tp_phasecal_timeout_mz_long_us =
charlesmn 0:3ac96e360672 6745 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6746 break;
charlesmn 0:3ac96e360672 6747 case VL53L1_TUNINGPARM_MZ_MED_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6748 pdev->tuning_parms.tp_phasecal_timeout_mz_med_us =
charlesmn 0:3ac96e360672 6749 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6750 break;
charlesmn 0:3ac96e360672 6751 case VL53L1_TUNINGPARM_MZ_SHORT_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6752 pdev->tuning_parms.tp_phasecal_timeout_mz_short_us =
charlesmn 0:3ac96e360672 6753 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6754 break;
charlesmn 0:3ac96e360672 6755 case VL53L1_TUNINGPARM_TIMED_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6756 pdev->tuning_parms.tp_phasecal_timeout_timed_us =
charlesmn 0:3ac96e360672 6757 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6758 break;
charlesmn 0:3ac96e360672 6759 case VL53L1_TUNINGPARM_LITE_MM_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6760 pdev->tuning_parms.tp_mm_timeout_lite_us =
charlesmn 0:3ac96e360672 6761 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6762 break;
charlesmn 0:3ac96e360672 6763 case VL53L1_TUNINGPARM_RANGING_MM_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6764 pdev->tuning_parms.tp_mm_timeout_histo_us =
charlesmn 0:3ac96e360672 6765 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6766 break;
charlesmn 0:3ac96e360672 6767 case VL53L1_TUNINGPARM_MZ_MM_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6768 pdev->tuning_parms.tp_mm_timeout_mz_us =
charlesmn 0:3ac96e360672 6769 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6770 break;
charlesmn 0:3ac96e360672 6771 case VL53L1_TUNINGPARM_TIMED_MM_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6772 pdev->tuning_parms.tp_mm_timeout_timed_us =
charlesmn 0:3ac96e360672 6773 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6774 break;
charlesmn 0:3ac96e360672 6775 case VL53L1_TUNINGPARM_LITE_RANGE_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6776 pdev->tuning_parms.tp_range_timeout_lite_us =
charlesmn 0:3ac96e360672 6777 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6778 break;
charlesmn 0:3ac96e360672 6779 case VL53L1_TUNINGPARM_RANGING_RANGE_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6780 pdev->tuning_parms.tp_range_timeout_histo_us =
charlesmn 0:3ac96e360672 6781 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6782 break;
charlesmn 0:3ac96e360672 6783 case VL53L1_TUNINGPARM_MZ_RANGE_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6784 pdev->tuning_parms.tp_range_timeout_mz_us =
charlesmn 0:3ac96e360672 6785 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6786 break;
charlesmn 0:3ac96e360672 6787 case VL53L1_TUNINGPARM_TIMED_RANGE_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6788 pdev->tuning_parms.tp_range_timeout_timed_us =
charlesmn 0:3ac96e360672 6789 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6790 break;
charlesmn 0:3ac96e360672 6791 case VL53L1_TUNINGPARM_DYNXTALK_SMUDGE_MARGIN:
charlesmn 0:3ac96e360672 6792 pdev->smudge_correct_config.smudge_margin =
charlesmn 0:3ac96e360672 6793 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6794 break;
charlesmn 0:3ac96e360672 6795 case VL53L1_TUNINGPARM_DYNXTALK_NOISE_MARGIN:
charlesmn 0:3ac96e360672 6796 pdev->smudge_correct_config.noise_margin =
charlesmn 0:3ac96e360672 6797 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6798 break;
charlesmn 0:3ac96e360672 6799 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT:
charlesmn 0:3ac96e360672 6800 pdev->smudge_correct_config.user_xtalk_offset_limit =
charlesmn 0:3ac96e360672 6801 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6802 break;
charlesmn 0:3ac96e360672 6803 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT_HI:
charlesmn 0:3ac96e360672 6804 pdev->smudge_correct_config.user_xtalk_offset_limit_hi =
charlesmn 0:3ac96e360672 6805 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6806 break;
charlesmn 0:3ac96e360672 6807 case VL53L1_TUNINGPARM_DYNXTALK_SAMPLE_LIMIT:
charlesmn 0:3ac96e360672 6808 pdev->smudge_correct_config.sample_limit =
charlesmn 0:3ac96e360672 6809 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6810 break;
charlesmn 0:3ac96e360672 6811 case VL53L1_TUNINGPARM_DYNXTALK_SINGLE_XTALK_DELTA:
charlesmn 0:3ac96e360672 6812 pdev->smudge_correct_config.single_xtalk_delta =
charlesmn 0:3ac96e360672 6813 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6814 break;
charlesmn 0:3ac96e360672 6815 case VL53L1_TUNINGPARM_DYNXTALK_AVERAGED_XTALK_DELTA:
charlesmn 0:3ac96e360672 6816 pdev->smudge_correct_config.averaged_xtalk_delta =
charlesmn 0:3ac96e360672 6817 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6818 break;
charlesmn 0:3ac96e360672 6819 case VL53L1_TUNINGPARM_DYNXTALK_CLIP_LIMIT:
charlesmn 0:3ac96e360672 6820 pdev->smudge_correct_config.smudge_corr_clip_limit =
charlesmn 0:3ac96e360672 6821 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6822 break;
charlesmn 0:3ac96e360672 6823 case VL53L1_TUNINGPARM_DYNXTALK_SCALER_CALC_METHOD:
charlesmn 0:3ac96e360672 6824 pdev->smudge_correct_config.scaler_calc_method =
charlesmn 0:3ac96e360672 6825 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6826 break;
charlesmn 0:3ac96e360672 6827 case VL53L1_TUNINGPARM_DYNXTALK_XGRADIENT_SCALER:
charlesmn 0:3ac96e360672 6828 pdev->smudge_correct_config.x_gradient_scaler =
charlesmn 0:3ac96e360672 6829 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6830 break;
charlesmn 0:3ac96e360672 6831 case VL53L1_TUNINGPARM_DYNXTALK_YGRADIENT_SCALER:
charlesmn 0:3ac96e360672 6832 pdev->smudge_correct_config.y_gradient_scaler =
charlesmn 0:3ac96e360672 6833 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6834 break;
charlesmn 0:3ac96e360672 6835 case VL53L1_TUNINGPARM_DYNXTALK_USER_SCALER_SET:
charlesmn 0:3ac96e360672 6836 pdev->smudge_correct_config.user_scaler_set =
charlesmn 0:3ac96e360672 6837 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6838 break;
charlesmn 0:3ac96e360672 6839
charlesmn 0:3ac96e360672 6840 case VL53L1_TUNINGPARM_DYNXTALK_SMUDGE_COR_SINGLE_APPLY:
charlesmn 0:3ac96e360672 6841 pdev->smudge_correct_config.smudge_corr_single_apply =
charlesmn 0:3ac96e360672 6842 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6843 break;
charlesmn 0:3ac96e360672 6844 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_AMB_THRESHOLD:
charlesmn 0:3ac96e360672 6845 pdev->smudge_correct_config.smudge_corr_ambient_threshold =
charlesmn 0:3ac96e360672 6846 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6847 break;
charlesmn 0:3ac96e360672 6848 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_AMB_THRESHOLD_KCPS:
charlesmn 0:3ac96e360672 6849 pdev->smudge_correct_config.nodetect_ambient_threshold =
charlesmn 0:3ac96e360672 6850 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6851 break;
charlesmn 0:3ac96e360672 6852 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_SAMPLE_LIMIT:
charlesmn 0:3ac96e360672 6853 pdev->smudge_correct_config.nodetect_sample_limit =
charlesmn 0:3ac96e360672 6854 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6855 break;
charlesmn 0:3ac96e360672 6856 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_XTALK_OFFSET_KCPS:
charlesmn 0:3ac96e360672 6857 pdev->smudge_correct_config.nodetect_xtalk_offset =
charlesmn 0:3ac96e360672 6858 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6859 break;
charlesmn 0:3ac96e360672 6860 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_MIN_RANGE_MM:
charlesmn 0:3ac96e360672 6861 pdev->smudge_correct_config.nodetect_min_range_mm =
charlesmn 0:3ac96e360672 6862 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6863 break;
charlesmn 0:3ac96e360672 6864 case VL53L1_TUNINGPARM_LOWPOWERAUTO_VHV_LOOP_BOUND:
charlesmn 0:3ac96e360672 6865 pdev->low_power_auto_data.vhv_loop_bound =
charlesmn 0:3ac96e360672 6866 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6867 break;
charlesmn 0:3ac96e360672 6868 case VL53L1_TUNINGPARM_LOWPOWERAUTO_MM_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6869 pdev->tuning_parms.tp_mm_timeout_lpa_us =
charlesmn 0:3ac96e360672 6870 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6871 break;
charlesmn 0:3ac96e360672 6872 case VL53L1_TUNINGPARM_LOWPOWERAUTO_RANGE_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6873 pdev->tuning_parms.tp_range_timeout_lpa_us =
charlesmn 0:3ac96e360672 6874 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6875 break;
charlesmn 0:3ac96e360672 6876 case VL53L1_TUNINGPARM_VERY_SHORT_DSS_RATE_MCPS:
charlesmn 0:3ac96e360672 6877 pdev->tuning_parms.tp_dss_target_very_short_mcps =
charlesmn 0:3ac96e360672 6878 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6879 break;
charlesmn 0:3ac96e360672 6880 case VL53L1_TUNINGPARM_PHASECAL_PATCH_POWER:
charlesmn 0:3ac96e360672 6881 pdev->tuning_parms.tp_phasecal_patch_power =
charlesmn 0:3ac96e360672 6882 (uint16_t) tuning_parm_value;
charlesmn 0:3ac96e360672 6883 break;
charlesmn 0:3ac96e360672 6884 case VL53L1_TUNINGPARM_HIST_MERGE:
charlesmn 0:3ac96e360672 6885 pdev->tuning_parms.tp_hist_merge =
charlesmn 0:3ac96e360672 6886 (uint16_t) tuning_parm_value;
charlesmn 0:3ac96e360672 6887 break;
charlesmn 0:3ac96e360672 6888 case VL53L1_TUNINGPARM_RESET_MERGE_THRESHOLD:
charlesmn 0:3ac96e360672 6889 pdev->tuning_parms.tp_reset_merge_threshold =
charlesmn 0:3ac96e360672 6890 (uint16_t) tuning_parm_value;
charlesmn 0:3ac96e360672 6891 break;
charlesmn 0:3ac96e360672 6892 case VL53L1_TUNINGPARM_HIST_MERGE_MAX_SIZE:
charlesmn 0:3ac96e360672 6893 pdev->tuning_parms.tp_hist_merge_max_size =
charlesmn 0:3ac96e360672 6894 (uint16_t) tuning_parm_value;
charlesmn 0:3ac96e360672 6895 break;
charlesmn 0:3ac96e360672 6896 case VL53L1_TUNINGPARM_DYNXTALK_MAX_SMUDGE_FACTOR:
charlesmn 0:3ac96e360672 6897 pdev->smudge_correct_config.max_smudge_factor =
charlesmn 0:3ac96e360672 6898 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6899 break;
charlesmn 0:3ac96e360672 6900
charlesmn 0:3ac96e360672 6901 case VL53L1_TUNINGPARM_UWR_ENABLE:
charlesmn 0:3ac96e360672 6902 pdev->tuning_parms.tp_uwr_enable =
charlesmn 0:3ac96e360672 6903 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6904 break;
charlesmn 0:3ac96e360672 6905 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MIN:
charlesmn 0:3ac96e360672 6906 pdev->tuning_parms.tp_uwr_med_z_1_min =
charlesmn 0:3ac96e360672 6907 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6908 break;
charlesmn 0:3ac96e360672 6909 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MAX:
charlesmn 0:3ac96e360672 6910 pdev->tuning_parms.tp_uwr_med_z_1_max =
charlesmn 0:3ac96e360672 6911 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6912 break;
charlesmn 0:3ac96e360672 6913 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MIN:
charlesmn 0:3ac96e360672 6914 pdev->tuning_parms.tp_uwr_med_z_2_min =
charlesmn 0:3ac96e360672 6915 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6916 break;
charlesmn 0:3ac96e360672 6917 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MAX:
charlesmn 0:3ac96e360672 6918 pdev->tuning_parms.tp_uwr_med_z_2_max =
charlesmn 0:3ac96e360672 6919 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6920 break;
charlesmn 0:3ac96e360672 6921 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MIN:
charlesmn 0:3ac96e360672 6922 pdev->tuning_parms.tp_uwr_med_z_3_min =
charlesmn 0:3ac96e360672 6923 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6924 break;
charlesmn 0:3ac96e360672 6925 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MAX:
charlesmn 0:3ac96e360672 6926 pdev->tuning_parms.tp_uwr_med_z_3_max =
charlesmn 0:3ac96e360672 6927 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6928 break;
charlesmn 0:3ac96e360672 6929 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MIN:
charlesmn 0:3ac96e360672 6930 pdev->tuning_parms.tp_uwr_med_z_4_min =
charlesmn 0:3ac96e360672 6931 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6932 break;
charlesmn 0:3ac96e360672 6933 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MAX:
charlesmn 0:3ac96e360672 6934 pdev->tuning_parms.tp_uwr_med_z_4_max =
charlesmn 0:3ac96e360672 6935 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6936 break;
charlesmn 0:3ac96e360672 6937 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MIN:
charlesmn 0:3ac96e360672 6938 pdev->tuning_parms.tp_uwr_med_z_5_min =
charlesmn 0:3ac96e360672 6939 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6940 break;
charlesmn 0:3ac96e360672 6941 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MAX:
charlesmn 0:3ac96e360672 6942 pdev->tuning_parms.tp_uwr_med_z_5_max =
charlesmn 0:3ac96e360672 6943 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6944 break;
charlesmn 0:3ac96e360672 6945 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MIN:
charlesmn 0:3ac96e360672 6946 pdev->tuning_parms.tp_uwr_med_z_6_min =
charlesmn 0:3ac96e360672 6947 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6948 break;
charlesmn 0:3ac96e360672 6949 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MAX:
charlesmn 0:3ac96e360672 6950 pdev->tuning_parms.tp_uwr_med_z_6_max =
charlesmn 0:3ac96e360672 6951 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6952 break;
charlesmn 0:3ac96e360672 6953 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEA:
charlesmn 0:3ac96e360672 6954 pdev->tuning_parms.tp_uwr_med_corr_z_1_rangea =
charlesmn 0:3ac96e360672 6955 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6956 break;
charlesmn 0:3ac96e360672 6957 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEB:
charlesmn 0:3ac96e360672 6958 pdev->tuning_parms.tp_uwr_med_corr_z_1_rangeb =
charlesmn 0:3ac96e360672 6959 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6960 break;
charlesmn 0:3ac96e360672 6961 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEA:
charlesmn 0:3ac96e360672 6962 pdev->tuning_parms.tp_uwr_med_corr_z_2_rangea =
charlesmn 0:3ac96e360672 6963 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6964 break;
charlesmn 0:3ac96e360672 6965 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEB:
charlesmn 0:3ac96e360672 6966 pdev->tuning_parms.tp_uwr_med_corr_z_2_rangeb =
charlesmn 0:3ac96e360672 6967 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6968 break;
charlesmn 0:3ac96e360672 6969 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEA:
charlesmn 0:3ac96e360672 6970 pdev->tuning_parms.tp_uwr_med_corr_z_3_rangea =
charlesmn 0:3ac96e360672 6971 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6972 break;
charlesmn 0:3ac96e360672 6973 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEB:
charlesmn 0:3ac96e360672 6974 pdev->tuning_parms.tp_uwr_med_corr_z_3_rangeb =
charlesmn 0:3ac96e360672 6975 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6976 break;
charlesmn 0:3ac96e360672 6977 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEA:
charlesmn 0:3ac96e360672 6978 pdev->tuning_parms.tp_uwr_med_corr_z_4_rangea =
charlesmn 0:3ac96e360672 6979 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6980 break;
charlesmn 0:3ac96e360672 6981 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEB:
charlesmn 0:3ac96e360672 6982 pdev->tuning_parms.tp_uwr_med_corr_z_4_rangeb =
charlesmn 0:3ac96e360672 6983 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6984 break;
charlesmn 0:3ac96e360672 6985 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEA:
charlesmn 0:3ac96e360672 6986 pdev->tuning_parms.tp_uwr_med_corr_z_5_rangea =
charlesmn 0:3ac96e360672 6987 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6988 break;
charlesmn 0:3ac96e360672 6989 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEB:
charlesmn 0:3ac96e360672 6990 pdev->tuning_parms.tp_uwr_med_corr_z_5_rangeb =
charlesmn 0:3ac96e360672 6991 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6992 break;
charlesmn 0:3ac96e360672 6993 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEA:
charlesmn 0:3ac96e360672 6994 pdev->tuning_parms.tp_uwr_med_corr_z_6_rangea =
charlesmn 0:3ac96e360672 6995 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6996 break;
charlesmn 0:3ac96e360672 6997 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEB:
charlesmn 0:3ac96e360672 6998 pdev->tuning_parms.tp_uwr_med_corr_z_6_rangeb =
charlesmn 0:3ac96e360672 6999 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7000 break;
charlesmn 0:3ac96e360672 7001 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MIN:
charlesmn 0:3ac96e360672 7002 pdev->tuning_parms.tp_uwr_lng_z_1_min =
charlesmn 0:3ac96e360672 7003 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7004 break;
charlesmn 0:3ac96e360672 7005 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MAX:
charlesmn 0:3ac96e360672 7006 pdev->tuning_parms.tp_uwr_lng_z_1_max =
charlesmn 0:3ac96e360672 7007 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7008 break;
charlesmn 0:3ac96e360672 7009 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MIN:
charlesmn 0:3ac96e360672 7010 pdev->tuning_parms.tp_uwr_lng_z_2_min =
charlesmn 0:3ac96e360672 7011 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7012 break;
charlesmn 0:3ac96e360672 7013 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MAX:
charlesmn 0:3ac96e360672 7014 pdev->tuning_parms.tp_uwr_lng_z_2_max =
charlesmn 0:3ac96e360672 7015 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7016 break;
charlesmn 0:3ac96e360672 7017 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MIN:
charlesmn 0:3ac96e360672 7018 pdev->tuning_parms.tp_uwr_lng_z_3_min =
charlesmn 0:3ac96e360672 7019 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7020 break;
charlesmn 0:3ac96e360672 7021 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MAX:
charlesmn 0:3ac96e360672 7022 pdev->tuning_parms.tp_uwr_lng_z_3_max =
charlesmn 0:3ac96e360672 7023 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7024 break;
charlesmn 0:3ac96e360672 7025 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MIN:
charlesmn 0:3ac96e360672 7026 pdev->tuning_parms.tp_uwr_lng_z_4_min =
charlesmn 0:3ac96e360672 7027 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7028 break;
charlesmn 0:3ac96e360672 7029 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MAX:
charlesmn 0:3ac96e360672 7030 pdev->tuning_parms.tp_uwr_lng_z_4_max =
charlesmn 0:3ac96e360672 7031 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7032 break;
charlesmn 0:3ac96e360672 7033 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MIN:
charlesmn 0:3ac96e360672 7034 pdev->tuning_parms.tp_uwr_lng_z_5_min =
charlesmn 0:3ac96e360672 7035 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7036 break;
charlesmn 0:3ac96e360672 7037 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MAX:
charlesmn 0:3ac96e360672 7038 pdev->tuning_parms.tp_uwr_lng_z_5_max =
charlesmn 0:3ac96e360672 7039 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7040 break;
charlesmn 0:3ac96e360672 7041 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEA:
charlesmn 0:3ac96e360672 7042 pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangea =
charlesmn 0:3ac96e360672 7043 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7044 break;
charlesmn 0:3ac96e360672 7045 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEB:
charlesmn 0:3ac96e360672 7046 pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangeb =
charlesmn 0:3ac96e360672 7047 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7048 break;
charlesmn 0:3ac96e360672 7049 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEA:
charlesmn 0:3ac96e360672 7050 pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangea =
charlesmn 0:3ac96e360672 7051 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7052 break;
charlesmn 0:3ac96e360672 7053 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEB:
charlesmn 0:3ac96e360672 7054 pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangeb =
charlesmn 0:3ac96e360672 7055 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7056 break;
charlesmn 0:3ac96e360672 7057 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEA:
charlesmn 0:3ac96e360672 7058 pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangea =
charlesmn 0:3ac96e360672 7059 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7060 break;
charlesmn 0:3ac96e360672 7061 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEB:
charlesmn 0:3ac96e360672 7062 pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangeb =
charlesmn 0:3ac96e360672 7063 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7064 break;
charlesmn 0:3ac96e360672 7065 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEA:
charlesmn 0:3ac96e360672 7066 pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangea =
charlesmn 0:3ac96e360672 7067 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7068 break;
charlesmn 0:3ac96e360672 7069 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEB:
charlesmn 0:3ac96e360672 7070 pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangeb =
charlesmn 0:3ac96e360672 7071 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7072 break;
charlesmn 0:3ac96e360672 7073 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEA:
charlesmn 0:3ac96e360672 7074 pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangea =
charlesmn 0:3ac96e360672 7075 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7076 break;
charlesmn 0:3ac96e360672 7077 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEB:
charlesmn 0:3ac96e360672 7078 pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangeb =
charlesmn 0:3ac96e360672 7079 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7080 break;
lugandc 18:0696efe39d08 7081 case VL53L1_TUNINGPARM_MIN_SIGNAL_SECONDARY_TARGETS:
lugandc 18:0696efe39d08 7082 pdev->tuning_parms.tp_min_signal_secondary_targets =
lugandc 18:0696efe39d08 7083 (uint32_t)tuning_parm_value;
lugandc 18:0696efe39d08 7084 break;
charlesmn 0:3ac96e360672 7085
charlesmn 0:3ac96e360672 7086 default:
charlesmn 0:3ac96e360672 7087 status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn 0:3ac96e360672 7088 break;
charlesmn 0:3ac96e360672 7089
charlesmn 0:3ac96e360672 7090 }
charlesmn 0:3ac96e360672 7091
charlesmn 0:3ac96e360672 7092 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 7093
charlesmn 0:3ac96e360672 7094 return status;
charlesmn 0:3ac96e360672 7095 }
charlesmn 0:3ac96e360672 7096
charlesmn 0:3ac96e360672 7097
charlesmn 0:3ac96e360672 7098
charlesmn 0:3ac96e360672 7099
charlesmn 0:3ac96e360672 7100
charlesmn 0:3ac96e360672 7101 VL53L1_Error VL53L1_dynamic_xtalk_correction_enable(
charlesmn 0:3ac96e360672 7102 VL53L1_DEV Dev
charlesmn 0:3ac96e360672 7103 )
charlesmn 0:3ac96e360672 7104 {
charlesmn 0:3ac96e360672 7105
charlesmn 0:3ac96e360672 7106
charlesmn 0:3ac96e360672 7107
charlesmn 0:3ac96e360672 7108 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 7109
charlesmn 0:3ac96e360672 7110 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 7111
charlesmn 0:3ac96e360672 7112 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 7113
charlesmn 0:3ac96e360672 7114 pdev->smudge_correct_config.smudge_corr_enabled = 1;
charlesmn 0:3ac96e360672 7115
charlesmn 0:3ac96e360672 7116 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 7117
charlesmn 0:3ac96e360672 7118 return status;
charlesmn 0:3ac96e360672 7119 }
charlesmn 0:3ac96e360672 7120
charlesmn 0:3ac96e360672 7121 VL53L1_Error VL53L1_dynamic_xtalk_correction_disable(
charlesmn 0:3ac96e360672 7122 VL53L1_DEV Dev
charlesmn 0:3ac96e360672 7123 )
charlesmn 0:3ac96e360672 7124 {
charlesmn 0:3ac96e360672 7125
charlesmn 0:3ac96e360672 7126
charlesmn 0:3ac96e360672 7127
charlesmn 0:3ac96e360672 7128 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 7129
charlesmn 0:3ac96e360672 7130 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 7131
charlesmn 0:3ac96e360672 7132 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 7133
charlesmn 0:3ac96e360672 7134 pdev->smudge_correct_config.smudge_corr_enabled = 0;
charlesmn 0:3ac96e360672 7135
charlesmn 0:3ac96e360672 7136 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 7137
charlesmn 0:3ac96e360672 7138 return status;
charlesmn 0:3ac96e360672 7139 }
charlesmn 0:3ac96e360672 7140
charlesmn 0:3ac96e360672 7141 VL53L1_Error VL53L1_dynamic_xtalk_correction_apply_enable(
charlesmn 0:3ac96e360672 7142 VL53L1_DEV Dev
charlesmn 0:3ac96e360672 7143 )
charlesmn 0:3ac96e360672 7144 {
charlesmn 0:3ac96e360672 7145
charlesmn 0:3ac96e360672 7146
charlesmn 0:3ac96e360672 7147
charlesmn 0:3ac96e360672 7148 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 7149
charlesmn 0:3ac96e360672 7150 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 7151
charlesmn 0:3ac96e360672 7152 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 7153
charlesmn 0:3ac96e360672 7154 pdev->smudge_correct_config.smudge_corr_apply_enabled = 1;
charlesmn 0:3ac96e360672 7155
charlesmn 0:3ac96e360672 7156 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 7157
charlesmn 0:3ac96e360672 7158 return status;
charlesmn 0:3ac96e360672 7159 }
charlesmn 0:3ac96e360672 7160
charlesmn 0:3ac96e360672 7161 VL53L1_Error VL53L1_dynamic_xtalk_correction_apply_disable(
charlesmn 0:3ac96e360672 7162 VL53L1_DEV Dev
charlesmn 0:3ac96e360672 7163 )
charlesmn 0:3ac96e360672 7164 {
charlesmn 0:3ac96e360672 7165
charlesmn 0:3ac96e360672 7166
charlesmn 0:3ac96e360672 7167
charlesmn 0:3ac96e360672 7168 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 7169
charlesmn 0:3ac96e360672 7170 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 7171
charlesmn 0:3ac96e360672 7172 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 7173
charlesmn 0:3ac96e360672 7174 pdev->smudge_correct_config.smudge_corr_apply_enabled = 0;
charlesmn 0:3ac96e360672 7175
charlesmn 0:3ac96e360672 7176 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 7177
charlesmn 0:3ac96e360672 7178 return status;
charlesmn 0:3ac96e360672 7179 }
charlesmn 0:3ac96e360672 7180
charlesmn 0:3ac96e360672 7181 VL53L1_Error VL53L1_dynamic_xtalk_correction_single_apply_enable(
charlesmn 0:3ac96e360672 7182 VL53L1_DEV Dev
charlesmn 0:3ac96e360672 7183 )
charlesmn 0:3ac96e360672 7184 {
charlesmn 0:3ac96e360672 7185
charlesmn 0:3ac96e360672 7186
charlesmn 0:3ac96e360672 7187
charlesmn 0:3ac96e360672 7188 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 7189
charlesmn 0:3ac96e360672 7190 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 7191
charlesmn 0:3ac96e360672 7192 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 7193
charlesmn 0:3ac96e360672 7194 pdev->smudge_correct_config.smudge_corr_single_apply = 1;
charlesmn 0:3ac96e360672 7195
charlesmn 0:3ac96e360672 7196 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 7197
charlesmn 0:3ac96e360672 7198 return status;
charlesmn 0:3ac96e360672 7199 }
charlesmn 0:3ac96e360672 7200
charlesmn 0:3ac96e360672 7201 VL53L1_Error VL53L1_dynamic_xtalk_correction_single_apply_disable(
charlesmn 0:3ac96e360672 7202 VL53L1_DEV Dev
charlesmn 0:3ac96e360672 7203 )
charlesmn 0:3ac96e360672 7204 {
charlesmn 0:3ac96e360672 7205
charlesmn 0:3ac96e360672 7206
charlesmn 0:3ac96e360672 7207
charlesmn 0:3ac96e360672 7208 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 7209
charlesmn 0:3ac96e360672 7210 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 7211
charlesmn 0:3ac96e360672 7212 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 7213
charlesmn 0:3ac96e360672 7214 pdev->smudge_correct_config.smudge_corr_single_apply = 0;
charlesmn 0:3ac96e360672 7215
charlesmn 0:3ac96e360672 7216 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 7217
charlesmn 0:3ac96e360672 7218 return status;
charlesmn 0:3ac96e360672 7219 }
charlesmn 0:3ac96e360672 7220
charlesmn 0:3ac96e360672 7221
charlesmn 0:3ac96e360672 7222 VL53L1_Error VL53L1_dynamic_xtalk_correction_set_scalers(
charlesmn 0:3ac96e360672 7223 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 7224 int16_t x_scaler_in,
charlesmn 0:3ac96e360672 7225 int16_t y_scaler_in,
charlesmn 0:3ac96e360672 7226 uint8_t user_scaler_set_in
charlesmn 0:3ac96e360672 7227 )
charlesmn 0:3ac96e360672 7228 {
charlesmn 0:3ac96e360672 7229
charlesmn 0:3ac96e360672 7230
charlesmn 0:3ac96e360672 7231
charlesmn 0:3ac96e360672 7232 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 7233
charlesmn 0:3ac96e360672 7234 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 7235
charlesmn 0:3ac96e360672 7236 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 7237
charlesmn 0:3ac96e360672 7238 pdev->smudge_correct_config.x_gradient_scaler = x_scaler_in;
charlesmn 0:3ac96e360672 7239 pdev->smudge_correct_config.y_gradient_scaler = y_scaler_in;
charlesmn 0:3ac96e360672 7240 pdev->smudge_correct_config.user_scaler_set = user_scaler_set_in;
charlesmn 0:3ac96e360672 7241
charlesmn 0:3ac96e360672 7242 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 7243
charlesmn 0:3ac96e360672 7244 return status;
charlesmn 0:3ac96e360672 7245 }
charlesmn 0:3ac96e360672 7246
charlesmn 0:3ac96e360672 7247
charlesmn 0:3ac96e360672 7248
charlesmn 0:3ac96e360672 7249
charlesmn 0:3ac96e360672 7250
charlesmn 0:3ac96e360672 7251
charlesmn 0:3ac96e360672 7252 VL53L1_Error VL53L1_get_current_xtalk_settings(
charlesmn 0:3ac96e360672 7253 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 7254 VL53L1_xtalk_calibration_results_t *pxtalk
charlesmn 0:3ac96e360672 7255 )
charlesmn 0:3ac96e360672 7256 {
charlesmn 0:3ac96e360672 7257
charlesmn 0:3ac96e360672 7258
charlesmn 0:3ac96e360672 7259 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 7260 uint8_t i;
charlesmn 0:3ac96e360672 7261
charlesmn 0:3ac96e360672 7262 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 7263
charlesmn 0:3ac96e360672 7264 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 7265
charlesmn 0:3ac96e360672 7266 pxtalk->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 7267 pdev->xtalk_cfg.algo__crosstalk_compensation_plane_offset_kcps;
charlesmn 0:3ac96e360672 7268 pxtalk->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 7269 pdev->xtalk_cfg.algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 7270 pxtalk->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 7271 pdev->xtalk_cfg.algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 7272 for (i = 0; i < VL53L1_BIN_REC_SIZE; i++)
charlesmn 0:3ac96e360672 7273 pxtalk->algo__xtalk_cpo_HistoMerge_kcps[i] =
charlesmn 0:3ac96e360672 7274 pdev->xtalk_cal.algo__xtalk_cpo_HistoMerge_kcps[i];
charlesmn 0:3ac96e360672 7275
charlesmn 0:3ac96e360672 7276 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 7277
charlesmn 0:3ac96e360672 7278 return status;
charlesmn 0:3ac96e360672 7279
charlesmn 0:3ac96e360672 7280 }
charlesmn 0:3ac96e360672 7281
charlesmn 0:3ac96e360672 7282
charlesmn 0:3ac96e360672 7283
charlesmn 0:3ac96e360672 7284
charlesmn 0:3ac96e360672 7285
charlesmn 0:3ac96e360672 7286 VL53L1_Error VL53L1_set_current_xtalk_settings(
charlesmn 0:3ac96e360672 7287 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 7288 VL53L1_xtalk_calibration_results_t *pxtalk
charlesmn 0:3ac96e360672 7289 )
charlesmn 0:3ac96e360672 7290 {
charlesmn 0:3ac96e360672 7291
charlesmn 0:3ac96e360672 7292
charlesmn 0:3ac96e360672 7293 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 7294 uint8_t i;
charlesmn 0:3ac96e360672 7295
charlesmn 0:3ac96e360672 7296 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 7297
charlesmn 0:3ac96e360672 7298 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 7299
charlesmn 0:3ac96e360672 7300 pdev->xtalk_cfg.algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 7301 pxtalk->algo__crosstalk_compensation_plane_offset_kcps;
charlesmn 0:3ac96e360672 7302 pdev->xtalk_cfg.algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 7303 pxtalk->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 7304 pdev->xtalk_cfg.algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 7305 pxtalk->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 7306 for (i = 0; i < VL53L1_BIN_REC_SIZE; i++)
charlesmn 0:3ac96e360672 7307 pdev->xtalk_cal.algo__xtalk_cpo_HistoMerge_kcps[i] =
charlesmn 0:3ac96e360672 7308 pxtalk->algo__xtalk_cpo_HistoMerge_kcps[i];
charlesmn 0:3ac96e360672 7309
charlesmn 0:3ac96e360672 7310 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 7311
charlesmn 0:3ac96e360672 7312 return status;
charlesmn 0:3ac96e360672 7313
charlesmn 0:3ac96e360672 7314 }
charlesmn 0:3ac96e360672 7315
charlesmn 0:3ac96e360672 7316
charlesmn 0:3ac96e360672 7317