ST Expansion SW Team / VL53L1CB

The VL53L1CB proximity sensor, based on ST’s FlightSense™, Time-of-Flight technology.

Dependencies:   X_NUCLEO_COMMON ST_INTERFACES

Dependents:   VL53L1CB_noshield_1sensor_polls_auton VL53L1CB_noshield_1sensor_interrupt_auton X_NUCLEO_53L1A2

Based on VL53L1 library, this is a library for the VL53L1CB ToF chip.

src/vl53l1_api_core.c@7:1add29d51e72, 2021-06-08 (annotated)

Committer:
Charles MacNeill
Date:
Tue Jun 08 10:34:47 2021 +0100
Revision:
7:1add29d51e72
Parent:
0:3ac96e360672
Child:
18:0696efe39d08
Update to v6.6.5 of bare_driver

Who changed what in which revision?

UserRevisionLine numberNew contents of line
charlesmn 0:3ac96e360672 1
Charles MacNeill 7:1add29d51e72 2 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Charles MacNeill 7:1add29d51e72 3 /******************************************************************************
charlesmn 0:3ac96e360672 4 * Copyright (c) 2020, STMicroelectronics - All Rights Reserved
charlesmn 0:3ac96e360672 5
Charles MacNeill 7:1add29d51e72 6 This file is part of VL53L1 and is dual licensed,
Charles MacNeill 7:1add29d51e72 7 either GPL-2.0+
charlesmn 0:3ac96e360672 8 or 'BSD 3-clause "New" or "Revised" License' , at your option.
Charles MacNeill 7:1add29d51e72 9 ******************************************************************************
Charles MacNeill 7:1add29d51e72 10 */
charlesmn 0:3ac96e360672 11
charlesmn 0:3ac96e360672 12
charlesmn 0:3ac96e360672 13
charlesmn 0:3ac96e360672 14
charlesmn 0:3ac96e360672 15
charlesmn 0:3ac96e360672 16 #include "vl53l1_ll_def.h"
charlesmn 0:3ac96e360672 17 #include "vl53l1_ll_device.h"
charlesmn 0:3ac96e360672 18 #include "vl53l1_platform.h"
charlesmn 0:3ac96e360672 19 #include "vl53l1_platform_ipp.h"
charlesmn 0:3ac96e360672 20 #include "vl53l1_register_map.h"
charlesmn 0:3ac96e360672 21 #include "vl53l1_register_settings.h"
charlesmn 0:3ac96e360672 22 #include "vl53l1_register_funcs.h"
charlesmn 0:3ac96e360672 23 #include "vl53l1_hist_map.h"
charlesmn 0:3ac96e360672 24 #include "vl53l1_hist_structs.h"
charlesmn 0:3ac96e360672 25 #include "vl53l1_nvm_map.h"
charlesmn 0:3ac96e360672 26 #include "vl53l1_nvm_structs.h"
charlesmn 0:3ac96e360672 27 #include "vl53l1_nvm.h"
charlesmn 0:3ac96e360672 28 #include "vl53l1_core.h"
charlesmn 0:3ac96e360672 29 #include "vl53l1_wait.h"
charlesmn 0:3ac96e360672 30 #include "vl53l1_zone_presets.h"
charlesmn 0:3ac96e360672 31 #include "vl53l1_api_preset_modes.h"
charlesmn 0:3ac96e360672 32 #include "vl53l1_silicon_core.h"
charlesmn 0:3ac96e360672 33 #include "vl53l1_api_core.h"
charlesmn 0:3ac96e360672 34 #include "vl53l1_tuning_parm_defaults.h"
charlesmn 0:3ac96e360672 35
charlesmn 0:3ac96e360672 36 #ifdef VL53L1_LOG_ENABLE
charlesmn 0:3ac96e360672 37 #include "vl53l1_api_debug.h"
charlesmn 0:3ac96e360672 38 #endif
charlesmn 0:3ac96e360672 39
charlesmn 0:3ac96e360672 40 #define LOG_FUNCTION_START(fmt, ...) \
charlesmn 0:3ac96e360672 41 _LOG_FUNCTION_START(VL53L1_TRACE_MODULE_CORE, fmt, ##__VA_ARGS__)
charlesmn 0:3ac96e360672 42 #define LOG_FUNCTION_END(status, ...) \
charlesmn 0:3ac96e360672 43 _LOG_FUNCTION_END(VL53L1_TRACE_MODULE_CORE, status, ##__VA_ARGS__)
charlesmn 0:3ac96e360672 44 #define LOG_FUNCTION_END_FMT(status, fmt, ...) \
charlesmn 0:3ac96e360672 45 _LOG_FUNCTION_END_FMT(VL53L1_TRACE_MODULE_CORE, status, \
charlesmn 0:3ac96e360672 46 fmt, ##__VA_ARGS__)
charlesmn 0:3ac96e360672 47
charlesmn 0:3ac96e360672 48 #define trace_print(level, ...) \
charlesmn 0:3ac96e360672 49 _LOG_TRACE_PRINT(VL53L1_TRACE_MODULE_CORE, \
charlesmn 0:3ac96e360672 50 level, VL53L1_TRACE_FUNCTION_NONE, ##__VA_ARGS__)
charlesmn 0:3ac96e360672 51
charlesmn 0:3ac96e360672 52 #define VL53L1_MAX_I2C_XFER_SIZE 256
charlesmn 0:3ac96e360672 53
charlesmn 0:3ac96e360672 54 static VL53L1_Error select_offset_per_vcsel(VL53L1_LLDriverData_t *pdev,
charlesmn 0:3ac96e360672 55 int16_t *poffset) {
charlesmn 0:3ac96e360672 56 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 57 int16_t tA, tB;
charlesmn 0:3ac96e360672 58 uint8_t isc;
charlesmn 0:3ac96e360672 59
charlesmn 0:3ac96e360672 60 switch (pdev->preset_mode) {
charlesmn 0:3ac96e360672 61 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE:
charlesmn 0:3ac96e360672 62 tA = pdev->per_vcsel_cal_data.short_a_offset_mm;
charlesmn 0:3ac96e360672 63 tB = pdev->per_vcsel_cal_data.short_b_offset_mm;
charlesmn 0:3ac96e360672 64 break;
charlesmn 0:3ac96e360672 65 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE:
charlesmn 0:3ac96e360672 66 tA = pdev->per_vcsel_cal_data.medium_a_offset_mm;
charlesmn 0:3ac96e360672 67 tB = pdev->per_vcsel_cal_data.medium_b_offset_mm;
charlesmn 0:3ac96e360672 68 break;
charlesmn 0:3ac96e360672 69 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE:
charlesmn 0:3ac96e360672 70 tA = pdev->per_vcsel_cal_data.long_a_offset_mm;
charlesmn 0:3ac96e360672 71 tB = pdev->per_vcsel_cal_data.long_b_offset_mm;
charlesmn 0:3ac96e360672 72 break;
charlesmn 0:3ac96e360672 73 default:
charlesmn 0:3ac96e360672 74 status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn 0:3ac96e360672 75 *poffset = 0;
charlesmn 0:3ac96e360672 76 break;
charlesmn 0:3ac96e360672 77 }
charlesmn 0:3ac96e360672 78
charlesmn 0:3ac96e360672 79 isc = pdev->ll_state.cfg_internal_stream_count;
charlesmn 0:3ac96e360672 80 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 81 *poffset = (isc & 0x01) ? tA : tB;
charlesmn 0:3ac96e360672 82
charlesmn 0:3ac96e360672 83 return status;
charlesmn 0:3ac96e360672 84 }
charlesmn 0:3ac96e360672 85
charlesmn 0:3ac96e360672 86 static void vl53l1_diff_histo_stddev(VL53L1_LLDriverData_t *pdev,
charlesmn 0:3ac96e360672 87 VL53L1_histogram_bin_data_t *pdata, uint8_t timing, uint8_t HighIndex,
charlesmn 0:3ac96e360672 88 uint8_t prev_pos, int32_t *pdiff_histo_stddev) {
charlesmn 0:3ac96e360672 89 uint16_t bin = 0;
charlesmn 0:3ac96e360672 90 int32_t total_rate_pre = 0;
charlesmn 0:3ac96e360672 91 int32_t total_rate_cur = 0;
charlesmn 0:3ac96e360672 92 int32_t PrevBin, CurrBin;
charlesmn 0:3ac96e360672 93
charlesmn 0:3ac96e360672 94 total_rate_pre = 0;
charlesmn 0:3ac96e360672 95 total_rate_cur = 0;
charlesmn 0:3ac96e360672 96
charlesmn 0:3ac96e360672 97
charlesmn 0:3ac96e360672 98 for (bin = timing * 4; bin < HighIndex; bin++) {
charlesmn 0:3ac96e360672 99 total_rate_pre +=
charlesmn 0:3ac96e360672 100 pdev->multi_bins_rec[prev_pos][timing][bin];
charlesmn 0:3ac96e360672 101 total_rate_cur += pdata->bin_data[bin];
charlesmn 0:3ac96e360672 102 }
charlesmn 0:3ac96e360672 103
charlesmn 0:3ac96e360672 104 if ((total_rate_pre != 0) && (total_rate_cur != 0))
charlesmn 0:3ac96e360672 105 for (bin = timing * 4; bin < HighIndex; bin++) {
charlesmn 0:3ac96e360672 106 PrevBin = pdev->multi_bins_rec[prev_pos][timing][bin];
charlesmn 0:3ac96e360672 107 PrevBin = (PrevBin * 1000) / total_rate_pre;
charlesmn 0:3ac96e360672 108 CurrBin = pdata->bin_data[bin] * 1000 / total_rate_cur;
charlesmn 0:3ac96e360672 109 *pdiff_histo_stddev += (PrevBin - CurrBin) *
charlesmn 0:3ac96e360672 110 (PrevBin - CurrBin);
charlesmn 0:3ac96e360672 111 }
charlesmn 0:3ac96e360672 112 }
charlesmn 0:3ac96e360672 113
charlesmn 0:3ac96e360672 114 static void vl53l1_histo_merge(VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 115 VL53L1_histogram_bin_data_t *pdata) {
charlesmn 0:3ac96e360672 116 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 117 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 118 uint16_t bin = 0;
charlesmn 0:3ac96e360672 119 uint8_t i = 0;
charlesmn 0:3ac96e360672 120 int32_t TuningBinRecSize = 0;
charlesmn 0:3ac96e360672 121 uint8_t recom_been_reset = 0;
charlesmn 0:3ac96e360672 122 uint8_t timing = 0;
charlesmn 0:3ac96e360672 123 int32_t rmt = 0;
charlesmn 0:3ac96e360672 124 int32_t diff_histo_stddev = 0;
charlesmn 0:3ac96e360672 125 uint8_t HighIndex, prev_pos;
charlesmn 0:3ac96e360672 126 uint8_t BuffSize = VL53L1_HISTOGRAM_BUFFER_SIZE;
charlesmn 0:3ac96e360672 127 uint8_t pos;
charlesmn 0:3ac96e360672 128
charlesmn 0:3ac96e360672 129 VL53L1_get_tuning_parm(Dev, VL53L1_TUNINGPARM_HIST_MERGE_MAX_SIZE,
charlesmn 0:3ac96e360672 130 &TuningBinRecSize);
charlesmn 0:3ac96e360672 131
charlesmn 0:3ac96e360672 132 VL53L1_get_tuning_parm(Dev, VL53L1_TUNINGPARM_RESET_MERGE_THRESHOLD,
charlesmn 0:3ac96e360672 133 &rmt);
charlesmn 0:3ac96e360672 134
charlesmn 0:3ac96e360672 135
charlesmn 0:3ac96e360672 136 if (pdev->pos_before_next_recom == 0) {
charlesmn 0:3ac96e360672 137
charlesmn 0:3ac96e360672 138 timing = 1 - pdata->result__stream_count % 2;
charlesmn 0:3ac96e360672 139
charlesmn 0:3ac96e360672 140 diff_histo_stddev = 0;
charlesmn 0:3ac96e360672 141 HighIndex = BuffSize - timing * 4;
charlesmn 0:3ac96e360672 142 if (pdev->bin_rec_pos > 0)
charlesmn 0:3ac96e360672 143 prev_pos = pdev->bin_rec_pos - 1;
charlesmn 0:3ac96e360672 144 else
charlesmn 0:3ac96e360672 145 prev_pos = (TuningBinRecSize - 1);
charlesmn 0:3ac96e360672 146
charlesmn 0:3ac96e360672 147 if (pdev->multi_bins_rec[prev_pos][timing][4] > 0)
charlesmn 0:3ac96e360672 148 vl53l1_diff_histo_stddev(pdev, pdata,
charlesmn 0:3ac96e360672 149 timing, HighIndex, prev_pos,
charlesmn 0:3ac96e360672 150 &diff_histo_stddev);
charlesmn 0:3ac96e360672 151
charlesmn 0:3ac96e360672 152 if (diff_histo_stddev >= rmt) {
charlesmn 0:3ac96e360672 153 memset(pdev->multi_bins_rec, 0,
charlesmn 0:3ac96e360672 154 sizeof(pdev->multi_bins_rec));
charlesmn 0:3ac96e360672 155 pdev->bin_rec_pos = 0;
charlesmn 0:3ac96e360672 156
charlesmn 0:3ac96e360672 157 recom_been_reset = 1;
charlesmn 0:3ac96e360672 158
charlesmn 0:3ac96e360672 159 if (timing == 0)
charlesmn 0:3ac96e360672 160 pdev->pos_before_next_recom =
charlesmn 0:3ac96e360672 161 VL53L1_FRAME_WAIT_EVENT;
charlesmn 0:3ac96e360672 162 else
charlesmn 0:3ac96e360672 163 pdev->pos_before_next_recom =
charlesmn 0:3ac96e360672 164 VL53L1_FRAME_WAIT_EVENT + 1;
charlesmn 0:3ac96e360672 165 } else {
charlesmn 0:3ac96e360672 166
charlesmn 0:3ac96e360672 167 pos = pdev->bin_rec_pos;
charlesmn 0:3ac96e360672 168 for (i = 0; i < BuffSize; i++)
charlesmn 0:3ac96e360672 169 pdev->multi_bins_rec[pos][timing][i] =
charlesmn 0:3ac96e360672 170 pdata->bin_data[i];
charlesmn 0:3ac96e360672 171 }
charlesmn 0:3ac96e360672 172
charlesmn 0:3ac96e360672 173 if (pdev->bin_rec_pos == (TuningBinRecSize - 1) && timing == 1)
charlesmn 0:3ac96e360672 174 pdev->bin_rec_pos = 0;
charlesmn 0:3ac96e360672 175 else if (timing == 1)
charlesmn 0:3ac96e360672 176 pdev->bin_rec_pos++;
charlesmn 0:3ac96e360672 177
charlesmn 0:3ac96e360672 178 if (!((recom_been_reset == 1) && (timing == 0)) &&
charlesmn 0:3ac96e360672 179 (pdev->pos_before_next_recom == 0)) {
charlesmn 0:3ac96e360672 180
charlesmn 0:3ac96e360672 181 for (bin = 0; bin < BuffSize; bin++)
charlesmn 0:3ac96e360672 182 pdata->bin_data[bin] = 0;
charlesmn 0:3ac96e360672 183
charlesmn 0:3ac96e360672 184 for (bin = 0; bin < BuffSize; bin++)
charlesmn 0:3ac96e360672 185 for (i = 0; i < TuningBinRecSize; i++)
charlesmn 0:3ac96e360672 186 pdata->bin_data[bin] +=
charlesmn 0:3ac96e360672 187 (pdev->multi_bins_rec[i][timing][bin]);
charlesmn 0:3ac96e360672 188 }
charlesmn 0:3ac96e360672 189 } else {
charlesmn 0:3ac96e360672 190
charlesmn 0:3ac96e360672 191 pdev->pos_before_next_recom--;
charlesmn 0:3ac96e360672 192 if (pdev->pos_before_next_recom == 255)
charlesmn 0:3ac96e360672 193 pdev->pos_before_next_recom = 0;
charlesmn 0:3ac96e360672 194 }
charlesmn 0:3ac96e360672 195 }
charlesmn 0:3ac96e360672 196
charlesmn 0:3ac96e360672 197 VL53L1_Error VL53L1_load_patch(
charlesmn 0:3ac96e360672 198 VL53L1_DEV Dev) {
charlesmn 0:3ac96e360672 199 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 200 int32_t patch_tuning = 0;
charlesmn 0:3ac96e360672 201 uint8_t comms_buffer[256];
charlesmn 0:3ac96e360672 202 uint32_t patch_power;
charlesmn 0:3ac96e360672 203
charlesmn 0:3ac96e360672 204 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 205
charlesmn 0:3ac96e360672 206 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 207 status = VL53L1_WrByte(Dev,
charlesmn 0:3ac96e360672 208 VL53L1_FIRMWARE__ENABLE, 0x00);
charlesmn 0:3ac96e360672 209
charlesmn 0:3ac96e360672 210 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 211 VL53L1_enable_powerforce(Dev);
charlesmn 0:3ac96e360672 212
charlesmn 0:3ac96e360672 213 VL53L1_get_tuning_parm(Dev, VL53L1_TUNINGPARM_PHASECAL_PATCH_POWER,
charlesmn 0:3ac96e360672 214 &patch_tuning);
charlesmn 0:3ac96e360672 215
charlesmn 0:3ac96e360672 216 switch (patch_tuning) {
charlesmn 0:3ac96e360672 217 case 0:
charlesmn 0:3ac96e360672 218 patch_power = 0x00;
charlesmn 0:3ac96e360672 219 break;
charlesmn 0:3ac96e360672 220 case 1:
charlesmn 0:3ac96e360672 221 patch_power = 0x10;
charlesmn 0:3ac96e360672 222 break;
charlesmn 0:3ac96e360672 223 case 2:
charlesmn 0:3ac96e360672 224 patch_power = 0x20;
charlesmn 0:3ac96e360672 225 break;
charlesmn 0:3ac96e360672 226 case 3:
charlesmn 0:3ac96e360672 227 patch_power = 0x40;
charlesmn 0:3ac96e360672 228 break;
charlesmn 0:3ac96e360672 229 default:
charlesmn 0:3ac96e360672 230 patch_power = 0x00;
charlesmn 0:3ac96e360672 231 }
charlesmn 0:3ac96e360672 232
charlesmn 0:3ac96e360672 233 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 234
charlesmn 0:3ac96e360672 235 comms_buffer[0] = 0x29;
charlesmn 0:3ac96e360672 236 comms_buffer[1] = 0xC9;
charlesmn 0:3ac96e360672 237 comms_buffer[2] = 0x0E;
charlesmn 0:3ac96e360672 238 comms_buffer[3] = 0x40;
charlesmn 0:3ac96e360672 239 comms_buffer[4] = 0x28;
charlesmn 0:3ac96e360672 240 comms_buffer[5] = patch_power;
charlesmn 0:3ac96e360672 241
charlesmn 0:3ac96e360672 242 status = VL53L1_WriteMulti(Dev,
charlesmn 0:3ac96e360672 243 VL53L1_PATCH__OFFSET_0, comms_buffer, 6);
charlesmn 0:3ac96e360672 244 }
charlesmn 0:3ac96e360672 245
charlesmn 0:3ac96e360672 246 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 247 comms_buffer[0] = 0x03;
charlesmn 0:3ac96e360672 248 comms_buffer[1] = 0x6D;
charlesmn 0:3ac96e360672 249 comms_buffer[2] = 0x03;
charlesmn 0:3ac96e360672 250 comms_buffer[3] = 0x6F;
charlesmn 0:3ac96e360672 251 comms_buffer[4] = 0x07;
charlesmn 0:3ac96e360672 252 comms_buffer[5] = 0x29;
charlesmn 0:3ac96e360672 253 status = VL53L1_WriteMulti(Dev,
charlesmn 0:3ac96e360672 254 VL53L1_PATCH__ADDRESS_0, comms_buffer, 6);
charlesmn 0:3ac96e360672 255 }
charlesmn 0:3ac96e360672 256
charlesmn 0:3ac96e360672 257 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 258 comms_buffer[0] = 0x00;
charlesmn 0:3ac96e360672 259 comms_buffer[1] = 0x07;
charlesmn 0:3ac96e360672 260 status = VL53L1_WriteMulti(Dev,
charlesmn 0:3ac96e360672 261 VL53L1_PATCH__JMP_ENABLES, comms_buffer, 2);
charlesmn 0:3ac96e360672 262 }
charlesmn 0:3ac96e360672 263
charlesmn 0:3ac96e360672 264 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 265 comms_buffer[0] = 0x00;
charlesmn 0:3ac96e360672 266 comms_buffer[1] = 0x07;
charlesmn 0:3ac96e360672 267 status = VL53L1_WriteMulti(Dev,
charlesmn 0:3ac96e360672 268 VL53L1_PATCH__DATA_ENABLES, comms_buffer, 2);
charlesmn 0:3ac96e360672 269 }
charlesmn 0:3ac96e360672 270
charlesmn 0:3ac96e360672 271 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 272 status = VL53L1_WrByte(Dev,
charlesmn 0:3ac96e360672 273 VL53L1_PATCH__CTRL, 0x01);
charlesmn 0:3ac96e360672 274
charlesmn 0:3ac96e360672 275 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 276 status = VL53L1_WrByte(Dev,
charlesmn 0:3ac96e360672 277 VL53L1_FIRMWARE__ENABLE, 0x01);
charlesmn 0:3ac96e360672 278
charlesmn 0:3ac96e360672 279 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 280
charlesmn 0:3ac96e360672 281 return status;
charlesmn 0:3ac96e360672 282 }
charlesmn 0:3ac96e360672 283
charlesmn 0:3ac96e360672 284 VL53L1_Error VL53L1_unload_patch(
charlesmn 0:3ac96e360672 285 VL53L1_DEV Dev) {
charlesmn 0:3ac96e360672 286 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 287
charlesmn 0:3ac96e360672 288 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 289 status = VL53L1_WrByte(Dev,
charlesmn 0:3ac96e360672 290 VL53L1_FIRMWARE__ENABLE, 0x00);
charlesmn 0:3ac96e360672 291
charlesmn 0:3ac96e360672 292 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 293 VL53L1_disable_powerforce(Dev);
charlesmn 0:3ac96e360672 294
charlesmn 0:3ac96e360672 295 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 296 status = VL53L1_WrByte(Dev,
charlesmn 0:3ac96e360672 297 VL53L1_PATCH__CTRL, 0x00);
charlesmn 0:3ac96e360672 298
charlesmn 0:3ac96e360672 299 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 300 status = VL53L1_WrByte(Dev,
charlesmn 0:3ac96e360672 301 VL53L1_FIRMWARE__ENABLE, 0x01);
charlesmn 0:3ac96e360672 302
charlesmn 0:3ac96e360672 303 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 304
charlesmn 0:3ac96e360672 305 return status;
charlesmn 0:3ac96e360672 306 }
charlesmn 0:3ac96e360672 307
charlesmn 0:3ac96e360672 308 VL53L1_Error VL53L1_get_version(
charlesmn 0:3ac96e360672 309 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 310 VL53L1_ll_version_t *pdata)
charlesmn 0:3ac96e360672 311 {
charlesmn 0:3ac96e360672 312
charlesmn 0:3ac96e360672 313
charlesmn 0:3ac96e360672 314 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 315
charlesmn 0:3ac96e360672 316 VL53L1_init_version(Dev);
charlesmn 0:3ac96e360672 317
charlesmn 0:3ac96e360672 318 memcpy(pdata, &(pdev->version), sizeof(VL53L1_ll_version_t));
charlesmn 0:3ac96e360672 319
charlesmn 0:3ac96e360672 320 return VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 321 }
charlesmn 0:3ac96e360672 322
charlesmn 0:3ac96e360672 323
charlesmn 0:3ac96e360672 324 VL53L1_Error VL53L1_get_device_firmware_version(
charlesmn 0:3ac96e360672 325 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 326 uint16_t *pfw_version)
charlesmn 0:3ac96e360672 327 {
charlesmn 0:3ac96e360672 328
charlesmn 0:3ac96e360672 329
charlesmn 0:3ac96e360672 330 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 331
charlesmn 0:3ac96e360672 332 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 333
charlesmn 0:3ac96e360672 334 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 335 status = VL53L1_disable_firmware(Dev);
charlesmn 0:3ac96e360672 336
charlesmn 0:3ac96e360672 337 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 338 status = VL53L1_RdWord(
charlesmn 0:3ac96e360672 339 Dev,
charlesmn 0:3ac96e360672 340 VL53L1_MCU_GENERAL_PURPOSE__GP_0,
charlesmn 0:3ac96e360672 341 pfw_version);
charlesmn 0:3ac96e360672 342
charlesmn 0:3ac96e360672 343 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 344 status = VL53L1_enable_firmware(Dev);
charlesmn 0:3ac96e360672 345
charlesmn 0:3ac96e360672 346 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 347
charlesmn 0:3ac96e360672 348 return status;
charlesmn 0:3ac96e360672 349 }
charlesmn 0:3ac96e360672 350
charlesmn 0:3ac96e360672 351
charlesmn 0:3ac96e360672 352 VL53L1_Error VL53L1_data_init(
charlesmn 0:3ac96e360672 353 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 354 uint8_t read_p2p_data)
charlesmn 0:3ac96e360672 355 {
charlesmn 0:3ac96e360672 356
charlesmn 0:3ac96e360672 357
charlesmn 0:3ac96e360672 358 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 359 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 360 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 361 VL53L1_LLDriverResults_t *pres =
charlesmn 0:3ac96e360672 362 VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn 0:3ac96e360672 363
charlesmn 0:3ac96e360672 364
charlesmn 0:3ac96e360672 365
charlesmn 0:3ac96e360672 366 VL53L1_zone_objects_t *pobjects;
charlesmn 0:3ac96e360672 367
charlesmn 0:3ac96e360672 368 uint8_t i = 0;
charlesmn 0:3ac96e360672 369
charlesmn 0:3ac96e360672 370 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 371
charlesmn 0:3ac96e360672 372 VL53L1_init_ll_driver_state(
charlesmn 0:3ac96e360672 373 Dev,
charlesmn 0:3ac96e360672 374 VL53L1_DEVICESTATE_UNKNOWN);
charlesmn 0:3ac96e360672 375
charlesmn 0:3ac96e360672 376 pres->range_results.max_results = VL53L1_MAX_RANGE_RESULTS;
charlesmn 0:3ac96e360672 377 pres->range_results.active_results = 0;
charlesmn 0:3ac96e360672 378 pres->zone_results.max_zones = VL53L1_MAX_USER_ZONES;
charlesmn 0:3ac96e360672 379 pres->zone_results.active_zones = 0;
charlesmn 0:3ac96e360672 380
charlesmn 0:3ac96e360672 381 for (i = 0; i < VL53L1_MAX_USER_ZONES; i++) {
charlesmn 0:3ac96e360672 382 pobjects = &(pres->zone_results.VL53L1_p_002[i]);
charlesmn 0:3ac96e360672 383 pobjects->xmonitor.VL53L1_p_020 = 0;
charlesmn 0:3ac96e360672 384 pobjects->xmonitor.VL53L1_p_021 = 0;
charlesmn 0:3ac96e360672 385 pobjects->xmonitor.VL53L1_p_014 = 0;
charlesmn 0:3ac96e360672 386 pobjects->xmonitor.range_status =
charlesmn 0:3ac96e360672 387 VL53L1_DEVICEERROR_NOUPDATE;
charlesmn 0:3ac96e360672 388 }
charlesmn 0:3ac96e360672 389
charlesmn 0:3ac96e360672 390
charlesmn 0:3ac96e360672 391
charlesmn 0:3ac96e360672 392 pres->zone_hists.max_zones = VL53L1_MAX_USER_ZONES;
charlesmn 0:3ac96e360672 393 pres->zone_hists.active_zones = 0;
charlesmn 0:3ac96e360672 394
charlesmn 0:3ac96e360672 395
charlesmn 0:3ac96e360672 396
charlesmn 0:3ac96e360672 397 pres->zone_cal.max_zones = VL53L1_MAX_USER_ZONES;
charlesmn 0:3ac96e360672 398 pres->zone_cal.active_zones = 0;
charlesmn 0:3ac96e360672 399 for (i = 0; i < VL53L1_MAX_USER_ZONES; i++) {
charlesmn 0:3ac96e360672 400 pres->zone_cal.VL53L1_p_002[i].no_of_samples = 0;
charlesmn 0:3ac96e360672 401 pres->zone_cal.VL53L1_p_002[i].effective_spads = 0;
charlesmn 0:3ac96e360672 402 pres->zone_cal.VL53L1_p_002[i].peak_rate_mcps = 0;
charlesmn 0:3ac96e360672 403 pres->zone_cal.VL53L1_p_002[i].median_range_mm = 0;
charlesmn 0:3ac96e360672 404 pres->zone_cal.VL53L1_p_002[i].range_mm_offset = 0;
charlesmn 0:3ac96e360672 405 }
charlesmn 0:3ac96e360672 406
charlesmn 0:3ac96e360672 407 pdev->wait_method = VL53L1_WAIT_METHOD_BLOCKING;
charlesmn 0:3ac96e360672 408 pdev->preset_mode = VL53L1_DEVICEPRESETMODE_STANDARD_RANGING;
charlesmn 0:3ac96e360672 409 pdev->zone_preset = VL53L1_DEVICEZONEPRESET_NONE;
charlesmn 0:3ac96e360672 410 pdev->measurement_mode = VL53L1_DEVICEMEASUREMENTMODE_STOP;
charlesmn 0:3ac96e360672 411
charlesmn 0:3ac96e360672 412 pdev->offset_calibration_mode =
charlesmn 0:3ac96e360672 413 VL53L1_OFFSETCALIBRATIONMODE__MM1_MM2__STANDARD;
charlesmn 0:3ac96e360672 414 pdev->offset_correction_mode =
charlesmn 0:3ac96e360672 415 VL53L1_OFFSETCORRECTIONMODE__MM1_MM2_OFFSETS;
charlesmn 0:3ac96e360672 416 pdev->dmax_mode =
charlesmn 0:3ac96e360672 417 VL53L1_DEVICEDMAXMODE__FMT_CAL_DATA;
charlesmn 0:3ac96e360672 418
charlesmn 0:3ac96e360672 419 pdev->phasecal_config_timeout_us = 1000;
charlesmn 0:3ac96e360672 420 pdev->mm_config_timeout_us = 2000;
charlesmn 0:3ac96e360672 421 pdev->range_config_timeout_us = 13000;
charlesmn 0:3ac96e360672 422 pdev->inter_measurement_period_ms = 100;
charlesmn 0:3ac96e360672 423 pdev->dss_config__target_total_rate_mcps = 0x0A00;
charlesmn 0:3ac96e360672 424 pdev->debug_mode = 0x00;
charlesmn 0:3ac96e360672 425
charlesmn 0:3ac96e360672 426 pdev->offset_results.max_results = VL53L1_MAX_OFFSET_RANGE_RESULTS;
charlesmn 0:3ac96e360672 427 pdev->offset_results.active_results = 0;
charlesmn 0:3ac96e360672 428
charlesmn 0:3ac96e360672 429
charlesmn 0:3ac96e360672 430
charlesmn 0:3ac96e360672 431 pdev->gain_cal.standard_ranging_gain_factor =
charlesmn 0:3ac96e360672 432 VL53L1_TUNINGPARM_LITE_RANGING_GAIN_FACTOR_DEFAULT;
charlesmn 0:3ac96e360672 433 pdev->gain_cal.histogram_ranging_gain_factor =
charlesmn 0:3ac96e360672 434 VL53L1_TUNINGPARM_HIST_GAIN_FACTOR_DEFAULT;
charlesmn 0:3ac96e360672 435
charlesmn 0:3ac96e360672 436
charlesmn 0:3ac96e360672 437 VL53L1_init_version(Dev);
charlesmn 0:3ac96e360672 438
charlesmn 0:3ac96e360672 439
charlesmn 0:3ac96e360672 440 memset(pdev->multi_bins_rec, 0, sizeof(pdev->multi_bins_rec));
charlesmn 0:3ac96e360672 441 pdev->bin_rec_pos = 0;
charlesmn 0:3ac96e360672 442 pdev->pos_before_next_recom = 0;
charlesmn 0:3ac96e360672 443
charlesmn 0:3ac96e360672 444
charlesmn 0:3ac96e360672 445
charlesmn 0:3ac96e360672 446 if (read_p2p_data > 0 && status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 447 status = VL53L1_read_p2p_data(Dev);
charlesmn 0:3ac96e360672 448
charlesmn 0:3ac96e360672 449
charlesmn 0:3ac96e360672 450 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 451 status = VL53L1_init_refspadchar_config_struct(
charlesmn 0:3ac96e360672 452 &(pdev->refspadchar));
charlesmn 0:3ac96e360672 453
charlesmn 0:3ac96e360672 454
charlesmn 0:3ac96e360672 455 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 456 status = VL53L1_init_ssc_config_struct(
charlesmn 0:3ac96e360672 457 &(pdev->ssc_cfg));
charlesmn 0:3ac96e360672 458
charlesmn 0:3ac96e360672 459
charlesmn 0:3ac96e360672 460 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 461 status = VL53L1_init_xtalk_config_struct(
charlesmn 0:3ac96e360672 462 &(pdev->customer),
charlesmn 0:3ac96e360672 463 &(pdev->xtalk_cfg));
charlesmn 0:3ac96e360672 464
charlesmn 0:3ac96e360672 465
charlesmn 0:3ac96e360672 466 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 467 status = VL53L1_init_xtalk_extract_config_struct(
charlesmn 0:3ac96e360672 468 &(pdev->xtalk_extract_cfg));
charlesmn 0:3ac96e360672 469
charlesmn 0:3ac96e360672 470
charlesmn 0:3ac96e360672 471 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 472 status = VL53L1_init_offset_cal_config_struct(
charlesmn 0:3ac96e360672 473 &(pdev->offsetcal_cfg));
charlesmn 0:3ac96e360672 474
charlesmn 0:3ac96e360672 475
charlesmn 0:3ac96e360672 476 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 477 status = VL53L1_init_zone_cal_config_struct(
charlesmn 0:3ac96e360672 478 &(pdev->zonecal_cfg));
charlesmn 0:3ac96e360672 479
charlesmn 0:3ac96e360672 480
charlesmn 0:3ac96e360672 481 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 482 status = VL53L1_init_hist_post_process_config_struct(
charlesmn 0:3ac96e360672 483 pdev->xtalk_cfg.global_crosstalk_compensation_enable,
charlesmn 0:3ac96e360672 484 &(pdev->histpostprocess));
charlesmn 0:3ac96e360672 485
charlesmn 0:3ac96e360672 486
charlesmn 0:3ac96e360672 487 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 488 status = VL53L1_init_hist_gen3_dmax_config_struct(
charlesmn 0:3ac96e360672 489 &(pdev->dmax_cfg));
charlesmn 0:3ac96e360672 490
charlesmn 0:3ac96e360672 491
charlesmn 0:3ac96e360672 492 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 493 status = VL53L1_init_tuning_parm_storage_struct(
charlesmn 0:3ac96e360672 494 &(pdev->tuning_parms));
charlesmn 0:3ac96e360672 495
charlesmn 0:3ac96e360672 496
charlesmn 0:3ac96e360672 497
charlesmn 0:3ac96e360672 498 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 499 status = VL53L1_set_preset_mode(
charlesmn 0:3ac96e360672 500 Dev,
charlesmn 0:3ac96e360672 501 pdev->preset_mode,
charlesmn 0:3ac96e360672 502 pdev->dss_config__target_total_rate_mcps,
charlesmn 0:3ac96e360672 503 pdev->phasecal_config_timeout_us,
charlesmn 0:3ac96e360672 504 pdev->mm_config_timeout_us,
charlesmn 0:3ac96e360672 505 pdev->range_config_timeout_us,
charlesmn 0:3ac96e360672 506 pdev->inter_measurement_period_ms);
charlesmn 0:3ac96e360672 507
charlesmn 0:3ac96e360672 508
charlesmn 0:3ac96e360672 509 VL53L1_init_histogram_bin_data_struct(
charlesmn 0:3ac96e360672 510 0,
charlesmn 0:3ac96e360672 511 VL53L1_HISTOGRAM_BUFFER_SIZE,
charlesmn 0:3ac96e360672 512 &(pdev->hist_data));
charlesmn 0:3ac96e360672 513
charlesmn 0:3ac96e360672 514 VL53L1_init_histogram_bin_data_struct(
charlesmn 0:3ac96e360672 515 0,
charlesmn 0:3ac96e360672 516 VL53L1_HISTOGRAM_BUFFER_SIZE,
charlesmn 0:3ac96e360672 517 &(pdev->hist_xtalk));
charlesmn 0:3ac96e360672 518
charlesmn 0:3ac96e360672 519
charlesmn 0:3ac96e360672 520 VL53L1_init_xtalk_bin_data_struct(
charlesmn 0:3ac96e360672 521 0,
charlesmn 0:3ac96e360672 522 VL53L1_XTALK_HISTO_BINS,
charlesmn 0:3ac96e360672 523 &(pdev->xtalk_shapes.xtalk_shape));
charlesmn 0:3ac96e360672 524
charlesmn 0:3ac96e360672 525
charlesmn 0:3ac96e360672 526
charlesmn 0:3ac96e360672 527 VL53L1_xtalk_cal_data_init(
charlesmn 0:3ac96e360672 528 Dev
charlesmn 0:3ac96e360672 529 );
charlesmn 0:3ac96e360672 530
charlesmn 0:3ac96e360672 531
charlesmn 0:3ac96e360672 532
charlesmn 0:3ac96e360672 533 VL53L1_dynamic_xtalk_correction_data_init(
charlesmn 0:3ac96e360672 534 Dev
charlesmn 0:3ac96e360672 535 );
charlesmn 0:3ac96e360672 536
charlesmn 0:3ac96e360672 537
charlesmn 0:3ac96e360672 538
charlesmn 0:3ac96e360672 539 VL53L1_low_power_auto_data_init(
charlesmn 0:3ac96e360672 540 Dev
charlesmn 0:3ac96e360672 541 );
charlesmn 0:3ac96e360672 542
charlesmn 0:3ac96e360672 543 #ifdef VL53L1_LOG_ENABLE
charlesmn 0:3ac96e360672 544
charlesmn 0:3ac96e360672 545
charlesmn 0:3ac96e360672 546
charlesmn 0:3ac96e360672 547 VL53L1_print_static_nvm_managed(
charlesmn 0:3ac96e360672 548 &(pdev->stat_nvm),
charlesmn 0:3ac96e360672 549 "data_init():pdev->lldata.stat_nvm.",
charlesmn 0:3ac96e360672 550 VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn 0:3ac96e360672 551
charlesmn 0:3ac96e360672 552 VL53L1_print_customer_nvm_managed(
charlesmn 0:3ac96e360672 553 &(pdev->customer),
charlesmn 0:3ac96e360672 554 "data_init():pdev->lldata.customer.",
charlesmn 0:3ac96e360672 555 VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn 0:3ac96e360672 556
charlesmn 0:3ac96e360672 557 VL53L1_print_nvm_copy_data(
charlesmn 0:3ac96e360672 558 &(pdev->nvm_copy_data),
charlesmn 0:3ac96e360672 559 "data_init():pdev->lldata.nvm_copy_data.",
charlesmn 0:3ac96e360672 560 VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn 0:3ac96e360672 561
charlesmn 0:3ac96e360672 562 VL53L1_print_dmax_calibration_data(
charlesmn 0:3ac96e360672 563 &(pdev->fmt_dmax_cal),
charlesmn 0:3ac96e360672 564 "data_init():pdev->lldata.fmt_dmax_cal.",
charlesmn 0:3ac96e360672 565 VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn 0:3ac96e360672 566
charlesmn 0:3ac96e360672 567 VL53L1_print_dmax_calibration_data(
charlesmn 0:3ac96e360672 568 &(pdev->cust_dmax_cal),
charlesmn 0:3ac96e360672 569 "data_init():pdev->lldata.cust_dmax_cal.",
charlesmn 0:3ac96e360672 570 VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn 0:3ac96e360672 571
charlesmn 0:3ac96e360672 572 VL53L1_print_additional_offset_cal_data(
charlesmn 0:3ac96e360672 573 &(pdev->add_off_cal_data),
charlesmn 0:3ac96e360672 574 "data_init():pdev->lldata.add_off_cal_data.",
charlesmn 0:3ac96e360672 575 VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn 0:3ac96e360672 576
charlesmn 0:3ac96e360672 577 VL53L1_print_user_zone(
charlesmn 0:3ac96e360672 578 &(pdev->mm_roi),
charlesmn 0:3ac96e360672 579 "data_init():pdev->lldata.mm_roi.",
charlesmn 0:3ac96e360672 580 VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn 0:3ac96e360672 581
charlesmn 0:3ac96e360672 582 VL53L1_print_optical_centre(
charlesmn 0:3ac96e360672 583 &(pdev->optical_centre),
charlesmn 0:3ac96e360672 584 "data_init():pdev->lldata.optical_centre.",
charlesmn 0:3ac96e360672 585 VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn 0:3ac96e360672 586
charlesmn 0:3ac96e360672 587 VL53L1_print_cal_peak_rate_map(
charlesmn 0:3ac96e360672 588 &(pdev->cal_peak_rate_map),
charlesmn 0:3ac96e360672 589 "data_init():pdev->lldata.cal_peak_rate_map.",
charlesmn 0:3ac96e360672 590 VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn 0:3ac96e360672 591
charlesmn 0:3ac96e360672 592 #endif
charlesmn 0:3ac96e360672 593
charlesmn 0:3ac96e360672 594 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 595
charlesmn 0:3ac96e360672 596 return status;
charlesmn 0:3ac96e360672 597 }
charlesmn 0:3ac96e360672 598
charlesmn 0:3ac96e360672 599
charlesmn 0:3ac96e360672 600 VL53L1_Error VL53L1_read_p2p_data(
charlesmn 0:3ac96e360672 601 VL53L1_DEV Dev)
charlesmn 0:3ac96e360672 602 {
charlesmn 0:3ac96e360672 603
charlesmn 0:3ac96e360672 604
charlesmn 0:3ac96e360672 605
charlesmn 0:3ac96e360672 606 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 607 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 608 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn 0:3ac96e360672 609 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer);
charlesmn 0:3ac96e360672 610 VL53L1_additional_offset_cal_data_t *pCD = &(pdev->add_off_cal_data);
charlesmn 0:3ac96e360672 611
charlesmn 0:3ac96e360672 612 VL53L1_decoded_nvm_fmt_range_data_t fmt_rrd;
charlesmn 0:3ac96e360672 613
charlesmn 0:3ac96e360672 614 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 615
charlesmn 0:3ac96e360672 616 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 617 status = VL53L1_get_static_nvm_managed(
charlesmn 0:3ac96e360672 618 Dev,
charlesmn 0:3ac96e360672 619 &(pdev->stat_nvm));
charlesmn 0:3ac96e360672 620
charlesmn 0:3ac96e360672 621 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 622 status = VL53L1_get_customer_nvm_managed(
charlesmn 0:3ac96e360672 623 Dev,
charlesmn 0:3ac96e360672 624 &(pdev->customer));
charlesmn 0:3ac96e360672 625
charlesmn 0:3ac96e360672 626 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 627
charlesmn 0:3ac96e360672 628 status = VL53L1_get_nvm_copy_data(
charlesmn 0:3ac96e360672 629 Dev,
charlesmn 0:3ac96e360672 630 &(pdev->nvm_copy_data));
charlesmn 0:3ac96e360672 631
charlesmn 0:3ac96e360672 632
charlesmn 0:3ac96e360672 633 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 634 VL53L1_copy_rtn_good_spads_to_buffer(
charlesmn 0:3ac96e360672 635 &(pdev->nvm_copy_data),
charlesmn 0:3ac96e360672 636 &(pdev->rtn_good_spads[0]));
charlesmn 0:3ac96e360672 637 }
charlesmn 0:3ac96e360672 638
charlesmn 0:3ac96e360672 639
charlesmn 0:3ac96e360672 640
charlesmn 0:3ac96e360672 641 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 642 pHP->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 643 pN->algo__crosstalk_compensation_plane_offset_kcps;
charlesmn 0:3ac96e360672 644 pHP->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 645 pN->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 646 pHP->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 647 pN->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 648 }
charlesmn 0:3ac96e360672 649
charlesmn 0:3ac96e360672 650
charlesmn 0:3ac96e360672 651 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 652 status =
charlesmn 0:3ac96e360672 653 VL53L1_read_nvm_optical_centre(
charlesmn 0:3ac96e360672 654 Dev,
charlesmn 0:3ac96e360672 655 &(pdev->optical_centre));
charlesmn 0:3ac96e360672 656
charlesmn 0:3ac96e360672 657
charlesmn 0:3ac96e360672 658
charlesmn 0:3ac96e360672 659 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 660 status =
charlesmn 0:3ac96e360672 661 VL53L1_read_nvm_cal_peak_rate_map(
charlesmn 0:3ac96e360672 662 Dev,
charlesmn 0:3ac96e360672 663 &(pdev->cal_peak_rate_map));
charlesmn 0:3ac96e360672 664
charlesmn 0:3ac96e360672 665
charlesmn 0:3ac96e360672 666
charlesmn 0:3ac96e360672 667 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 668
charlesmn 0:3ac96e360672 669 status =
charlesmn 0:3ac96e360672 670 VL53L1_read_nvm_additional_offset_cal_data(
charlesmn 0:3ac96e360672 671 Dev,
charlesmn 0:3ac96e360672 672 &(pdev->add_off_cal_data));
charlesmn 0:3ac96e360672 673
charlesmn 0:3ac96e360672 674
charlesmn 0:3ac96e360672 675
charlesmn 0:3ac96e360672 676 if (pCD->result__mm_inner_peak_signal_count_rtn_mcps == 0 &&
charlesmn 0:3ac96e360672 677 pCD->result__mm_outer_peak_signal_count_rtn_mcps == 0) {
charlesmn 0:3ac96e360672 678
charlesmn 0:3ac96e360672 679 pCD->result__mm_inner_peak_signal_count_rtn_mcps
charlesmn 0:3ac96e360672 680 = 0x0080;
charlesmn 0:3ac96e360672 681 pCD->result__mm_outer_peak_signal_count_rtn_mcps
charlesmn 0:3ac96e360672 682 = 0x0180;
charlesmn 0:3ac96e360672 683
charlesmn 0:3ac96e360672 684
charlesmn 0:3ac96e360672 685
charlesmn 0:3ac96e360672 686 VL53L1_calc_mm_effective_spads(
charlesmn 0:3ac96e360672 687 pdev->nvm_copy_data.roi_config__mode_roi_centre_spad,
charlesmn 0:3ac96e360672 688 pdev->nvm_copy_data.roi_config__mode_roi_xy_size,
charlesmn 0:3ac96e360672 689 0xC7,
charlesmn 0:3ac96e360672 690 0xFF,
charlesmn 0:3ac96e360672 691 &(pdev->rtn_good_spads[0]),
charlesmn 0:3ac96e360672 692 VL53L1_RTN_SPAD_APERTURE_TRANSMISSION,
charlesmn 0:3ac96e360672 693 &(pCD->result__mm_inner_actual_effective_spads),
charlesmn 0:3ac96e360672 694 &(pCD->result__mm_outer_actual_effective_spads));
charlesmn 0:3ac96e360672 695 }
charlesmn 0:3ac96e360672 696 }
charlesmn 0:3ac96e360672 697
charlesmn 0:3ac96e360672 698
charlesmn 0:3ac96e360672 699 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 700
charlesmn 0:3ac96e360672 701 status =
charlesmn 0:3ac96e360672 702 VL53L1_read_nvm_fmt_range_results_data(
charlesmn 0:3ac96e360672 703 Dev,
charlesmn 0:3ac96e360672 704 VL53L1_NVM__FMT__RANGE_RESULTS__140MM_DARK,
charlesmn 0:3ac96e360672 705 &fmt_rrd);
charlesmn 0:3ac96e360672 706
charlesmn 0:3ac96e360672 707 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 708 pdev->fmt_dmax_cal.ref__actual_effective_spads =
charlesmn 0:3ac96e360672 709 fmt_rrd.result__actual_effective_rtn_spads;
charlesmn 0:3ac96e360672 710 pdev->fmt_dmax_cal.ref__peak_signal_count_rate_mcps =
charlesmn 0:3ac96e360672 711 fmt_rrd.result__peak_signal_count_rate_rtn_mcps;
charlesmn 0:3ac96e360672 712 pdev->fmt_dmax_cal.ref__distance_mm =
charlesmn 0:3ac96e360672 713 fmt_rrd.measured_distance_mm;
charlesmn 0:3ac96e360672 714
charlesmn 0:3ac96e360672 715
charlesmn 0:3ac96e360672 716 if (pdev->cal_peak_rate_map.cal_reflectance_pc != 0) {
charlesmn 0:3ac96e360672 717 pdev->fmt_dmax_cal.ref_reflectance_pc =
charlesmn 0:3ac96e360672 718 pdev->cal_peak_rate_map.cal_reflectance_pc;
charlesmn 0:3ac96e360672 719 } else {
charlesmn 0:3ac96e360672 720 pdev->fmt_dmax_cal.ref_reflectance_pc = 0x0014;
charlesmn 0:3ac96e360672 721 }
charlesmn 0:3ac96e360672 722
charlesmn 0:3ac96e360672 723
charlesmn 0:3ac96e360672 724 pdev->fmt_dmax_cal.coverglass_transmission = 0x0100;
charlesmn 0:3ac96e360672 725 }
charlesmn 0:3ac96e360672 726 }
charlesmn 0:3ac96e360672 727
charlesmn 0:3ac96e360672 728
charlesmn 0:3ac96e360672 729 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 730 status =
charlesmn 0:3ac96e360672 731 VL53L1_RdWord(
charlesmn 0:3ac96e360672 732 Dev,
charlesmn 0:3ac96e360672 733 VL53L1_RESULT__OSC_CALIBRATE_VAL,
charlesmn 0:3ac96e360672 734 &(pdev->dbg_results.result__osc_calibrate_val));
charlesmn 0:3ac96e360672 735
charlesmn 0:3ac96e360672 736
charlesmn 0:3ac96e360672 737
charlesmn 0:3ac96e360672 738 if (pdev->stat_nvm.osc_measured__fast_osc__frequency < 0x1000) {
charlesmn 0:3ac96e360672 739 trace_print(
charlesmn 0:3ac96e360672 740 VL53L1_TRACE_LEVEL_WARNING,
charlesmn 0:3ac96e360672 741 "\nInvalid %s value (0x%04X) - forcing to 0x%04X\n\n",
charlesmn 0:3ac96e360672 742 "pdev->stat_nvm.osc_measured__fast_osc__frequency",
charlesmn 0:3ac96e360672 743 pdev->stat_nvm.osc_measured__fast_osc__frequency,
charlesmn 0:3ac96e360672 744 0xBCCC);
charlesmn 0:3ac96e360672 745 pdev->stat_nvm.osc_measured__fast_osc__frequency = 0xBCCC;
charlesmn 0:3ac96e360672 746 }
charlesmn 0:3ac96e360672 747
charlesmn 0:3ac96e360672 748
charlesmn 0:3ac96e360672 749
charlesmn 0:3ac96e360672 750 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 751 status =
charlesmn 0:3ac96e360672 752 VL53L1_get_mode_mitigation_roi(
charlesmn 0:3ac96e360672 753 Dev,
charlesmn 0:3ac96e360672 754 &(pdev->mm_roi));
charlesmn 0:3ac96e360672 755
charlesmn 0:3ac96e360672 756
charlesmn 0:3ac96e360672 757
charlesmn 0:3ac96e360672 758 if (pdev->optical_centre.x_centre == 0 &&
charlesmn 0:3ac96e360672 759 pdev->optical_centre.y_centre == 0) {
charlesmn 0:3ac96e360672 760 pdev->optical_centre.x_centre =
charlesmn 0:3ac96e360672 761 pdev->mm_roi.x_centre << 4;
charlesmn 0:3ac96e360672 762 pdev->optical_centre.y_centre =
charlesmn 0:3ac96e360672 763 pdev->mm_roi.y_centre << 4;
charlesmn 0:3ac96e360672 764 }
charlesmn 0:3ac96e360672 765
charlesmn 0:3ac96e360672 766 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 767
charlesmn 0:3ac96e360672 768 return status;
charlesmn 0:3ac96e360672 769 }
charlesmn 0:3ac96e360672 770
charlesmn 0:3ac96e360672 771
charlesmn 0:3ac96e360672 772 VL53L1_Error VL53L1_software_reset(
charlesmn 0:3ac96e360672 773 VL53L1_DEV Dev)
charlesmn 0:3ac96e360672 774 {
charlesmn 0:3ac96e360672 775
charlesmn 0:3ac96e360672 776
charlesmn 0:3ac96e360672 777 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 778
charlesmn 0:3ac96e360672 779 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 780
charlesmn 0:3ac96e360672 781
charlesmn 0:3ac96e360672 782 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 783 status = VL53L1_WrByte(
charlesmn 0:3ac96e360672 784 Dev,
charlesmn 0:3ac96e360672 785 VL53L1_SOFT_RESET,
charlesmn 0:3ac96e360672 786 0x00);
charlesmn 0:3ac96e360672 787
charlesmn 0:3ac96e360672 788
charlesmn 0:3ac96e360672 789 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 790 status =
charlesmn 0:3ac96e360672 791 VL53L1_WaitUs(
charlesmn 0:3ac96e360672 792 Dev,
charlesmn 0:3ac96e360672 793 VL53L1_SOFTWARE_RESET_DURATION_US);
charlesmn 0:3ac96e360672 794
charlesmn 0:3ac96e360672 795
charlesmn 0:3ac96e360672 796 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 797 status = VL53L1_WrByte(
charlesmn 0:3ac96e360672 798 Dev,
charlesmn 0:3ac96e360672 799 VL53L1_SOFT_RESET,
charlesmn 0:3ac96e360672 800 0x01);
charlesmn 0:3ac96e360672 801
charlesmn 0:3ac96e360672 802
charlesmn 0:3ac96e360672 803 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 804 status = VL53L1_wait_for_boot_completion(Dev);
charlesmn 0:3ac96e360672 805
charlesmn 0:3ac96e360672 806 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 807
charlesmn 0:3ac96e360672 808 return status;
charlesmn 0:3ac96e360672 809 }
charlesmn 0:3ac96e360672 810
charlesmn 0:3ac96e360672 811
charlesmn 0:3ac96e360672 812 VL53L1_Error VL53L1_set_part_to_part_data(
charlesmn 0:3ac96e360672 813 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 814 VL53L1_calibration_data_t *pcal_data)
charlesmn 0:3ac96e360672 815 {
charlesmn 0:3ac96e360672 816
charlesmn 0:3ac96e360672 817
charlesmn 0:3ac96e360672 818 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 819 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 820 VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg);
charlesmn 0:3ac96e360672 821 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn 0:3ac96e360672 822 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer);
charlesmn 0:3ac96e360672 823
charlesmn 0:3ac96e360672 824 uint32_t tempu32;
charlesmn 0:3ac96e360672 825
charlesmn 0:3ac96e360672 826 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 827
charlesmn 0:3ac96e360672 828 if (pcal_data->struct_version !=
charlesmn 0:3ac96e360672 829 VL53L1_LL_CALIBRATION_DATA_STRUCT_VERSION) {
charlesmn 0:3ac96e360672 830 status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn 0:3ac96e360672 831 }
charlesmn 0:3ac96e360672 832
charlesmn 0:3ac96e360672 833 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 834
charlesmn 0:3ac96e360672 835
charlesmn 0:3ac96e360672 836 memcpy(
charlesmn 0:3ac96e360672 837 &(pdev->customer),
charlesmn 0:3ac96e360672 838 &(pcal_data->customer),
charlesmn 0:3ac96e360672 839 sizeof(VL53L1_customer_nvm_managed_t));
charlesmn 0:3ac96e360672 840
charlesmn 0:3ac96e360672 841
charlesmn 0:3ac96e360672 842 memcpy(
charlesmn 0:3ac96e360672 843 &(pdev->add_off_cal_data),
charlesmn 0:3ac96e360672 844 &(pcal_data->add_off_cal_data),
charlesmn 0:3ac96e360672 845 sizeof(VL53L1_additional_offset_cal_data_t));
charlesmn 0:3ac96e360672 846
charlesmn 0:3ac96e360672 847
charlesmn 0:3ac96e360672 848 memcpy(
charlesmn 0:3ac96e360672 849 &(pdev->fmt_dmax_cal),
charlesmn 0:3ac96e360672 850 &(pcal_data->fmt_dmax_cal),
charlesmn 0:3ac96e360672 851 sizeof(VL53L1_dmax_calibration_data_t));
charlesmn 0:3ac96e360672 852
charlesmn 0:3ac96e360672 853
charlesmn 0:3ac96e360672 854 memcpy(
charlesmn 0:3ac96e360672 855 &(pdev->cust_dmax_cal),
charlesmn 0:3ac96e360672 856 &(pcal_data->cust_dmax_cal),
charlesmn 0:3ac96e360672 857 sizeof(VL53L1_dmax_calibration_data_t));
charlesmn 0:3ac96e360672 858
charlesmn 0:3ac96e360672 859
charlesmn 0:3ac96e360672 860 memcpy(
charlesmn 0:3ac96e360672 861 &(pdev->xtalk_shapes),
charlesmn 0:3ac96e360672 862 &(pcal_data->xtalkhisto),
charlesmn 0:3ac96e360672 863 sizeof(VL53L1_xtalk_histogram_data_t));
charlesmn 0:3ac96e360672 864
charlesmn 0:3ac96e360672 865
charlesmn 0:3ac96e360672 866 memcpy(
charlesmn 0:3ac96e360672 867 &(pdev->gain_cal),
charlesmn 0:3ac96e360672 868 &(pcal_data->gain_cal),
charlesmn 0:3ac96e360672 869 sizeof(VL53L1_gain_calibration_data_t));
charlesmn 0:3ac96e360672 870
charlesmn 0:3ac96e360672 871
charlesmn 0:3ac96e360672 872 memcpy(
charlesmn 0:3ac96e360672 873 &(pdev->cal_peak_rate_map),
charlesmn 0:3ac96e360672 874 &(pcal_data->cal_peak_rate_map),
charlesmn 0:3ac96e360672 875 sizeof(VL53L1_cal_peak_rate_map_t));
charlesmn 0:3ac96e360672 876
charlesmn 0:3ac96e360672 877
charlesmn 0:3ac96e360672 878 memcpy(
charlesmn 0:3ac96e360672 879 &(pdev->per_vcsel_cal_data),
charlesmn 0:3ac96e360672 880 &(pcal_data->per_vcsel_cal_data),
charlesmn 0:3ac96e360672 881 sizeof(VL53L1_per_vcsel_period_offset_cal_data_t));
charlesmn 0:3ac96e360672 882
charlesmn 0:3ac96e360672 883
charlesmn 0:3ac96e360672 884
charlesmn 0:3ac96e360672 885 pC->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 886 pN->algo__crosstalk_compensation_plane_offset_kcps;
charlesmn 0:3ac96e360672 887 pC->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 888 pN->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 889 pC->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 890 pN->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 891
charlesmn 0:3ac96e360672 892 pHP->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 893 VL53L1_calc_crosstalk_plane_offset_with_margin(
charlesmn 0:3ac96e360672 894 pC->algo__crosstalk_compensation_plane_offset_kcps,
charlesmn 0:3ac96e360672 895 pC->histogram_mode_crosstalk_margin_kcps);
charlesmn 0:3ac96e360672 896
charlesmn 0:3ac96e360672 897 pHP->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 898 pC->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 899 pHP->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 900 pC->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 901
charlesmn 0:3ac96e360672 902
charlesmn 0:3ac96e360672 903
charlesmn 0:3ac96e360672 904 if (pC->global_crosstalk_compensation_enable == 0x00) {
charlesmn 0:3ac96e360672 905 pN->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 906 0x00;
charlesmn 0:3ac96e360672 907 pN->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 908 0x00;
charlesmn 0:3ac96e360672 909 pN->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 910 0x00;
charlesmn 0:3ac96e360672 911 } else {
charlesmn 0:3ac96e360672 912 tempu32 =
charlesmn 0:3ac96e360672 913 VL53L1_calc_crosstalk_plane_offset_with_margin(
charlesmn 0:3ac96e360672 914 pC->algo__crosstalk_compensation_plane_offset_kcps,
charlesmn 0:3ac96e360672 915 pC->lite_mode_crosstalk_margin_kcps);
charlesmn 0:3ac96e360672 916
charlesmn 0:3ac96e360672 917
charlesmn 0:3ac96e360672 918 if (tempu32 > 0xFFFF)
charlesmn 0:3ac96e360672 919 tempu32 = 0xFFFF;
charlesmn 0:3ac96e360672 920
charlesmn 0:3ac96e360672 921 pN->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 922 (uint16_t)tempu32;
charlesmn 0:3ac96e360672 923 }
charlesmn 0:3ac96e360672 924 }
charlesmn 0:3ac96e360672 925
charlesmn 0:3ac96e360672 926 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 927
charlesmn 0:3ac96e360672 928 return status;
charlesmn 0:3ac96e360672 929 }
charlesmn 0:3ac96e360672 930
charlesmn 0:3ac96e360672 931
charlesmn 0:3ac96e360672 932 VL53L1_Error VL53L1_get_part_to_part_data(
charlesmn 0:3ac96e360672 933 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 934 VL53L1_calibration_data_t *pcal_data)
charlesmn 0:3ac96e360672 935 {
charlesmn 0:3ac96e360672 936
charlesmn 0:3ac96e360672 937
charlesmn 0:3ac96e360672 938 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 939 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 940 VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg);
charlesmn 0:3ac96e360672 941 VL53L1_customer_nvm_managed_t *pCN = &(pcal_data->customer);
charlesmn 0:3ac96e360672 942
charlesmn 0:3ac96e360672 943 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 944
charlesmn 0:3ac96e360672 945 pcal_data->struct_version =
charlesmn 0:3ac96e360672 946 VL53L1_LL_CALIBRATION_DATA_STRUCT_VERSION;
charlesmn 0:3ac96e360672 947
charlesmn 0:3ac96e360672 948
charlesmn 0:3ac96e360672 949 memcpy(
charlesmn 0:3ac96e360672 950 &(pcal_data->customer),
charlesmn 0:3ac96e360672 951 &(pdev->customer),
charlesmn 0:3ac96e360672 952 sizeof(VL53L1_customer_nvm_managed_t));
charlesmn 0:3ac96e360672 953
charlesmn 0:3ac96e360672 954
charlesmn 0:3ac96e360672 955
charlesmn 0:3ac96e360672 956
charlesmn 0:3ac96e360672 957 if (pC->algo__crosstalk_compensation_plane_offset_kcps > 0xFFFF) {
charlesmn 0:3ac96e360672 958 pCN->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 959 0xFFFF;
charlesmn 0:3ac96e360672 960 } else {
charlesmn 0:3ac96e360672 961 pCN->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 962 (uint16_t)pC->algo__crosstalk_compensation_plane_offset_kcps;
charlesmn 0:3ac96e360672 963 }
charlesmn 0:3ac96e360672 964 pCN->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 965 pC->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 966 pCN->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 967 pC->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 968
charlesmn 0:3ac96e360672 969
charlesmn 0:3ac96e360672 970 memcpy(
charlesmn 0:3ac96e360672 971 &(pcal_data->fmt_dmax_cal),
charlesmn 0:3ac96e360672 972 &(pdev->fmt_dmax_cal),
charlesmn 0:3ac96e360672 973 sizeof(VL53L1_dmax_calibration_data_t));
charlesmn 0:3ac96e360672 974
charlesmn 0:3ac96e360672 975
charlesmn 0:3ac96e360672 976 memcpy(
charlesmn 0:3ac96e360672 977 &(pcal_data->cust_dmax_cal),
charlesmn 0:3ac96e360672 978 &(pdev->cust_dmax_cal),
charlesmn 0:3ac96e360672 979 sizeof(VL53L1_dmax_calibration_data_t));
charlesmn 0:3ac96e360672 980
charlesmn 0:3ac96e360672 981
charlesmn 0:3ac96e360672 982 memcpy(
charlesmn 0:3ac96e360672 983 &(pcal_data->add_off_cal_data),
charlesmn 0:3ac96e360672 984 &(pdev->add_off_cal_data),
charlesmn 0:3ac96e360672 985 sizeof(VL53L1_additional_offset_cal_data_t));
charlesmn 0:3ac96e360672 986
charlesmn 0:3ac96e360672 987
charlesmn 0:3ac96e360672 988 memcpy(
charlesmn 0:3ac96e360672 989 &(pcal_data->optical_centre),
charlesmn 0:3ac96e360672 990 &(pdev->optical_centre),
charlesmn 0:3ac96e360672 991 sizeof(VL53L1_optical_centre_t));
charlesmn 0:3ac96e360672 992
charlesmn 0:3ac96e360672 993
charlesmn 0:3ac96e360672 994 memcpy(
charlesmn 0:3ac96e360672 995 &(pcal_data->xtalkhisto),
charlesmn 0:3ac96e360672 996 &(pdev->xtalk_shapes),
charlesmn 0:3ac96e360672 997 sizeof(VL53L1_xtalk_histogram_data_t));
charlesmn 0:3ac96e360672 998
charlesmn 0:3ac96e360672 999
charlesmn 0:3ac96e360672 1000 memcpy(
charlesmn 0:3ac96e360672 1001 &(pcal_data->gain_cal),
charlesmn 0:3ac96e360672 1002 &(pdev->gain_cal),
charlesmn 0:3ac96e360672 1003 sizeof(VL53L1_gain_calibration_data_t));
charlesmn 0:3ac96e360672 1004
charlesmn 0:3ac96e360672 1005
charlesmn 0:3ac96e360672 1006 memcpy(
charlesmn 0:3ac96e360672 1007 &(pcal_data->cal_peak_rate_map),
charlesmn 0:3ac96e360672 1008 &(pdev->cal_peak_rate_map),
charlesmn 0:3ac96e360672 1009 sizeof(VL53L1_cal_peak_rate_map_t));
charlesmn 0:3ac96e360672 1010
charlesmn 0:3ac96e360672 1011
charlesmn 0:3ac96e360672 1012 memcpy(
charlesmn 0:3ac96e360672 1013 &(pcal_data->per_vcsel_cal_data),
charlesmn 0:3ac96e360672 1014 &(pdev->per_vcsel_cal_data),
charlesmn 0:3ac96e360672 1015 sizeof(VL53L1_per_vcsel_period_offset_cal_data_t));
charlesmn 0:3ac96e360672 1016
charlesmn 0:3ac96e360672 1017 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1018
charlesmn 0:3ac96e360672 1019 return status;
charlesmn 0:3ac96e360672 1020 }
charlesmn 0:3ac96e360672 1021
charlesmn 0:3ac96e360672 1022
charlesmn 0:3ac96e360672 1023 VL53L1_Error VL53L1_set_inter_measurement_period_ms(
charlesmn 0:3ac96e360672 1024 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1025 uint32_t inter_measurement_period_ms)
charlesmn 0:3ac96e360672 1026 {
charlesmn 0:3ac96e360672 1027
charlesmn 0:3ac96e360672 1028
charlesmn 0:3ac96e360672 1029 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1030 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1031
charlesmn 0:3ac96e360672 1032 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1033
charlesmn 0:3ac96e360672 1034 if (pdev->dbg_results.result__osc_calibrate_val == 0)
charlesmn 0:3ac96e360672 1035 status = VL53L1_ERROR_DIVISION_BY_ZERO;
charlesmn 0:3ac96e360672 1036
charlesmn 0:3ac96e360672 1037 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1038 pdev->inter_measurement_period_ms = inter_measurement_period_ms;
charlesmn 0:3ac96e360672 1039 pdev->tim_cfg.system__intermeasurement_period =
charlesmn 0:3ac96e360672 1040 inter_measurement_period_ms *
charlesmn 0:3ac96e360672 1041 (uint32_t)pdev->dbg_results.result__osc_calibrate_val;
charlesmn 0:3ac96e360672 1042 }
charlesmn 0:3ac96e360672 1043
charlesmn 0:3ac96e360672 1044 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1045
charlesmn 0:3ac96e360672 1046 return status;
charlesmn 0:3ac96e360672 1047 }
charlesmn 0:3ac96e360672 1048
charlesmn 0:3ac96e360672 1049
charlesmn 0:3ac96e360672 1050 VL53L1_Error VL53L1_get_inter_measurement_period_ms(
charlesmn 0:3ac96e360672 1051 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1052 uint32_t *pinter_measurement_period_ms)
charlesmn 0:3ac96e360672 1053 {
charlesmn 0:3ac96e360672 1054
charlesmn 0:3ac96e360672 1055
charlesmn 0:3ac96e360672 1056 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1057 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1058
charlesmn 0:3ac96e360672 1059 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1060
charlesmn 0:3ac96e360672 1061 if (pdev->dbg_results.result__osc_calibrate_val == 0)
charlesmn 0:3ac96e360672 1062 status = VL53L1_ERROR_DIVISION_BY_ZERO;
charlesmn 0:3ac96e360672 1063
charlesmn 0:3ac96e360672 1064 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 1065 *pinter_measurement_period_ms =
charlesmn 0:3ac96e360672 1066 pdev->tim_cfg.system__intermeasurement_period /
charlesmn 0:3ac96e360672 1067 (uint32_t)pdev->dbg_results.result__osc_calibrate_val;
charlesmn 0:3ac96e360672 1068
charlesmn 0:3ac96e360672 1069
charlesmn 0:3ac96e360672 1070 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1071
charlesmn 0:3ac96e360672 1072 return status;
charlesmn 0:3ac96e360672 1073 }
charlesmn 0:3ac96e360672 1074
charlesmn 0:3ac96e360672 1075
charlesmn 0:3ac96e360672 1076 VL53L1_Error VL53L1_set_timeouts_us(
charlesmn 0:3ac96e360672 1077 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1078 uint32_t phasecal_config_timeout_us,
charlesmn 0:3ac96e360672 1079 uint32_t mm_config_timeout_us,
charlesmn 0:3ac96e360672 1080 uint32_t range_config_timeout_us)
charlesmn 0:3ac96e360672 1081 {
charlesmn 0:3ac96e360672 1082
charlesmn 0:3ac96e360672 1083
charlesmn 0:3ac96e360672 1084 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1085 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1086 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1087
charlesmn 0:3ac96e360672 1088 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1089
charlesmn 0:3ac96e360672 1090 if (pdev->stat_nvm.osc_measured__fast_osc__frequency == 0)
charlesmn 0:3ac96e360672 1091 status = VL53L1_ERROR_DIVISION_BY_ZERO;
charlesmn 0:3ac96e360672 1092
charlesmn 0:3ac96e360672 1093 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1094
charlesmn 0:3ac96e360672 1095 pdev->phasecal_config_timeout_us = phasecal_config_timeout_us;
charlesmn 0:3ac96e360672 1096 pdev->mm_config_timeout_us = mm_config_timeout_us;
charlesmn 0:3ac96e360672 1097 pdev->range_config_timeout_us = range_config_timeout_us;
charlesmn 0:3ac96e360672 1098
charlesmn 0:3ac96e360672 1099 status =
charlesmn 0:3ac96e360672 1100 VL53L1_calc_timeout_register_values(
charlesmn 0:3ac96e360672 1101 phasecal_config_timeout_us,
charlesmn 0:3ac96e360672 1102 mm_config_timeout_us,
charlesmn 0:3ac96e360672 1103 range_config_timeout_us,
charlesmn 0:3ac96e360672 1104 pdev->stat_nvm.osc_measured__fast_osc__frequency,
charlesmn 0:3ac96e360672 1105 &(pdev->gen_cfg),
charlesmn 0:3ac96e360672 1106 &(pdev->tim_cfg));
charlesmn 0:3ac96e360672 1107 }
charlesmn 0:3ac96e360672 1108
charlesmn 0:3ac96e360672 1109 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1110
charlesmn 0:3ac96e360672 1111 return status;
charlesmn 0:3ac96e360672 1112 }
charlesmn 0:3ac96e360672 1113
charlesmn 0:3ac96e360672 1114
charlesmn 0:3ac96e360672 1115 VL53L1_Error VL53L1_get_timeouts_us(
charlesmn 0:3ac96e360672 1116 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1117 uint32_t *pphasecal_config_timeout_us,
charlesmn 0:3ac96e360672 1118 uint32_t *pmm_config_timeout_us,
charlesmn 0:3ac96e360672 1119 uint32_t *prange_config_timeout_us)
charlesmn 0:3ac96e360672 1120 {
charlesmn 0:3ac96e360672 1121
charlesmn 0:3ac96e360672 1122
charlesmn 0:3ac96e360672 1123 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1124 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1125 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1126
charlesmn 0:3ac96e360672 1127 uint32_t macro_period_us = 0;
charlesmn 0:3ac96e360672 1128 uint16_t timeout_encoded = 0;
charlesmn 0:3ac96e360672 1129
charlesmn 0:3ac96e360672 1130 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1131
charlesmn 0:3ac96e360672 1132 if (pdev->stat_nvm.osc_measured__fast_osc__frequency == 0)
charlesmn 0:3ac96e360672 1133 status = VL53L1_ERROR_DIVISION_BY_ZERO;
charlesmn 0:3ac96e360672 1134
charlesmn 0:3ac96e360672 1135 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 1136
charlesmn 0:3ac96e360672 1137
charlesmn 0:3ac96e360672 1138 macro_period_us =
charlesmn 0:3ac96e360672 1139 VL53L1_calc_macro_period_us(
charlesmn 0:3ac96e360672 1140 pdev->stat_nvm.osc_measured__fast_osc__frequency,
charlesmn 0:3ac96e360672 1141 pdev->tim_cfg.range_config__vcsel_period_a);
charlesmn 0:3ac96e360672 1142
charlesmn 0:3ac96e360672 1143
charlesmn 0:3ac96e360672 1144
charlesmn 0:3ac96e360672 1145 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1146 VL53L1_calc_timeout_us(
charlesmn 0:3ac96e360672 1147 (uint32_t)pdev->gen_cfg.phasecal_config__timeout_macrop,
charlesmn 0:3ac96e360672 1148 macro_period_us);
charlesmn 0:3ac96e360672 1149
charlesmn 0:3ac96e360672 1150
charlesmn 0:3ac96e360672 1151
charlesmn 0:3ac96e360672 1152 timeout_encoded =
charlesmn 0:3ac96e360672 1153 (uint16_t)pdev->tim_cfg.mm_config__timeout_macrop_a_hi;
charlesmn 0:3ac96e360672 1154 timeout_encoded = (timeout_encoded << 8) +
charlesmn 0:3ac96e360672 1155 (uint16_t)pdev->tim_cfg.mm_config__timeout_macrop_a_lo;
charlesmn 0:3ac96e360672 1156
charlesmn 0:3ac96e360672 1157 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1158 VL53L1_calc_decoded_timeout_us(
charlesmn 0:3ac96e360672 1159 timeout_encoded,
charlesmn 0:3ac96e360672 1160 macro_period_us);
charlesmn 0:3ac96e360672 1161
charlesmn 0:3ac96e360672 1162
charlesmn 0:3ac96e360672 1163
charlesmn 0:3ac96e360672 1164 timeout_encoded =
charlesmn 0:3ac96e360672 1165 (uint16_t)pdev->tim_cfg.range_config__timeout_macrop_a_hi;
charlesmn 0:3ac96e360672 1166 timeout_encoded = (timeout_encoded << 8) +
charlesmn 0:3ac96e360672 1167 (uint16_t)pdev->tim_cfg.range_config__timeout_macrop_a_lo;
charlesmn 0:3ac96e360672 1168
charlesmn 0:3ac96e360672 1169 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1170 VL53L1_calc_decoded_timeout_us(
charlesmn 0:3ac96e360672 1171 timeout_encoded,
charlesmn 0:3ac96e360672 1172 macro_period_us);
charlesmn 0:3ac96e360672 1173
charlesmn 0:3ac96e360672 1174 pdev->phasecal_config_timeout_us = *pphasecal_config_timeout_us;
charlesmn 0:3ac96e360672 1175 pdev->mm_config_timeout_us = *pmm_config_timeout_us;
charlesmn 0:3ac96e360672 1176 pdev->range_config_timeout_us = *prange_config_timeout_us;
charlesmn 0:3ac96e360672 1177
charlesmn 0:3ac96e360672 1178 }
charlesmn 0:3ac96e360672 1179
charlesmn 0:3ac96e360672 1180 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1181
charlesmn 0:3ac96e360672 1182 return status;
charlesmn 0:3ac96e360672 1183 }
charlesmn 0:3ac96e360672 1184
charlesmn 0:3ac96e360672 1185
charlesmn 0:3ac96e360672 1186 VL53L1_Error VL53L1_set_calibration_repeat_period(
charlesmn 0:3ac96e360672 1187 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1188 uint16_t cal_config__repeat_period)
charlesmn 0:3ac96e360672 1189 {
charlesmn 0:3ac96e360672 1190
charlesmn 0:3ac96e360672 1191
charlesmn 0:3ac96e360672 1192 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1193 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1194 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1195
charlesmn 0:3ac96e360672 1196 pdev->gen_cfg.cal_config__repeat_rate = cal_config__repeat_period;
charlesmn 0:3ac96e360672 1197
charlesmn 0:3ac96e360672 1198 return status;
charlesmn 0:3ac96e360672 1199
charlesmn 0:3ac96e360672 1200 }
charlesmn 0:3ac96e360672 1201
charlesmn 0:3ac96e360672 1202
charlesmn 0:3ac96e360672 1203 VL53L1_Error VL53L1_get_calibration_repeat_period(
charlesmn 0:3ac96e360672 1204 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1205 uint16_t *pcal_config__repeat_period)
charlesmn 0:3ac96e360672 1206 {
charlesmn 0:3ac96e360672 1207
charlesmn 0:3ac96e360672 1208
charlesmn 0:3ac96e360672 1209 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1210 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1211 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1212
charlesmn 0:3ac96e360672 1213 *pcal_config__repeat_period = pdev->gen_cfg.cal_config__repeat_rate;
charlesmn 0:3ac96e360672 1214
charlesmn 0:3ac96e360672 1215 return status;
charlesmn 0:3ac96e360672 1216
charlesmn 0:3ac96e360672 1217 }
charlesmn 0:3ac96e360672 1218
charlesmn 0:3ac96e360672 1219
charlesmn 0:3ac96e360672 1220 VL53L1_Error VL53L1_set_sequence_config_bit(
charlesmn 0:3ac96e360672 1221 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1222 VL53L1_DeviceSequenceConfig bit_id,
charlesmn 0:3ac96e360672 1223 uint8_t value)
charlesmn 0:3ac96e360672 1224 {
charlesmn 0:3ac96e360672 1225
charlesmn 0:3ac96e360672 1226
charlesmn 0:3ac96e360672 1227 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1228 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1229 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1230
charlesmn 0:3ac96e360672 1231 uint8_t bit_mask = 0x01;
charlesmn 0:3ac96e360672 1232 uint8_t clr_mask = 0xFF - bit_mask;
charlesmn 0:3ac96e360672 1233 uint8_t bit_value = value & bit_mask;
charlesmn 0:3ac96e360672 1234
charlesmn 0:3ac96e360672 1235 if (bit_id <= VL53L1_DEVICESEQUENCECONFIG_RANGE) {
charlesmn 0:3ac96e360672 1236
charlesmn 0:3ac96e360672 1237 if (bit_id > 0) {
charlesmn 0:3ac96e360672 1238 bit_mask = 0x01 << bit_id;
charlesmn 0:3ac96e360672 1239 bit_value = bit_value << bit_id;
charlesmn 0:3ac96e360672 1240 clr_mask = 0xFF - bit_mask;
charlesmn 0:3ac96e360672 1241 }
charlesmn 0:3ac96e360672 1242
charlesmn 0:3ac96e360672 1243 pdev->dyn_cfg.system__sequence_config =
charlesmn 0:3ac96e360672 1244 (pdev->dyn_cfg.system__sequence_config & clr_mask) |
charlesmn 0:3ac96e360672 1245 bit_value;
charlesmn 0:3ac96e360672 1246
charlesmn 0:3ac96e360672 1247 } else {
charlesmn 0:3ac96e360672 1248 status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn 0:3ac96e360672 1249 }
charlesmn 0:3ac96e360672 1250
charlesmn 0:3ac96e360672 1251 return status;
charlesmn 0:3ac96e360672 1252
charlesmn 0:3ac96e360672 1253 }
charlesmn 0:3ac96e360672 1254
charlesmn 0:3ac96e360672 1255
charlesmn 0:3ac96e360672 1256 VL53L1_Error VL53L1_get_sequence_config_bit(
charlesmn 0:3ac96e360672 1257 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1258 VL53L1_DeviceSequenceConfig bit_id,
charlesmn 0:3ac96e360672 1259 uint8_t *pvalue)
charlesmn 0:3ac96e360672 1260 {
charlesmn 0:3ac96e360672 1261
charlesmn 0:3ac96e360672 1262
charlesmn 0:3ac96e360672 1263 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1264 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1265 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1266
charlesmn 0:3ac96e360672 1267 uint8_t bit_mask = 0x01;
charlesmn 0:3ac96e360672 1268
charlesmn 0:3ac96e360672 1269 if (bit_id <= VL53L1_DEVICESEQUENCECONFIG_RANGE) {
charlesmn 0:3ac96e360672 1270
charlesmn 0:3ac96e360672 1271 if (bit_id > 0)
charlesmn 0:3ac96e360672 1272 bit_mask = 0x01 << bit_id;
charlesmn 0:3ac96e360672 1273
charlesmn 0:3ac96e360672 1274 *pvalue =
charlesmn 0:3ac96e360672 1275 pdev->dyn_cfg.system__sequence_config & bit_mask;
charlesmn 0:3ac96e360672 1276
charlesmn 0:3ac96e360672 1277 if (bit_id > 0)
charlesmn 0:3ac96e360672 1278 *pvalue = *pvalue >> bit_id;
charlesmn 0:3ac96e360672 1279
charlesmn 0:3ac96e360672 1280 } else {
charlesmn 0:3ac96e360672 1281 status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn 0:3ac96e360672 1282 }
charlesmn 0:3ac96e360672 1283
charlesmn 0:3ac96e360672 1284 return status;
charlesmn 0:3ac96e360672 1285 }
charlesmn 0:3ac96e360672 1286
charlesmn 0:3ac96e360672 1287
charlesmn 0:3ac96e360672 1288 VL53L1_Error VL53L1_set_interrupt_polarity(
charlesmn 0:3ac96e360672 1289 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1290 VL53L1_DeviceInterruptPolarity interrupt_polarity)
charlesmn 0:3ac96e360672 1291 {
charlesmn 0:3ac96e360672 1292
charlesmn 0:3ac96e360672 1293
charlesmn 0:3ac96e360672 1294 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1295 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1296 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1297
charlesmn 0:3ac96e360672 1298 pdev->stat_cfg.gpio_hv_mux__ctrl =
charlesmn 0:3ac96e360672 1299 (pdev->stat_cfg.gpio_hv_mux__ctrl &
charlesmn 0:3ac96e360672 1300 VL53L1_DEVICEINTERRUPTPOLARITY_CLEAR_MASK) |
charlesmn 0:3ac96e360672 1301 (interrupt_polarity &
charlesmn 0:3ac96e360672 1302 VL53L1_DEVICEINTERRUPTPOLARITY_BIT_MASK);
charlesmn 0:3ac96e360672 1303
charlesmn 0:3ac96e360672 1304 return status;
charlesmn 0:3ac96e360672 1305
charlesmn 0:3ac96e360672 1306 }
charlesmn 0:3ac96e360672 1307
charlesmn 0:3ac96e360672 1308
charlesmn 0:3ac96e360672 1309 VL53L1_Error VL53L1_set_refspadchar_config_struct(
charlesmn 0:3ac96e360672 1310 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1311 VL53L1_refspadchar_config_t *pdata)
charlesmn 0:3ac96e360672 1312 {
charlesmn 0:3ac96e360672 1313
charlesmn 0:3ac96e360672 1314
charlesmn 0:3ac96e360672 1315 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1316 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1317 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1318
charlesmn 0:3ac96e360672 1319 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1320
charlesmn 0:3ac96e360672 1321 pdev->refspadchar.device_test_mode = pdata->device_test_mode;
charlesmn 0:3ac96e360672 1322 pdev->refspadchar.VL53L1_p_009 = pdata->VL53L1_p_009;
charlesmn 0:3ac96e360672 1323 pdev->refspadchar.timeout_us = pdata->timeout_us;
charlesmn 0:3ac96e360672 1324 pdev->refspadchar.target_count_rate_mcps =
charlesmn 0:3ac96e360672 1325 pdata->target_count_rate_mcps;
charlesmn 0:3ac96e360672 1326 pdev->refspadchar.min_count_rate_limit_mcps =
charlesmn 0:3ac96e360672 1327 pdata->min_count_rate_limit_mcps;
charlesmn 0:3ac96e360672 1328 pdev->refspadchar.max_count_rate_limit_mcps =
charlesmn 0:3ac96e360672 1329 pdata->max_count_rate_limit_mcps;
charlesmn 0:3ac96e360672 1330
charlesmn 0:3ac96e360672 1331 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1332
charlesmn 0:3ac96e360672 1333 return status;
charlesmn 0:3ac96e360672 1334 }
charlesmn 0:3ac96e360672 1335
charlesmn 0:3ac96e360672 1336 VL53L1_Error VL53L1_get_refspadchar_config_struct(
charlesmn 0:3ac96e360672 1337 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1338 VL53L1_refspadchar_config_t *pdata)
charlesmn 0:3ac96e360672 1339 {
charlesmn 0:3ac96e360672 1340
charlesmn 0:3ac96e360672 1341
charlesmn 0:3ac96e360672 1342 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1343 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1344 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1345
charlesmn 0:3ac96e360672 1346 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1347
charlesmn 0:3ac96e360672 1348 pdata->device_test_mode = pdev->refspadchar.device_test_mode;
charlesmn 0:3ac96e360672 1349 pdata->VL53L1_p_009 = pdev->refspadchar.VL53L1_p_009;
charlesmn 0:3ac96e360672 1350 pdata->timeout_us = pdev->refspadchar.timeout_us;
charlesmn 0:3ac96e360672 1351 pdata->target_count_rate_mcps =
charlesmn 0:3ac96e360672 1352 pdev->refspadchar.target_count_rate_mcps;
charlesmn 0:3ac96e360672 1353 pdata->min_count_rate_limit_mcps =
charlesmn 0:3ac96e360672 1354 pdev->refspadchar.min_count_rate_limit_mcps;
charlesmn 0:3ac96e360672 1355 pdata->max_count_rate_limit_mcps =
charlesmn 0:3ac96e360672 1356 pdev->refspadchar.max_count_rate_limit_mcps;
charlesmn 0:3ac96e360672 1357
charlesmn 0:3ac96e360672 1358 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1359
charlesmn 0:3ac96e360672 1360 return status;
charlesmn 0:3ac96e360672 1361 }
charlesmn 0:3ac96e360672 1362
charlesmn 0:3ac96e360672 1363
charlesmn 0:3ac96e360672 1364
charlesmn 0:3ac96e360672 1365 VL53L1_Error VL53L1_set_range_ignore_threshold(
charlesmn 0:3ac96e360672 1366 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1367 uint8_t range_ignore_thresh_mult,
charlesmn 0:3ac96e360672 1368 uint16_t range_ignore_threshold_mcps)
charlesmn 0:3ac96e360672 1369 {
charlesmn 0:3ac96e360672 1370
charlesmn 0:3ac96e360672 1371
charlesmn 0:3ac96e360672 1372 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1373 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1374 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1375
charlesmn 0:3ac96e360672 1376 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps =
charlesmn 0:3ac96e360672 1377 range_ignore_threshold_mcps;
charlesmn 0:3ac96e360672 1378
charlesmn 0:3ac96e360672 1379 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult =
charlesmn 0:3ac96e360672 1380 range_ignore_thresh_mult;
charlesmn 0:3ac96e360672 1381
charlesmn 0:3ac96e360672 1382 return status;
charlesmn 0:3ac96e360672 1383
charlesmn 0:3ac96e360672 1384 }
charlesmn 0:3ac96e360672 1385
charlesmn 0:3ac96e360672 1386 VL53L1_Error VL53L1_get_range_ignore_threshold(
charlesmn 0:3ac96e360672 1387 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1388 uint8_t *prange_ignore_thresh_mult,
charlesmn 0:3ac96e360672 1389 uint16_t *prange_ignore_threshold_mcps_internal,
charlesmn 0:3ac96e360672 1390 uint16_t *prange_ignore_threshold_mcps_current)
charlesmn 0:3ac96e360672 1391 {
charlesmn 0:3ac96e360672 1392
charlesmn 0:3ac96e360672 1393
charlesmn 0:3ac96e360672 1394 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1395 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1396 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1397
charlesmn 0:3ac96e360672 1398 *prange_ignore_thresh_mult =
charlesmn 0:3ac96e360672 1399 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult;
charlesmn 0:3ac96e360672 1400
charlesmn 0:3ac96e360672 1401 *prange_ignore_threshold_mcps_current =
charlesmn 0:3ac96e360672 1402 pdev->stat_cfg.algo__range_ignore_threshold_mcps;
charlesmn 0:3ac96e360672 1403
charlesmn 0:3ac96e360672 1404 *prange_ignore_threshold_mcps_internal =
charlesmn 0:3ac96e360672 1405 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps;
charlesmn 0:3ac96e360672 1406
charlesmn 0:3ac96e360672 1407 return status;
charlesmn 0:3ac96e360672 1408
charlesmn 0:3ac96e360672 1409 }
charlesmn 0:3ac96e360672 1410
charlesmn 0:3ac96e360672 1411
charlesmn 0:3ac96e360672 1412
charlesmn 0:3ac96e360672 1413 VL53L1_Error VL53L1_get_interrupt_polarity(
charlesmn 0:3ac96e360672 1414 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1415 VL53L1_DeviceInterruptPolarity *pinterrupt_polarity)
charlesmn 0:3ac96e360672 1416 {
charlesmn 0:3ac96e360672 1417
charlesmn 0:3ac96e360672 1418
charlesmn 0:3ac96e360672 1419 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1420 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1421 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1422
charlesmn 0:3ac96e360672 1423 *pinterrupt_polarity =
charlesmn 0:3ac96e360672 1424 pdev->stat_cfg.gpio_hv_mux__ctrl &
charlesmn 0:3ac96e360672 1425 VL53L1_DEVICEINTERRUPTPOLARITY_BIT_MASK;
charlesmn 0:3ac96e360672 1426
charlesmn 0:3ac96e360672 1427 return status;
charlesmn 0:3ac96e360672 1428
charlesmn 0:3ac96e360672 1429 }
charlesmn 0:3ac96e360672 1430
charlesmn 0:3ac96e360672 1431
charlesmn 0:3ac96e360672 1432 VL53L1_Error VL53L1_set_user_zone(
charlesmn 0:3ac96e360672 1433 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1434 VL53L1_user_zone_t *puser_zone)
charlesmn 0:3ac96e360672 1435 {
charlesmn 0:3ac96e360672 1436
charlesmn 0:3ac96e360672 1437
charlesmn 0:3ac96e360672 1438 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1439 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1440
charlesmn 0:3ac96e360672 1441 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1442
charlesmn 0:3ac96e360672 1443
charlesmn 0:3ac96e360672 1444 VL53L1_encode_row_col(
charlesmn 0:3ac96e360672 1445 puser_zone->y_centre,
charlesmn 0:3ac96e360672 1446 puser_zone->x_centre,
charlesmn 0:3ac96e360672 1447 &(pdev->dyn_cfg.roi_config__user_roi_centre_spad));
charlesmn 0:3ac96e360672 1448
charlesmn 0:3ac96e360672 1449
charlesmn 0:3ac96e360672 1450 VL53L1_encode_zone_size(
charlesmn 0:3ac96e360672 1451 puser_zone->width,
charlesmn 0:3ac96e360672 1452 puser_zone->height,
charlesmn 0:3ac96e360672 1453 &(pdev->dyn_cfg.roi_config__user_roi_requested_global_xy_size));
charlesmn 0:3ac96e360672 1454
charlesmn 0:3ac96e360672 1455
charlesmn 0:3ac96e360672 1456
charlesmn 0:3ac96e360672 1457 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1458
charlesmn 0:3ac96e360672 1459 return status;
charlesmn 0:3ac96e360672 1460 }
charlesmn 0:3ac96e360672 1461
charlesmn 0:3ac96e360672 1462
charlesmn 0:3ac96e360672 1463 VL53L1_Error VL53L1_get_user_zone(
charlesmn 0:3ac96e360672 1464 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1465 VL53L1_user_zone_t *puser_zone)
charlesmn 0:3ac96e360672 1466 {
charlesmn 0:3ac96e360672 1467
charlesmn 0:3ac96e360672 1468
charlesmn 0:3ac96e360672 1469 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1470 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1471
charlesmn 0:3ac96e360672 1472 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1473
charlesmn 0:3ac96e360672 1474
charlesmn 0:3ac96e360672 1475 VL53L1_decode_row_col(
charlesmn 0:3ac96e360672 1476 pdev->dyn_cfg.roi_config__user_roi_centre_spad,
charlesmn 0:3ac96e360672 1477 &(puser_zone->y_centre),
charlesmn 0:3ac96e360672 1478 &(puser_zone->x_centre));
charlesmn 0:3ac96e360672 1479
charlesmn 0:3ac96e360672 1480
charlesmn 0:3ac96e360672 1481 VL53L1_decode_zone_size(
charlesmn 0:3ac96e360672 1482 pdev->dyn_cfg.roi_config__user_roi_requested_global_xy_size,
charlesmn 0:3ac96e360672 1483 &(puser_zone->width),
charlesmn 0:3ac96e360672 1484 &(puser_zone->height));
charlesmn 0:3ac96e360672 1485
charlesmn 0:3ac96e360672 1486 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1487
charlesmn 0:3ac96e360672 1488 return status;
charlesmn 0:3ac96e360672 1489 }
charlesmn 0:3ac96e360672 1490
charlesmn 0:3ac96e360672 1491
charlesmn 0:3ac96e360672 1492
charlesmn 0:3ac96e360672 1493 VL53L1_Error VL53L1_get_mode_mitigation_roi(
charlesmn 0:3ac96e360672 1494 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1495 VL53L1_user_zone_t *pmm_roi)
charlesmn 0:3ac96e360672 1496 {
charlesmn 0:3ac96e360672 1497
charlesmn 0:3ac96e360672 1498
charlesmn 0:3ac96e360672 1499 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1500 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1501
charlesmn 0:3ac96e360672 1502 uint8_t x = 0;
charlesmn 0:3ac96e360672 1503 uint8_t y = 0;
charlesmn 0:3ac96e360672 1504 uint8_t xy_size = 0;
charlesmn 0:3ac96e360672 1505
charlesmn 0:3ac96e360672 1506 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1507
charlesmn 0:3ac96e360672 1508
charlesmn 0:3ac96e360672 1509 VL53L1_decode_row_col(
charlesmn 0:3ac96e360672 1510 pdev->nvm_copy_data.roi_config__mode_roi_centre_spad,
charlesmn 0:3ac96e360672 1511 &y,
charlesmn 0:3ac96e360672 1512 &x);
charlesmn 0:3ac96e360672 1513
charlesmn 0:3ac96e360672 1514 pmm_roi->x_centre = x;
charlesmn 0:3ac96e360672 1515 pmm_roi->y_centre = y;
charlesmn 0:3ac96e360672 1516
charlesmn 0:3ac96e360672 1517
charlesmn 0:3ac96e360672 1518 xy_size = pdev->nvm_copy_data.roi_config__mode_roi_xy_size;
charlesmn 0:3ac96e360672 1519
charlesmn 0:3ac96e360672 1520 pmm_roi->height = xy_size >> 4;
charlesmn 0:3ac96e360672 1521 pmm_roi->width = xy_size & 0x0F;
charlesmn 0:3ac96e360672 1522
charlesmn 0:3ac96e360672 1523 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1524
charlesmn 0:3ac96e360672 1525 return status;
charlesmn 0:3ac96e360672 1526 }
charlesmn 0:3ac96e360672 1527
charlesmn 0:3ac96e360672 1528
charlesmn 0:3ac96e360672 1529 VL53L1_Error VL53L1_set_zone_config(
charlesmn 0:3ac96e360672 1530 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1531 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 1532 {
charlesmn 0:3ac96e360672 1533
charlesmn 0:3ac96e360672 1534
charlesmn 0:3ac96e360672 1535
charlesmn 0:3ac96e360672 1536 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1537 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1538
charlesmn 0:3ac96e360672 1539 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1540
charlesmn 0:3ac96e360672 1541
charlesmn 0:3ac96e360672 1542 memcpy(&(pdev->zone_cfg.user_zones), &(pzone_cfg->user_zones),
charlesmn 0:3ac96e360672 1543 sizeof(pdev->zone_cfg.user_zones));
charlesmn 0:3ac96e360672 1544
charlesmn 0:3ac96e360672 1545
charlesmn 0:3ac96e360672 1546 pdev->zone_cfg.max_zones = pzone_cfg->max_zones;
charlesmn 0:3ac96e360672 1547 pdev->zone_cfg.active_zones = pzone_cfg->active_zones;
charlesmn 0:3ac96e360672 1548
charlesmn 0:3ac96e360672 1549 status = VL53L1_init_zone_config_histogram_bins(&pdev->zone_cfg);
charlesmn 0:3ac96e360672 1550
charlesmn 0:3ac96e360672 1551
charlesmn 0:3ac96e360672 1552
charlesmn 0:3ac96e360672 1553 if (pzone_cfg->active_zones == 0)
charlesmn 0:3ac96e360672 1554 pdev->gen_cfg.global_config__stream_divider = 0;
charlesmn 0:3ac96e360672 1555 else if (pzone_cfg->active_zones < VL53L1_MAX_USER_ZONES)
charlesmn 0:3ac96e360672 1556 pdev->gen_cfg.global_config__stream_divider =
charlesmn 0:3ac96e360672 1557 pzone_cfg->active_zones + 1;
charlesmn 0:3ac96e360672 1558 else
charlesmn 0:3ac96e360672 1559 pdev->gen_cfg.global_config__stream_divider =
charlesmn 0:3ac96e360672 1560 VL53L1_MAX_USER_ZONES + 1;
charlesmn 0:3ac96e360672 1561
charlesmn 0:3ac96e360672 1562 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1563
charlesmn 0:3ac96e360672 1564 return status;
charlesmn 0:3ac96e360672 1565
charlesmn 0:3ac96e360672 1566 }
charlesmn 0:3ac96e360672 1567
charlesmn 0:3ac96e360672 1568
charlesmn 0:3ac96e360672 1569 VL53L1_Error VL53L1_get_zone_config(
charlesmn 0:3ac96e360672 1570 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1571 VL53L1_zone_config_t *pzone_cfg)
charlesmn 0:3ac96e360672 1572 {
charlesmn 0:3ac96e360672 1573
charlesmn 0:3ac96e360672 1574
charlesmn 0:3ac96e360672 1575 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1576 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1577
charlesmn 0:3ac96e360672 1578 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1579
charlesmn 0:3ac96e360672 1580
charlesmn 0:3ac96e360672 1581 memcpy(pzone_cfg, &(pdev->zone_cfg), sizeof(VL53L1_zone_config_t));
charlesmn 0:3ac96e360672 1582
charlesmn 0:3ac96e360672 1583 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1584
charlesmn 0:3ac96e360672 1585 return status;
charlesmn 0:3ac96e360672 1586 }
charlesmn 0:3ac96e360672 1587
charlesmn 0:3ac96e360672 1588 VL53L1_Error VL53L1_get_preset_mode_timing_cfg(
charlesmn 0:3ac96e360672 1589 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1590 VL53L1_DevicePresetModes device_preset_mode,
charlesmn 0:3ac96e360672 1591 uint16_t *pdss_config__target_total_rate_mcps,
charlesmn 0:3ac96e360672 1592 uint32_t *pphasecal_config_timeout_us,
charlesmn 0:3ac96e360672 1593 uint32_t *pmm_config_timeout_us,
charlesmn 0:3ac96e360672 1594 uint32_t *prange_config_timeout_us)
charlesmn 0:3ac96e360672 1595 {
charlesmn 0:3ac96e360672 1596 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1597 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1598
charlesmn 0:3ac96e360672 1599 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1600
charlesmn 0:3ac96e360672 1601
charlesmn 0:3ac96e360672 1602 switch (device_preset_mode) {
charlesmn 0:3ac96e360672 1603
charlesmn 0:3ac96e360672 1604 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING:
charlesmn 0:3ac96e360672 1605 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_SHORT_RANGE:
charlesmn 0:3ac96e360672 1606 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_LONG_RANGE:
charlesmn 0:3ac96e360672 1607 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM1_CAL:
charlesmn 0:3ac96e360672 1608 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM2_CAL:
charlesmn 0:3ac96e360672 1609 case VL53L1_DEVICEPRESETMODE_OLT:
charlesmn 0:3ac96e360672 1610 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1611 pdev->tuning_parms.tp_dss_target_lite_mcps;
charlesmn 0:3ac96e360672 1612 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1613 pdev->tuning_parms.tp_phasecal_timeout_lite_us;
charlesmn 0:3ac96e360672 1614 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1615 pdev->tuning_parms.tp_mm_timeout_lite_us;
charlesmn 0:3ac96e360672 1616 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1617 pdev->tuning_parms.tp_range_timeout_lite_us;
charlesmn 0:3ac96e360672 1618 break;
charlesmn 0:3ac96e360672 1619
charlesmn 0:3ac96e360672 1620 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING:
charlesmn 0:3ac96e360672 1621 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING_SHORT_RANGE:
charlesmn 0:3ac96e360672 1622 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING_LONG_RANGE:
charlesmn 0:3ac96e360672 1623 case VL53L1_DEVICEPRESETMODE_SINGLESHOT_RANGING:
charlesmn 0:3ac96e360672 1624 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1625 pdev->tuning_parms.tp_dss_target_timed_mcps;
charlesmn 0:3ac96e360672 1626 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1627 pdev->tuning_parms.tp_phasecal_timeout_timed_us;
charlesmn 0:3ac96e360672 1628 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1629 pdev->tuning_parms.tp_mm_timeout_timed_us;
charlesmn 0:3ac96e360672 1630 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1631 pdev->tuning_parms.tp_range_timeout_timed_us;
charlesmn 0:3ac96e360672 1632 break;
charlesmn 0:3ac96e360672 1633
charlesmn 0:3ac96e360672 1634 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_SHORT_RANGE:
charlesmn 0:3ac96e360672 1635 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_MEDIUM_RANGE:
charlesmn 0:3ac96e360672 1636 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_LONG_RANGE:
charlesmn 0:3ac96e360672 1637 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1638 pdev->tuning_parms.tp_dss_target_timed_mcps;
charlesmn 0:3ac96e360672 1639 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1640 pdev->tuning_parms.tp_phasecal_timeout_timed_us;
charlesmn 0:3ac96e360672 1641 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1642 pdev->tuning_parms.tp_mm_timeout_lpa_us;
charlesmn 0:3ac96e360672 1643 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1644 pdev->tuning_parms.tp_range_timeout_lpa_us;
charlesmn 0:3ac96e360672 1645 break;
charlesmn 0:3ac96e360672 1646
charlesmn 0:3ac96e360672 1647 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING:
charlesmn 0:3ac96e360672 1648 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_WITH_MM1:
charlesmn 0:3ac96e360672 1649 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_WITH_MM2:
charlesmn 0:3ac96e360672 1650 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_MM1_CAL:
charlesmn 0:3ac96e360672 1651 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_MM2_CAL:
charlesmn 0:3ac96e360672 1652 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_REF_ARRAY:
charlesmn 0:3ac96e360672 1653 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE:
charlesmn 0:3ac96e360672 1654 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE_MM1:
charlesmn 0:3ac96e360672 1655 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE_MM2:
charlesmn 0:3ac96e360672 1656 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_CHARACTERISATION:
charlesmn 0:3ac96e360672 1657 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1658 pdev->tuning_parms.tp_dss_target_histo_mcps;
charlesmn 0:3ac96e360672 1659 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1660 pdev->tuning_parms.tp_phasecal_timeout_hist_long_us;
charlesmn 0:3ac96e360672 1661 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1662 pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn 0:3ac96e360672 1663 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1664 pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn 0:3ac96e360672 1665
charlesmn 0:3ac96e360672 1666 break;
charlesmn 0:3ac96e360672 1667
charlesmn 0:3ac96e360672 1668 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE:
charlesmn 0:3ac96e360672 1669 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1670 pdev->tuning_parms.tp_dss_target_histo_mz_mcps;
charlesmn 0:3ac96e360672 1671 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1672 pdev->tuning_parms.tp_phasecal_timeout_mz_med_us;
charlesmn 0:3ac96e360672 1673 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1674 pdev->tuning_parms.tp_mm_timeout_mz_us;
charlesmn 0:3ac96e360672 1675 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1676 pdev->tuning_parms.tp_range_timeout_mz_us;
charlesmn 0:3ac96e360672 1677 break;
charlesmn 0:3ac96e360672 1678
charlesmn 0:3ac96e360672 1679 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE_SHORT_RANGE:
charlesmn 0:3ac96e360672 1680 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1681 pdev->tuning_parms.tp_dss_target_histo_mz_mcps;
charlesmn 0:3ac96e360672 1682 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1683 pdev->tuning_parms.tp_phasecal_timeout_mz_short_us;
charlesmn 0:3ac96e360672 1684 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1685 pdev->tuning_parms.tp_mm_timeout_mz_us;
charlesmn 0:3ac96e360672 1686 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1687 pdev->tuning_parms.tp_range_timeout_mz_us;
charlesmn 0:3ac96e360672 1688 break;
charlesmn 0:3ac96e360672 1689
charlesmn 0:3ac96e360672 1690 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE_LONG_RANGE:
charlesmn 0:3ac96e360672 1691 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1692 pdev->tuning_parms.tp_dss_target_histo_mz_mcps;
charlesmn 0:3ac96e360672 1693 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1694 pdev->tuning_parms.tp_phasecal_timeout_mz_long_us;
charlesmn 0:3ac96e360672 1695 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1696 pdev->tuning_parms.tp_mm_timeout_mz_us;
charlesmn 0:3ac96e360672 1697 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1698 pdev->tuning_parms.tp_range_timeout_mz_us;
charlesmn 0:3ac96e360672 1699 break;
charlesmn 0:3ac96e360672 1700
charlesmn 0:3ac96e360672 1701 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_SHORT_TIMING:
charlesmn 0:3ac96e360672 1702 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1703 pdev->tuning_parms.tp_dss_target_histo_mcps;
charlesmn 0:3ac96e360672 1704 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1705 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us;
charlesmn 0:3ac96e360672 1706 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1707 pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn 0:3ac96e360672 1708 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1709 pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn 0:3ac96e360672 1710 break;
charlesmn 0:3ac96e360672 1711
charlesmn 0:3ac96e360672 1712 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE:
charlesmn 0:3ac96e360672 1713 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE_MM1:
charlesmn 0:3ac96e360672 1714 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE_MM2:
charlesmn 0:3ac96e360672 1715 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1716 pdev->tuning_parms.tp_dss_target_histo_mcps;
charlesmn 0:3ac96e360672 1717 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1718 pdev->tuning_parms.tp_phasecal_timeout_hist_med_us;
charlesmn 0:3ac96e360672 1719 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1720 pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn 0:3ac96e360672 1721 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1722 pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn 0:3ac96e360672 1723 break;
charlesmn 0:3ac96e360672 1724
charlesmn 0:3ac96e360672 1725
charlesmn 0:3ac96e360672 1726 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE:
charlesmn 0:3ac96e360672 1727 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE_MM1:
charlesmn 0:3ac96e360672 1728 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE_MM2:
charlesmn 0:3ac96e360672 1729 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1730 pdev->tuning_parms.tp_dss_target_histo_mcps;
charlesmn 0:3ac96e360672 1731 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1732 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us;
charlesmn 0:3ac96e360672 1733 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1734 pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn 0:3ac96e360672 1735 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1736 pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn 0:3ac96e360672 1737 break;
charlesmn 0:3ac96e360672 1738
charlesmn 0:3ac96e360672 1739 case VL53L1_DEVICEPRESETMODE_SPECIAL_HISTOGRAM_SHORT_RANGE:
charlesmn 0:3ac96e360672 1740 *pdss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 1741 pdev->tuning_parms.tp_dss_target_very_short_mcps;
charlesmn 0:3ac96e360672 1742 *pphasecal_config_timeout_us =
charlesmn 0:3ac96e360672 1743 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us;
charlesmn 0:3ac96e360672 1744 *pmm_config_timeout_us =
charlesmn 0:3ac96e360672 1745 pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn 0:3ac96e360672 1746 *prange_config_timeout_us =
charlesmn 0:3ac96e360672 1747 pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn 0:3ac96e360672 1748 break;
charlesmn 0:3ac96e360672 1749
charlesmn 0:3ac96e360672 1750 default:
charlesmn 0:3ac96e360672 1751 status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn 0:3ac96e360672 1752 break;
charlesmn 0:3ac96e360672 1753
charlesmn 0:3ac96e360672 1754 }
charlesmn 0:3ac96e360672 1755
charlesmn 0:3ac96e360672 1756 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 1757
charlesmn 0:3ac96e360672 1758 return status;
charlesmn 0:3ac96e360672 1759 }
charlesmn 0:3ac96e360672 1760
charlesmn 0:3ac96e360672 1761
charlesmn 0:3ac96e360672 1762 VL53L1_Error VL53L1_set_preset_mode(
charlesmn 0:3ac96e360672 1763 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 1764 VL53L1_DevicePresetModes device_preset_mode,
charlesmn 0:3ac96e360672 1765 uint16_t dss_config__target_total_rate_mcps,
charlesmn 0:3ac96e360672 1766 uint32_t phasecal_config_timeout_us,
charlesmn 0:3ac96e360672 1767 uint32_t mm_config_timeout_us,
charlesmn 0:3ac96e360672 1768 uint32_t range_config_timeout_us,
charlesmn 0:3ac96e360672 1769 uint32_t inter_measurement_period_ms)
charlesmn 0:3ac96e360672 1770 {
charlesmn 0:3ac96e360672 1771
charlesmn 0:3ac96e360672 1772
charlesmn 0:3ac96e360672 1773 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 1774 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 1775 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 1776 VL53L1_LLDriverResults_t *pres =
charlesmn 0:3ac96e360672 1777 VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn 0:3ac96e360672 1778
charlesmn 0:3ac96e360672 1779 VL53L1_hist_post_process_config_t *phistpostprocess =
charlesmn 0:3ac96e360672 1780 &(pdev->histpostprocess);
charlesmn 0:3ac96e360672 1781
charlesmn 0:3ac96e360672 1782 VL53L1_static_config_t *pstatic = &(pdev->stat_cfg);
charlesmn 0:3ac96e360672 1783 VL53L1_histogram_config_t *phistogram = &(pdev->hist_cfg);
charlesmn 0:3ac96e360672 1784 VL53L1_general_config_t *pgeneral = &(pdev->gen_cfg);
charlesmn 0:3ac96e360672 1785 VL53L1_timing_config_t *ptiming = &(pdev->tim_cfg);
charlesmn 0:3ac96e360672 1786 VL53L1_dynamic_config_t *pdynamic = &(pdev->dyn_cfg);
charlesmn 0:3ac96e360672 1787 VL53L1_system_control_t *psystem = &(pdev->sys_ctrl);
charlesmn 0:3ac96e360672 1788 VL53L1_zone_config_t *pzone_cfg = &(pdev->zone_cfg);
charlesmn 0:3ac96e360672 1789 VL53L1_tuning_parm_storage_t *ptuning_parms = &(pdev->tuning_parms);
charlesmn 0:3ac96e360672 1790 VL53L1_low_power_auto_data_t *plpadata =
charlesmn 0:3ac96e360672 1791 &(pdev->low_power_auto_data);
charlesmn 0:3ac96e360672 1792
charlesmn 0:3ac96e360672 1793 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 1794
charlesmn 0:3ac96e360672 1795
charlesmn 0:3ac96e360672 1796 pdev->preset_mode = device_preset_mode;
charlesmn 0:3ac96e360672 1797 pdev->mm_config_timeout_us = mm_config_timeout_us;
charlesmn 0:3ac96e360672 1798 pdev->range_config_timeout_us = range_config_timeout_us;
charlesmn 0:3ac96e360672 1799 pdev->inter_measurement_period_ms = inter_measurement_period_ms;
charlesmn 0:3ac96e360672 1800
charlesmn 0:3ac96e360672 1801
charlesmn 0:3ac96e360672 1802
charlesmn 0:3ac96e360672 1803 VL53L1_init_ll_driver_state(
charlesmn 0:3ac96e360672 1804 Dev,
charlesmn 0:3ac96e360672 1805 VL53L1_DEVICESTATE_SW_STANDBY);
charlesmn 0:3ac96e360672 1806
charlesmn 0:3ac96e360672 1807
charlesmn 0:3ac96e360672 1808
charlesmn 0:3ac96e360672 1809 switch (device_preset_mode) {
charlesmn 0:3ac96e360672 1810
charlesmn 0:3ac96e360672 1811 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING:
charlesmn 0:3ac96e360672 1812 status = VL53L1_preset_mode_standard_ranging(
charlesmn 0:3ac96e360672 1813 pstatic,
charlesmn 0:3ac96e360672 1814 phistogram,
charlesmn 0:3ac96e360672 1815 pgeneral,
charlesmn 0:3ac96e360672 1816 ptiming,
charlesmn 0:3ac96e360672 1817 pdynamic,
charlesmn 0:3ac96e360672 1818 psystem,
charlesmn 0:3ac96e360672 1819 ptuning_parms,
charlesmn 0:3ac96e360672 1820 pzone_cfg);
charlesmn 0:3ac96e360672 1821 break;
charlesmn 0:3ac96e360672 1822
charlesmn 0:3ac96e360672 1823 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_SHORT_RANGE:
charlesmn 0:3ac96e360672 1824 status = VL53L1_preset_mode_standard_ranging_short_range(
charlesmn 0:3ac96e360672 1825 pstatic,
charlesmn 0:3ac96e360672 1826 phistogram,
charlesmn 0:3ac96e360672 1827 pgeneral,
charlesmn 0:3ac96e360672 1828 ptiming,
charlesmn 0:3ac96e360672 1829 pdynamic,
charlesmn 0:3ac96e360672 1830 psystem,
charlesmn 0:3ac96e360672 1831 ptuning_parms,
charlesmn 0:3ac96e360672 1832 pzone_cfg);
charlesmn 0:3ac96e360672 1833 break;
charlesmn 0:3ac96e360672 1834
charlesmn 0:3ac96e360672 1835 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_LONG_RANGE:
charlesmn 0:3ac96e360672 1836 status = VL53L1_preset_mode_standard_ranging_long_range(
charlesmn 0:3ac96e360672 1837 pstatic,
charlesmn 0:3ac96e360672 1838 phistogram,
charlesmn 0:3ac96e360672 1839 pgeneral,
charlesmn 0:3ac96e360672 1840 ptiming,
charlesmn 0:3ac96e360672 1841 pdynamic,
charlesmn 0:3ac96e360672 1842 psystem,
charlesmn 0:3ac96e360672 1843 ptuning_parms,
charlesmn 0:3ac96e360672 1844 pzone_cfg);
charlesmn 0:3ac96e360672 1845 break;
charlesmn 0:3ac96e360672 1846
charlesmn 0:3ac96e360672 1847 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM1_CAL:
charlesmn 0:3ac96e360672 1848 status = VL53L1_preset_mode_standard_ranging_mm1_cal(
charlesmn 0:3ac96e360672 1849 pstatic,
charlesmn 0:3ac96e360672 1850 phistogram,
charlesmn 0:3ac96e360672 1851 pgeneral,
charlesmn 0:3ac96e360672 1852 ptiming,
charlesmn 0:3ac96e360672 1853 pdynamic,
charlesmn 0:3ac96e360672 1854 psystem,
charlesmn 0:3ac96e360672 1855 ptuning_parms,
charlesmn 0:3ac96e360672 1856 pzone_cfg);
charlesmn 0:3ac96e360672 1857 break;
charlesmn 0:3ac96e360672 1858
charlesmn 0:3ac96e360672 1859 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM2_CAL:
charlesmn 0:3ac96e360672 1860 status = VL53L1_preset_mode_standard_ranging_mm2_cal(
charlesmn 0:3ac96e360672 1861 pstatic,
charlesmn 0:3ac96e360672 1862 phistogram,
charlesmn 0:3ac96e360672 1863 pgeneral,
charlesmn 0:3ac96e360672 1864 ptiming,
charlesmn 0:3ac96e360672 1865 pdynamic,
charlesmn 0:3ac96e360672 1866 psystem,
charlesmn 0:3ac96e360672 1867 ptuning_parms,
charlesmn 0:3ac96e360672 1868 pzone_cfg);
charlesmn 0:3ac96e360672 1869 break;
charlesmn 0:3ac96e360672 1870
charlesmn 0:3ac96e360672 1871 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING:
charlesmn 0:3ac96e360672 1872 status = VL53L1_preset_mode_timed_ranging(
charlesmn 0:3ac96e360672 1873 pstatic,
charlesmn 0:3ac96e360672 1874 phistogram,
charlesmn 0:3ac96e360672 1875 pgeneral,
charlesmn 0:3ac96e360672 1876 ptiming,
charlesmn 0:3ac96e360672 1877 pdynamic,
charlesmn 0:3ac96e360672 1878 psystem,
charlesmn 0:3ac96e360672 1879 ptuning_parms,
charlesmn 0:3ac96e360672 1880 pzone_cfg);
charlesmn 0:3ac96e360672 1881 break;
charlesmn 0:3ac96e360672 1882
charlesmn 0:3ac96e360672 1883 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING_SHORT_RANGE:
charlesmn 0:3ac96e360672 1884 status = VL53L1_preset_mode_timed_ranging_short_range(
charlesmn 0:3ac96e360672 1885 pstatic,
charlesmn 0:3ac96e360672 1886 phistogram,
charlesmn 0:3ac96e360672 1887 pgeneral,
charlesmn 0:3ac96e360672 1888 ptiming,
charlesmn 0:3ac96e360672 1889 pdynamic,
charlesmn 0:3ac96e360672 1890 psystem,
charlesmn 0:3ac96e360672 1891 ptuning_parms,
charlesmn 0:3ac96e360672 1892 pzone_cfg);
charlesmn 0:3ac96e360672 1893 break;
charlesmn 0:3ac96e360672 1894
charlesmn 0:3ac96e360672 1895 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING_LONG_RANGE:
charlesmn 0:3ac96e360672 1896 status = VL53L1_preset_mode_timed_ranging_long_range(
charlesmn 0:3ac96e360672 1897 pstatic,
charlesmn 0:3ac96e360672 1898 phistogram,
charlesmn 0:3ac96e360672 1899 pgeneral,
charlesmn 0:3ac96e360672 1900 ptiming,
charlesmn 0:3ac96e360672 1901 pdynamic,
charlesmn 0:3ac96e360672 1902 psystem,
charlesmn 0:3ac96e360672 1903 ptuning_parms,
charlesmn 0:3ac96e360672 1904 pzone_cfg);
charlesmn 0:3ac96e360672 1905 break;
charlesmn 0:3ac96e360672 1906
charlesmn 0:3ac96e360672 1907 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING:
charlesmn 0:3ac96e360672 1908 status = VL53L1_preset_mode_histogram_ranging(
charlesmn 0:3ac96e360672 1909 phistpostprocess,
charlesmn 0:3ac96e360672 1910 pstatic,
charlesmn 0:3ac96e360672 1911 phistogram,
charlesmn 0:3ac96e360672 1912 pgeneral,
charlesmn 0:3ac96e360672 1913 ptiming,
charlesmn 0:3ac96e360672 1914 pdynamic,
charlesmn 0:3ac96e360672 1915 psystem,
charlesmn 0:3ac96e360672 1916 ptuning_parms,
charlesmn 0:3ac96e360672 1917 pzone_cfg);
charlesmn 0:3ac96e360672 1918 break;
charlesmn 0:3ac96e360672 1919
charlesmn 0:3ac96e360672 1920 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_WITH_MM1:
charlesmn 0:3ac96e360672 1921 status = VL53L1_preset_mode_histogram_ranging_with_mm1(
charlesmn 0:3ac96e360672 1922 phistpostprocess,
charlesmn 0:3ac96e360672 1923 pstatic,
charlesmn 0:3ac96e360672 1924 phistogram,
charlesmn 0:3ac96e360672 1925 pgeneral,
charlesmn 0:3ac96e360672 1926 ptiming,
charlesmn 0:3ac96e360672 1927 pdynamic,
charlesmn 0:3ac96e360672 1928 psystem,
charlesmn 0:3ac96e360672 1929 ptuning_parms,
charlesmn 0:3ac96e360672 1930 pzone_cfg);
charlesmn 0:3ac96e360672 1931 break;
charlesmn 0:3ac96e360672 1932
charlesmn 0:3ac96e360672 1933 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_WITH_MM2:
charlesmn 0:3ac96e360672 1934 status = VL53L1_preset_mode_histogram_ranging_with_mm2(
charlesmn 0:3ac96e360672 1935 phistpostprocess,
charlesmn 0:3ac96e360672 1936 pstatic,
charlesmn 0:3ac96e360672 1937 phistogram,
charlesmn 0:3ac96e360672 1938 pgeneral,
charlesmn 0:3ac96e360672 1939 ptiming,
charlesmn 0:3ac96e360672 1940 pdynamic,
charlesmn 0:3ac96e360672 1941 psystem,
charlesmn 0:3ac96e360672 1942 ptuning_parms,
charlesmn 0:3ac96e360672 1943 pzone_cfg);
charlesmn 0:3ac96e360672 1944 break;
charlesmn 0:3ac96e360672 1945
charlesmn 0:3ac96e360672 1946 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_MM1_CAL:
charlesmn 0:3ac96e360672 1947 status = VL53L1_preset_mode_histogram_ranging_mm1_cal(
charlesmn 0:3ac96e360672 1948 phistpostprocess,
charlesmn 0:3ac96e360672 1949 pstatic,
charlesmn 0:3ac96e360672 1950 phistogram,
charlesmn 0:3ac96e360672 1951 pgeneral,
charlesmn 0:3ac96e360672 1952 ptiming,
charlesmn 0:3ac96e360672 1953 pdynamic,
charlesmn 0:3ac96e360672 1954 psystem,
charlesmn 0:3ac96e360672 1955 ptuning_parms,
charlesmn 0:3ac96e360672 1956 pzone_cfg);
charlesmn 0:3ac96e360672 1957 break;
charlesmn 0:3ac96e360672 1958
charlesmn 0:3ac96e360672 1959 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_MM2_CAL:
charlesmn 0:3ac96e360672 1960 status = VL53L1_preset_mode_histogram_ranging_mm2_cal(
charlesmn 0:3ac96e360672 1961 phistpostprocess,
charlesmn 0:3ac96e360672 1962 pstatic,
charlesmn 0:3ac96e360672 1963 phistogram,
charlesmn 0:3ac96e360672 1964 pgeneral,
charlesmn 0:3ac96e360672 1965 ptiming,
charlesmn 0:3ac96e360672 1966 pdynamic,
charlesmn 0:3ac96e360672 1967 psystem,
charlesmn 0:3ac96e360672 1968 ptuning_parms,
charlesmn 0:3ac96e360672 1969 pzone_cfg);
charlesmn 0:3ac96e360672 1970 break;
charlesmn 0:3ac96e360672 1971
charlesmn 0:3ac96e360672 1972 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE:
charlesmn 0:3ac96e360672 1973 status = VL53L1_preset_mode_histogram_multizone(
charlesmn 0:3ac96e360672 1974 phistpostprocess,
charlesmn 0:3ac96e360672 1975 pstatic,
charlesmn 0:3ac96e360672 1976 phistogram,
charlesmn 0:3ac96e360672 1977 pgeneral,
charlesmn 0:3ac96e360672 1978 ptiming,
charlesmn 0:3ac96e360672 1979 pdynamic,
charlesmn 0:3ac96e360672 1980 psystem,
charlesmn 0:3ac96e360672 1981 ptuning_parms,
charlesmn 0:3ac96e360672 1982 pzone_cfg);
charlesmn 0:3ac96e360672 1983 break;
charlesmn 0:3ac96e360672 1984
charlesmn 0:3ac96e360672 1985 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE_SHORT_RANGE:
charlesmn 0:3ac96e360672 1986 status = VL53L1_preset_mode_histogram_multizone_short_range(
charlesmn 0:3ac96e360672 1987 phistpostprocess,
charlesmn 0:3ac96e360672 1988 pstatic,
charlesmn 0:3ac96e360672 1989 phistogram,
charlesmn 0:3ac96e360672 1990 pgeneral,
charlesmn 0:3ac96e360672 1991 ptiming,
charlesmn 0:3ac96e360672 1992 pdynamic,
charlesmn 0:3ac96e360672 1993 psystem,
charlesmn 0:3ac96e360672 1994 ptuning_parms,
charlesmn 0:3ac96e360672 1995 pzone_cfg);
charlesmn 0:3ac96e360672 1996 break;
charlesmn 0:3ac96e360672 1997
charlesmn 0:3ac96e360672 1998 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE_LONG_RANGE:
charlesmn 0:3ac96e360672 1999 status = VL53L1_preset_mode_histogram_multizone_long_range(
charlesmn 0:3ac96e360672 2000 phistpostprocess,
charlesmn 0:3ac96e360672 2001 pstatic,
charlesmn 0:3ac96e360672 2002 phistogram,
charlesmn 0:3ac96e360672 2003 pgeneral,
charlesmn 0:3ac96e360672 2004 ptiming,
charlesmn 0:3ac96e360672 2005 pdynamic,
charlesmn 0:3ac96e360672 2006 psystem,
charlesmn 0:3ac96e360672 2007 ptuning_parms,
charlesmn 0:3ac96e360672 2008 pzone_cfg);
charlesmn 0:3ac96e360672 2009 break;
charlesmn 0:3ac96e360672 2010
charlesmn 0:3ac96e360672 2011 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_REF_ARRAY:
charlesmn 0:3ac96e360672 2012 status = VL53L1_preset_mode_histogram_ranging_ref(
charlesmn 0:3ac96e360672 2013 phistpostprocess,
charlesmn 0:3ac96e360672 2014 pstatic,
charlesmn 0:3ac96e360672 2015 phistogram,
charlesmn 0:3ac96e360672 2016 pgeneral,
charlesmn 0:3ac96e360672 2017 ptiming,
charlesmn 0:3ac96e360672 2018 pdynamic,
charlesmn 0:3ac96e360672 2019 psystem,
charlesmn 0:3ac96e360672 2020 ptuning_parms,
charlesmn 0:3ac96e360672 2021 pzone_cfg);
charlesmn 0:3ac96e360672 2022 break;
charlesmn 0:3ac96e360672 2023
charlesmn 0:3ac96e360672 2024 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_SHORT_TIMING:
charlesmn 0:3ac96e360672 2025 status = VL53L1_preset_mode_histogram_ranging_short_timing(
charlesmn 0:3ac96e360672 2026 phistpostprocess,
charlesmn 0:3ac96e360672 2027 pstatic,
charlesmn 0:3ac96e360672 2028 phistogram,
charlesmn 0:3ac96e360672 2029 pgeneral,
charlesmn 0:3ac96e360672 2030 ptiming,
charlesmn 0:3ac96e360672 2031 pdynamic,
charlesmn 0:3ac96e360672 2032 psystem,
charlesmn 0:3ac96e360672 2033 ptuning_parms,
charlesmn 0:3ac96e360672 2034 pzone_cfg);
charlesmn 0:3ac96e360672 2035 break;
charlesmn 0:3ac96e360672 2036
charlesmn 0:3ac96e360672 2037 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE:
charlesmn 0:3ac96e360672 2038 status = VL53L1_preset_mode_histogram_long_range(
charlesmn 0:3ac96e360672 2039 phistpostprocess,
charlesmn 0:3ac96e360672 2040 pstatic,
charlesmn 0:3ac96e360672 2041 phistogram,
charlesmn 0:3ac96e360672 2042 pgeneral,
charlesmn 0:3ac96e360672 2043 ptiming,
charlesmn 0:3ac96e360672 2044 pdynamic,
charlesmn 0:3ac96e360672 2045 psystem,
charlesmn 0:3ac96e360672 2046 ptuning_parms,
charlesmn 0:3ac96e360672 2047 pzone_cfg);
charlesmn 0:3ac96e360672 2048 break;
charlesmn 0:3ac96e360672 2049
charlesmn 0:3ac96e360672 2050 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE_MM1:
charlesmn 0:3ac96e360672 2051 status = VL53L1_preset_mode_histogram_long_range_mm1(
charlesmn 0:3ac96e360672 2052 phistpostprocess,
charlesmn 0:3ac96e360672 2053 pstatic,
charlesmn 0:3ac96e360672 2054 phistogram,
charlesmn 0:3ac96e360672 2055 pgeneral,
charlesmn 0:3ac96e360672 2056 ptiming,
charlesmn 0:3ac96e360672 2057 pdynamic,
charlesmn 0:3ac96e360672 2058 psystem,
charlesmn 0:3ac96e360672 2059 ptuning_parms,
charlesmn 0:3ac96e360672 2060 pzone_cfg);
charlesmn 0:3ac96e360672 2061 break;
charlesmn 0:3ac96e360672 2062
charlesmn 0:3ac96e360672 2063 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE_MM2:
charlesmn 0:3ac96e360672 2064 status = VL53L1_preset_mode_histogram_long_range_mm2(
charlesmn 0:3ac96e360672 2065 phistpostprocess,
charlesmn 0:3ac96e360672 2066 pstatic,
charlesmn 0:3ac96e360672 2067 phistogram,
charlesmn 0:3ac96e360672 2068 pgeneral,
charlesmn 0:3ac96e360672 2069 ptiming,
charlesmn 0:3ac96e360672 2070 pdynamic,
charlesmn 0:3ac96e360672 2071 psystem,
charlesmn 0:3ac96e360672 2072 ptuning_parms,
charlesmn 0:3ac96e360672 2073 pzone_cfg);
charlesmn 0:3ac96e360672 2074 break;
charlesmn 0:3ac96e360672 2075
charlesmn 0:3ac96e360672 2076 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE:
charlesmn 0:3ac96e360672 2077 status = VL53L1_preset_mode_histogram_medium_range(
charlesmn 0:3ac96e360672 2078 phistpostprocess,
charlesmn 0:3ac96e360672 2079 pstatic,
charlesmn 0:3ac96e360672 2080 phistogram,
charlesmn 0:3ac96e360672 2081 pgeneral,
charlesmn 0:3ac96e360672 2082 ptiming,
charlesmn 0:3ac96e360672 2083 pdynamic,
charlesmn 0:3ac96e360672 2084 psystem,
charlesmn 0:3ac96e360672 2085 ptuning_parms,
charlesmn 0:3ac96e360672 2086 pzone_cfg);
charlesmn 0:3ac96e360672 2087 break;
charlesmn 0:3ac96e360672 2088
charlesmn 0:3ac96e360672 2089 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE_MM1:
charlesmn 0:3ac96e360672 2090 status = VL53L1_preset_mode_histogram_medium_range_mm1(
charlesmn 0:3ac96e360672 2091 phistpostprocess,
charlesmn 0:3ac96e360672 2092 pstatic,
charlesmn 0:3ac96e360672 2093 phistogram,
charlesmn 0:3ac96e360672 2094 pgeneral,
charlesmn 0:3ac96e360672 2095 ptiming,
charlesmn 0:3ac96e360672 2096 pdynamic,
charlesmn 0:3ac96e360672 2097 psystem,
charlesmn 0:3ac96e360672 2098 ptuning_parms,
charlesmn 0:3ac96e360672 2099 pzone_cfg);
charlesmn 0:3ac96e360672 2100 break;
charlesmn 0:3ac96e360672 2101
charlesmn 0:3ac96e360672 2102 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE_MM2:
charlesmn 0:3ac96e360672 2103 status = VL53L1_preset_mode_histogram_medium_range_mm2(
charlesmn 0:3ac96e360672 2104 phistpostprocess,
charlesmn 0:3ac96e360672 2105 pstatic,
charlesmn 0:3ac96e360672 2106 phistogram,
charlesmn 0:3ac96e360672 2107 pgeneral,
charlesmn 0:3ac96e360672 2108 ptiming,
charlesmn 0:3ac96e360672 2109 pdynamic,
charlesmn 0:3ac96e360672 2110 psystem,
charlesmn 0:3ac96e360672 2111 ptuning_parms,
charlesmn 0:3ac96e360672 2112 pzone_cfg);
charlesmn 0:3ac96e360672 2113 break;
charlesmn 0:3ac96e360672 2114
charlesmn 0:3ac96e360672 2115 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE:
charlesmn 0:3ac96e360672 2116 status = VL53L1_preset_mode_histogram_short_range(
charlesmn 0:3ac96e360672 2117 phistpostprocess,
charlesmn 0:3ac96e360672 2118 pstatic,
charlesmn 0:3ac96e360672 2119 phistogram,
charlesmn 0:3ac96e360672 2120 pgeneral,
charlesmn 0:3ac96e360672 2121 ptiming,
charlesmn 0:3ac96e360672 2122 pdynamic,
charlesmn 0:3ac96e360672 2123 psystem,
charlesmn 0:3ac96e360672 2124 ptuning_parms,
charlesmn 0:3ac96e360672 2125 pzone_cfg);
charlesmn 0:3ac96e360672 2126 break;
charlesmn 0:3ac96e360672 2127
charlesmn 0:3ac96e360672 2128 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE_MM1:
charlesmn 0:3ac96e360672 2129 status = VL53L1_preset_mode_histogram_short_range_mm1(
charlesmn 0:3ac96e360672 2130 phistpostprocess,
charlesmn 0:3ac96e360672 2131 pstatic,
charlesmn 0:3ac96e360672 2132 phistogram,
charlesmn 0:3ac96e360672 2133 pgeneral,
charlesmn 0:3ac96e360672 2134 ptiming,
charlesmn 0:3ac96e360672 2135 pdynamic,
charlesmn 0:3ac96e360672 2136 psystem,
charlesmn 0:3ac96e360672 2137 ptuning_parms,
charlesmn 0:3ac96e360672 2138 pzone_cfg);
charlesmn 0:3ac96e360672 2139 break;
charlesmn 0:3ac96e360672 2140
charlesmn 0:3ac96e360672 2141 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE_MM2:
charlesmn 0:3ac96e360672 2142 status = VL53L1_preset_mode_histogram_short_range_mm2(
charlesmn 0:3ac96e360672 2143 phistpostprocess,
charlesmn 0:3ac96e360672 2144 pstatic,
charlesmn 0:3ac96e360672 2145 phistogram,
charlesmn 0:3ac96e360672 2146 pgeneral,
charlesmn 0:3ac96e360672 2147 ptiming,
charlesmn 0:3ac96e360672 2148 pdynamic,
charlesmn 0:3ac96e360672 2149 psystem,
charlesmn 0:3ac96e360672 2150 ptuning_parms,
charlesmn 0:3ac96e360672 2151 pzone_cfg);
charlesmn 0:3ac96e360672 2152 break;
charlesmn 0:3ac96e360672 2153
charlesmn 0:3ac96e360672 2154 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_CHARACTERISATION:
charlesmn 0:3ac96e360672 2155 status = VL53L1_preset_mode_histogram_characterisation(
charlesmn 0:3ac96e360672 2156 phistpostprocess,
charlesmn 0:3ac96e360672 2157 pstatic,
charlesmn 0:3ac96e360672 2158 phistogram,
charlesmn 0:3ac96e360672 2159 pgeneral,
charlesmn 0:3ac96e360672 2160 ptiming,
charlesmn 0:3ac96e360672 2161 pdynamic,
charlesmn 0:3ac96e360672 2162 psystem,
charlesmn 0:3ac96e360672 2163 ptuning_parms,
charlesmn 0:3ac96e360672 2164 pzone_cfg);
charlesmn 0:3ac96e360672 2165 break;
charlesmn 0:3ac96e360672 2166
charlesmn 0:3ac96e360672 2167 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_XTALK_PLANAR:
charlesmn 0:3ac96e360672 2168 status = VL53L1_preset_mode_histogram_xtalk_planar(
charlesmn 0:3ac96e360672 2169 phistpostprocess,
charlesmn 0:3ac96e360672 2170 pstatic,
charlesmn 0:3ac96e360672 2171 phistogram,
charlesmn 0:3ac96e360672 2172 pgeneral,
charlesmn 0:3ac96e360672 2173 ptiming,
charlesmn 0:3ac96e360672 2174 pdynamic,
charlesmn 0:3ac96e360672 2175 psystem,
charlesmn 0:3ac96e360672 2176 ptuning_parms,
charlesmn 0:3ac96e360672 2177 pzone_cfg);
charlesmn 0:3ac96e360672 2178 break;
charlesmn 0:3ac96e360672 2179
charlesmn 0:3ac96e360672 2180 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_XTALK_MM1:
charlesmn 0:3ac96e360672 2181 status = VL53L1_preset_mode_histogram_xtalk_mm1(
charlesmn 0:3ac96e360672 2182 phistpostprocess,
charlesmn 0:3ac96e360672 2183 pstatic,
charlesmn 0:3ac96e360672 2184 phistogram,
charlesmn 0:3ac96e360672 2185 pgeneral,
charlesmn 0:3ac96e360672 2186 ptiming,
charlesmn 0:3ac96e360672 2187 pdynamic,
charlesmn 0:3ac96e360672 2188 psystem,
charlesmn 0:3ac96e360672 2189 ptuning_parms,
charlesmn 0:3ac96e360672 2190 pzone_cfg);
charlesmn 0:3ac96e360672 2191 break;
charlesmn 0:3ac96e360672 2192
charlesmn 0:3ac96e360672 2193 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_XTALK_MM2:
charlesmn 0:3ac96e360672 2194 status = VL53L1_preset_mode_histogram_xtalk_mm2(
charlesmn 0:3ac96e360672 2195 phistpostprocess,
charlesmn 0:3ac96e360672 2196 pstatic,
charlesmn 0:3ac96e360672 2197 phistogram,
charlesmn 0:3ac96e360672 2198 pgeneral,
charlesmn 0:3ac96e360672 2199 ptiming,
charlesmn 0:3ac96e360672 2200 pdynamic,
charlesmn 0:3ac96e360672 2201 psystem,
charlesmn 0:3ac96e360672 2202 ptuning_parms,
charlesmn 0:3ac96e360672 2203 pzone_cfg);
charlesmn 0:3ac96e360672 2204 break;
charlesmn 0:3ac96e360672 2205
charlesmn 0:3ac96e360672 2206 case VL53L1_DEVICEPRESETMODE_OLT:
charlesmn 0:3ac96e360672 2207 status = VL53L1_preset_mode_olt(
charlesmn 0:3ac96e360672 2208 pstatic,
charlesmn 0:3ac96e360672 2209 phistogram,
charlesmn 0:3ac96e360672 2210 pgeneral,
charlesmn 0:3ac96e360672 2211 ptiming,
charlesmn 0:3ac96e360672 2212 pdynamic,
charlesmn 0:3ac96e360672 2213 psystem,
charlesmn 0:3ac96e360672 2214 ptuning_parms,
charlesmn 0:3ac96e360672 2215 pzone_cfg);
charlesmn 0:3ac96e360672 2216 break;
charlesmn 0:3ac96e360672 2217
charlesmn 0:3ac96e360672 2218 case VL53L1_DEVICEPRESETMODE_SINGLESHOT_RANGING:
charlesmn 0:3ac96e360672 2219 status = VL53L1_preset_mode_singleshot_ranging(
charlesmn 0:3ac96e360672 2220 pstatic,
charlesmn 0:3ac96e360672 2221 phistogram,
charlesmn 0:3ac96e360672 2222 pgeneral,
charlesmn 0:3ac96e360672 2223 ptiming,
charlesmn 0:3ac96e360672 2224 pdynamic,
charlesmn 0:3ac96e360672 2225 psystem,
charlesmn 0:3ac96e360672 2226 ptuning_parms,
charlesmn 0:3ac96e360672 2227 pzone_cfg);
charlesmn 0:3ac96e360672 2228 break;
charlesmn 0:3ac96e360672 2229
charlesmn 0:3ac96e360672 2230 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_SHORT_RANGE:
charlesmn 0:3ac96e360672 2231 status = VL53L1_preset_mode_low_power_auto_short_ranging(
charlesmn 0:3ac96e360672 2232 pstatic,
charlesmn 0:3ac96e360672 2233 phistogram,
charlesmn 0:3ac96e360672 2234 pgeneral,
charlesmn 0:3ac96e360672 2235 ptiming,
charlesmn 0:3ac96e360672 2236 pdynamic,
charlesmn 0:3ac96e360672 2237 psystem,
charlesmn 0:3ac96e360672 2238 ptuning_parms,
charlesmn 0:3ac96e360672 2239 pzone_cfg,
charlesmn 0:3ac96e360672 2240 plpadata);
charlesmn 0:3ac96e360672 2241 break;
charlesmn 0:3ac96e360672 2242
charlesmn 0:3ac96e360672 2243 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_MEDIUM_RANGE:
charlesmn 0:3ac96e360672 2244 status = VL53L1_preset_mode_low_power_auto_ranging(
charlesmn 0:3ac96e360672 2245 pstatic,
charlesmn 0:3ac96e360672 2246 phistogram,
charlesmn 0:3ac96e360672 2247 pgeneral,
charlesmn 0:3ac96e360672 2248 ptiming,
charlesmn 0:3ac96e360672 2249 pdynamic,
charlesmn 0:3ac96e360672 2250 psystem,
charlesmn 0:3ac96e360672 2251 ptuning_parms,
charlesmn 0:3ac96e360672 2252 pzone_cfg,
charlesmn 0:3ac96e360672 2253 plpadata);
charlesmn 0:3ac96e360672 2254 break;
charlesmn 0:3ac96e360672 2255
charlesmn 0:3ac96e360672 2256 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_LONG_RANGE:
charlesmn 0:3ac96e360672 2257 status = VL53L1_preset_mode_low_power_auto_long_ranging(
charlesmn 0:3ac96e360672 2258 pstatic,
charlesmn 0:3ac96e360672 2259 phistogram,
charlesmn 0:3ac96e360672 2260 pgeneral,
charlesmn 0:3ac96e360672 2261 ptiming,
charlesmn 0:3ac96e360672 2262 pdynamic,
charlesmn 0:3ac96e360672 2263 psystem,
charlesmn 0:3ac96e360672 2264 ptuning_parms,
charlesmn 0:3ac96e360672 2265 pzone_cfg,
charlesmn 0:3ac96e360672 2266 plpadata);
charlesmn 0:3ac96e360672 2267 break;
charlesmn 0:3ac96e360672 2268
charlesmn 0:3ac96e360672 2269
charlesmn 0:3ac96e360672 2270 case VL53L1_DEVICEPRESETMODE_SPECIAL_HISTOGRAM_SHORT_RANGE:
charlesmn 0:3ac96e360672 2271 status = VL53L1_preset_mode_special_histogram_short_range(
charlesmn 0:3ac96e360672 2272 phistpostprocess,
charlesmn 0:3ac96e360672 2273 pstatic,
charlesmn 0:3ac96e360672 2274 phistogram,
charlesmn 0:3ac96e360672 2275 pgeneral,
charlesmn 0:3ac96e360672 2276 ptiming,
charlesmn 0:3ac96e360672 2277 pdynamic,
charlesmn 0:3ac96e360672 2278 psystem,
charlesmn 0:3ac96e360672 2279 ptuning_parms,
charlesmn 0:3ac96e360672 2280 pzone_cfg);
charlesmn 0:3ac96e360672 2281 break;
charlesmn 0:3ac96e360672 2282
charlesmn 0:3ac96e360672 2283 default:
charlesmn 0:3ac96e360672 2284 status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn 0:3ac96e360672 2285 break;
charlesmn 0:3ac96e360672 2286
charlesmn 0:3ac96e360672 2287 }
charlesmn 0:3ac96e360672 2288
charlesmn 0:3ac96e360672 2289
charlesmn 0:3ac96e360672 2290
charlesmn 0:3ac96e360672 2291 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 2292
charlesmn 0:3ac96e360672 2293 pstatic->dss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 2294 dss_config__target_total_rate_mcps;
charlesmn 0:3ac96e360672 2295 pdev->dss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 2296 dss_config__target_total_rate_mcps;
charlesmn 0:3ac96e360672 2297
charlesmn 0:3ac96e360672 2298 }
charlesmn 0:3ac96e360672 2299
charlesmn 0:3ac96e360672 2300
charlesmn 0:3ac96e360672 2301
charlesmn 0:3ac96e360672 2302 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 2303 status =
charlesmn 0:3ac96e360672 2304 VL53L1_set_timeouts_us(
charlesmn 0:3ac96e360672 2305 Dev,
charlesmn 0:3ac96e360672 2306 phasecal_config_timeout_us,
charlesmn 0:3ac96e360672 2307 mm_config_timeout_us,
charlesmn 0:3ac96e360672 2308 range_config_timeout_us);
charlesmn 0:3ac96e360672 2309
charlesmn 0:3ac96e360672 2310 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 2311 status =
charlesmn 0:3ac96e360672 2312 VL53L1_set_inter_measurement_period_ms(
charlesmn 0:3ac96e360672 2313 Dev,
charlesmn 0:3ac96e360672 2314 inter_measurement_period_ms);
charlesmn 0:3ac96e360672 2315
charlesmn 0:3ac96e360672 2316
charlesmn 0:3ac96e360672 2317
charlesmn 0:3ac96e360672 2318 V53L1_init_zone_results_structure(
charlesmn 0:3ac96e360672 2319 pdev->zone_cfg.active_zones+1,
charlesmn 0:3ac96e360672 2320 &(pres->zone_results));
charlesmn 0:3ac96e360672 2321
charlesmn 0:3ac96e360672 2322 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2323
charlesmn 0:3ac96e360672 2324 return status;
charlesmn 0:3ac96e360672 2325 }
charlesmn 0:3ac96e360672 2326
charlesmn 0:3ac96e360672 2327
charlesmn 0:3ac96e360672 2328 VL53L1_Error VL53L1_set_zone_preset(
charlesmn 0:3ac96e360672 2329 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2330 VL53L1_DeviceZonePreset zone_preset)
charlesmn 0:3ac96e360672 2331 {
charlesmn 0:3ac96e360672 2332
charlesmn 0:3ac96e360672 2333
charlesmn 0:3ac96e360672 2334 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2335 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2336
charlesmn 0:3ac96e360672 2337 VL53L1_general_config_t *pgeneral = &(pdev->gen_cfg);
charlesmn 0:3ac96e360672 2338 VL53L1_zone_config_t *pzone_cfg = &(pdev->zone_cfg);
charlesmn 0:3ac96e360672 2339
charlesmn 0:3ac96e360672 2340 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2341
charlesmn 0:3ac96e360672 2342
charlesmn 0:3ac96e360672 2343 pdev->zone_preset = zone_preset;
charlesmn 0:3ac96e360672 2344
charlesmn 0:3ac96e360672 2345
charlesmn 0:3ac96e360672 2346
charlesmn 0:3ac96e360672 2347 switch (zone_preset) {
charlesmn 0:3ac96e360672 2348
charlesmn 0:3ac96e360672 2349 case VL53L1_DEVICEZONEPRESET_XTALK_PLANAR:
charlesmn 0:3ac96e360672 2350 status =
charlesmn 0:3ac96e360672 2351 VL53L1_zone_preset_xtalk_planar(
charlesmn 0:3ac96e360672 2352 pgeneral,
charlesmn 0:3ac96e360672 2353 pzone_cfg);
charlesmn 0:3ac96e360672 2354 break;
charlesmn 0:3ac96e360672 2355
charlesmn 0:3ac96e360672 2356 case VL53L1_DEVICEZONEPRESET_1X1_SIZE_16X16:
charlesmn 0:3ac96e360672 2357 status =
charlesmn 0:3ac96e360672 2358 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 2359 8, 1, 1,
charlesmn 0:3ac96e360672 2360 8, 1, 1,
charlesmn 0:3ac96e360672 2361 15, 15,
charlesmn 0:3ac96e360672 2362 pzone_cfg);
charlesmn 0:3ac96e360672 2363 break;
charlesmn 0:3ac96e360672 2364
charlesmn 0:3ac96e360672 2365 case VL53L1_DEVICEZONEPRESET_1X2_SIZE_16X8:
charlesmn 0:3ac96e360672 2366 status =
charlesmn 0:3ac96e360672 2367 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 2368 8, 1, 1,
charlesmn 0:3ac96e360672 2369 4, 8, 2,
charlesmn 0:3ac96e360672 2370 15, 7,
charlesmn 0:3ac96e360672 2371 pzone_cfg);
charlesmn 0:3ac96e360672 2372 break;
charlesmn 0:3ac96e360672 2373
charlesmn 0:3ac96e360672 2374 case VL53L1_DEVICEZONEPRESET_2X1_SIZE_8X16:
charlesmn 0:3ac96e360672 2375 status =
charlesmn 0:3ac96e360672 2376 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 2377 4, 8, 2,
charlesmn 0:3ac96e360672 2378 8, 1, 1,
charlesmn 0:3ac96e360672 2379 7, 15,
charlesmn 0:3ac96e360672 2380 pzone_cfg);
charlesmn 0:3ac96e360672 2381 break;
charlesmn 0:3ac96e360672 2382
charlesmn 0:3ac96e360672 2383 case VL53L1_DEVICEZONEPRESET_2X2_SIZE_8X8:
charlesmn 0:3ac96e360672 2384 status =
charlesmn 0:3ac96e360672 2385 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 2386 4, 8, 2,
charlesmn 0:3ac96e360672 2387 4, 8, 2,
charlesmn 0:3ac96e360672 2388 7, 7,
charlesmn 0:3ac96e360672 2389 pzone_cfg);
charlesmn 0:3ac96e360672 2390 break;
charlesmn 0:3ac96e360672 2391
charlesmn 0:3ac96e360672 2392 case VL53L1_DEVICEZONEPRESET_3X3_SIZE_5X5:
charlesmn 0:3ac96e360672 2393 status =
charlesmn 0:3ac96e360672 2394 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 2395 2, 5, 3,
charlesmn 0:3ac96e360672 2396 2, 5, 3,
charlesmn 0:3ac96e360672 2397 4, 4,
charlesmn 0:3ac96e360672 2398 pzone_cfg);
charlesmn 0:3ac96e360672 2399 break;
charlesmn 0:3ac96e360672 2400
charlesmn 0:3ac96e360672 2401 case VL53L1_DEVICEZONEPRESET_4X4_SIZE_4X4:
charlesmn 0:3ac96e360672 2402 status =
charlesmn 0:3ac96e360672 2403 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 2404 2, 4, 4,
charlesmn 0:3ac96e360672 2405 2, 4, 4,
charlesmn 0:3ac96e360672 2406 3, 3,
charlesmn 0:3ac96e360672 2407 pzone_cfg);
charlesmn 0:3ac96e360672 2408 break;
charlesmn 0:3ac96e360672 2409
charlesmn 0:3ac96e360672 2410 case VL53L1_DEVICEZONEPRESET_5X5_SIZE_4X4:
charlesmn 0:3ac96e360672 2411 status =
charlesmn 0:3ac96e360672 2412 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 2413 2, 3, 5,
charlesmn 0:3ac96e360672 2414 2, 3, 5,
charlesmn 0:3ac96e360672 2415 3, 3,
charlesmn 0:3ac96e360672 2416 pzone_cfg);
charlesmn 0:3ac96e360672 2417 break;
charlesmn 0:3ac96e360672 2418
charlesmn 0:3ac96e360672 2419 case VL53L1_DEVICEZONEPRESET_11X11_SIZE_5X5:
charlesmn 0:3ac96e360672 2420 status =
charlesmn 0:3ac96e360672 2421 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 2422 3, 1, 11,
charlesmn 0:3ac96e360672 2423 3, 1, 11,
charlesmn 0:3ac96e360672 2424 4, 4,
charlesmn 0:3ac96e360672 2425 pzone_cfg);
charlesmn 0:3ac96e360672 2426 break;
charlesmn 0:3ac96e360672 2427
charlesmn 0:3ac96e360672 2428 case VL53L1_DEVICEZONEPRESET_13X13_SIZE_4X4:
charlesmn 0:3ac96e360672 2429 status =
charlesmn 0:3ac96e360672 2430 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 2431 2, 1, 13,
charlesmn 0:3ac96e360672 2432 2, 1, 13,
charlesmn 0:3ac96e360672 2433 3, 3,
charlesmn 0:3ac96e360672 2434 pzone_cfg);
charlesmn 0:3ac96e360672 2435
charlesmn 0:3ac96e360672 2436 break;
charlesmn 0:3ac96e360672 2437
charlesmn 0:3ac96e360672 2438 case VL53L1_DEVICEZONEPRESET_1X1_SIZE_4X4_POS_8X8:
charlesmn 0:3ac96e360672 2439 status =
charlesmn 0:3ac96e360672 2440 VL53L1_init_zone_config_structure(
charlesmn 0:3ac96e360672 2441 8, 1, 1,
charlesmn 0:3ac96e360672 2442 8, 1, 1,
charlesmn 0:3ac96e360672 2443 3, 3,
charlesmn 0:3ac96e360672 2444 pzone_cfg);
charlesmn 0:3ac96e360672 2445 break;
charlesmn 0:3ac96e360672 2446
charlesmn 0:3ac96e360672 2447 }
charlesmn 0:3ac96e360672 2448
charlesmn 0:3ac96e360672 2449
charlesmn 0:3ac96e360672 2450
charlesmn 0:3ac96e360672 2451 if (pzone_cfg->active_zones == 0)
charlesmn 0:3ac96e360672 2452 pdev->gen_cfg.global_config__stream_divider = 0;
charlesmn 0:3ac96e360672 2453 else if (pzone_cfg->active_zones < VL53L1_MAX_USER_ZONES)
charlesmn 0:3ac96e360672 2454 pdev->gen_cfg.global_config__stream_divider =
charlesmn 0:3ac96e360672 2455 pzone_cfg->active_zones + 1;
charlesmn 0:3ac96e360672 2456 else
charlesmn 0:3ac96e360672 2457 pdev->gen_cfg.global_config__stream_divider =
charlesmn 0:3ac96e360672 2458 VL53L1_MAX_USER_ZONES + 1;
charlesmn 0:3ac96e360672 2459
charlesmn 0:3ac96e360672 2460 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2461
charlesmn 0:3ac96e360672 2462 return status;
charlesmn 0:3ac96e360672 2463 }
charlesmn 0:3ac96e360672 2464
charlesmn 0:3ac96e360672 2465
charlesmn 0:3ac96e360672 2466 VL53L1_Error VL53L1_enable_xtalk_compensation(
charlesmn 0:3ac96e360672 2467 VL53L1_DEV Dev)
charlesmn 0:3ac96e360672 2468 {
charlesmn 0:3ac96e360672 2469
charlesmn 0:3ac96e360672 2470
charlesmn 0:3ac96e360672 2471 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2472 uint32_t tempu32;
charlesmn 0:3ac96e360672 2473
charlesmn 0:3ac96e360672 2474 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2475 VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg);
charlesmn 0:3ac96e360672 2476 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn 0:3ac96e360672 2477 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer);
charlesmn 0:3ac96e360672 2478
charlesmn 0:3ac96e360672 2479 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2480
charlesmn 0:3ac96e360672 2481
charlesmn 0:3ac96e360672 2482 tempu32 = VL53L1_calc_crosstalk_plane_offset_with_margin(
charlesmn 0:3ac96e360672 2483 pC->algo__crosstalk_compensation_plane_offset_kcps,
charlesmn 0:3ac96e360672 2484 pC->lite_mode_crosstalk_margin_kcps);
charlesmn 0:3ac96e360672 2485 if (tempu32 > 0xFFFF)
charlesmn 0:3ac96e360672 2486 tempu32 = 0xFFFF;
charlesmn 0:3ac96e360672 2487
charlesmn 0:3ac96e360672 2488 pN->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 2489 (uint16_t)tempu32;
charlesmn 0:3ac96e360672 2490
charlesmn 0:3ac96e360672 2491 pN->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 2492 pC->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 2493
charlesmn 0:3ac96e360672 2494 pN->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 2495 pC->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 2496
charlesmn 0:3ac96e360672 2497
charlesmn 0:3ac96e360672 2498 pHP->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 2499 VL53L1_calc_crosstalk_plane_offset_with_margin(
charlesmn 0:3ac96e360672 2500 pC->algo__crosstalk_compensation_plane_offset_kcps,
charlesmn 0:3ac96e360672 2501 pC->histogram_mode_crosstalk_margin_kcps);
charlesmn 0:3ac96e360672 2502
charlesmn 0:3ac96e360672 2503 pHP->algo__crosstalk_compensation_x_plane_gradient_kcps
charlesmn 0:3ac96e360672 2504 = pC->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 2505 pHP->algo__crosstalk_compensation_y_plane_gradient_kcps
charlesmn 0:3ac96e360672 2506 = pC->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 2507
charlesmn 0:3ac96e360672 2508
charlesmn 0:3ac96e360672 2509
charlesmn 0:3ac96e360672 2510 pC->global_crosstalk_compensation_enable = 0x01;
charlesmn 0:3ac96e360672 2511
charlesmn 0:3ac96e360672 2512 pHP->algo__crosstalk_compensation_enable =
charlesmn 0:3ac96e360672 2513 pC->global_crosstalk_compensation_enable;
charlesmn 0:3ac96e360672 2514
charlesmn 0:3ac96e360672 2515
charlesmn 0:3ac96e360672 2516
charlesmn 0:3ac96e360672 2517
charlesmn 0:3ac96e360672 2518 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 2519 pC->crosstalk_range_ignore_threshold_rate_mcps =
charlesmn 0:3ac96e360672 2520 VL53L1_calc_range_ignore_threshold(
charlesmn 0:3ac96e360672 2521 pC->algo__crosstalk_compensation_plane_offset_kcps,
charlesmn 0:3ac96e360672 2522 pC->algo__crosstalk_compensation_x_plane_gradient_kcps,
charlesmn 0:3ac96e360672 2523 pC->algo__crosstalk_compensation_y_plane_gradient_kcps,
charlesmn 0:3ac96e360672 2524 pC->crosstalk_range_ignore_threshold_mult);
charlesmn 0:3ac96e360672 2525 }
charlesmn 0:3ac96e360672 2526
charlesmn 0:3ac96e360672 2527
charlesmn 0:3ac96e360672 2528
charlesmn 0:3ac96e360672 2529 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 2530 status =
charlesmn 0:3ac96e360672 2531 VL53L1_set_customer_nvm_managed(
charlesmn 0:3ac96e360672 2532 Dev,
charlesmn 0:3ac96e360672 2533 &(pdev->customer));
charlesmn 0:3ac96e360672 2534
charlesmn 0:3ac96e360672 2535 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2536
charlesmn 0:3ac96e360672 2537 return status;
charlesmn 0:3ac96e360672 2538
charlesmn 0:3ac96e360672 2539 }
charlesmn 0:3ac96e360672 2540
charlesmn 0:3ac96e360672 2541 void VL53L1_get_xtalk_compensation_enable(
charlesmn 0:3ac96e360672 2542 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2543 uint8_t *pcrosstalk_compensation_enable)
charlesmn 0:3ac96e360672 2544 {
charlesmn 0:3ac96e360672 2545
charlesmn 0:3ac96e360672 2546
charlesmn 0:3ac96e360672 2547 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2548
charlesmn 0:3ac96e360672 2549 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2550
charlesmn 0:3ac96e360672 2551
charlesmn 0:3ac96e360672 2552
charlesmn 0:3ac96e360672 2553 *pcrosstalk_compensation_enable =
charlesmn 0:3ac96e360672 2554 pdev->xtalk_cfg.global_crosstalk_compensation_enable;
charlesmn 0:3ac96e360672 2555
charlesmn 0:3ac96e360672 2556 }
charlesmn 0:3ac96e360672 2557
charlesmn 0:3ac96e360672 2558
charlesmn 0:3ac96e360672 2559 VL53L1_Error VL53L1_get_lite_xtalk_margin_kcps(
charlesmn 0:3ac96e360672 2560 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2561 int16_t *pxtalk_margin)
charlesmn 0:3ac96e360672 2562 {
charlesmn 0:3ac96e360672 2563
charlesmn 0:3ac96e360672 2564
charlesmn 0:3ac96e360672 2565
charlesmn 0:3ac96e360672 2566 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2567
charlesmn 0:3ac96e360672 2568 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2569
charlesmn 0:3ac96e360672 2570 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2571
charlesmn 0:3ac96e360672 2572 *pxtalk_margin = pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps;
charlesmn 0:3ac96e360672 2573
charlesmn 0:3ac96e360672 2574 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2575
charlesmn 0:3ac96e360672 2576 return status;
charlesmn 0:3ac96e360672 2577
charlesmn 0:3ac96e360672 2578 }
charlesmn 0:3ac96e360672 2579
charlesmn 0:3ac96e360672 2580 VL53L1_Error VL53L1_set_lite_xtalk_margin_kcps(
charlesmn 0:3ac96e360672 2581 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2582 int16_t xtalk_margin)
charlesmn 0:3ac96e360672 2583 {
charlesmn 0:3ac96e360672 2584
charlesmn 0:3ac96e360672 2585
charlesmn 0:3ac96e360672 2586
charlesmn 0:3ac96e360672 2587 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2588
charlesmn 0:3ac96e360672 2589 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2590
charlesmn 0:3ac96e360672 2591 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2592
charlesmn 0:3ac96e360672 2593 pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps = xtalk_margin;
charlesmn 0:3ac96e360672 2594
charlesmn 0:3ac96e360672 2595 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2596
charlesmn 0:3ac96e360672 2597 return status;
charlesmn 0:3ac96e360672 2598 }
charlesmn 0:3ac96e360672 2599
charlesmn 0:3ac96e360672 2600
charlesmn 0:3ac96e360672 2601 VL53L1_Error VL53L1_get_histogram_xtalk_margin_kcps(
charlesmn 0:3ac96e360672 2602 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2603 int16_t *pxtalk_margin)
charlesmn 0:3ac96e360672 2604 {
charlesmn 0:3ac96e360672 2605
charlesmn 0:3ac96e360672 2606
charlesmn 0:3ac96e360672 2607
charlesmn 0:3ac96e360672 2608 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2609
charlesmn 0:3ac96e360672 2610 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2611
charlesmn 0:3ac96e360672 2612 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2613
charlesmn 0:3ac96e360672 2614 *pxtalk_margin = pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps;
charlesmn 0:3ac96e360672 2615
charlesmn 0:3ac96e360672 2616 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2617
charlesmn 0:3ac96e360672 2618 return status;
charlesmn 0:3ac96e360672 2619
charlesmn 0:3ac96e360672 2620 }
charlesmn 0:3ac96e360672 2621
charlesmn 0:3ac96e360672 2622 VL53L1_Error VL53L1_set_histogram_xtalk_margin_kcps(
charlesmn 0:3ac96e360672 2623 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2624 int16_t xtalk_margin)
charlesmn 0:3ac96e360672 2625 {
charlesmn 0:3ac96e360672 2626
charlesmn 0:3ac96e360672 2627
charlesmn 0:3ac96e360672 2628
charlesmn 0:3ac96e360672 2629 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2630
charlesmn 0:3ac96e360672 2631 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2632
charlesmn 0:3ac96e360672 2633 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2634
charlesmn 0:3ac96e360672 2635 pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps = xtalk_margin;
charlesmn 0:3ac96e360672 2636
charlesmn 0:3ac96e360672 2637 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2638
charlesmn 0:3ac96e360672 2639 return status;
charlesmn 0:3ac96e360672 2640 }
charlesmn 0:3ac96e360672 2641
charlesmn 0:3ac96e360672 2642 VL53L1_Error VL53L1_restore_xtalk_nvm_default(
charlesmn 0:3ac96e360672 2643 VL53L1_DEV Dev)
charlesmn 0:3ac96e360672 2644 {
charlesmn 0:3ac96e360672 2645
charlesmn 0:3ac96e360672 2646
charlesmn 0:3ac96e360672 2647
charlesmn 0:3ac96e360672 2648 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2649
charlesmn 0:3ac96e360672 2650 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2651 VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg);
charlesmn 0:3ac96e360672 2652
charlesmn 0:3ac96e360672 2653 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2654
charlesmn 0:3ac96e360672 2655 pC->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 2656 pC->nvm_default__crosstalk_compensation_plane_offset_kcps;
charlesmn 0:3ac96e360672 2657 pC->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 2658 pC->nvm_default__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 2659 pC->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 2660 pC->nvm_default__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 2661
charlesmn 0:3ac96e360672 2662 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2663
charlesmn 0:3ac96e360672 2664 return status;
charlesmn 0:3ac96e360672 2665 }
charlesmn 0:3ac96e360672 2666
charlesmn 0:3ac96e360672 2667 VL53L1_Error VL53L1_disable_xtalk_compensation(
charlesmn 0:3ac96e360672 2668 VL53L1_DEV Dev)
charlesmn 0:3ac96e360672 2669 {
charlesmn 0:3ac96e360672 2670
charlesmn 0:3ac96e360672 2671
charlesmn 0:3ac96e360672 2672 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2673
charlesmn 0:3ac96e360672 2674 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2675 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn 0:3ac96e360672 2676 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer);
charlesmn 0:3ac96e360672 2677
charlesmn 0:3ac96e360672 2678 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2679
charlesmn 0:3ac96e360672 2680
charlesmn 0:3ac96e360672 2681 pN->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 2682 0x00;
charlesmn 0:3ac96e360672 2683
charlesmn 0:3ac96e360672 2684 pN->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 2685 0x00;
charlesmn 0:3ac96e360672 2686
charlesmn 0:3ac96e360672 2687 pN->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 2688 0x00;
charlesmn 0:3ac96e360672 2689
charlesmn 0:3ac96e360672 2690
charlesmn 0:3ac96e360672 2691
charlesmn 0:3ac96e360672 2692 pdev->xtalk_cfg.global_crosstalk_compensation_enable = 0x00;
charlesmn 0:3ac96e360672 2693
charlesmn 0:3ac96e360672 2694 pHP->algo__crosstalk_compensation_enable =
charlesmn 0:3ac96e360672 2695 pdev->xtalk_cfg.global_crosstalk_compensation_enable;
charlesmn 0:3ac96e360672 2696
charlesmn 0:3ac96e360672 2697
charlesmn 0:3ac96e360672 2698
charlesmn 0:3ac96e360672 2699 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 2700 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps =
charlesmn 0:3ac96e360672 2701 0x0000;
charlesmn 0:3ac96e360672 2702 }
charlesmn 0:3ac96e360672 2703
charlesmn 0:3ac96e360672 2704
charlesmn 0:3ac96e360672 2705
charlesmn 0:3ac96e360672 2706 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 2707 status =
charlesmn 0:3ac96e360672 2708 VL53L1_set_customer_nvm_managed(
charlesmn 0:3ac96e360672 2709 Dev,
charlesmn 0:3ac96e360672 2710 &(pdev->customer));
charlesmn 0:3ac96e360672 2711 }
charlesmn 0:3ac96e360672 2712 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2713
charlesmn 0:3ac96e360672 2714 return status;
charlesmn 0:3ac96e360672 2715
charlesmn 0:3ac96e360672 2716 }
charlesmn 0:3ac96e360672 2717
charlesmn 0:3ac96e360672 2718
charlesmn 0:3ac96e360672 2719 VL53L1_Error VL53L1_get_histogram_phase_consistency(
charlesmn 0:3ac96e360672 2720 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2721 uint8_t *pphase_consistency)
charlesmn 0:3ac96e360672 2722 {
charlesmn 0:3ac96e360672 2723
charlesmn 0:3ac96e360672 2724
charlesmn 0:3ac96e360672 2725
charlesmn 0:3ac96e360672 2726 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2727
charlesmn 0:3ac96e360672 2728 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2729 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn 0:3ac96e360672 2730
charlesmn 0:3ac96e360672 2731 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2732
charlesmn 0:3ac96e360672 2733 *pphase_consistency =
charlesmn 0:3ac96e360672 2734 pHP->algo__consistency_check__phase_tolerance;
charlesmn 0:3ac96e360672 2735
charlesmn 0:3ac96e360672 2736 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2737
charlesmn 0:3ac96e360672 2738 return status;
charlesmn 0:3ac96e360672 2739
charlesmn 0:3ac96e360672 2740 }
charlesmn 0:3ac96e360672 2741
charlesmn 0:3ac96e360672 2742 VL53L1_Error VL53L1_set_histogram_phase_consistency(
charlesmn 0:3ac96e360672 2743 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2744 uint8_t phase_consistency)
charlesmn 0:3ac96e360672 2745 {
charlesmn 0:3ac96e360672 2746
charlesmn 0:3ac96e360672 2747
charlesmn 0:3ac96e360672 2748
charlesmn 0:3ac96e360672 2749 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2750
charlesmn 0:3ac96e360672 2751 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2752
charlesmn 0:3ac96e360672 2753 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2754
charlesmn 0:3ac96e360672 2755 pdev->histpostprocess.algo__consistency_check__phase_tolerance =
charlesmn 0:3ac96e360672 2756 phase_consistency;
charlesmn 0:3ac96e360672 2757
charlesmn 0:3ac96e360672 2758 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2759
charlesmn 0:3ac96e360672 2760 return status;
charlesmn 0:3ac96e360672 2761
charlesmn 0:3ac96e360672 2762 }
charlesmn 0:3ac96e360672 2763
charlesmn 0:3ac96e360672 2764 VL53L1_Error VL53L1_get_histogram_event_consistency(
charlesmn 0:3ac96e360672 2765 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2766 uint8_t *pevent_consistency)
charlesmn 0:3ac96e360672 2767 {
charlesmn 0:3ac96e360672 2768
charlesmn 0:3ac96e360672 2769
charlesmn 0:3ac96e360672 2770
charlesmn 0:3ac96e360672 2771 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2772
charlesmn 0:3ac96e360672 2773 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2774
charlesmn 0:3ac96e360672 2775 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2776
charlesmn 0:3ac96e360672 2777 *pevent_consistency =
charlesmn 0:3ac96e360672 2778 pdev->histpostprocess.algo__consistency_check__event_sigma;
charlesmn 0:3ac96e360672 2779
charlesmn 0:3ac96e360672 2780 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2781
charlesmn 0:3ac96e360672 2782 return status;
charlesmn 0:3ac96e360672 2783
charlesmn 0:3ac96e360672 2784 }
charlesmn 0:3ac96e360672 2785
charlesmn 0:3ac96e360672 2786 VL53L1_Error VL53L1_set_histogram_event_consistency(
charlesmn 0:3ac96e360672 2787 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2788 uint8_t event_consistency)
charlesmn 0:3ac96e360672 2789 {
charlesmn 0:3ac96e360672 2790
charlesmn 0:3ac96e360672 2791
charlesmn 0:3ac96e360672 2792
charlesmn 0:3ac96e360672 2793 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2794
charlesmn 0:3ac96e360672 2795 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2796
charlesmn 0:3ac96e360672 2797 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2798
charlesmn 0:3ac96e360672 2799 pdev->histpostprocess.algo__consistency_check__event_sigma =
charlesmn 0:3ac96e360672 2800 event_consistency;
charlesmn 0:3ac96e360672 2801
charlesmn 0:3ac96e360672 2802 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2803
charlesmn 0:3ac96e360672 2804 return status;
charlesmn 0:3ac96e360672 2805
charlesmn 0:3ac96e360672 2806 }
charlesmn 0:3ac96e360672 2807
charlesmn 0:3ac96e360672 2808 VL53L1_Error VL53L1_get_histogram_ambient_threshold_sigma(
charlesmn 0:3ac96e360672 2809 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2810 uint8_t *pamb_thresh_sigma)
charlesmn 0:3ac96e360672 2811 {
charlesmn 0:3ac96e360672 2812
charlesmn 0:3ac96e360672 2813
charlesmn 0:3ac96e360672 2814
charlesmn 0:3ac96e360672 2815 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2816
charlesmn 0:3ac96e360672 2817 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2818
charlesmn 0:3ac96e360672 2819 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2820
charlesmn 0:3ac96e360672 2821 *pamb_thresh_sigma =
charlesmn 0:3ac96e360672 2822 pdev->histpostprocess.ambient_thresh_sigma1;
charlesmn 0:3ac96e360672 2823
charlesmn 0:3ac96e360672 2824 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2825
charlesmn 0:3ac96e360672 2826 return status;
charlesmn 0:3ac96e360672 2827
charlesmn 0:3ac96e360672 2828 }
charlesmn 0:3ac96e360672 2829
charlesmn 0:3ac96e360672 2830 VL53L1_Error VL53L1_set_histogram_ambient_threshold_sigma(
charlesmn 0:3ac96e360672 2831 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2832 uint8_t amb_thresh_sigma)
charlesmn 0:3ac96e360672 2833 {
charlesmn 0:3ac96e360672 2834
charlesmn 0:3ac96e360672 2835
charlesmn 0:3ac96e360672 2836
charlesmn 0:3ac96e360672 2837 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2838
charlesmn 0:3ac96e360672 2839 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2840
charlesmn 0:3ac96e360672 2841 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2842
charlesmn 0:3ac96e360672 2843 pdev->histpostprocess.ambient_thresh_sigma1 =
charlesmn 0:3ac96e360672 2844 amb_thresh_sigma;
charlesmn 0:3ac96e360672 2845
charlesmn 0:3ac96e360672 2846 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2847
charlesmn 0:3ac96e360672 2848 return status;
charlesmn 0:3ac96e360672 2849
charlesmn 0:3ac96e360672 2850 }
charlesmn 0:3ac96e360672 2851
charlesmn 0:3ac96e360672 2852 VL53L1_Error VL53L1_get_lite_sigma_threshold(
charlesmn 0:3ac96e360672 2853 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2854 uint16_t *plite_sigma)
charlesmn 0:3ac96e360672 2855 {
charlesmn 0:3ac96e360672 2856
charlesmn 0:3ac96e360672 2857
charlesmn 0:3ac96e360672 2858
charlesmn 0:3ac96e360672 2859 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2860
charlesmn 0:3ac96e360672 2861 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2862
charlesmn 0:3ac96e360672 2863 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2864
charlesmn 0:3ac96e360672 2865 *plite_sigma =
charlesmn 0:3ac96e360672 2866 pdev->tim_cfg.range_config__sigma_thresh;
charlesmn 0:3ac96e360672 2867
charlesmn 0:3ac96e360672 2868 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2869
charlesmn 0:3ac96e360672 2870 return status;
charlesmn 0:3ac96e360672 2871
charlesmn 0:3ac96e360672 2872 }
charlesmn 0:3ac96e360672 2873
charlesmn 0:3ac96e360672 2874 VL53L1_Error VL53L1_set_lite_sigma_threshold(
charlesmn 0:3ac96e360672 2875 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2876 uint16_t lite_sigma)
charlesmn 0:3ac96e360672 2877 {
charlesmn 0:3ac96e360672 2878
charlesmn 0:3ac96e360672 2879
charlesmn 0:3ac96e360672 2880
charlesmn 0:3ac96e360672 2881 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2882
charlesmn 0:3ac96e360672 2883 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2884
charlesmn 0:3ac96e360672 2885 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2886
charlesmn 0:3ac96e360672 2887 pdev->tim_cfg.range_config__sigma_thresh = lite_sigma;
charlesmn 0:3ac96e360672 2888
charlesmn 0:3ac96e360672 2889 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2890
charlesmn 0:3ac96e360672 2891 return status;
charlesmn 0:3ac96e360672 2892
charlesmn 0:3ac96e360672 2893 }
charlesmn 0:3ac96e360672 2894
charlesmn 0:3ac96e360672 2895 VL53L1_Error VL53L1_get_lite_min_count_rate(
charlesmn 0:3ac96e360672 2896 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2897 uint16_t *plite_mincountrate)
charlesmn 0:3ac96e360672 2898 {
charlesmn 0:3ac96e360672 2899
charlesmn 0:3ac96e360672 2900
charlesmn 0:3ac96e360672 2901
charlesmn 0:3ac96e360672 2902 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2903
charlesmn 0:3ac96e360672 2904 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2905
charlesmn 0:3ac96e360672 2906 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2907
charlesmn 0:3ac96e360672 2908 *plite_mincountrate =
charlesmn 0:3ac96e360672 2909 pdev->tim_cfg.range_config__min_count_rate_rtn_limit_mcps;
charlesmn 0:3ac96e360672 2910
charlesmn 0:3ac96e360672 2911 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2912
charlesmn 0:3ac96e360672 2913 return status;
charlesmn 0:3ac96e360672 2914
charlesmn 0:3ac96e360672 2915 }
charlesmn 0:3ac96e360672 2916
charlesmn 0:3ac96e360672 2917 VL53L1_Error VL53L1_set_lite_min_count_rate(
charlesmn 0:3ac96e360672 2918 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2919 uint16_t lite_mincountrate)
charlesmn 0:3ac96e360672 2920 {
charlesmn 0:3ac96e360672 2921
charlesmn 0:3ac96e360672 2922
charlesmn 0:3ac96e360672 2923
charlesmn 0:3ac96e360672 2924 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2925
charlesmn 0:3ac96e360672 2926 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2927
charlesmn 0:3ac96e360672 2928 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2929
charlesmn 0:3ac96e360672 2930 pdev->tim_cfg.range_config__min_count_rate_rtn_limit_mcps =
charlesmn 0:3ac96e360672 2931 lite_mincountrate;
charlesmn 0:3ac96e360672 2932
charlesmn 0:3ac96e360672 2933 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2934
charlesmn 0:3ac96e360672 2935 return status;
charlesmn 0:3ac96e360672 2936
charlesmn 0:3ac96e360672 2937 }
charlesmn 0:3ac96e360672 2938
charlesmn 0:3ac96e360672 2939
charlesmn 0:3ac96e360672 2940 VL53L1_Error VL53L1_get_xtalk_detect_config(
charlesmn 0:3ac96e360672 2941 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2942 int16_t *pmax_valid_range_mm,
charlesmn 0:3ac96e360672 2943 int16_t *pmin_valid_range_mm,
charlesmn 0:3ac96e360672 2944 uint16_t *pmax_valid_rate_kcps,
charlesmn 0:3ac96e360672 2945 uint16_t *pmax_sigma_mm)
charlesmn 0:3ac96e360672 2946 {
charlesmn 0:3ac96e360672 2947
charlesmn 0:3ac96e360672 2948
charlesmn 0:3ac96e360672 2949
charlesmn 0:3ac96e360672 2950 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2951
charlesmn 0:3ac96e360672 2952 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2953
charlesmn 0:3ac96e360672 2954 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2955
charlesmn 0:3ac96e360672 2956 *pmax_valid_range_mm =
charlesmn 0:3ac96e360672 2957 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm;
charlesmn 0:3ac96e360672 2958 *pmin_valid_range_mm =
charlesmn 0:3ac96e360672 2959 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm;
charlesmn 0:3ac96e360672 2960 *pmax_valid_rate_kcps =
charlesmn 0:3ac96e360672 2961 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps;
charlesmn 0:3ac96e360672 2962 *pmax_sigma_mm =
charlesmn 0:3ac96e360672 2963 pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm;
charlesmn 0:3ac96e360672 2964
charlesmn 0:3ac96e360672 2965 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2966
charlesmn 0:3ac96e360672 2967 return status;
charlesmn 0:3ac96e360672 2968
charlesmn 0:3ac96e360672 2969 }
charlesmn 0:3ac96e360672 2970
charlesmn 0:3ac96e360672 2971 VL53L1_Error VL53L1_set_xtalk_detect_config(
charlesmn 0:3ac96e360672 2972 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 2973 int16_t max_valid_range_mm,
charlesmn 0:3ac96e360672 2974 int16_t min_valid_range_mm,
charlesmn 0:3ac96e360672 2975 uint16_t max_valid_rate_kcps,
charlesmn 0:3ac96e360672 2976 uint16_t max_sigma_mm)
charlesmn 0:3ac96e360672 2977 {
charlesmn 0:3ac96e360672 2978
charlesmn 0:3ac96e360672 2979
charlesmn 0:3ac96e360672 2980
charlesmn 0:3ac96e360672 2981 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 2982
charlesmn 0:3ac96e360672 2983 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 2984
charlesmn 0:3ac96e360672 2985 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 2986
charlesmn 0:3ac96e360672 2987 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm =
charlesmn 0:3ac96e360672 2988 max_valid_range_mm;
charlesmn 0:3ac96e360672 2989 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm =
charlesmn 0:3ac96e360672 2990 min_valid_range_mm;
charlesmn 0:3ac96e360672 2991 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps =
charlesmn 0:3ac96e360672 2992 max_valid_rate_kcps;
charlesmn 0:3ac96e360672 2993 pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm =
charlesmn 0:3ac96e360672 2994 max_sigma_mm;
charlesmn 0:3ac96e360672 2995
charlesmn 0:3ac96e360672 2996 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 2997
charlesmn 0:3ac96e360672 2998 return status;
charlesmn 0:3ac96e360672 2999
charlesmn 0:3ac96e360672 3000 }
charlesmn 0:3ac96e360672 3001
charlesmn 0:3ac96e360672 3002 VL53L1_Error VL53L1_get_target_order_mode(
charlesmn 0:3ac96e360672 3003 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3004 VL53L1_HistTargetOrder *phist_target_order)
charlesmn 0:3ac96e360672 3005 {
charlesmn 0:3ac96e360672 3006
charlesmn 0:3ac96e360672 3007
charlesmn 0:3ac96e360672 3008
charlesmn 0:3ac96e360672 3009 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3010
charlesmn 0:3ac96e360672 3011 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3012
charlesmn 0:3ac96e360672 3013 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3014
charlesmn 0:3ac96e360672 3015 *phist_target_order =
charlesmn 0:3ac96e360672 3016 pdev->histpostprocess.hist_target_order;
charlesmn 0:3ac96e360672 3017
charlesmn 0:3ac96e360672 3018 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3019
charlesmn 0:3ac96e360672 3020 return status;
charlesmn 0:3ac96e360672 3021
charlesmn 0:3ac96e360672 3022 }
charlesmn 0:3ac96e360672 3023
charlesmn 0:3ac96e360672 3024 VL53L1_Error VL53L1_set_target_order_mode(
charlesmn 0:3ac96e360672 3025 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3026 VL53L1_HistTargetOrder hist_target_order)
charlesmn 0:3ac96e360672 3027 {
charlesmn 0:3ac96e360672 3028
charlesmn 0:3ac96e360672 3029
charlesmn 0:3ac96e360672 3030
charlesmn 0:3ac96e360672 3031 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3032
charlesmn 0:3ac96e360672 3033 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3034
charlesmn 0:3ac96e360672 3035 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3036
charlesmn 0:3ac96e360672 3037 pdev->histpostprocess.hist_target_order = hist_target_order;
charlesmn 0:3ac96e360672 3038
charlesmn 0:3ac96e360672 3039 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3040
charlesmn 0:3ac96e360672 3041 return status;
charlesmn 0:3ac96e360672 3042
charlesmn 0:3ac96e360672 3043 }
charlesmn 0:3ac96e360672 3044
charlesmn 0:3ac96e360672 3045
charlesmn 0:3ac96e360672 3046 VL53L1_Error VL53L1_get_dmax_reflectance_values(
charlesmn 0:3ac96e360672 3047 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3048 VL53L1_dmax_reflectance_array_t *pdmax_reflectances)
charlesmn 0:3ac96e360672 3049 {
charlesmn 0:3ac96e360672 3050
charlesmn 0:3ac96e360672 3051 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3052
charlesmn 0:3ac96e360672 3053 uint8_t i = 0;
charlesmn 0:3ac96e360672 3054
charlesmn 0:3ac96e360672 3055 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3056
charlesmn 0:3ac96e360672 3057 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3058
charlesmn 0:3ac96e360672 3059
charlesmn 0:3ac96e360672 3060
charlesmn 0:3ac96e360672 3061 for (i = 0; i < VL53L1_MAX_AMBIENT_DMAX_VALUES; i++) {
charlesmn 0:3ac96e360672 3062 pdmax_reflectances->target_reflectance_for_dmax[i] =
charlesmn 0:3ac96e360672 3063 pdev->dmax_cfg.target_reflectance_for_dmax_calc[i];
charlesmn 0:3ac96e360672 3064 }
charlesmn 0:3ac96e360672 3065
charlesmn 0:3ac96e360672 3066 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3067
charlesmn 0:3ac96e360672 3068 return status;
charlesmn 0:3ac96e360672 3069
charlesmn 0:3ac96e360672 3070 }
charlesmn 0:3ac96e360672 3071
charlesmn 0:3ac96e360672 3072 VL53L1_Error VL53L1_set_dmax_reflectance_values(
charlesmn 0:3ac96e360672 3073 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3074 VL53L1_dmax_reflectance_array_t *pdmax_reflectances)
charlesmn 0:3ac96e360672 3075 {
charlesmn 0:3ac96e360672 3076
charlesmn 0:3ac96e360672 3077 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3078
charlesmn 0:3ac96e360672 3079 uint8_t i = 0;
charlesmn 0:3ac96e360672 3080
charlesmn 0:3ac96e360672 3081 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3082
charlesmn 0:3ac96e360672 3083 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3084
charlesmn 0:3ac96e360672 3085
charlesmn 0:3ac96e360672 3086
charlesmn 0:3ac96e360672 3087 for (i = 0; i < VL53L1_MAX_AMBIENT_DMAX_VALUES; i++) {
charlesmn 0:3ac96e360672 3088 pdev->dmax_cfg.target_reflectance_for_dmax_calc[i] =
charlesmn 0:3ac96e360672 3089 pdmax_reflectances->target_reflectance_for_dmax[i];
charlesmn 0:3ac96e360672 3090 }
charlesmn 0:3ac96e360672 3091
charlesmn 0:3ac96e360672 3092 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3093
charlesmn 0:3ac96e360672 3094 return status;
charlesmn 0:3ac96e360672 3095
charlesmn 0:3ac96e360672 3096 }
charlesmn 0:3ac96e360672 3097
charlesmn 0:3ac96e360672 3098 VL53L1_Error VL53L1_get_vhv_loopbound(
charlesmn 0:3ac96e360672 3099 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3100 uint8_t *pvhv_loopbound)
charlesmn 0:3ac96e360672 3101 {
charlesmn 0:3ac96e360672 3102
charlesmn 0:3ac96e360672 3103
charlesmn 0:3ac96e360672 3104
charlesmn 0:3ac96e360672 3105 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3106
charlesmn 0:3ac96e360672 3107 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3108
charlesmn 0:3ac96e360672 3109 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3110
charlesmn 0:3ac96e360672 3111 *pvhv_loopbound =
charlesmn 0:3ac96e360672 3112 pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound / 4;
charlesmn 0:3ac96e360672 3113
charlesmn 0:3ac96e360672 3114 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3115
charlesmn 0:3ac96e360672 3116 return status;
charlesmn 0:3ac96e360672 3117
charlesmn 0:3ac96e360672 3118 }
charlesmn 0:3ac96e360672 3119
charlesmn 0:3ac96e360672 3120
charlesmn 0:3ac96e360672 3121
charlesmn 0:3ac96e360672 3122 VL53L1_Error VL53L1_set_vhv_loopbound(
charlesmn 0:3ac96e360672 3123 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3124 uint8_t vhv_loopbound)
charlesmn 0:3ac96e360672 3125 {
charlesmn 0:3ac96e360672 3126
charlesmn 0:3ac96e360672 3127
charlesmn 0:3ac96e360672 3128
charlesmn 0:3ac96e360672 3129 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3130
charlesmn 0:3ac96e360672 3131 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3132
charlesmn 0:3ac96e360672 3133 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3134
charlesmn 0:3ac96e360672 3135 pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound =
charlesmn 0:3ac96e360672 3136 (pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound & 0x03) +
charlesmn 0:3ac96e360672 3137 (vhv_loopbound * 4);
charlesmn 0:3ac96e360672 3138
charlesmn 0:3ac96e360672 3139 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3140
charlesmn 0:3ac96e360672 3141 return status;
charlesmn 0:3ac96e360672 3142
charlesmn 0:3ac96e360672 3143 }
charlesmn 0:3ac96e360672 3144
charlesmn 0:3ac96e360672 3145
charlesmn 0:3ac96e360672 3146
charlesmn 0:3ac96e360672 3147 VL53L1_Error VL53L1_get_vhv_config(
charlesmn 0:3ac96e360672 3148 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3149 uint8_t *pvhv_init_en,
charlesmn 0:3ac96e360672 3150 uint8_t *pvhv_init_value)
charlesmn 0:3ac96e360672 3151 {
charlesmn 0:3ac96e360672 3152
charlesmn 0:3ac96e360672 3153
charlesmn 0:3ac96e360672 3154
charlesmn 0:3ac96e360672 3155
charlesmn 0:3ac96e360672 3156
charlesmn 0:3ac96e360672 3157 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3158
charlesmn 0:3ac96e360672 3159 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3160
charlesmn 0:3ac96e360672 3161 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3162
charlesmn 0:3ac96e360672 3163 *pvhv_init_en = (pdev->stat_nvm.vhv_config__init & 0x80) >> 7;
charlesmn 0:3ac96e360672 3164 *pvhv_init_value =
charlesmn 0:3ac96e360672 3165 (pdev->stat_nvm.vhv_config__init & 0x7F);
charlesmn 0:3ac96e360672 3166
charlesmn 0:3ac96e360672 3167 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3168
charlesmn 0:3ac96e360672 3169 return status;
charlesmn 0:3ac96e360672 3170
charlesmn 0:3ac96e360672 3171 }
charlesmn 0:3ac96e360672 3172
charlesmn 0:3ac96e360672 3173
charlesmn 0:3ac96e360672 3174
charlesmn 0:3ac96e360672 3175 VL53L1_Error VL53L1_set_vhv_config(
charlesmn 0:3ac96e360672 3176 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3177 uint8_t vhv_init_en,
charlesmn 0:3ac96e360672 3178 uint8_t vhv_init_value)
charlesmn 0:3ac96e360672 3179 {
charlesmn 0:3ac96e360672 3180
charlesmn 0:3ac96e360672 3181
charlesmn 0:3ac96e360672 3182
charlesmn 0:3ac96e360672 3183 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3184
charlesmn 0:3ac96e360672 3185 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3186
charlesmn 0:3ac96e360672 3187 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3188
charlesmn 0:3ac96e360672 3189 pdev->stat_nvm.vhv_config__init =
charlesmn 0:3ac96e360672 3190 ((vhv_init_en & 0x01) << 7) +
charlesmn 0:3ac96e360672 3191 (vhv_init_value & 0x7F);
charlesmn 0:3ac96e360672 3192
charlesmn 0:3ac96e360672 3193 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3194
charlesmn 0:3ac96e360672 3195 return status;
charlesmn 0:3ac96e360672 3196
charlesmn 0:3ac96e360672 3197 }
charlesmn 0:3ac96e360672 3198
charlesmn 0:3ac96e360672 3199
charlesmn 0:3ac96e360672 3200
charlesmn 0:3ac96e360672 3201 VL53L1_Error VL53L1_init_and_start_range(
charlesmn 0:3ac96e360672 3202 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3203 uint8_t measurement_mode,
charlesmn 0:3ac96e360672 3204 VL53L1_DeviceConfigLevel device_config_level)
charlesmn 0:3ac96e360672 3205 {
charlesmn 0:3ac96e360672 3206
charlesmn 0:3ac96e360672 3207
charlesmn 0:3ac96e360672 3208 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3209 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3210 VL53L1_LLDriverResults_t *pres =
charlesmn 0:3ac96e360672 3211 VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn 0:3ac96e360672 3212
charlesmn 0:3ac96e360672 3213 uint8_t buffer[VL53L1_MAX_I2C_XFER_SIZE];
charlesmn 0:3ac96e360672 3214
charlesmn 0:3ac96e360672 3215 VL53L1_static_nvm_managed_t *pstatic_nvm = &(pdev->stat_nvm);
charlesmn 0:3ac96e360672 3216 VL53L1_customer_nvm_managed_t *pcustomer_nvm = &(pdev->customer);
charlesmn 0:3ac96e360672 3217 VL53L1_static_config_t *pstatic = &(pdev->stat_cfg);
charlesmn 0:3ac96e360672 3218 VL53L1_general_config_t *pgeneral = &(pdev->gen_cfg);
charlesmn 0:3ac96e360672 3219 VL53L1_timing_config_t *ptiming = &(pdev->tim_cfg);
charlesmn 0:3ac96e360672 3220 VL53L1_dynamic_config_t *pdynamic = &(pdev->dyn_cfg);
charlesmn 0:3ac96e360672 3221 VL53L1_system_control_t *psystem = &(pdev->sys_ctrl);
charlesmn 0:3ac96e360672 3222
charlesmn 0:3ac96e360672 3223 VL53L1_ll_driver_state_t *pstate = &(pdev->ll_state);
charlesmn 0:3ac96e360672 3224 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer);
charlesmn 0:3ac96e360672 3225
charlesmn 0:3ac96e360672 3226 uint8_t *pbuffer = &buffer[0];
charlesmn 0:3ac96e360672 3227 uint16_t i = 0;
charlesmn 0:3ac96e360672 3228 uint16_t i2c_index = 0;
charlesmn 0:3ac96e360672 3229 uint16_t i2c_buffer_offset_bytes = 0;
charlesmn 0:3ac96e360672 3230 uint16_t i2c_buffer_size_bytes = 0;
charlesmn 0:3ac96e360672 3231
charlesmn 0:3ac96e360672 3232 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3233
charlesmn 0:3ac96e360672 3234
charlesmn 0:3ac96e360672 3235 pdev->measurement_mode = measurement_mode;
charlesmn 0:3ac96e360672 3236
charlesmn 0:3ac96e360672 3237
charlesmn 0:3ac96e360672 3238
charlesmn 0:3ac96e360672 3239 psystem->system__mode_start =
charlesmn 0:3ac96e360672 3240 (psystem->system__mode_start &
charlesmn 0:3ac96e360672 3241 VL53L1_DEVICEMEASUREMENTMODE_STOP_MASK) |
charlesmn 0:3ac96e360672 3242 measurement_mode;
charlesmn 0:3ac96e360672 3243
charlesmn 0:3ac96e360672 3244
charlesmn 0:3ac96e360672 3245
charlesmn 0:3ac96e360672 3246 status =
charlesmn 0:3ac96e360672 3247 VL53L1_set_user_zone(
charlesmn 0:3ac96e360672 3248 Dev,
charlesmn 0:3ac96e360672 3249 &(pdev->zone_cfg.user_zones[pdev->ll_state.cfg_zone_id]));
charlesmn 0:3ac96e360672 3250
charlesmn 0:3ac96e360672 3251
charlesmn 0:3ac96e360672 3252 if (pdev->zone_cfg.active_zones > 0) {
charlesmn 0:3ac96e360672 3253 status =
charlesmn 0:3ac96e360672 3254 VL53L1_set_zone_dss_config(
charlesmn 0:3ac96e360672 3255 Dev,
charlesmn 0:3ac96e360672 3256 &(pres->zone_dyn_cfgs.VL53L1_p_002[pdev->ll_state.cfg_zone_id])
charlesmn 0:3ac96e360672 3257 );
charlesmn 0:3ac96e360672 3258 }
charlesmn 0:3ac96e360672 3259
charlesmn 0:3ac96e360672 3260
charlesmn 0:3ac96e360672 3261
charlesmn 0:3ac96e360672 3262
charlesmn 0:3ac96e360672 3263 if (((pdev->sys_ctrl.system__mode_start &
charlesmn 0:3ac96e360672 3264 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM) == 0x00) &&
charlesmn 0:3ac96e360672 3265 (pdev->xtalk_cfg.global_crosstalk_compensation_enable
charlesmn 0:3ac96e360672 3266 == 0x01)) {
charlesmn 0:3ac96e360672 3267 pdev->stat_cfg.algo__range_ignore_threshold_mcps =
charlesmn 0:3ac96e360672 3268 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps;
charlesmn 0:3ac96e360672 3269 }
charlesmn 0:3ac96e360672 3270
charlesmn 0:3ac96e360672 3271
charlesmn 0:3ac96e360672 3272
charlesmn 0:3ac96e360672 3273
charlesmn 0:3ac96e360672 3274
charlesmn 0:3ac96e360672 3275 if (pdev->low_power_auto_data.low_power_auto_range_count == 0xFF)
charlesmn 0:3ac96e360672 3276 pdev->low_power_auto_data.low_power_auto_range_count = 0x0;
charlesmn 0:3ac96e360672 3277
charlesmn 0:3ac96e360672 3278
charlesmn 0:3ac96e360672 3279 if ((pdev->low_power_auto_data.is_low_power_auto_mode == 1) &&
charlesmn 0:3ac96e360672 3280 (pdev->low_power_auto_data.low_power_auto_range_count == 0)) {
charlesmn 0:3ac96e360672 3281
charlesmn 0:3ac96e360672 3282 pdev->low_power_auto_data.saved_interrupt_config =
charlesmn 0:3ac96e360672 3283 pdev->gen_cfg.system__interrupt_config_gpio;
charlesmn 0:3ac96e360672 3284
charlesmn 0:3ac96e360672 3285 pdev->gen_cfg.system__interrupt_config_gpio = 1 << 5;
charlesmn 0:3ac96e360672 3286
charlesmn 0:3ac96e360672 3287 if ((pdev->dyn_cfg.system__sequence_config & (
charlesmn 0:3ac96e360672 3288 VL53L1_SEQUENCE_MM1_EN | VL53L1_SEQUENCE_MM2_EN)) ==
charlesmn 0:3ac96e360672 3289 0x0) {
charlesmn 0:3ac96e360672 3290 pN->algo__part_to_part_range_offset_mm =
charlesmn 0:3ac96e360672 3291 (pN->mm_config__outer_offset_mm << 2);
charlesmn 0:3ac96e360672 3292 } else {
charlesmn 0:3ac96e360672 3293 pN->algo__part_to_part_range_offset_mm = 0x0;
charlesmn 0:3ac96e360672 3294 }
charlesmn 0:3ac96e360672 3295
charlesmn 0:3ac96e360672 3296
charlesmn 0:3ac96e360672 3297 if (device_config_level <
charlesmn 0:3ac96e360672 3298 VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS) {
charlesmn 0:3ac96e360672 3299 device_config_level =
charlesmn 0:3ac96e360672 3300 VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS;
charlesmn 0:3ac96e360672 3301 }
charlesmn 0:3ac96e360672 3302 }
charlesmn 0:3ac96e360672 3303
charlesmn 0:3ac96e360672 3304 if ((pdev->low_power_auto_data.is_low_power_auto_mode == 1) &&
charlesmn 0:3ac96e360672 3305 (pdev->low_power_auto_data.low_power_auto_range_count == 1)) {
charlesmn 0:3ac96e360672 3306
charlesmn 0:3ac96e360672 3307 pdev->gen_cfg.system__interrupt_config_gpio =
charlesmn 0:3ac96e360672 3308 pdev->low_power_auto_data.saved_interrupt_config;
charlesmn 0:3ac96e360672 3309
charlesmn 0:3ac96e360672 3310
charlesmn 0:3ac96e360672 3311 device_config_level = VL53L1_DEVICECONFIGLEVEL_FULL;
charlesmn 0:3ac96e360672 3312 }
charlesmn 0:3ac96e360672 3313
charlesmn 0:3ac96e360672 3314
charlesmn 0:3ac96e360672 3315
charlesmn 0:3ac96e360672 3316
charlesmn 0:3ac96e360672 3317
charlesmn 0:3ac96e360672 3318 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3319 status = VL53L1_save_cfg_data(Dev);
charlesmn 0:3ac96e360672 3320
charlesmn 0:3ac96e360672 3321
charlesmn 0:3ac96e360672 3322
charlesmn 0:3ac96e360672 3323 switch (device_config_level) {
charlesmn 0:3ac96e360672 3324 case VL53L1_DEVICECONFIGLEVEL_FULL:
charlesmn 0:3ac96e360672 3325 i2c_index = VL53L1_STATIC_NVM_MANAGED_I2C_INDEX;
charlesmn 0:3ac96e360672 3326 break;
charlesmn 0:3ac96e360672 3327 case VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS:
charlesmn 0:3ac96e360672 3328 i2c_index = VL53L1_CUSTOMER_NVM_MANAGED_I2C_INDEX;
charlesmn 0:3ac96e360672 3329 break;
charlesmn 0:3ac96e360672 3330 case VL53L1_DEVICECONFIGLEVEL_STATIC_ONWARDS:
charlesmn 0:3ac96e360672 3331 i2c_index = VL53L1_STATIC_CONFIG_I2C_INDEX;
charlesmn 0:3ac96e360672 3332 break;
charlesmn 0:3ac96e360672 3333 case VL53L1_DEVICECONFIGLEVEL_GENERAL_ONWARDS:
charlesmn 0:3ac96e360672 3334 i2c_index = VL53L1_GENERAL_CONFIG_I2C_INDEX;
charlesmn 0:3ac96e360672 3335 break;
charlesmn 0:3ac96e360672 3336 case VL53L1_DEVICECONFIGLEVEL_TIMING_ONWARDS:
charlesmn 0:3ac96e360672 3337 i2c_index = VL53L1_TIMING_CONFIG_I2C_INDEX;
charlesmn 0:3ac96e360672 3338 break;
charlesmn 0:3ac96e360672 3339 case VL53L1_DEVICECONFIGLEVEL_DYNAMIC_ONWARDS:
charlesmn 0:3ac96e360672 3340 i2c_index = VL53L1_DYNAMIC_CONFIG_I2C_INDEX;
charlesmn 0:3ac96e360672 3341 break;
charlesmn 0:3ac96e360672 3342 default:
charlesmn 0:3ac96e360672 3343 i2c_index = VL53L1_SYSTEM_CONTROL_I2C_INDEX;
charlesmn 0:3ac96e360672 3344 break;
charlesmn 0:3ac96e360672 3345 }
charlesmn 0:3ac96e360672 3346
charlesmn 0:3ac96e360672 3347
charlesmn 0:3ac96e360672 3348
charlesmn 0:3ac96e360672 3349 i2c_buffer_size_bytes =
charlesmn 0:3ac96e360672 3350 (VL53L1_SYSTEM_CONTROL_I2C_INDEX +
charlesmn 0:3ac96e360672 3351 VL53L1_SYSTEM_CONTROL_I2C_SIZE_BYTES) -
charlesmn 0:3ac96e360672 3352 i2c_index;
charlesmn 0:3ac96e360672 3353
charlesmn 0:3ac96e360672 3354
charlesmn 0:3ac96e360672 3355
charlesmn 0:3ac96e360672 3356 pbuffer = &buffer[0];
charlesmn 0:3ac96e360672 3357 for (i = 0; i < i2c_buffer_size_bytes; i++)
charlesmn 0:3ac96e360672 3358 *pbuffer++ = 0;
charlesmn 0:3ac96e360672 3359
charlesmn 0:3ac96e360672 3360
charlesmn 0:3ac96e360672 3361
charlesmn 0:3ac96e360672 3362 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_FULL &&
charlesmn 0:3ac96e360672 3363 status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3364
charlesmn 0:3ac96e360672 3365 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 3366 VL53L1_STATIC_NVM_MANAGED_I2C_INDEX - i2c_index;
charlesmn 0:3ac96e360672 3367
charlesmn 0:3ac96e360672 3368 status =
charlesmn 0:3ac96e360672 3369 VL53L1_i2c_encode_static_nvm_managed(
charlesmn 0:3ac96e360672 3370 pstatic_nvm,
charlesmn 0:3ac96e360672 3371 VL53L1_STATIC_NVM_MANAGED_I2C_SIZE_BYTES,
charlesmn 0:3ac96e360672 3372 &buffer[i2c_buffer_offset_bytes]);
charlesmn 0:3ac96e360672 3373 }
charlesmn 0:3ac96e360672 3374
charlesmn 0:3ac96e360672 3375 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS &&
charlesmn 0:3ac96e360672 3376 status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3377
charlesmn 0:3ac96e360672 3378 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 3379 VL53L1_CUSTOMER_NVM_MANAGED_I2C_INDEX - i2c_index;
charlesmn 0:3ac96e360672 3380
charlesmn 0:3ac96e360672 3381 status =
charlesmn 0:3ac96e360672 3382 VL53L1_i2c_encode_customer_nvm_managed(
charlesmn 0:3ac96e360672 3383 pcustomer_nvm,
charlesmn 0:3ac96e360672 3384 VL53L1_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES,
charlesmn 0:3ac96e360672 3385 &buffer[i2c_buffer_offset_bytes]);
charlesmn 0:3ac96e360672 3386 }
charlesmn 0:3ac96e360672 3387
charlesmn 0:3ac96e360672 3388 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_STATIC_ONWARDS &&
charlesmn 0:3ac96e360672 3389 status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3390
charlesmn 0:3ac96e360672 3391 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 3392 VL53L1_STATIC_CONFIG_I2C_INDEX - i2c_index;
charlesmn 0:3ac96e360672 3393
charlesmn 0:3ac96e360672 3394 status =
charlesmn 0:3ac96e360672 3395 VL53L1_i2c_encode_static_config(
charlesmn 0:3ac96e360672 3396 pstatic,
charlesmn 0:3ac96e360672 3397 VL53L1_STATIC_CONFIG_I2C_SIZE_BYTES,
charlesmn 0:3ac96e360672 3398 &buffer[i2c_buffer_offset_bytes]);
charlesmn 0:3ac96e360672 3399 }
charlesmn 0:3ac96e360672 3400
charlesmn 0:3ac96e360672 3401 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_GENERAL_ONWARDS &&
charlesmn 0:3ac96e360672 3402 status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3403
charlesmn 0:3ac96e360672 3404 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 3405 VL53L1_GENERAL_CONFIG_I2C_INDEX - i2c_index;
charlesmn 0:3ac96e360672 3406
charlesmn 0:3ac96e360672 3407 status =
charlesmn 0:3ac96e360672 3408 VL53L1_i2c_encode_general_config(
charlesmn 0:3ac96e360672 3409 pgeneral,
charlesmn 0:3ac96e360672 3410 VL53L1_GENERAL_CONFIG_I2C_SIZE_BYTES,
charlesmn 0:3ac96e360672 3411 &buffer[i2c_buffer_offset_bytes]);
charlesmn 0:3ac96e360672 3412 }
charlesmn 0:3ac96e360672 3413
charlesmn 0:3ac96e360672 3414 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_TIMING_ONWARDS &&
charlesmn 0:3ac96e360672 3415 status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3416
charlesmn 0:3ac96e360672 3417 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 3418 VL53L1_TIMING_CONFIG_I2C_INDEX - i2c_index;
charlesmn 0:3ac96e360672 3419
charlesmn 0:3ac96e360672 3420 status =
charlesmn 0:3ac96e360672 3421 VL53L1_i2c_encode_timing_config(
charlesmn 0:3ac96e360672 3422 ptiming,
charlesmn 0:3ac96e360672 3423 VL53L1_TIMING_CONFIG_I2C_SIZE_BYTES,
charlesmn 0:3ac96e360672 3424 &buffer[i2c_buffer_offset_bytes]);
charlesmn 0:3ac96e360672 3425 }
charlesmn 0:3ac96e360672 3426
charlesmn 0:3ac96e360672 3427 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_DYNAMIC_ONWARDS &&
charlesmn 0:3ac96e360672 3428 status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3429
charlesmn 0:3ac96e360672 3430 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 3431 VL53L1_DYNAMIC_CONFIG_I2C_INDEX - i2c_index;
charlesmn 0:3ac96e360672 3432
charlesmn 0:3ac96e360672 3433
charlesmn 0:3ac96e360672 3434 if ((psystem->system__mode_start &
charlesmn 0:3ac96e360672 3435 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK) ==
charlesmn 0:3ac96e360672 3436 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK) {
charlesmn 0:3ac96e360672 3437 pdynamic->system__grouped_parameter_hold_0 =
charlesmn 0:3ac96e360672 3438 pstate->cfg_gph_id | 0x01;
charlesmn 0:3ac96e360672 3439 pdynamic->system__grouped_parameter_hold_1 =
charlesmn 0:3ac96e360672 3440 pstate->cfg_gph_id | 0x01;
charlesmn 0:3ac96e360672 3441 pdynamic->system__grouped_parameter_hold =
charlesmn 0:3ac96e360672 3442 pstate->cfg_gph_id;
charlesmn 0:3ac96e360672 3443 }
charlesmn 0:3ac96e360672 3444 status =
charlesmn 0:3ac96e360672 3445 VL53L1_i2c_encode_dynamic_config(
charlesmn 0:3ac96e360672 3446 pdynamic,
charlesmn 0:3ac96e360672 3447 VL53L1_DYNAMIC_CONFIG_I2C_SIZE_BYTES,
charlesmn 0:3ac96e360672 3448 &buffer[i2c_buffer_offset_bytes]);
charlesmn 0:3ac96e360672 3449 }
charlesmn 0:3ac96e360672 3450
charlesmn 0:3ac96e360672 3451 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3452
charlesmn 0:3ac96e360672 3453 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 3454 VL53L1_SYSTEM_CONTROL_I2C_INDEX - i2c_index;
charlesmn 0:3ac96e360672 3455
charlesmn 0:3ac96e360672 3456 status =
charlesmn 0:3ac96e360672 3457 VL53L1_i2c_encode_system_control(
charlesmn 0:3ac96e360672 3458 psystem,
charlesmn 0:3ac96e360672 3459 VL53L1_SYSTEM_CONTROL_I2C_SIZE_BYTES,
charlesmn 0:3ac96e360672 3460 &buffer[i2c_buffer_offset_bytes]);
charlesmn 0:3ac96e360672 3461 }
charlesmn 0:3ac96e360672 3462
charlesmn 0:3ac96e360672 3463
charlesmn 0:3ac96e360672 3464
charlesmn 0:3ac96e360672 3465 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3466 status =
charlesmn 0:3ac96e360672 3467 VL53L1_WriteMulti(
charlesmn 0:3ac96e360672 3468 Dev,
charlesmn 0:3ac96e360672 3469 i2c_index,
charlesmn 0:3ac96e360672 3470 buffer,
charlesmn 0:3ac96e360672 3471 (uint32_t)i2c_buffer_size_bytes);
charlesmn 0:3ac96e360672 3472 }
charlesmn 0:3ac96e360672 3473
charlesmn 0:3ac96e360672 3474
charlesmn 0:3ac96e360672 3475 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3476 status = VL53L1_update_ll_driver_rd_state(Dev);
charlesmn 0:3ac96e360672 3477
charlesmn 0:3ac96e360672 3478 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3479 status = VL53L1_update_ll_driver_cfg_state(Dev);
charlesmn 0:3ac96e360672 3480
charlesmn 0:3ac96e360672 3481 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3482
charlesmn 0:3ac96e360672 3483 return status;
charlesmn 0:3ac96e360672 3484 }
charlesmn 0:3ac96e360672 3485
charlesmn 0:3ac96e360672 3486
charlesmn 0:3ac96e360672 3487 VL53L1_Error VL53L1_stop_range(
charlesmn 0:3ac96e360672 3488 VL53L1_DEV Dev)
charlesmn 0:3ac96e360672 3489 {
charlesmn 0:3ac96e360672 3490
charlesmn 0:3ac96e360672 3491
charlesmn 0:3ac96e360672 3492 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3493
charlesmn 0:3ac96e360672 3494 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 3495 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3496 VL53L1_LLDriverResults_t *pres =
charlesmn 0:3ac96e360672 3497 VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn 0:3ac96e360672 3498
charlesmn 0:3ac96e360672 3499
charlesmn 0:3ac96e360672 3500
charlesmn 0:3ac96e360672 3501 pdev->sys_ctrl.system__mode_start =
charlesmn 0:3ac96e360672 3502 (pdev->sys_ctrl.system__mode_start &
charlesmn 0:3ac96e360672 3503 VL53L1_DEVICEMEASUREMENTMODE_STOP_MASK) |
charlesmn 0:3ac96e360672 3504 VL53L1_DEVICEMEASUREMENTMODE_ABORT;
charlesmn 0:3ac96e360672 3505
charlesmn 0:3ac96e360672 3506 status = VL53L1_set_system_control(
charlesmn 0:3ac96e360672 3507 Dev,
charlesmn 0:3ac96e360672 3508 &pdev->sys_ctrl);
charlesmn 0:3ac96e360672 3509
charlesmn 0:3ac96e360672 3510
charlesmn 0:3ac96e360672 3511 pdev->sys_ctrl.system__mode_start =
charlesmn 0:3ac96e360672 3512 (pdev->sys_ctrl.system__mode_start &
charlesmn 0:3ac96e360672 3513 VL53L1_DEVICEMEASUREMENTMODE_STOP_MASK);
charlesmn 0:3ac96e360672 3514
charlesmn 0:3ac96e360672 3515
charlesmn 0:3ac96e360672 3516 VL53L1_init_ll_driver_state(
charlesmn 0:3ac96e360672 3517 Dev,
charlesmn 0:3ac96e360672 3518 VL53L1_DEVICESTATE_SW_STANDBY);
charlesmn 0:3ac96e360672 3519
charlesmn 0:3ac96e360672 3520
charlesmn 0:3ac96e360672 3521 V53L1_init_zone_results_structure(
charlesmn 0:3ac96e360672 3522 pdev->zone_cfg.active_zones+1,
charlesmn 0:3ac96e360672 3523 &(pres->zone_results));
charlesmn 0:3ac96e360672 3524
charlesmn 0:3ac96e360672 3525
charlesmn 0:3ac96e360672 3526 V53L1_init_zone_dss_configs(Dev);
charlesmn 0:3ac96e360672 3527
charlesmn 0:3ac96e360672 3528
charlesmn 0:3ac96e360672 3529 if (pdev->low_power_auto_data.is_low_power_auto_mode == 1)
charlesmn 0:3ac96e360672 3530 VL53L1_low_power_auto_data_stop_range(Dev);
charlesmn 0:3ac96e360672 3531
charlesmn 0:3ac96e360672 3532 return status;
charlesmn 0:3ac96e360672 3533 }
charlesmn 0:3ac96e360672 3534
charlesmn 0:3ac96e360672 3535
charlesmn 0:3ac96e360672 3536 VL53L1_Error VL53L1_get_measurement_results(
charlesmn 0:3ac96e360672 3537 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3538 VL53L1_DeviceResultsLevel device_results_level)
charlesmn 0:3ac96e360672 3539 {
charlesmn 0:3ac96e360672 3540
charlesmn 0:3ac96e360672 3541
charlesmn 0:3ac96e360672 3542 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3543 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3544
charlesmn 0:3ac96e360672 3545 uint8_t buffer[VL53L1_MAX_I2C_XFER_SIZE];
charlesmn 0:3ac96e360672 3546
charlesmn 0:3ac96e360672 3547 VL53L1_system_results_t *psystem_results = &(pdev->sys_results);
charlesmn 0:3ac96e360672 3548 VL53L1_core_results_t *pcore_results = &(pdev->core_results);
charlesmn 0:3ac96e360672 3549 VL53L1_debug_results_t *pdebug_results = &(pdev->dbg_results);
charlesmn 0:3ac96e360672 3550
charlesmn 0:3ac96e360672 3551 uint16_t i2c_index = VL53L1_SYSTEM_RESULTS_I2C_INDEX;
charlesmn 0:3ac96e360672 3552 uint16_t i2c_buffer_offset_bytes = 0;
charlesmn 0:3ac96e360672 3553 uint16_t i2c_buffer_size_bytes = 0;
charlesmn 0:3ac96e360672 3554
charlesmn 0:3ac96e360672 3555 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3556
charlesmn 0:3ac96e360672 3557
charlesmn 0:3ac96e360672 3558
charlesmn 0:3ac96e360672 3559 switch (device_results_level) {
charlesmn 0:3ac96e360672 3560 case VL53L1_DEVICERESULTSLEVEL_FULL:
charlesmn 0:3ac96e360672 3561 i2c_buffer_size_bytes =
charlesmn 0:3ac96e360672 3562 (VL53L1_DEBUG_RESULTS_I2C_INDEX +
charlesmn 0:3ac96e360672 3563 VL53L1_DEBUG_RESULTS_I2C_SIZE_BYTES) -
charlesmn 0:3ac96e360672 3564 i2c_index;
charlesmn 0:3ac96e360672 3565 break;
charlesmn 0:3ac96e360672 3566 case VL53L1_DEVICERESULTSLEVEL_UPTO_CORE:
charlesmn 0:3ac96e360672 3567 i2c_buffer_size_bytes =
charlesmn 0:3ac96e360672 3568 (VL53L1_CORE_RESULTS_I2C_INDEX +
charlesmn 0:3ac96e360672 3569 VL53L1_CORE_RESULTS_I2C_SIZE_BYTES) -
charlesmn 0:3ac96e360672 3570 i2c_index;
charlesmn 0:3ac96e360672 3571 break;
charlesmn 0:3ac96e360672 3572 default:
charlesmn 0:3ac96e360672 3573 i2c_buffer_size_bytes =
charlesmn 0:3ac96e360672 3574 VL53L1_SYSTEM_RESULTS_I2C_SIZE_BYTES;
charlesmn 0:3ac96e360672 3575 break;
charlesmn 0:3ac96e360672 3576 }
charlesmn 0:3ac96e360672 3577
charlesmn 0:3ac96e360672 3578
charlesmn 0:3ac96e360672 3579
charlesmn 0:3ac96e360672 3580 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3581 status =
charlesmn 0:3ac96e360672 3582 VL53L1_ReadMulti(
charlesmn 0:3ac96e360672 3583 Dev,
charlesmn 0:3ac96e360672 3584 i2c_index,
charlesmn 0:3ac96e360672 3585 buffer,
charlesmn 0:3ac96e360672 3586 (uint32_t)i2c_buffer_size_bytes);
charlesmn 0:3ac96e360672 3587
charlesmn 0:3ac96e360672 3588
charlesmn 0:3ac96e360672 3589
charlesmn 0:3ac96e360672 3590 if (device_results_level >= VL53L1_DEVICERESULTSLEVEL_FULL &&
charlesmn 0:3ac96e360672 3591 status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3592
charlesmn 0:3ac96e360672 3593 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 3594 VL53L1_DEBUG_RESULTS_I2C_INDEX - i2c_index;
charlesmn 0:3ac96e360672 3595
charlesmn 0:3ac96e360672 3596 status =
charlesmn 0:3ac96e360672 3597 VL53L1_i2c_decode_debug_results(
charlesmn 0:3ac96e360672 3598 VL53L1_DEBUG_RESULTS_I2C_SIZE_BYTES,
charlesmn 0:3ac96e360672 3599 &buffer[i2c_buffer_offset_bytes],
charlesmn 0:3ac96e360672 3600 pdebug_results);
charlesmn 0:3ac96e360672 3601 }
charlesmn 0:3ac96e360672 3602
charlesmn 0:3ac96e360672 3603 if (device_results_level >= VL53L1_DEVICERESULTSLEVEL_UPTO_CORE &&
charlesmn 0:3ac96e360672 3604 status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3605
charlesmn 0:3ac96e360672 3606 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 3607 VL53L1_CORE_RESULTS_I2C_INDEX - i2c_index;
charlesmn 0:3ac96e360672 3608
charlesmn 0:3ac96e360672 3609 status =
charlesmn 0:3ac96e360672 3610 VL53L1_i2c_decode_core_results(
charlesmn 0:3ac96e360672 3611 VL53L1_CORE_RESULTS_I2C_SIZE_BYTES,
charlesmn 0:3ac96e360672 3612 &buffer[i2c_buffer_offset_bytes],
charlesmn 0:3ac96e360672 3613 pcore_results);
charlesmn 0:3ac96e360672 3614 }
charlesmn 0:3ac96e360672 3615
charlesmn 0:3ac96e360672 3616 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3617
charlesmn 0:3ac96e360672 3618 i2c_buffer_offset_bytes = 0;
charlesmn 0:3ac96e360672 3619 status =
charlesmn 0:3ac96e360672 3620 VL53L1_i2c_decode_system_results(
charlesmn 0:3ac96e360672 3621 VL53L1_SYSTEM_RESULTS_I2C_SIZE_BYTES,
charlesmn 0:3ac96e360672 3622 &buffer[i2c_buffer_offset_bytes],
charlesmn 0:3ac96e360672 3623 psystem_results);
charlesmn 0:3ac96e360672 3624 }
charlesmn 0:3ac96e360672 3625
charlesmn 0:3ac96e360672 3626 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 3627
charlesmn 0:3ac96e360672 3628 return status;
charlesmn 0:3ac96e360672 3629 }
charlesmn 0:3ac96e360672 3630
charlesmn 0:3ac96e360672 3631
charlesmn 0:3ac96e360672 3632 VL53L1_Error VL53L1_get_device_results(
charlesmn 0:3ac96e360672 3633 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 3634 VL53L1_DeviceResultsLevel device_results_level,
charlesmn 0:3ac96e360672 3635 VL53L1_range_results_t *prange_results)
charlesmn 0:3ac96e360672 3636 {
charlesmn 0:3ac96e360672 3637
charlesmn 0:3ac96e360672 3638
charlesmn 0:3ac96e360672 3639 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 3640
charlesmn 0:3ac96e360672 3641 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 3642 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 3643 VL53L1_LLDriverResults_t *pres =
charlesmn 0:3ac96e360672 3644 VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn 0:3ac96e360672 3645
charlesmn 0:3ac96e360672 3646 VL53L1_range_results_t *presults =
charlesmn 0:3ac96e360672 3647 &(pres->range_results);
charlesmn 0:3ac96e360672 3648 VL53L1_zone_objects_t *pobjects =
charlesmn 0:3ac96e360672 3649 &(pres->zone_results.VL53L1_p_002[0]);
charlesmn 0:3ac96e360672 3650 VL53L1_ll_driver_state_t *pstate =
charlesmn 0:3ac96e360672 3651 &(pdev->ll_state);
charlesmn 0:3ac96e360672 3652 VL53L1_zone_config_t *pzone_cfg =
charlesmn 0:3ac96e360672 3653 &(pdev->zone_cfg);
charlesmn 0:3ac96e360672 3654 VL53L1_zone_hist_info_t *phist_info =
charlesmn 0:3ac96e360672 3655 &(pres->zone_hists.VL53L1_p_002[0]);
charlesmn 0:3ac96e360672 3656
charlesmn 0:3ac96e360672 3657 VL53L1_dmax_calibration_data_t dmax_cal;
charlesmn 0:3ac96e360672 3658 VL53L1_dmax_calibration_data_t *pdmax_cal = &dmax_cal;
charlesmn 0:3ac96e360672 3659 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn 0:3ac96e360672 3660 VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg);
charlesmn 0:3ac96e360672 3661 VL53L1_low_power_auto_data_t *pL = &(pdev->low_power_auto_data);
charlesmn 0:3ac96e360672 3662 VL53L1_histogram_bin_data_t *pHD = &(pdev->hist_data);
charlesmn 0:3ac96e360672 3663 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer);
charlesmn 0:3ac96e360672 3664 VL53L1_zone_histograms_t *pZH = &(pres->zone_hists);
charlesmn 0:3ac96e360672 3665 VL53L1_xtalk_calibration_results_t *pXCR = &(pdev->xtalk_cal);
charlesmn 0:3ac96e360672 3666 uint8_t tmp8;
charlesmn 0:3ac96e360672 3667 uint8_t zid;
charlesmn 0:3ac96e360672 3668 uint8_t i;
charlesmn 0:3ac96e360672 3669 uint8_t histo_merge_nb, idx;
charlesmn 0:3ac96e360672 3670 uint8_t merge_enabled;
charlesmn 0:3ac96e360672 3671 VL53L1_range_data_t *pdata;
charlesmn 0:3ac96e360672 3672
charlesmn 0:3ac96e360672 3673 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 3674
charlesmn 0:3ac96e360672 3675 merge_enabled = (pdev->tuning_parms.tp_hist_merge == 1) &&
charlesmn 0:3ac96e360672 3676 (VL53L1DevDataGet(Dev, CurrentParameters.PresetMode) ==
charlesmn 0:3ac96e360672 3677 VL53L1_PRESETMODE_RANGING);
charlesmn 0:3ac96e360672 3678
charlesmn 0:3ac96e360672 3679
charlesmn 0:3ac96e360672 3680 if ((pdev->sys_ctrl.system__mode_start &
charlesmn 0:3ac96e360672 3681 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM)
charlesmn 0:3ac96e360672 3682 == VL53L1_DEVICESCHEDULERMODE_HISTOGRAM) {
charlesmn 0:3ac96e360672 3683
charlesmn 0:3ac96e360672 3684
charlesmn 0:3ac96e360672 3685
charlesmn 0:3ac96e360672 3686 status = VL53L1_get_histogram_bin_data(
charlesmn 0:3ac96e360672 3687 Dev,
charlesmn 0:3ac96e360672 3688 &(pdev->hist_data));
charlesmn 0:3ac96e360672 3689
charlesmn 0:3ac96e360672 3690
charlesmn 0:3ac96e360672 3691
charlesmn 0:3ac96e360672 3692
charlesmn 0:3ac96e360672 3693 if (status == VL53L1_ERROR_NONE &&
charlesmn 0:3ac96e360672 3694 pHD->number_of_ambient_bins == 0) {
charlesmn 0:3ac96e360672 3695 zid = pdev->ll_state.rd_zone_id;
charlesmn 0:3ac96e360672 3696 status = VL53L1_hist_copy_and_scale_ambient_info(
charlesmn 0:3ac96e360672 3697 &(pZH->VL53L1_p_002[zid]),
charlesmn 0:3ac96e360672 3698 &(pdev->hist_data));
charlesmn 0:3ac96e360672 3699 }
charlesmn 0:3ac96e360672 3700
charlesmn 0:3ac96e360672 3701
charlesmn 0:3ac96e360672 3702 if (status != VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3703 goto UPDATE_DYNAMIC_CONFIG;
charlesmn 0:3ac96e360672 3704
charlesmn 0:3ac96e360672 3705 VL53L1_compute_histo_merge_nb(Dev, &histo_merge_nb);
charlesmn 0:3ac96e360672 3706 if (histo_merge_nb == 0)
charlesmn 0:3ac96e360672 3707 histo_merge_nb = 1;
charlesmn 0:3ac96e360672 3708 idx = histo_merge_nb - 1;
charlesmn 0:3ac96e360672 3709 if (merge_enabled)
charlesmn 0:3ac96e360672 3710 pC->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 3711 pXCR->algo__xtalk_cpo_HistoMerge_kcps[idx];
charlesmn 0:3ac96e360672 3712
charlesmn 0:3ac96e360672 3713 pHP->gain_factor =
charlesmn 0:3ac96e360672 3714 pdev->gain_cal.histogram_ranging_gain_factor;
charlesmn 0:3ac96e360672 3715
charlesmn 0:3ac96e360672 3716 pHP->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 3717 VL53L1_calc_crosstalk_plane_offset_with_margin(
charlesmn 0:3ac96e360672 3718 pC->algo__crosstalk_compensation_plane_offset_kcps,
charlesmn 0:3ac96e360672 3719 pC->histogram_mode_crosstalk_margin_kcps);
charlesmn 0:3ac96e360672 3720
charlesmn 0:3ac96e360672 3721 pHP->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 3722 pC->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 3723 pHP->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 3724 pC->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 3725
charlesmn 0:3ac96e360672 3726 pdev->dmax_cfg.ambient_thresh_sigma =
charlesmn 0:3ac96e360672 3727 pHP->ambient_thresh_sigma1;
charlesmn 0:3ac96e360672 3728 pdev->dmax_cfg.min_ambient_thresh_events =
charlesmn 0:3ac96e360672 3729 pHP->min_ambient_thresh_events;
charlesmn 0:3ac96e360672 3730 pdev->dmax_cfg.signal_total_events_limit =
charlesmn 0:3ac96e360672 3731 pHP->signal_total_events_limit;
charlesmn 0:3ac96e360672 3732 pdev->dmax_cfg.dss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 3733 pdev->stat_cfg.dss_config__target_total_rate_mcps;
charlesmn 0:3ac96e360672 3734 pdev->dmax_cfg.dss_config__aperture_attenuation =
charlesmn 0:3ac96e360672 3735 pdev->gen_cfg.dss_config__aperture_attenuation;
charlesmn 0:3ac96e360672 3736
charlesmn 0:3ac96e360672 3737 pHP->algo__crosstalk_detect_max_valid_range_mm =
charlesmn 0:3ac96e360672 3738 pC->algo__crosstalk_detect_max_valid_range_mm;
charlesmn 0:3ac96e360672 3739 pHP->algo__crosstalk_detect_min_valid_range_mm =
charlesmn 0:3ac96e360672 3740 pC->algo__crosstalk_detect_min_valid_range_mm;
charlesmn 0:3ac96e360672 3741 pHP->algo__crosstalk_detect_max_valid_rate_kcps =
charlesmn 0:3ac96e360672 3742 pC->algo__crosstalk_detect_max_valid_rate_kcps;
charlesmn 0:3ac96e360672 3743 pHP->algo__crosstalk_detect_max_sigma_mm =
charlesmn 0:3ac96e360672 3744 pC->algo__crosstalk_detect_max_sigma_mm;
charlesmn 0:3ac96e360672 3745
charlesmn 0:3ac96e360672 3746
charlesmn 0:3ac96e360672 3747
charlesmn 0:3ac96e360672 3748 VL53L1_copy_rtn_good_spads_to_buffer(
charlesmn 0:3ac96e360672 3749 &(pdev->nvm_copy_data),
charlesmn 0:3ac96e360672 3750 &(pdev->rtn_good_spads[0]));
charlesmn 0:3ac96e360672 3751
charlesmn 0:3ac96e360672 3752
charlesmn 0:3ac96e360672 3753
charlesmn 0:3ac96e360672 3754 switch (pdev->offset_correction_mode) {
charlesmn 0:3ac96e360672 3755
charlesmn 0:3ac96e360672 3756 case VL53L1_OFFSETCORRECTIONMODE__MM1_MM2_OFFSETS:
charlesmn 0:3ac96e360672 3757 tmp8 = pdev->gen_cfg.dss_config__aperture_attenuation;
charlesmn 0:3ac96e360672 3758
charlesmn 0:3ac96e360672 3759 VL53L1_hist_combine_mm1_mm2_offsets(
charlesmn 0:3ac96e360672 3760 pN->mm_config__inner_offset_mm,
charlesmn 0:3ac96e360672 3761 pN->mm_config__outer_offset_mm,
charlesmn 0:3ac96e360672 3762 pdev->nvm_copy_data.roi_config__mode_roi_centre_spad,
charlesmn 0:3ac96e360672 3763 pdev->nvm_copy_data.roi_config__mode_roi_xy_size,
charlesmn 0:3ac96e360672 3764 pHD->roi_config__user_roi_centre_spad,
charlesmn 0:3ac96e360672 3765 pHD->roi_config__user_roi_requested_global_xy_size,
charlesmn 0:3ac96e360672 3766 &(pdev->add_off_cal_data),
charlesmn 0:3ac96e360672 3767 &(pdev->rtn_good_spads[0]),
charlesmn 0:3ac96e360672 3768 (uint16_t)tmp8,
charlesmn 0:3ac96e360672 3769 &(pHP->range_offset_mm));
charlesmn 0:3ac96e360672 3770 break;
charlesmn 0:3ac96e360672 3771 case VL53L1_OFFSETCORRECTIONMODE__PER_ZONE_OFFSETS:
charlesmn 0:3ac96e360672 3772 zid = pdev->ll_state.rd_zone_id;
charlesmn 0:3ac96e360672 3773 pHP->range_offset_mm = (int16_t)(
charlesmn 0:3ac96e360672 3774 pres->zone_cal.VL53L1_p_002[zid].range_mm_offset);
charlesmn 0:3ac96e360672 3775 break;
charlesmn 0:3ac96e360672 3776 case VL53L1_OFFSETCORRECTIONMODE__PER_VCSEL_OFFSETS:
charlesmn 0:3ac96e360672 3777 select_offset_per_vcsel(
charlesmn 0:3ac96e360672 3778 pdev,
charlesmn 0:3ac96e360672 3779 &(pHP->range_offset_mm));
charlesmn 0:3ac96e360672 3780 pHP->range_offset_mm *= 4;
charlesmn 0:3ac96e360672 3781 break;
charlesmn 0:3ac96e360672 3782 default:
charlesmn 0:3ac96e360672 3783 pHP->range_offset_mm = 0;
charlesmn 0:3ac96e360672 3784 break;
charlesmn 0:3ac96e360672 3785
charlesmn 0:3ac96e360672 3786 }
charlesmn 0:3ac96e360672 3787
charlesmn 0:3ac96e360672 3788
charlesmn 0:3ac96e360672 3789
charlesmn 0:3ac96e360672 3790 if (status != VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3791 goto UPDATE_DYNAMIC_CONFIG;
charlesmn 0:3ac96e360672 3792
charlesmn 0:3ac96e360672 3793
charlesmn 0:3ac96e360672 3794 VL53L1_calc_max_effective_spads(
charlesmn 0:3ac96e360672 3795 pHD->roi_config__user_roi_centre_spad,
charlesmn 0:3ac96e360672 3796 pHD->roi_config__user_roi_requested_global_xy_size,
charlesmn 0:3ac96e360672 3797 &(pdev->rtn_good_spads[0]),
charlesmn 0:3ac96e360672 3798 (uint16_t)pdev->gen_cfg.dss_config__aperture_attenuation,
charlesmn 0:3ac96e360672 3799 &(pdev->dmax_cfg.max_effective_spads));
charlesmn 0:3ac96e360672 3800
charlesmn 0:3ac96e360672 3801 status =
charlesmn 0:3ac96e360672 3802 VL53L1_get_dmax_calibration_data(
charlesmn 0:3ac96e360672 3803 Dev,
charlesmn 0:3ac96e360672 3804 pdev->dmax_mode,
charlesmn 0:3ac96e360672 3805 pdev->ll_state.rd_zone_id,
charlesmn 0:3ac96e360672 3806 pdmax_cal);
charlesmn 0:3ac96e360672 3807
charlesmn 0:3ac96e360672 3808
charlesmn 0:3ac96e360672 3809
charlesmn 0:3ac96e360672 3810 if (status != VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3811 goto UPDATE_DYNAMIC_CONFIG;
charlesmn 0:3ac96e360672 3812
charlesmn 0:3ac96e360672 3813 status = VL53L1_ipp_hist_process_data(
charlesmn 0:3ac96e360672 3814 Dev,
charlesmn 0:3ac96e360672 3815 pdmax_cal,
charlesmn 0:3ac96e360672 3816 &(pdev->dmax_cfg),
charlesmn 0:3ac96e360672 3817 &(pdev->histpostprocess),
charlesmn 0:3ac96e360672 3818 &(pdev->hist_data),
charlesmn 0:3ac96e360672 3819 &(pdev->xtalk_shapes),
charlesmn 0:3ac96e360672 3820 pdev->wArea1,
charlesmn 0:3ac96e360672 3821 pdev->wArea2,
charlesmn 0:3ac96e360672 3822 &histo_merge_nb,
charlesmn 0:3ac96e360672 3823 presults);
charlesmn 0:3ac96e360672 3824
charlesmn 0:3ac96e360672 3825 if ((merge_enabled) && (histo_merge_nb > 1))
charlesmn 0:3ac96e360672 3826 for (i = 0; i < VL53L1_MAX_RANGE_RESULTS; i++) {
charlesmn 0:3ac96e360672 3827 pdata = &(presults->VL53L1_p_002[i]);
charlesmn 0:3ac96e360672 3828 pdata->VL53L1_p_020 /= histo_merge_nb;
charlesmn 0:3ac96e360672 3829 pdata->VL53L1_p_021 /= histo_merge_nb;
charlesmn 0:3ac96e360672 3830 pdata->VL53L1_p_013 /= histo_merge_nb;
charlesmn 0:3ac96e360672 3831 pdata->peak_signal_count_rate_mcps /= histo_merge_nb;
charlesmn 0:3ac96e360672 3832 pdata->avg_signal_count_rate_mcps /= histo_merge_nb;
charlesmn 0:3ac96e360672 3833 pdata->ambient_count_rate_mcps /= histo_merge_nb;
charlesmn 0:3ac96e360672 3834 pdata->VL53L1_p_012 /= histo_merge_nb;
charlesmn 0:3ac96e360672 3835 }
charlesmn 0:3ac96e360672 3836
charlesmn 0:3ac96e360672 3837
charlesmn 0:3ac96e360672 3838 if (status != VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3839 goto UPDATE_DYNAMIC_CONFIG;
charlesmn 0:3ac96e360672 3840
charlesmn 0:3ac96e360672 3841 status = VL53L1_hist_wrap_dmax(
charlesmn 0:3ac96e360672 3842 &(pdev->histpostprocess),
charlesmn 0:3ac96e360672 3843 &(pdev->hist_data),
charlesmn 0:3ac96e360672 3844 &(presults->wrap_dmax_mm));
charlesmn 0:3ac96e360672 3845
charlesmn 0:3ac96e360672 3846
charlesmn 0:3ac96e360672 3847 if (status != VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3848 goto UPDATE_DYNAMIC_CONFIG;
charlesmn 0:3ac96e360672 3849
charlesmn 0:3ac96e360672 3850 zid = pdev->ll_state.rd_zone_id;
charlesmn 0:3ac96e360672 3851 status = VL53L1_hist_phase_consistency_check(
charlesmn 0:3ac96e360672 3852 Dev,
charlesmn 0:3ac96e360672 3853 &(pZH->VL53L1_p_002[zid]),
charlesmn 0:3ac96e360672 3854 &(pres->zone_results.VL53L1_p_002[zid]),
charlesmn 0:3ac96e360672 3855 presults);
charlesmn 0:3ac96e360672 3856
charlesmn 0:3ac96e360672 3857
charlesmn 0:3ac96e360672 3858 if (status != VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3859 goto UPDATE_DYNAMIC_CONFIG;
charlesmn 0:3ac96e360672 3860
charlesmn 0:3ac96e360672 3861 zid = pdev->ll_state.rd_zone_id;
charlesmn 0:3ac96e360672 3862 status = VL53L1_hist_xmonitor_consistency_check(
charlesmn 0:3ac96e360672 3863 Dev,
charlesmn 0:3ac96e360672 3864 &(pZH->VL53L1_p_002[zid]),
charlesmn 0:3ac96e360672 3865 &(pres->zone_results.VL53L1_p_002[zid]),
charlesmn 0:3ac96e360672 3866 &(presults->xmonitor));
charlesmn 0:3ac96e360672 3867
charlesmn 0:3ac96e360672 3868
charlesmn 0:3ac96e360672 3869 if (status != VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3870 goto UPDATE_DYNAMIC_CONFIG;
charlesmn 0:3ac96e360672 3871
charlesmn 0:3ac96e360672 3872
charlesmn 0:3ac96e360672 3873 zid = pdev->ll_state.rd_zone_id;
charlesmn 0:3ac96e360672 3874 pZH->max_zones = VL53L1_MAX_USER_ZONES;
charlesmn 0:3ac96e360672 3875 pZH->active_zones =
charlesmn 0:3ac96e360672 3876 pdev->zone_cfg.active_zones+1;
charlesmn 0:3ac96e360672 3877 pHD->zone_id = zid;
charlesmn 0:3ac96e360672 3878
charlesmn 0:3ac96e360672 3879 if (zid <
charlesmn 0:3ac96e360672 3880 pres->zone_results.max_zones) {
charlesmn 0:3ac96e360672 3881
charlesmn 0:3ac96e360672 3882 phist_info =
charlesmn 0:3ac96e360672 3883 &(pZH->VL53L1_p_002[zid]);
charlesmn 0:3ac96e360672 3884
charlesmn 0:3ac96e360672 3885 phist_info->rd_device_state =
charlesmn 0:3ac96e360672 3886 pHD->rd_device_state;
charlesmn 0:3ac96e360672 3887
charlesmn 0:3ac96e360672 3888 phist_info->number_of_ambient_bins =
charlesmn 0:3ac96e360672 3889 pHD->number_of_ambient_bins;
charlesmn 0:3ac96e360672 3890
charlesmn 0:3ac96e360672 3891 phist_info->result__dss_actual_effective_spads =
charlesmn 0:3ac96e360672 3892 pHD->result__dss_actual_effective_spads;
charlesmn 0:3ac96e360672 3893
charlesmn 0:3ac96e360672 3894 phist_info->VL53L1_p_009 =
charlesmn 0:3ac96e360672 3895 pHD->VL53L1_p_009;
charlesmn 0:3ac96e360672 3896
charlesmn 0:3ac96e360672 3897 phist_info->total_periods_elapsed =
charlesmn 0:3ac96e360672 3898 pHD->total_periods_elapsed;
charlesmn 0:3ac96e360672 3899
charlesmn 0:3ac96e360672 3900 phist_info->ambient_events_sum =
charlesmn 0:3ac96e360672 3901 pHD->ambient_events_sum;
charlesmn 0:3ac96e360672 3902 }
charlesmn 0:3ac96e360672 3903
charlesmn 0:3ac96e360672 3904
charlesmn 0:3ac96e360672 3905
charlesmn 0:3ac96e360672 3906 if (status != VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3907 goto UPDATE_DYNAMIC_CONFIG;
charlesmn 0:3ac96e360672 3908
charlesmn 0:3ac96e360672 3909 VL53L1_hist_copy_results_to_sys_and_core(
charlesmn 0:3ac96e360672 3910 &(pdev->hist_data),
charlesmn 0:3ac96e360672 3911 presults,
charlesmn 0:3ac96e360672 3912 &(pdev->sys_results),
charlesmn 0:3ac96e360672 3913 &(pdev->core_results));
charlesmn 0:3ac96e360672 3914
charlesmn 0:3ac96e360672 3915
charlesmn 0:3ac96e360672 3916 UPDATE_DYNAMIC_CONFIG:
charlesmn 0:3ac96e360672 3917 if (pzone_cfg->active_zones > 0) {
charlesmn 0:3ac96e360672 3918 if (pstate->rd_device_state !=
charlesmn 0:3ac96e360672 3919 VL53L1_DEVICESTATE_RANGING_WAIT_GPH_SYNC) {
charlesmn 0:3ac96e360672 3920 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 3921 status = VL53L1_dynamic_zone_update(
charlesmn 0:3ac96e360672 3922 Dev, presults);
charlesmn 0:3ac96e360672 3923 }
charlesmn 0:3ac96e360672 3924 }
charlesmn 0:3ac96e360672 3925
charlesmn 0:3ac96e360672 3926
charlesmn 0:3ac96e360672 3927 for (i = 0; i < VL53L1_MAX_USER_ZONES; i++) {
charlesmn 0:3ac96e360672 3928 pzone_cfg->bin_config[i] =
charlesmn 0:3ac96e360672 3929 ((pdev->ll_state.cfg_internal_stream_count)
charlesmn 0:3ac96e360672 3930 & 0x01) ?
charlesmn 0:3ac96e360672 3931 VL53L1_ZONECONFIG_BINCONFIG__HIGHAMB :
charlesmn 0:3ac96e360672 3932 VL53L1_ZONECONFIG_BINCONFIG__LOWAMB;
charlesmn 0:3ac96e360672 3933 }
charlesmn 0:3ac96e360672 3934
charlesmn 0:3ac96e360672 3935 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3936 status = VL53L1_multizone_hist_bins_update(Dev);
charlesmn 0:3ac96e360672 3937
charlesmn 0:3ac96e360672 3938 }
charlesmn 0:3ac96e360672 3939
charlesmn 0:3ac96e360672 3940
charlesmn 0:3ac96e360672 3941
charlesmn 0:3ac96e360672 3942 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3943 status = VL53L1_dynamic_xtalk_correction_corrector(Dev);
charlesmn 0:3ac96e360672 3944
charlesmn 0:3ac96e360672 3945 #ifdef VL53L1_LOG_ENABLE
charlesmn 0:3ac96e360672 3946 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3947 VL53L1_print_histogram_bin_data(
charlesmn 0:3ac96e360672 3948 &(pdev->hist_data),
charlesmn 0:3ac96e360672 3949 "get_device_results():pdev->lldata.hist_data.",
charlesmn 0:3ac96e360672 3950 VL53L1_TRACE_MODULE_HISTOGRAM_DATA);
charlesmn 0:3ac96e360672 3951 #endif
charlesmn 0:3ac96e360672 3952
charlesmn 0:3ac96e360672 3953 if (merge_enabled)
charlesmn 0:3ac96e360672 3954 pC->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 3955 pXCR->algo__xtalk_cpo_HistoMerge_kcps[0];
charlesmn 0:3ac96e360672 3956 } else {
charlesmn 0:3ac96e360672 3957
charlesmn 0:3ac96e360672 3958 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3959 status = VL53L1_get_measurement_results(
charlesmn 0:3ac96e360672 3960 Dev,
charlesmn 0:3ac96e360672 3961 device_results_level);
charlesmn 0:3ac96e360672 3962
charlesmn 0:3ac96e360672 3963 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 3964 VL53L1_copy_sys_and_core_results_to_range_results(
charlesmn 0:3ac96e360672 3965 (int32_t)pdev->gain_cal.standard_ranging_gain_factor,
charlesmn 0:3ac96e360672 3966 &(pdev->sys_results),
charlesmn 0:3ac96e360672 3967 &(pdev->core_results),
charlesmn 0:3ac96e360672 3968 presults);
charlesmn 0:3ac96e360672 3969
charlesmn 0:3ac96e360672 3970
charlesmn 0:3ac96e360672 3971
charlesmn 0:3ac96e360672 3972 if (pL->is_low_power_auto_mode == 1) {
charlesmn 0:3ac96e360672 3973
charlesmn 0:3ac96e360672 3974 if ((status == VL53L1_ERROR_NONE) &&
charlesmn 0:3ac96e360672 3975 (pL->low_power_auto_range_count == 0)) {
charlesmn 0:3ac96e360672 3976
charlesmn 0:3ac96e360672 3977 status =
charlesmn 0:3ac96e360672 3978 VL53L1_low_power_auto_setup_manual_calibration(
charlesmn 0:3ac96e360672 3979 Dev);
charlesmn 0:3ac96e360672 3980 pL->low_power_auto_range_count = 1;
charlesmn 0:3ac96e360672 3981 } else if ((status == VL53L1_ERROR_NONE) &&
charlesmn 0:3ac96e360672 3982 (pL->low_power_auto_range_count == 1)) {
charlesmn 0:3ac96e360672 3983 pL->low_power_auto_range_count = 2;
charlesmn 0:3ac96e360672 3984 }
charlesmn 0:3ac96e360672 3985
charlesmn 0:3ac96e360672 3986
charlesmn 0:3ac96e360672 3987 if ((pL->low_power_auto_range_count != 0xFF) &&
charlesmn 0:3ac96e360672 3988 (status == VL53L1_ERROR_NONE)) {
charlesmn 0:3ac96e360672 3989 status = VL53L1_low_power_auto_update_DSS(
charlesmn 0:3ac96e360672 3990 Dev);
charlesmn 0:3ac96e360672 3991 }
charlesmn 0:3ac96e360672 3992 }
charlesmn 0:3ac96e360672 3993
charlesmn 0:3ac96e360672 3994 }
charlesmn 0:3ac96e360672 3995
charlesmn 0:3ac96e360672 3996
charlesmn 0:3ac96e360672 3997 presults->cfg_device_state = pdev->ll_state.cfg_device_state;
charlesmn 0:3ac96e360672 3998 presults->rd_device_state = pdev->ll_state.rd_device_state;
charlesmn 0:3ac96e360672 3999 presults->zone_id = pdev->ll_state.rd_zone_id;
charlesmn 0:3ac96e360672 4000
charlesmn 0:3ac96e360672 4001 if (status == VL53L1_ERROR_NONE) {
charlesmn 0:3ac96e360672 4002
charlesmn 0:3ac96e360672 4003
charlesmn 0:3ac96e360672 4004 pres->zone_results.max_zones = VL53L1_MAX_USER_ZONES;
charlesmn 0:3ac96e360672 4005 pres->zone_results.active_zones = pdev->zone_cfg.active_zones+1;
charlesmn 0:3ac96e360672 4006 zid = pdev->ll_state.rd_zone_id;
charlesmn 0:3ac96e360672 4007
charlesmn 0:3ac96e360672 4008 if (zid < pres->zone_results.max_zones) {
charlesmn 0:3ac96e360672 4009
charlesmn 0:3ac96e360672 4010 pobjects =
charlesmn 0:3ac96e360672 4011 &(pres->zone_results.VL53L1_p_002[zid]);
charlesmn 0:3ac96e360672 4012
charlesmn 0:3ac96e360672 4013 pobjects->cfg_device_state =
charlesmn 0:3ac96e360672 4014 presults->cfg_device_state;
charlesmn 0:3ac96e360672 4015 pobjects->rd_device_state = presults->rd_device_state;
charlesmn 0:3ac96e360672 4016 pobjects->zone_id = presults->zone_id;
charlesmn 0:3ac96e360672 4017 pobjects->stream_count = presults->stream_count;
charlesmn 0:3ac96e360672 4018
charlesmn 0:3ac96e360672 4019
charlesmn 0:3ac96e360672 4020
charlesmn 0:3ac96e360672 4021 pobjects->xmonitor.VL53L1_p_020 =
charlesmn 0:3ac96e360672 4022 presults->xmonitor.VL53L1_p_020;
charlesmn 0:3ac96e360672 4023 pobjects->xmonitor.VL53L1_p_021 =
charlesmn 0:3ac96e360672 4024 presults->xmonitor.VL53L1_p_021;
charlesmn 0:3ac96e360672 4025 pobjects->xmonitor.VL53L1_p_014 =
charlesmn 0:3ac96e360672 4026 presults->xmonitor.VL53L1_p_014;
charlesmn 0:3ac96e360672 4027 pobjects->xmonitor.range_status =
charlesmn 0:3ac96e360672 4028 presults->xmonitor.range_status;
charlesmn 0:3ac96e360672 4029
charlesmn 0:3ac96e360672 4030 pobjects->max_objects = presults->max_results;
charlesmn 0:3ac96e360672 4031 pobjects->active_objects = presults->active_results;
charlesmn 0:3ac96e360672 4032
charlesmn 0:3ac96e360672 4033 for (i = 0; i < presults->active_results; i++) {
charlesmn 0:3ac96e360672 4034 pobjects->VL53L1_p_002[i].VL53L1_p_020 =
charlesmn 0:3ac96e360672 4035 presults->VL53L1_p_002[i].VL53L1_p_020;
charlesmn 0:3ac96e360672 4036 pobjects->VL53L1_p_002[i].VL53L1_p_021 =
charlesmn 0:3ac96e360672 4037 presults->VL53L1_p_002[i].VL53L1_p_021;
charlesmn 0:3ac96e360672 4038 pobjects->VL53L1_p_002[i].VL53L1_p_014 =
charlesmn 0:3ac96e360672 4039 presults->VL53L1_p_002[i].VL53L1_p_014;
charlesmn 0:3ac96e360672 4040 pobjects->VL53L1_p_002[i].range_status =
charlesmn 0:3ac96e360672 4041 presults->VL53L1_p_002[i].range_status;
charlesmn 0:3ac96e360672 4042 }
charlesmn 0:3ac96e360672 4043
charlesmn 0:3ac96e360672 4044
charlesmn 0:3ac96e360672 4045 }
charlesmn 0:3ac96e360672 4046 }
charlesmn 0:3ac96e360672 4047
charlesmn 0:3ac96e360672 4048
charlesmn 0:3ac96e360672 4049
charlesmn 0:3ac96e360672 4050 memcpy(
charlesmn 0:3ac96e360672 4051 prange_results,
charlesmn 0:3ac96e360672 4052 presults,
charlesmn 0:3ac96e360672 4053 sizeof(VL53L1_range_results_t));
charlesmn 0:3ac96e360672 4054
charlesmn 0:3ac96e360672 4055
charlesmn 0:3ac96e360672 4056
charlesmn 0:3ac96e360672 4057 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 4058 status = VL53L1_check_ll_driver_rd_state(Dev);
charlesmn 0:3ac96e360672 4059
charlesmn 0:3ac96e360672 4060 #ifdef VL53L1_LOG_ENABLE
charlesmn 0:3ac96e360672 4061 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 4062 VL53L1_print_range_results(
charlesmn 0:3ac96e360672 4063 presults,
charlesmn 0:3ac96e360672 4064 "get_device_results():pdev->llresults.range_results.",
charlesmn 0:3ac96e360672 4065 VL53L1_TRACE_MODULE_RANGE_RESULTS_DATA);
charlesmn 0:3ac96e360672 4066 #endif
charlesmn 0:3ac96e360672 4067
charlesmn 0:3ac96e360672 4068 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4069
charlesmn 0:3ac96e360672 4070 return status;
charlesmn 0:3ac96e360672 4071 }
charlesmn 0:3ac96e360672 4072
charlesmn 0:3ac96e360672 4073
charlesmn 0:3ac96e360672 4074 VL53L1_Error VL53L1_clear_interrupt_and_enable_next_range(
charlesmn 0:3ac96e360672 4075 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4076 uint8_t measurement_mode)
charlesmn 0:3ac96e360672 4077 {
charlesmn 0:3ac96e360672 4078
charlesmn 0:3ac96e360672 4079
charlesmn 0:3ac96e360672 4080
charlesmn 0:3ac96e360672 4081 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4082
charlesmn 0:3ac96e360672 4083 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4084
charlesmn 0:3ac96e360672 4085
charlesmn 0:3ac96e360672 4086
charlesmn 0:3ac96e360672 4087
charlesmn 0:3ac96e360672 4088
charlesmn 0:3ac96e360672 4089
charlesmn 0:3ac96e360672 4090
charlesmn 0:3ac96e360672 4091
charlesmn 0:3ac96e360672 4092
charlesmn 0:3ac96e360672 4093
charlesmn 0:3ac96e360672 4094 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 4095 status = VL53L1_init_and_start_range(
charlesmn 0:3ac96e360672 4096 Dev,
charlesmn 0:3ac96e360672 4097 measurement_mode,
charlesmn 0:3ac96e360672 4098 VL53L1_DEVICECONFIGLEVEL_GENERAL_ONWARDS);
charlesmn 0:3ac96e360672 4099
charlesmn 0:3ac96e360672 4100 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4101
charlesmn 0:3ac96e360672 4102 return status;
charlesmn 0:3ac96e360672 4103 }
charlesmn 0:3ac96e360672 4104
charlesmn 0:3ac96e360672 4105
charlesmn 0:3ac96e360672 4106 VL53L1_Error VL53L1_get_histogram_bin_data(
charlesmn 0:3ac96e360672 4107 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4108 VL53L1_histogram_bin_data_t *pdata)
charlesmn 0:3ac96e360672 4109 {
charlesmn 0:3ac96e360672 4110
charlesmn 0:3ac96e360672 4111
charlesmn 0:3ac96e360672 4112 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4113 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 4114 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4115 VL53L1_LLDriverResults_t *pres =
charlesmn 0:3ac96e360672 4116 VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn 0:3ac96e360672 4117
charlesmn 0:3ac96e360672 4118 VL53L1_zone_private_dyn_cfg_t *pzone_dyn_cfg;
charlesmn 0:3ac96e360672 4119
charlesmn 0:3ac96e360672 4120 VL53L1_static_nvm_managed_t *pstat_nvm = &(pdev->stat_nvm);
charlesmn 0:3ac96e360672 4121 VL53L1_static_config_t *pstat_cfg = &(pdev->stat_cfg);
charlesmn 0:3ac96e360672 4122 VL53L1_general_config_t *pgen_cfg = &(pdev->gen_cfg);
charlesmn 0:3ac96e360672 4123 VL53L1_timing_config_t *ptim_cfg = &(pdev->tim_cfg);
charlesmn 0:3ac96e360672 4124 VL53L1_range_results_t *presults = &(pres->range_results);
charlesmn 0:3ac96e360672 4125
charlesmn 0:3ac96e360672 4126 uint8_t buffer[VL53L1_MAX_I2C_XFER_SIZE];
charlesmn 0:3ac96e360672 4127 uint8_t *pbuffer = &buffer[0];
charlesmn 0:3ac96e360672 4128 uint8_t bin_23_0 = 0x00;
charlesmn 0:3ac96e360672 4129 uint16_t bin = 0;
charlesmn 0:3ac96e360672 4130 uint16_t i2c_buffer_offset_bytes = 0;
charlesmn 0:3ac96e360672 4131 uint16_t encoded_timeout = 0;
charlesmn 0:3ac96e360672 4132 uint32_t pll_period_us = 0;
charlesmn 0:3ac96e360672 4133 uint32_t periods_elapsed_tmp = 0;
charlesmn 0:3ac96e360672 4134 uint8_t i = 0;
charlesmn 0:3ac96e360672 4135 int32_t hist_merge = 0;
charlesmn 0:3ac96e360672 4136
charlesmn 0:3ac96e360672 4137 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4138
charlesmn 0:3ac96e360672 4139
charlesmn 0:3ac96e360672 4140
charlesmn 0:3ac96e360672 4141 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 4142 status = VL53L1_ReadMulti(
charlesmn 0:3ac96e360672 4143 Dev,
charlesmn 0:3ac96e360672 4144 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX,
charlesmn 0:3ac96e360672 4145 pbuffer,
charlesmn 0:3ac96e360672 4146 VL53L1_HISTOGRAM_BIN_DATA_I2C_SIZE_BYTES);
charlesmn 0:3ac96e360672 4147
charlesmn 0:3ac96e360672 4148
charlesmn 0:3ac96e360672 4149
charlesmn 0:3ac96e360672 4150 pdata->result__interrupt_status = *(pbuffer + 0);
charlesmn 0:3ac96e360672 4151 pdata->result__range_status = *(pbuffer + 1);
charlesmn 0:3ac96e360672 4152 pdata->result__report_status = *(pbuffer + 2);
charlesmn 0:3ac96e360672 4153 pdata->result__stream_count = *(pbuffer + 3);
charlesmn 0:3ac96e360672 4154 pdata->result__dss_actual_effective_spads =
charlesmn 0:3ac96e360672 4155 VL53L1_i2c_decode_uint16_t(2, pbuffer + 4);
charlesmn 0:3ac96e360672 4156
charlesmn 0:3ac96e360672 4157
charlesmn 0:3ac96e360672 4158
charlesmn 0:3ac96e360672 4159 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 4160 VL53L1_PHASECAL_RESULT__REFERENCE_PHASE -
charlesmn 0:3ac96e360672 4161 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX;
charlesmn 0:3ac96e360672 4162
charlesmn 0:3ac96e360672 4163 pbuffer = &buffer[i2c_buffer_offset_bytes];
charlesmn 0:3ac96e360672 4164
charlesmn 0:3ac96e360672 4165 pdata->phasecal_result__reference_phase =
charlesmn 0:3ac96e360672 4166 VL53L1_i2c_decode_uint16_t(2, pbuffer);
charlesmn 0:3ac96e360672 4167
charlesmn 0:3ac96e360672 4168 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 4169 VL53L1_PHASECAL_RESULT__VCSEL_START -
charlesmn 0:3ac96e360672 4170 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX;
charlesmn 0:3ac96e360672 4171
charlesmn 0:3ac96e360672 4172 pdata->phasecal_result__vcsel_start = buffer[i2c_buffer_offset_bytes];
charlesmn 0:3ac96e360672 4173
charlesmn 0:3ac96e360672 4174
charlesmn 0:3ac96e360672 4175
charlesmn 0:3ac96e360672 4176 pdev->dbg_results.phasecal_result__reference_phase =
charlesmn 0:3ac96e360672 4177 pdata->phasecal_result__reference_phase;
charlesmn 0:3ac96e360672 4178 pdev->dbg_results.phasecal_result__vcsel_start =
charlesmn 0:3ac96e360672 4179 pdata->phasecal_result__vcsel_start;
charlesmn 0:3ac96e360672 4180
charlesmn 0:3ac96e360672 4181
charlesmn 0:3ac96e360672 4182
charlesmn 0:3ac96e360672 4183 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 4184 VL53L1_RESULT__HISTOGRAM_BIN_23_0_MSB -
charlesmn 0:3ac96e360672 4185 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX;
charlesmn 0:3ac96e360672 4186
charlesmn 0:3ac96e360672 4187 bin_23_0 = buffer[i2c_buffer_offset_bytes] << 2;
charlesmn 0:3ac96e360672 4188
charlesmn 0:3ac96e360672 4189 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 4190 VL53L1_RESULT__HISTOGRAM_BIN_23_0_LSB -
charlesmn 0:3ac96e360672 4191 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX;
charlesmn 0:3ac96e360672 4192
charlesmn 0:3ac96e360672 4193 bin_23_0 += buffer[i2c_buffer_offset_bytes];
charlesmn 0:3ac96e360672 4194
charlesmn 0:3ac96e360672 4195 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 4196 VL53L1_RESULT__HISTOGRAM_BIN_23_0 -
charlesmn 0:3ac96e360672 4197 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX;
charlesmn 0:3ac96e360672 4198
charlesmn 0:3ac96e360672 4199 buffer[i2c_buffer_offset_bytes] = bin_23_0;
charlesmn 0:3ac96e360672 4200
charlesmn 0:3ac96e360672 4201
charlesmn 0:3ac96e360672 4202
charlesmn 0:3ac96e360672 4203 i2c_buffer_offset_bytes =
charlesmn 0:3ac96e360672 4204 VL53L1_RESULT__HISTOGRAM_BIN_0_2 -
charlesmn 0:3ac96e360672 4205 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX;
charlesmn 0:3ac96e360672 4206
charlesmn 0:3ac96e360672 4207 pbuffer = &buffer[i2c_buffer_offset_bytes];
charlesmn 0:3ac96e360672 4208 for (bin = 0; bin < VL53L1_HISTOGRAM_BUFFER_SIZE; bin++) {
charlesmn 0:3ac96e360672 4209 pdata->bin_data[bin] =
charlesmn 0:3ac96e360672 4210 (int32_t)VL53L1_i2c_decode_uint32_t(3, pbuffer);
charlesmn 0:3ac96e360672 4211 pbuffer += 3;
charlesmn 0:3ac96e360672 4212 }
charlesmn 0:3ac96e360672 4213
charlesmn 0:3ac96e360672 4214 VL53L1_get_tuning_parm(Dev, VL53L1_TUNINGPARM_HIST_MERGE,
charlesmn 0:3ac96e360672 4215 &hist_merge);
charlesmn 0:3ac96e360672 4216
charlesmn 0:3ac96e360672 4217 if (pdata->result__stream_count == 0) {
charlesmn 0:3ac96e360672 4218
charlesmn 0:3ac96e360672 4219 memset(pdev->multi_bins_rec, 0, sizeof(pdev->multi_bins_rec));
charlesmn 0:3ac96e360672 4220 pdev->bin_rec_pos = 0;
charlesmn 0:3ac96e360672 4221 pdev->pos_before_next_recom = 0;
charlesmn 0:3ac96e360672 4222 }
charlesmn 0:3ac96e360672 4223
charlesmn 0:3ac96e360672 4224 if (hist_merge == 1)
charlesmn 0:3ac96e360672 4225 vl53l1_histo_merge(Dev, pdata);
charlesmn 0:3ac96e360672 4226
charlesmn 0:3ac96e360672 4227
charlesmn 0:3ac96e360672 4228 pdata->zone_id = pdev->ll_state.rd_zone_id;
charlesmn 0:3ac96e360672 4229 pdata->VL53L1_p_022 = 0;
charlesmn 0:3ac96e360672 4230 pdata->VL53L1_p_023 = VL53L1_HISTOGRAM_BUFFER_SIZE;
charlesmn 0:3ac96e360672 4231 pdata->VL53L1_p_024 = VL53L1_HISTOGRAM_BUFFER_SIZE;
charlesmn 0:3ac96e360672 4232
charlesmn 0:3ac96e360672 4233 pdata->cal_config__vcsel_start = pgen_cfg->cal_config__vcsel_start;
charlesmn 0:3ac96e360672 4234
charlesmn 0:3ac96e360672 4235
charlesmn 0:3ac96e360672 4236
charlesmn 0:3ac96e360672 4237 pdata->vcsel_width =
charlesmn 0:3ac96e360672 4238 ((uint16_t)pgen_cfg->global_config__vcsel_width) << 4;
charlesmn 0:3ac96e360672 4239 pdata->vcsel_width +=
charlesmn 0:3ac96e360672 4240 (uint16_t)pstat_cfg->ana_config__vcsel_pulse_width_offset;
charlesmn 0:3ac96e360672 4241
charlesmn 0:3ac96e360672 4242
charlesmn 0:3ac96e360672 4243 pdata->VL53L1_p_019 =
charlesmn 0:3ac96e360672 4244 pstat_nvm->osc_measured__fast_osc__frequency;
charlesmn 0:3ac96e360672 4245
charlesmn 0:3ac96e360672 4246
charlesmn 0:3ac96e360672 4247
charlesmn 0:3ac96e360672 4248 VL53L1_hist_get_bin_sequence_config(Dev, pdata);
charlesmn 0:3ac96e360672 4249
charlesmn 0:3ac96e360672 4250
charlesmn 0:3ac96e360672 4251
charlesmn 0:3ac96e360672 4252 if (pdev->ll_state.rd_timing_status == 0) {
charlesmn 0:3ac96e360672 4253
charlesmn 0:3ac96e360672 4254 encoded_timeout =
charlesmn 0:3ac96e360672 4255 (ptim_cfg->range_config__timeout_macrop_a_hi << 8)
charlesmn 0:3ac96e360672 4256 + ptim_cfg->range_config__timeout_macrop_a_lo;
charlesmn 0:3ac96e360672 4257 pdata->VL53L1_p_009 = ptim_cfg->range_config__vcsel_period_a;
charlesmn 0:3ac96e360672 4258 } else {
charlesmn 0:3ac96e360672 4259
charlesmn 0:3ac96e360672 4260 encoded_timeout =
charlesmn 0:3ac96e360672 4261 (ptim_cfg->range_config__timeout_macrop_b_hi << 8)
charlesmn 0:3ac96e360672 4262 + ptim_cfg->range_config__timeout_macrop_b_lo;
charlesmn 0:3ac96e360672 4263 pdata->VL53L1_p_009 = ptim_cfg->range_config__vcsel_period_b;
charlesmn 0:3ac96e360672 4264 }
charlesmn 0:3ac96e360672 4265
charlesmn 0:3ac96e360672 4266
charlesmn 0:3ac96e360672 4267
charlesmn 0:3ac96e360672 4268 pdata->number_of_ambient_bins = 0;
charlesmn 0:3ac96e360672 4269
charlesmn 0:3ac96e360672 4270 for (i = 0; i < 6; i++) {
charlesmn 0:3ac96e360672 4271 if ((pdata->bin_seq[i] & 0x07) == 0x07)
charlesmn 0:3ac96e360672 4272 pdata->number_of_ambient_bins =
charlesmn 0:3ac96e360672 4273 pdata->number_of_ambient_bins + 0x04;
charlesmn 0:3ac96e360672 4274 }
charlesmn 0:3ac96e360672 4275
charlesmn 0:3ac96e360672 4276 pdata->total_periods_elapsed =
charlesmn 0:3ac96e360672 4277 VL53L1_decode_timeout(encoded_timeout);
charlesmn 0:3ac96e360672 4278
charlesmn 0:3ac96e360672 4279
charlesmn 0:3ac96e360672 4280
charlesmn 0:3ac96e360672 4281
charlesmn 0:3ac96e360672 4282 pll_period_us =
charlesmn 0:3ac96e360672 4283 VL53L1_calc_pll_period_us(pdata->VL53L1_p_019);
charlesmn 0:3ac96e360672 4284
charlesmn 0:3ac96e360672 4285
charlesmn 0:3ac96e360672 4286
charlesmn 0:3ac96e360672 4287 periods_elapsed_tmp = pdata->total_periods_elapsed + 1;
charlesmn 0:3ac96e360672 4288
charlesmn 0:3ac96e360672 4289
charlesmn 0:3ac96e360672 4290
charlesmn 0:3ac96e360672 4291 pdata->peak_duration_us =
charlesmn 0:3ac96e360672 4292 VL53L1_duration_maths(
charlesmn 0:3ac96e360672 4293 pll_period_us,
charlesmn 0:3ac96e360672 4294 (uint32_t)pdata->vcsel_width,
charlesmn 0:3ac96e360672 4295 VL53L1_RANGING_WINDOW_VCSEL_PERIODS,
charlesmn 0:3ac96e360672 4296 periods_elapsed_tmp);
charlesmn 0:3ac96e360672 4297
charlesmn 0:3ac96e360672 4298 pdata->woi_duration_us = 0;
charlesmn 0:3ac96e360672 4299
charlesmn 0:3ac96e360672 4300
charlesmn 0:3ac96e360672 4301
charlesmn 0:3ac96e360672 4302 VL53L1_hist_calc_zero_distance_phase(pdata);
charlesmn 0:3ac96e360672 4303
charlesmn 0:3ac96e360672 4304
charlesmn 0:3ac96e360672 4305
charlesmn 0:3ac96e360672 4306 VL53L1_hist_estimate_ambient_from_ambient_bins(pdata);
charlesmn 0:3ac96e360672 4307
charlesmn 0:3ac96e360672 4308
charlesmn 0:3ac96e360672 4309
charlesmn 0:3ac96e360672 4310 pdata->cfg_device_state = pdev->ll_state.cfg_device_state;
charlesmn 0:3ac96e360672 4311 pdata->rd_device_state = pdev->ll_state.rd_device_state;
charlesmn 0:3ac96e360672 4312
charlesmn 0:3ac96e360672 4313
charlesmn 0:3ac96e360672 4314
charlesmn 0:3ac96e360672 4315 pzone_dyn_cfg = &(pres->zone_dyn_cfgs.VL53L1_p_002[pdata->zone_id]);
charlesmn 0:3ac96e360672 4316
charlesmn 0:3ac96e360672 4317 pdata->roi_config__user_roi_centre_spad =
charlesmn 0:3ac96e360672 4318 pzone_dyn_cfg->roi_config__user_roi_centre_spad;
charlesmn 0:3ac96e360672 4319 pdata->roi_config__user_roi_requested_global_xy_size =
charlesmn 0:3ac96e360672 4320 pzone_dyn_cfg->roi_config__user_roi_requested_global_xy_size;
charlesmn 0:3ac96e360672 4321
charlesmn 0:3ac96e360672 4322
charlesmn 0:3ac96e360672 4323
charlesmn 0:3ac96e360672 4324 presults->device_status = VL53L1_DEVICEERROR_NOUPDATE;
charlesmn 0:3ac96e360672 4325
charlesmn 0:3ac96e360672 4326
charlesmn 0:3ac96e360672 4327
charlesmn 0:3ac96e360672 4328 switch (pdata->result__range_status &
charlesmn 0:3ac96e360672 4329 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK) {
charlesmn 0:3ac96e360672 4330
charlesmn 0:3ac96e360672 4331 case VL53L1_DEVICEERROR_VCSELCONTINUITYTESTFAILURE:
charlesmn 0:3ac96e360672 4332 case VL53L1_DEVICEERROR_VCSELWATCHDOGTESTFAILURE:
charlesmn 0:3ac96e360672 4333 case VL53L1_DEVICEERROR_NOVHVVALUEFOUND:
charlesmn 0:3ac96e360672 4334 case VL53L1_DEVICEERROR_USERROICLIP:
charlesmn 0:3ac96e360672 4335 case VL53L1_DEVICEERROR_MULTCLIPFAIL:
charlesmn 0:3ac96e360672 4336
charlesmn 0:3ac96e360672 4337 presults->device_status = (pdata->result__range_status &
charlesmn 0:3ac96e360672 4338 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK);
charlesmn 0:3ac96e360672 4339
charlesmn 0:3ac96e360672 4340 status = VL53L1_ERROR_RANGE_ERROR;
charlesmn 0:3ac96e360672 4341
charlesmn 0:3ac96e360672 4342 break;
charlesmn 0:3ac96e360672 4343
charlesmn 0:3ac96e360672 4344 }
charlesmn 0:3ac96e360672 4345
charlesmn 0:3ac96e360672 4346 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4347
charlesmn 0:3ac96e360672 4348 return status;
charlesmn 0:3ac96e360672 4349 }
charlesmn 0:3ac96e360672 4350
charlesmn 0:3ac96e360672 4351
charlesmn 0:3ac96e360672 4352 void VL53L1_copy_sys_and_core_results_to_range_results(
charlesmn 0:3ac96e360672 4353 int32_t gain_factor,
charlesmn 0:3ac96e360672 4354 VL53L1_system_results_t *psys,
charlesmn 0:3ac96e360672 4355 VL53L1_core_results_t *pcore,
charlesmn 0:3ac96e360672 4356 VL53L1_range_results_t *presults)
charlesmn 0:3ac96e360672 4357 {
charlesmn 0:3ac96e360672 4358 uint8_t i = 0;
charlesmn 0:3ac96e360672 4359
charlesmn 0:3ac96e360672 4360 VL53L1_range_data_t *pdata;
charlesmn 0:3ac96e360672 4361 int32_t range_mm = 0;
charlesmn 0:3ac96e360672 4362 uint32_t tmpu32 = 0;
charlesmn 0:3ac96e360672 4363 uint16_t rpscr_crosstalk_corrected_mcps_sd0;
charlesmn 0:3ac96e360672 4364 uint16_t rmmo_effective_spads_sd0;
charlesmn 0:3ac96e360672 4365 uint16_t rmmi_effective_spads_sd0;
charlesmn 0:3ac96e360672 4366
charlesmn 0:3ac96e360672 4367 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4368
charlesmn 0:3ac96e360672 4369
charlesmn 0:3ac96e360672 4370
charlesmn 0:3ac96e360672 4371 presults->zone_id = 0;
charlesmn 0:3ac96e360672 4372 presults->stream_count = psys->result__stream_count;
charlesmn 0:3ac96e360672 4373 presults->wrap_dmax_mm = 0;
charlesmn 0:3ac96e360672 4374 presults->max_results = VL53L1_MAX_RANGE_RESULTS;
charlesmn 0:3ac96e360672 4375 presults->active_results = 1;
charlesmn 0:3ac96e360672 4376 rpscr_crosstalk_corrected_mcps_sd0 =
charlesmn 0:3ac96e360672 4377 psys->result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0;
charlesmn 0:3ac96e360672 4378 rmmo_effective_spads_sd0 =
charlesmn 0:3ac96e360672 4379 psys->result__mm_outer_actual_effective_spads_sd0;
charlesmn 0:3ac96e360672 4380 rmmi_effective_spads_sd0 =
charlesmn 0:3ac96e360672 4381 psys->result__mm_inner_actual_effective_spads_sd0;
charlesmn 0:3ac96e360672 4382
charlesmn 0:3ac96e360672 4383
charlesmn 0:3ac96e360672 4384 for (i = 0; i < VL53L1_MAX_AMBIENT_DMAX_VALUES; i++)
charlesmn 0:3ac96e360672 4385 presults->VL53L1_p_007[i] = 0;
charlesmn 0:3ac96e360672 4386
charlesmn 0:3ac96e360672 4387 pdata = &(presults->VL53L1_p_002[0]);
charlesmn 0:3ac96e360672 4388
charlesmn 0:3ac96e360672 4389 for (i = 0; i < 2; i++) {
charlesmn 0:3ac96e360672 4390
charlesmn 0:3ac96e360672 4391 pdata->range_id = i;
charlesmn 0:3ac96e360672 4392 pdata->time_stamp = 0;
charlesmn 0:3ac96e360672 4393
charlesmn 0:3ac96e360672 4394 if ((psys->result__stream_count == 0) &&
charlesmn 0:3ac96e360672 4395 ((psys->result__range_status &
charlesmn 0:3ac96e360672 4396 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK) ==
charlesmn 0:3ac96e360672 4397 VL53L1_DEVICEERROR_RANGECOMPLETE)) {
charlesmn 0:3ac96e360672 4398 pdata->range_status =
charlesmn 0:3ac96e360672 4399 VL53L1_DEVICEERROR_RANGECOMPLETE_NO_WRAP_CHECK;
charlesmn 0:3ac96e360672 4400 } else {
charlesmn 0:3ac96e360672 4401 pdata->range_status =
charlesmn 0:3ac96e360672 4402 psys->result__range_status &
charlesmn 0:3ac96e360672 4403 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK;
charlesmn 0:3ac96e360672 4404 }
charlesmn 0:3ac96e360672 4405
charlesmn 0:3ac96e360672 4406 pdata->VL53L1_p_015 = 0;
charlesmn 0:3ac96e360672 4407 pdata->VL53L1_p_022 = 0;
charlesmn 0:3ac96e360672 4408 pdata->VL53L1_p_025 = 0;
charlesmn 0:3ac96e360672 4409 pdata->VL53L1_p_026 = 0;
charlesmn 0:3ac96e360672 4410 pdata->VL53L1_p_016 = 0;
charlesmn 0:3ac96e360672 4411 pdata->VL53L1_p_027 = 0;
charlesmn 0:3ac96e360672 4412
charlesmn 0:3ac96e360672 4413 switch (i) {
charlesmn 0:3ac96e360672 4414
charlesmn 0:3ac96e360672 4415 case 0:
charlesmn 0:3ac96e360672 4416 if (psys->result__report_status ==
charlesmn 0:3ac96e360672 4417 VL53L1_DEVICEREPORTSTATUS_MM1)
charlesmn 0:3ac96e360672 4418 pdata->VL53L1_p_006 =
charlesmn 0:3ac96e360672 4419 rmmi_effective_spads_sd0;
charlesmn 0:3ac96e360672 4420 else if (psys->result__report_status ==
charlesmn 0:3ac96e360672 4421 VL53L1_DEVICEREPORTSTATUS_MM2)
charlesmn 0:3ac96e360672 4422 pdata->VL53L1_p_006 =
charlesmn 0:3ac96e360672 4423 rmmo_effective_spads_sd0;
charlesmn 0:3ac96e360672 4424 else
charlesmn 0:3ac96e360672 4425 pdata->VL53L1_p_006 =
charlesmn 0:3ac96e360672 4426 psys->result__dss_actual_effective_spads_sd0;
charlesmn 0:3ac96e360672 4427
charlesmn 0:3ac96e360672 4428 pdata->peak_signal_count_rate_mcps =
charlesmn 0:3ac96e360672 4429 rpscr_crosstalk_corrected_mcps_sd0;
charlesmn 0:3ac96e360672 4430 pdata->avg_signal_count_rate_mcps =
charlesmn 0:3ac96e360672 4431 psys->result__avg_signal_count_rate_mcps_sd0;
charlesmn 0:3ac96e360672 4432 pdata->ambient_count_rate_mcps =
charlesmn 0:3ac96e360672 4433 psys->result__ambient_count_rate_mcps_sd0;
charlesmn 0:3ac96e360672 4434
charlesmn 0:3ac96e360672 4435
charlesmn 0:3ac96e360672 4436
charlesmn 0:3ac96e360672 4437
charlesmn 0:3ac96e360672 4438 tmpu32 = ((uint32_t)psys->result__sigma_sd0 << 5);
charlesmn 0:3ac96e360672 4439 if (tmpu32 > 0xFFFF)
charlesmn 0:3ac96e360672 4440 tmpu32 = 0xFFFF;
charlesmn 0:3ac96e360672 4441
charlesmn 0:3ac96e360672 4442 pdata->VL53L1_p_005 = (uint16_t)tmpu32;
charlesmn 0:3ac96e360672 4443
charlesmn 0:3ac96e360672 4444
charlesmn 0:3ac96e360672 4445
charlesmn 0:3ac96e360672 4446 pdata->VL53L1_p_014 =
charlesmn 0:3ac96e360672 4447 psys->result__phase_sd0;
charlesmn 0:3ac96e360672 4448
charlesmn 0:3ac96e360672 4449 range_mm = (int32_t)(
charlesmn 0:3ac96e360672 4450 psys->result__final_crosstalk_corrected_range_mm_sd0);
charlesmn 0:3ac96e360672 4451
charlesmn 0:3ac96e360672 4452
charlesmn 0:3ac96e360672 4453 range_mm *= gain_factor;
charlesmn 0:3ac96e360672 4454 range_mm += 0x0400;
charlesmn 0:3ac96e360672 4455 range_mm /= 0x0800;
charlesmn 0:3ac96e360672 4456
charlesmn 0:3ac96e360672 4457 pdata->median_range_mm = (int16_t)range_mm;
charlesmn 0:3ac96e360672 4458
charlesmn 0:3ac96e360672 4459 pdata->VL53L1_p_021 =
charlesmn 0:3ac96e360672 4460 pcore->result_core__ranging_total_events_sd0;
charlesmn 0:3ac96e360672 4461 pdata->VL53L1_p_013 =
charlesmn 0:3ac96e360672 4462 pcore->result_core__signal_total_events_sd0;
charlesmn 0:3ac96e360672 4463 pdata->total_periods_elapsed =
charlesmn 0:3ac96e360672 4464 pcore->result_core__total_periods_elapsed_sd0;
charlesmn 0:3ac96e360672 4465 pdata->VL53L1_p_020 =
charlesmn 0:3ac96e360672 4466 pcore->result_core__ambient_window_events_sd0;
charlesmn 0:3ac96e360672 4467
charlesmn 0:3ac96e360672 4468 break;
charlesmn 0:3ac96e360672 4469 case 1:
charlesmn 0:3ac96e360672 4470
charlesmn 0:3ac96e360672 4471 pdata->VL53L1_p_006 =
charlesmn 0:3ac96e360672 4472 psys->result__dss_actual_effective_spads_sd1;
charlesmn 0:3ac96e360672 4473 pdata->peak_signal_count_rate_mcps =
charlesmn 0:3ac96e360672 4474 psys->result__peak_signal_count_rate_mcps_sd1;
charlesmn 0:3ac96e360672 4475 pdata->avg_signal_count_rate_mcps =
charlesmn 0:3ac96e360672 4476 0xFFFF;
charlesmn 0:3ac96e360672 4477 pdata->ambient_count_rate_mcps =
charlesmn 0:3ac96e360672 4478 psys->result__ambient_count_rate_mcps_sd1;
charlesmn 0:3ac96e360672 4479
charlesmn 0:3ac96e360672 4480
charlesmn 0:3ac96e360672 4481
charlesmn 0:3ac96e360672 4482
charlesmn 0:3ac96e360672 4483 tmpu32 = ((uint32_t)psys->result__sigma_sd1 << 5);
charlesmn 0:3ac96e360672 4484 if (tmpu32 > 0xFFFF)
charlesmn 0:3ac96e360672 4485 tmpu32 = 0xFFFF;
charlesmn 0:3ac96e360672 4486
charlesmn 0:3ac96e360672 4487 pdata->VL53L1_p_005 = (uint16_t)tmpu32;
charlesmn 0:3ac96e360672 4488
charlesmn 0:3ac96e360672 4489
charlesmn 0:3ac96e360672 4490
charlesmn 0:3ac96e360672 4491 pdata->VL53L1_p_014 =
charlesmn 0:3ac96e360672 4492 psys->result__phase_sd1;
charlesmn 0:3ac96e360672 4493
charlesmn 0:3ac96e360672 4494 range_mm = (int32_t)(
charlesmn 0:3ac96e360672 4495 psys->result__final_crosstalk_corrected_range_mm_sd1);
charlesmn 0:3ac96e360672 4496
charlesmn 0:3ac96e360672 4497
charlesmn 0:3ac96e360672 4498 range_mm *= gain_factor;
charlesmn 0:3ac96e360672 4499 range_mm += 0x0400;
charlesmn 0:3ac96e360672 4500 range_mm /= 0x0800;
charlesmn 0:3ac96e360672 4501
charlesmn 0:3ac96e360672 4502 pdata->median_range_mm = (int16_t)range_mm;
charlesmn 0:3ac96e360672 4503
charlesmn 0:3ac96e360672 4504 pdata->VL53L1_p_021 =
charlesmn 0:3ac96e360672 4505 pcore->result_core__ranging_total_events_sd1;
charlesmn 0:3ac96e360672 4506 pdata->VL53L1_p_013 =
charlesmn 0:3ac96e360672 4507 pcore->result_core__signal_total_events_sd1;
charlesmn 0:3ac96e360672 4508 pdata->total_periods_elapsed =
charlesmn 0:3ac96e360672 4509 pcore->result_core__total_periods_elapsed_sd1;
charlesmn 0:3ac96e360672 4510 pdata->VL53L1_p_020 =
charlesmn 0:3ac96e360672 4511 pcore->result_core__ambient_window_events_sd1;
charlesmn 0:3ac96e360672 4512
charlesmn 0:3ac96e360672 4513 break;
charlesmn 0:3ac96e360672 4514 }
charlesmn 0:3ac96e360672 4515
charlesmn 0:3ac96e360672 4516
charlesmn 0:3ac96e360672 4517 pdata->VL53L1_p_028 = pdata->VL53L1_p_014;
charlesmn 0:3ac96e360672 4518 pdata->VL53L1_p_029 = pdata->VL53L1_p_014;
charlesmn 0:3ac96e360672 4519 pdata->min_range_mm = pdata->median_range_mm;
charlesmn 0:3ac96e360672 4520 pdata->max_range_mm = pdata->median_range_mm;
charlesmn 0:3ac96e360672 4521
charlesmn 0:3ac96e360672 4522 pdata++;
charlesmn 0:3ac96e360672 4523 }
charlesmn 0:3ac96e360672 4524
charlesmn 0:3ac96e360672 4525
charlesmn 0:3ac96e360672 4526
charlesmn 0:3ac96e360672 4527 presults->device_status = VL53L1_DEVICEERROR_NOUPDATE;
charlesmn 0:3ac96e360672 4528
charlesmn 0:3ac96e360672 4529
charlesmn 0:3ac96e360672 4530
charlesmn 0:3ac96e360672 4531 switch (psys->result__range_status &
charlesmn 0:3ac96e360672 4532 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK) {
charlesmn 0:3ac96e360672 4533
charlesmn 0:3ac96e360672 4534 case VL53L1_DEVICEERROR_VCSELCONTINUITYTESTFAILURE:
charlesmn 0:3ac96e360672 4535 case VL53L1_DEVICEERROR_VCSELWATCHDOGTESTFAILURE:
charlesmn 0:3ac96e360672 4536 case VL53L1_DEVICEERROR_NOVHVVALUEFOUND:
charlesmn 0:3ac96e360672 4537 case VL53L1_DEVICEERROR_USERROICLIP:
charlesmn 0:3ac96e360672 4538 case VL53L1_DEVICEERROR_MULTCLIPFAIL:
charlesmn 0:3ac96e360672 4539
charlesmn 0:3ac96e360672 4540 presults->device_status = (psys->result__range_status &
charlesmn 0:3ac96e360672 4541 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK);
charlesmn 0:3ac96e360672 4542
charlesmn 0:3ac96e360672 4543 presults->VL53L1_p_002[0].range_status =
charlesmn 0:3ac96e360672 4544 VL53L1_DEVICEERROR_NOUPDATE;
charlesmn 0:3ac96e360672 4545 break;
charlesmn 0:3ac96e360672 4546
charlesmn 0:3ac96e360672 4547 }
charlesmn 0:3ac96e360672 4548
charlesmn 0:3ac96e360672 4549 LOG_FUNCTION_END(0);
charlesmn 0:3ac96e360672 4550 }
charlesmn 0:3ac96e360672 4551
charlesmn 0:3ac96e360672 4552
charlesmn 0:3ac96e360672 4553 VL53L1_Error VL53L1_set_zone_dss_config(
charlesmn 0:3ac96e360672 4554 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4555 VL53L1_zone_private_dyn_cfg_t *pzone_dyn_cfg)
charlesmn 0:3ac96e360672 4556 {
charlesmn 0:3ac96e360672 4557
charlesmn 0:3ac96e360672 4558
charlesmn 0:3ac96e360672 4559
charlesmn 0:3ac96e360672 4560 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4561
charlesmn 0:3ac96e360672 4562 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4563 VL53L1_ll_driver_state_t *pstate = &(pdev->ll_state);
charlesmn 0:3ac96e360672 4564
charlesmn 0:3ac96e360672 4565 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4566
charlesmn 0:3ac96e360672 4567 if (pstate->cfg_device_state ==
charlesmn 0:3ac96e360672 4568 VL53L1_DEVICESTATE_RANGING_DSS_MANUAL) {
charlesmn 0:3ac96e360672 4569 pdev->gen_cfg.dss_config__roi_mode_control =
charlesmn 0:3ac96e360672 4570 VL53L1_DSS_CONTROL__MODE_EFFSPADS;
charlesmn 0:3ac96e360672 4571 pdev->gen_cfg.dss_config__manual_effective_spads_select =
charlesmn 0:3ac96e360672 4572 pzone_dyn_cfg->dss_requested_effective_spad_count;
charlesmn 0:3ac96e360672 4573 } else {
charlesmn 0:3ac96e360672 4574 pdev->gen_cfg.dss_config__roi_mode_control =
charlesmn 0:3ac96e360672 4575 VL53L1_DSS_CONTROL__MODE_TARGET_RATE;
charlesmn 0:3ac96e360672 4576 }
charlesmn 0:3ac96e360672 4577
charlesmn 0:3ac96e360672 4578 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4579 return status;
charlesmn 0:3ac96e360672 4580 }
charlesmn 0:3ac96e360672 4581
charlesmn 0:3ac96e360672 4582
charlesmn 0:3ac96e360672 4583 VL53L1_Error VL53L1_calc_ambient_dmax(
charlesmn 0:3ac96e360672 4584 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4585 uint16_t target_reflectance,
charlesmn 0:3ac96e360672 4586 int16_t *pambient_dmax_mm)
charlesmn 0:3ac96e360672 4587 {
charlesmn 0:3ac96e360672 4588 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4589
charlesmn 0:3ac96e360672 4590 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 4591 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4592
charlesmn 0:3ac96e360672 4593 VL53L1_dmax_calibration_data_t dmax_cal;
charlesmn 0:3ac96e360672 4594 VL53L1_dmax_calibration_data_t *pdmax_cal = &dmax_cal;
charlesmn 0:3ac96e360672 4595
charlesmn 0:3ac96e360672 4596 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4597
charlesmn 0:3ac96e360672 4598
charlesmn 0:3ac96e360672 4599
charlesmn 0:3ac96e360672 4600 status =
charlesmn 0:3ac96e360672 4601 VL53L1_get_dmax_calibration_data(
charlesmn 0:3ac96e360672 4602 Dev,
charlesmn 0:3ac96e360672 4603 pdev->debug_mode,
charlesmn 0:3ac96e360672 4604 pdev->ll_state.rd_zone_id,
charlesmn 0:3ac96e360672 4605 pdmax_cal);
charlesmn 0:3ac96e360672 4606
charlesmn 0:3ac96e360672 4607
charlesmn 0:3ac96e360672 4608
charlesmn 0:3ac96e360672 4609 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 4610 status =
charlesmn 0:3ac96e360672 4611 VL53L1_ipp_hist_ambient_dmax(
charlesmn 0:3ac96e360672 4612 Dev,
charlesmn 0:3ac96e360672 4613 target_reflectance,
charlesmn 0:3ac96e360672 4614 &(pdev->fmt_dmax_cal),
charlesmn 0:3ac96e360672 4615 &(pdev->dmax_cfg),
charlesmn 0:3ac96e360672 4616 &(pdev->hist_data),
charlesmn 0:3ac96e360672 4617 pambient_dmax_mm);
charlesmn 0:3ac96e360672 4618
charlesmn 0:3ac96e360672 4619 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4620
charlesmn 0:3ac96e360672 4621 return status;
charlesmn 0:3ac96e360672 4622 }
charlesmn 0:3ac96e360672 4623
charlesmn 0:3ac96e360672 4624
charlesmn 0:3ac96e360672 4625
charlesmn 0:3ac96e360672 4626 VL53L1_Error VL53L1_set_GPIO_interrupt_config(
charlesmn 0:3ac96e360672 4627 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4628 VL53L1_GPIO_Interrupt_Mode intr_mode_distance,
charlesmn 0:3ac96e360672 4629 VL53L1_GPIO_Interrupt_Mode intr_mode_rate,
charlesmn 0:3ac96e360672 4630 uint8_t intr_new_measure_ready,
charlesmn 0:3ac96e360672 4631 uint8_t intr_no_target,
charlesmn 0:3ac96e360672 4632 uint8_t intr_combined_mode,
charlesmn 0:3ac96e360672 4633 uint16_t thresh_distance_high,
charlesmn 0:3ac96e360672 4634 uint16_t thresh_distance_low,
charlesmn 0:3ac96e360672 4635 uint16_t thresh_rate_high,
charlesmn 0:3ac96e360672 4636 uint16_t thresh_rate_low
charlesmn 0:3ac96e360672 4637 )
charlesmn 0:3ac96e360672 4638 {
charlesmn 0:3ac96e360672 4639 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4640
charlesmn 0:3ac96e360672 4641 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4642 VL53L1_GPIO_interrupt_config_t *pintconf =
charlesmn 0:3ac96e360672 4643 &(pdev->gpio_interrupt_config);
charlesmn 0:3ac96e360672 4644
charlesmn 0:3ac96e360672 4645 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4646
charlesmn 0:3ac96e360672 4647
charlesmn 0:3ac96e360672 4648 pintconf->intr_mode_distance = intr_mode_distance;
charlesmn 0:3ac96e360672 4649 pintconf->intr_mode_rate = intr_mode_rate;
charlesmn 0:3ac96e360672 4650 pintconf->intr_new_measure_ready = intr_new_measure_ready;
charlesmn 0:3ac96e360672 4651 pintconf->intr_no_target = intr_no_target;
charlesmn 0:3ac96e360672 4652 pintconf->intr_combined_mode = intr_combined_mode;
charlesmn 0:3ac96e360672 4653 pintconf->threshold_distance_high = thresh_distance_high;
charlesmn 0:3ac96e360672 4654 pintconf->threshold_distance_low = thresh_distance_low;
charlesmn 0:3ac96e360672 4655 pintconf->threshold_rate_high = thresh_rate_high;
charlesmn 0:3ac96e360672 4656 pintconf->threshold_rate_low = thresh_rate_low;
charlesmn 0:3ac96e360672 4657
charlesmn 0:3ac96e360672 4658
charlesmn 0:3ac96e360672 4659 pdev->gen_cfg.system__interrupt_config_gpio =
charlesmn 0:3ac96e360672 4660 VL53L1_encode_GPIO_interrupt_config(pintconf);
charlesmn 0:3ac96e360672 4661
charlesmn 0:3ac96e360672 4662
charlesmn 0:3ac96e360672 4663
charlesmn 0:3ac96e360672 4664 status = VL53L1_set_GPIO_thresholds_from_struct(
charlesmn 0:3ac96e360672 4665 Dev,
charlesmn 0:3ac96e360672 4666 pintconf);
charlesmn 0:3ac96e360672 4667
charlesmn 0:3ac96e360672 4668 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4669 return status;
charlesmn 0:3ac96e360672 4670 }
charlesmn 0:3ac96e360672 4671
charlesmn 0:3ac96e360672 4672
charlesmn 0:3ac96e360672 4673
charlesmn 0:3ac96e360672 4674 VL53L1_Error VL53L1_set_GPIO_interrupt_config_struct(
charlesmn 0:3ac96e360672 4675 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4676 VL53L1_GPIO_interrupt_config_t intconf)
charlesmn 0:3ac96e360672 4677 {
charlesmn 0:3ac96e360672 4678 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4679
charlesmn 0:3ac96e360672 4680 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4681 VL53L1_GPIO_interrupt_config_t *pintconf =
charlesmn 0:3ac96e360672 4682 &(pdev->gpio_interrupt_config);
charlesmn 0:3ac96e360672 4683
charlesmn 0:3ac96e360672 4684 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4685
charlesmn 0:3ac96e360672 4686
charlesmn 0:3ac96e360672 4687 memcpy(pintconf, &(intconf), sizeof(VL53L1_GPIO_interrupt_config_t));
charlesmn 0:3ac96e360672 4688
charlesmn 0:3ac96e360672 4689
charlesmn 0:3ac96e360672 4690 pdev->gen_cfg.system__interrupt_config_gpio =
charlesmn 0:3ac96e360672 4691 VL53L1_encode_GPIO_interrupt_config(pintconf);
charlesmn 0:3ac96e360672 4692
charlesmn 0:3ac96e360672 4693
charlesmn 0:3ac96e360672 4694 status = VL53L1_set_GPIO_thresholds_from_struct(
charlesmn 0:3ac96e360672 4695 Dev,
charlesmn 0:3ac96e360672 4696 pintconf);
charlesmn 0:3ac96e360672 4697
charlesmn 0:3ac96e360672 4698 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4699 return status;
charlesmn 0:3ac96e360672 4700 }
charlesmn 0:3ac96e360672 4701
charlesmn 0:3ac96e360672 4702
charlesmn 0:3ac96e360672 4703
charlesmn 0:3ac96e360672 4704 VL53L1_Error VL53L1_get_GPIO_interrupt_config(
charlesmn 0:3ac96e360672 4705 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4706 VL53L1_GPIO_interrupt_config_t *pintconf)
charlesmn 0:3ac96e360672 4707 {
charlesmn 0:3ac96e360672 4708 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4709
charlesmn 0:3ac96e360672 4710 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4711
charlesmn 0:3ac96e360672 4712 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4713
charlesmn 0:3ac96e360672 4714
charlesmn 0:3ac96e360672 4715 pdev->gpio_interrupt_config = VL53L1_decode_GPIO_interrupt_config(
charlesmn 0:3ac96e360672 4716 pdev->gen_cfg.system__interrupt_config_gpio);
charlesmn 0:3ac96e360672 4717
charlesmn 0:3ac96e360672 4718
charlesmn 0:3ac96e360672 4719 pdev->gpio_interrupt_config.threshold_distance_high =
charlesmn 0:3ac96e360672 4720 pdev->dyn_cfg.system__thresh_high;
charlesmn 0:3ac96e360672 4721 pdev->gpio_interrupt_config.threshold_distance_low =
charlesmn 0:3ac96e360672 4722 pdev->dyn_cfg.system__thresh_low;
charlesmn 0:3ac96e360672 4723
charlesmn 0:3ac96e360672 4724 pdev->gpio_interrupt_config.threshold_rate_high =
charlesmn 0:3ac96e360672 4725 pdev->gen_cfg.system__thresh_rate_high;
charlesmn 0:3ac96e360672 4726 pdev->gpio_interrupt_config.threshold_rate_low =
charlesmn 0:3ac96e360672 4727 pdev->gen_cfg.system__thresh_rate_low;
charlesmn 0:3ac96e360672 4728
charlesmn 0:3ac96e360672 4729 if (pintconf == &(pdev->gpio_interrupt_config)) {
charlesmn 0:3ac96e360672 4730
charlesmn 0:3ac96e360672 4731 } else {
charlesmn 0:3ac96e360672 4732
charlesmn 0:3ac96e360672 4733
charlesmn 0:3ac96e360672 4734 memcpy(pintconf, &(pdev->gpio_interrupt_config),
charlesmn 0:3ac96e360672 4735 sizeof(VL53L1_GPIO_interrupt_config_t));
charlesmn 0:3ac96e360672 4736 }
charlesmn 0:3ac96e360672 4737
charlesmn 0:3ac96e360672 4738 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4739 return status;
charlesmn 0:3ac96e360672 4740 }
charlesmn 0:3ac96e360672 4741
charlesmn 0:3ac96e360672 4742
charlesmn 0:3ac96e360672 4743 VL53L1_Error VL53L1_set_dmax_mode(
charlesmn 0:3ac96e360672 4744 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4745 VL53L1_DeviceDmaxMode dmax_mode)
charlesmn 0:3ac96e360672 4746 {
charlesmn 0:3ac96e360672 4747
charlesmn 0:3ac96e360672 4748
charlesmn 0:3ac96e360672 4749 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4750
charlesmn 0:3ac96e360672 4751 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4752
charlesmn 0:3ac96e360672 4753 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4754
charlesmn 0:3ac96e360672 4755 pdev->dmax_mode = dmax_mode;
charlesmn 0:3ac96e360672 4756
charlesmn 0:3ac96e360672 4757 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4758
charlesmn 0:3ac96e360672 4759 return status;
charlesmn 0:3ac96e360672 4760 }
charlesmn 0:3ac96e360672 4761
charlesmn 0:3ac96e360672 4762
charlesmn 0:3ac96e360672 4763 VL53L1_Error VL53L1_get_dmax_mode(
charlesmn 0:3ac96e360672 4764 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4765 VL53L1_DeviceDmaxMode *pdmax_mode)
charlesmn 0:3ac96e360672 4766 {
charlesmn 0:3ac96e360672 4767
charlesmn 0:3ac96e360672 4768
charlesmn 0:3ac96e360672 4769 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4770
charlesmn 0:3ac96e360672 4771 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4772
charlesmn 0:3ac96e360672 4773 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4774
charlesmn 0:3ac96e360672 4775 *pdmax_mode = pdev->dmax_mode;
charlesmn 0:3ac96e360672 4776
charlesmn 0:3ac96e360672 4777 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4778
charlesmn 0:3ac96e360672 4779 return status;
charlesmn 0:3ac96e360672 4780 }
charlesmn 0:3ac96e360672 4781
charlesmn 0:3ac96e360672 4782
charlesmn 0:3ac96e360672 4783 VL53L1_Error VL53L1_get_dmax_calibration_data(
charlesmn 0:3ac96e360672 4784 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4785 VL53L1_DeviceDmaxMode dmax_mode,
charlesmn 0:3ac96e360672 4786 uint8_t zone_id,
charlesmn 0:3ac96e360672 4787 VL53L1_dmax_calibration_data_t *pdmax_cal)
charlesmn 0:3ac96e360672 4788 {
charlesmn 0:3ac96e360672 4789
charlesmn 0:3ac96e360672 4790
charlesmn 0:3ac96e360672 4791 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4792
charlesmn 0:3ac96e360672 4793 VL53L1_LLDriverData_t *pdev =
charlesmn 0:3ac96e360672 4794 VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4795 VL53L1_LLDriverResults_t *pres =
charlesmn 0:3ac96e360672 4796 VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn 0:3ac96e360672 4797
charlesmn 0:3ac96e360672 4798 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4799
charlesmn 0:3ac96e360672 4800 switch (dmax_mode) {
charlesmn 0:3ac96e360672 4801
charlesmn 0:3ac96e360672 4802 case VL53L1_DEVICEDMAXMODE__PER_ZONE_CAL_DATA:
charlesmn 0:3ac96e360672 4803 pdmax_cal->ref__actual_effective_spads =
charlesmn 0:3ac96e360672 4804 (uint16_t)pres->zone_cal.VL53L1_p_002[zone_id].effective_spads;
charlesmn 0:3ac96e360672 4805 pdmax_cal->ref__peak_signal_count_rate_mcps =
charlesmn 0:3ac96e360672 4806 (uint16_t)pres->zone_cal.VL53L1_p_002[zone_id].peak_rate_mcps;
charlesmn 0:3ac96e360672 4807 pdmax_cal->ref__distance_mm =
charlesmn 0:3ac96e360672 4808 pres->zone_cal.cal_distance_mm;
charlesmn 0:3ac96e360672 4809 pdmax_cal->ref_reflectance_pc =
charlesmn 0:3ac96e360672 4810 pres->zone_cal.cal_reflectance_pc;
charlesmn 0:3ac96e360672 4811 pdmax_cal->coverglass_transmission = 0x0100;
charlesmn 0:3ac96e360672 4812 break;
charlesmn 0:3ac96e360672 4813
charlesmn 0:3ac96e360672 4814 case VL53L1_DEVICEDMAXMODE__CUST_CAL_DATA:
charlesmn 0:3ac96e360672 4815 memcpy(
charlesmn 0:3ac96e360672 4816 pdmax_cal,
charlesmn 0:3ac96e360672 4817 &(pdev->cust_dmax_cal),
charlesmn 0:3ac96e360672 4818 sizeof(VL53L1_dmax_calibration_data_t));
charlesmn 0:3ac96e360672 4819 break;
charlesmn 0:3ac96e360672 4820
charlesmn 0:3ac96e360672 4821 case VL53L1_DEVICEDMAXMODE__FMT_CAL_DATA:
charlesmn 0:3ac96e360672 4822 memcpy(
charlesmn 0:3ac96e360672 4823 pdmax_cal,
charlesmn 0:3ac96e360672 4824 &(pdev->fmt_dmax_cal),
charlesmn 0:3ac96e360672 4825 sizeof(VL53L1_dmax_calibration_data_t));
charlesmn 0:3ac96e360672 4826 break;
charlesmn 0:3ac96e360672 4827
charlesmn 0:3ac96e360672 4828 default:
charlesmn 0:3ac96e360672 4829 status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn 0:3ac96e360672 4830 break;
charlesmn 0:3ac96e360672 4831
charlesmn 0:3ac96e360672 4832 }
charlesmn 0:3ac96e360672 4833
charlesmn 0:3ac96e360672 4834 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4835
charlesmn 0:3ac96e360672 4836 return status;
charlesmn 0:3ac96e360672 4837 }
charlesmn 0:3ac96e360672 4838
charlesmn 0:3ac96e360672 4839
charlesmn 0:3ac96e360672 4840 VL53L1_Error VL53L1_set_hist_dmax_config(
charlesmn 0:3ac96e360672 4841 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4842 VL53L1_hist_gen3_dmax_config_t *pdmax_cfg)
charlesmn 0:3ac96e360672 4843 {
charlesmn 0:3ac96e360672 4844
charlesmn 0:3ac96e360672 4845
charlesmn 0:3ac96e360672 4846
charlesmn 0:3ac96e360672 4847 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4848
charlesmn 0:3ac96e360672 4849 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4850
charlesmn 0:3ac96e360672 4851 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4852
charlesmn 0:3ac96e360672 4853
charlesmn 0:3ac96e360672 4854 memcpy(
charlesmn 0:3ac96e360672 4855 &(pdev->dmax_cfg),
charlesmn 0:3ac96e360672 4856 pdmax_cfg,
charlesmn 0:3ac96e360672 4857 sizeof(VL53L1_hist_gen3_dmax_config_t));
charlesmn 0:3ac96e360672 4858
charlesmn 0:3ac96e360672 4859 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4860
charlesmn 0:3ac96e360672 4861 return status;
charlesmn 0:3ac96e360672 4862 }
charlesmn 0:3ac96e360672 4863
charlesmn 0:3ac96e360672 4864
charlesmn 0:3ac96e360672 4865 VL53L1_Error VL53L1_get_hist_dmax_config(
charlesmn 0:3ac96e360672 4866 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4867 VL53L1_hist_gen3_dmax_config_t *pdmax_cfg)
charlesmn 0:3ac96e360672 4868 {
charlesmn 0:3ac96e360672 4869
charlesmn 0:3ac96e360672 4870
charlesmn 0:3ac96e360672 4871
charlesmn 0:3ac96e360672 4872 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4873
charlesmn 0:3ac96e360672 4874 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4875
charlesmn 0:3ac96e360672 4876 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4877
charlesmn 0:3ac96e360672 4878
charlesmn 0:3ac96e360672 4879 memcpy(
charlesmn 0:3ac96e360672 4880 pdmax_cfg,
charlesmn 0:3ac96e360672 4881 &(pdev->dmax_cfg),
charlesmn 0:3ac96e360672 4882 sizeof(VL53L1_hist_gen3_dmax_config_t));
charlesmn 0:3ac96e360672 4883
charlesmn 0:3ac96e360672 4884 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4885
charlesmn 0:3ac96e360672 4886 return status;
charlesmn 0:3ac96e360672 4887 }
charlesmn 0:3ac96e360672 4888
charlesmn 0:3ac96e360672 4889
charlesmn 0:3ac96e360672 4890 VL53L1_Error VL53L1_set_offset_calibration_mode(
charlesmn 0:3ac96e360672 4891 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4892 VL53L1_OffsetCalibrationMode offset_cal_mode)
charlesmn 0:3ac96e360672 4893 {
charlesmn 0:3ac96e360672 4894
charlesmn 0:3ac96e360672 4895
charlesmn 0:3ac96e360672 4896
charlesmn 0:3ac96e360672 4897 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4898
charlesmn 0:3ac96e360672 4899 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4900
charlesmn 0:3ac96e360672 4901 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4902
charlesmn 0:3ac96e360672 4903 pdev->offset_calibration_mode = offset_cal_mode;
charlesmn 0:3ac96e360672 4904
charlesmn 0:3ac96e360672 4905 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4906
charlesmn 0:3ac96e360672 4907 return status;
charlesmn 0:3ac96e360672 4908 }
charlesmn 0:3ac96e360672 4909
charlesmn 0:3ac96e360672 4910
charlesmn 0:3ac96e360672 4911 VL53L1_Error VL53L1_get_offset_calibration_mode(
charlesmn 0:3ac96e360672 4912 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4913 VL53L1_OffsetCalibrationMode *poffset_cal_mode)
charlesmn 0:3ac96e360672 4914 {
charlesmn 0:3ac96e360672 4915
charlesmn 0:3ac96e360672 4916
charlesmn 0:3ac96e360672 4917
charlesmn 0:3ac96e360672 4918 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4919
charlesmn 0:3ac96e360672 4920 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4921
charlesmn 0:3ac96e360672 4922 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4923
charlesmn 0:3ac96e360672 4924 *poffset_cal_mode = pdev->offset_calibration_mode;
charlesmn 0:3ac96e360672 4925
charlesmn 0:3ac96e360672 4926 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4927
charlesmn 0:3ac96e360672 4928 return status;
charlesmn 0:3ac96e360672 4929 }
charlesmn 0:3ac96e360672 4930
charlesmn 0:3ac96e360672 4931
charlesmn 0:3ac96e360672 4932 VL53L1_Error VL53L1_set_offset_correction_mode(
charlesmn 0:3ac96e360672 4933 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4934 VL53L1_OffsetCorrectionMode offset_cor_mode)
charlesmn 0:3ac96e360672 4935 {
charlesmn 0:3ac96e360672 4936
charlesmn 0:3ac96e360672 4937
charlesmn 0:3ac96e360672 4938
charlesmn 0:3ac96e360672 4939 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4940
charlesmn 0:3ac96e360672 4941 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4942
charlesmn 0:3ac96e360672 4943 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4944
charlesmn 0:3ac96e360672 4945 pdev->offset_correction_mode = offset_cor_mode;
charlesmn 0:3ac96e360672 4946
charlesmn 0:3ac96e360672 4947 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4948
charlesmn 0:3ac96e360672 4949 return status;
charlesmn 0:3ac96e360672 4950 }
charlesmn 0:3ac96e360672 4951
charlesmn 0:3ac96e360672 4952
charlesmn 0:3ac96e360672 4953 VL53L1_Error VL53L1_get_offset_correction_mode(
charlesmn 0:3ac96e360672 4954 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4955 VL53L1_OffsetCorrectionMode *poffset_cor_mode)
charlesmn 0:3ac96e360672 4956 {
charlesmn 0:3ac96e360672 4957
charlesmn 0:3ac96e360672 4958
charlesmn 0:3ac96e360672 4959
charlesmn 0:3ac96e360672 4960 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4961
charlesmn 0:3ac96e360672 4962 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 4963
charlesmn 0:3ac96e360672 4964 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4965
charlesmn 0:3ac96e360672 4966 *poffset_cor_mode = pdev->offset_correction_mode;
charlesmn 0:3ac96e360672 4967
charlesmn 0:3ac96e360672 4968 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 4969
charlesmn 0:3ac96e360672 4970 return status;
charlesmn 0:3ac96e360672 4971 }
charlesmn 0:3ac96e360672 4972
charlesmn 0:3ac96e360672 4973
charlesmn 0:3ac96e360672 4974
charlesmn 0:3ac96e360672 4975
charlesmn 0:3ac96e360672 4976 VL53L1_Error VL53L1_set_zone_calibration_data(
charlesmn 0:3ac96e360672 4977 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 4978 VL53L1_zone_calibration_results_t *pzone_cal)
charlesmn 0:3ac96e360672 4979 {
charlesmn 0:3ac96e360672 4980
charlesmn 0:3ac96e360672 4981
charlesmn 0:3ac96e360672 4982
charlesmn 0:3ac96e360672 4983 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 4984
charlesmn 0:3ac96e360672 4985 VL53L1_LLDriverResults_t *pres = VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn 0:3ac96e360672 4986
charlesmn 0:3ac96e360672 4987 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 4988
charlesmn 0:3ac96e360672 4989 if (pzone_cal->struct_version !=
charlesmn 0:3ac96e360672 4990 VL53L1_LL_ZONE_CALIBRATION_DATA_STRUCT_VERSION)
charlesmn 0:3ac96e360672 4991 status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn 0:3ac96e360672 4992
charlesmn 0:3ac96e360672 4993
charlesmn 0:3ac96e360672 4994 if (status == VL53L1_ERROR_NONE)
charlesmn 0:3ac96e360672 4995
charlesmn 0:3ac96e360672 4996 memcpy(
charlesmn 0:3ac96e360672 4997 &(pres->zone_cal),
charlesmn 0:3ac96e360672 4998 pzone_cal,
charlesmn 0:3ac96e360672 4999 sizeof(VL53L1_zone_calibration_results_t));
charlesmn 0:3ac96e360672 5000
charlesmn 0:3ac96e360672 5001 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 5002
charlesmn 0:3ac96e360672 5003 return status;
charlesmn 0:3ac96e360672 5004 }
charlesmn 0:3ac96e360672 5005
charlesmn 0:3ac96e360672 5006
charlesmn 0:3ac96e360672 5007 VL53L1_Error VL53L1_get_zone_calibration_data(
charlesmn 0:3ac96e360672 5008 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 5009 VL53L1_zone_calibration_results_t *pzone_cal)
charlesmn 0:3ac96e360672 5010 {
charlesmn 0:3ac96e360672 5011
charlesmn 0:3ac96e360672 5012
charlesmn 0:3ac96e360672 5013
charlesmn 0:3ac96e360672 5014 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 5015
charlesmn 0:3ac96e360672 5016 VL53L1_LLDriverResults_t *pres = VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn 0:3ac96e360672 5017
charlesmn 0:3ac96e360672 5018 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 5019
charlesmn 0:3ac96e360672 5020
charlesmn 0:3ac96e360672 5021 memcpy(
charlesmn 0:3ac96e360672 5022 pzone_cal,
charlesmn 0:3ac96e360672 5023 &(pres->zone_cal),
charlesmn 0:3ac96e360672 5024 sizeof(VL53L1_zone_calibration_results_t));
charlesmn 0:3ac96e360672 5025
charlesmn 0:3ac96e360672 5026 pzone_cal->struct_version =
charlesmn 0:3ac96e360672 5027 VL53L1_LL_ZONE_CALIBRATION_DATA_STRUCT_VERSION;
charlesmn 0:3ac96e360672 5028
charlesmn 0:3ac96e360672 5029 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 5030
charlesmn 0:3ac96e360672 5031 return status;
charlesmn 0:3ac96e360672 5032 }
charlesmn 0:3ac96e360672 5033
charlesmn 0:3ac96e360672 5034
charlesmn 0:3ac96e360672 5035 VL53L1_Error VL53L1_get_tuning_debug_data(
charlesmn 0:3ac96e360672 5036 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 5037 VL53L1_tuning_parameters_t *ptun_data)
charlesmn 0:3ac96e360672 5038 {
charlesmn 0:3ac96e360672 5039
charlesmn 0:3ac96e360672 5040
charlesmn 0:3ac96e360672 5041 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 5042
charlesmn 0:3ac96e360672 5043 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 5044 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn 0:3ac96e360672 5045 VL53L1_xtalkextract_config_t *pXC = &(pdev->xtalk_extract_cfg);
charlesmn 0:3ac96e360672 5046
charlesmn 0:3ac96e360672 5047 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 5048
charlesmn 0:3ac96e360672 5049 ptun_data->vl53l1_tuningparm_version =
charlesmn 0:3ac96e360672 5050 pdev->tuning_parms.tp_tuning_parm_version;
charlesmn 0:3ac96e360672 5051
charlesmn 0:3ac96e360672 5052 ptun_data->vl53l1_tuningparm_key_table_version =
charlesmn 0:3ac96e360672 5053 pdev->tuning_parms.tp_tuning_parm_key_table_version;
charlesmn 0:3ac96e360672 5054
charlesmn 0:3ac96e360672 5055
charlesmn 0:3ac96e360672 5056 ptun_data->vl53l1_tuningparm_lld_version =
charlesmn 0:3ac96e360672 5057 pdev->tuning_parms.tp_tuning_parm_lld_version;
charlesmn 0:3ac96e360672 5058
charlesmn 0:3ac96e360672 5059 ptun_data->vl53l1_tuningparm_hist_algo_select =
charlesmn 0:3ac96e360672 5060 pHP->hist_algo_select;
charlesmn 0:3ac96e360672 5061
charlesmn 0:3ac96e360672 5062 ptun_data->vl53l1_tuningparm_hist_target_order =
charlesmn 0:3ac96e360672 5063 pHP->hist_target_order;
charlesmn 0:3ac96e360672 5064
charlesmn 0:3ac96e360672 5065 ptun_data->vl53l1_tuningparm_hist_filter_woi_0 =
charlesmn 0:3ac96e360672 5066 pHP->filter_woi0;
charlesmn 0:3ac96e360672 5067
charlesmn 0:3ac96e360672 5068 ptun_data->vl53l1_tuningparm_hist_filter_woi_1 =
charlesmn 0:3ac96e360672 5069 pHP->filter_woi1;
charlesmn 0:3ac96e360672 5070
charlesmn 0:3ac96e360672 5071 ptun_data->vl53l1_tuningparm_hist_amb_est_method =
charlesmn 0:3ac96e360672 5072 pHP->hist_amb_est_method;
charlesmn 0:3ac96e360672 5073
charlesmn 0:3ac96e360672 5074 ptun_data->vl53l1_tuningparm_hist_amb_thresh_sigma_0 =
charlesmn 0:3ac96e360672 5075 pHP->ambient_thresh_sigma0;
charlesmn 0:3ac96e360672 5076
charlesmn 0:3ac96e360672 5077 ptun_data->vl53l1_tuningparm_hist_amb_thresh_sigma_1 =
charlesmn 0:3ac96e360672 5078 pHP->ambient_thresh_sigma1;
charlesmn 0:3ac96e360672 5079
charlesmn 0:3ac96e360672 5080 ptun_data->vl53l1_tuningparm_hist_min_amb_thresh_events =
charlesmn 0:3ac96e360672 5081 pHP->min_ambient_thresh_events;
charlesmn 0:3ac96e360672 5082
charlesmn 0:3ac96e360672 5083 ptun_data->vl53l1_tuningparm_hist_amb_events_scaler =
charlesmn 0:3ac96e360672 5084 pHP->ambient_thresh_events_scaler;
charlesmn 0:3ac96e360672 5085
charlesmn 0:3ac96e360672 5086 ptun_data->vl53l1_tuningparm_hist_noise_threshold =
charlesmn 0:3ac96e360672 5087 pHP->noise_threshold;
charlesmn 0:3ac96e360672 5088
charlesmn 0:3ac96e360672 5089 ptun_data->vl53l1_tuningparm_hist_signal_total_events_limit =
charlesmn 0:3ac96e360672 5090 pHP->signal_total_events_limit;
charlesmn 0:3ac96e360672 5091
charlesmn 0:3ac96e360672 5092 ptun_data->vl53l1_tuningparm_hist_sigma_est_ref_mm =
charlesmn 0:3ac96e360672 5093 pHP->sigma_estimator__sigma_ref_mm;
charlesmn 0:3ac96e360672 5094
charlesmn 0:3ac96e360672 5095 ptun_data->vl53l1_tuningparm_hist_sigma_thresh_mm =
charlesmn 0:3ac96e360672 5096 pHP->sigma_thresh;
charlesmn 0:3ac96e360672 5097
charlesmn 0:3ac96e360672 5098 ptun_data->vl53l1_tuningparm_hist_gain_factor =
charlesmn 0:3ac96e360672 5099 pdev->gain_cal.histogram_ranging_gain_factor;
charlesmn 0:3ac96e360672 5100
charlesmn 0:3ac96e360672 5101 ptun_data->vl53l1_tuningparm_consistency_hist_phase_tolerance =
charlesmn 0:3ac96e360672 5102 pHP->algo__consistency_check__phase_tolerance;
charlesmn 0:3ac96e360672 5103
charlesmn 0:3ac96e360672 5104 ptun_data->vl53l1_tuningparm_consistency_hist_min_max_tolerance_mm =
charlesmn 0:3ac96e360672 5105 pHP->algo__consistency_check__min_max_tolerance;
charlesmn 0:3ac96e360672 5106
charlesmn 0:3ac96e360672 5107 ptun_data->vl53l1_tuningparm_consistency_hist_event_sigma =
charlesmn 0:3ac96e360672 5108 pHP->algo__consistency_check__event_sigma;
charlesmn 0:3ac96e360672 5109
charlesmn 0:3ac96e360672 5110 ptun_data->vl53l1_tuningparm_consistency_hist_event_sigma_min_spad_limit
charlesmn 0:3ac96e360672 5111 = pHP->algo__consistency_check__event_min_spad_count;
charlesmn 0:3ac96e360672 5112
charlesmn 0:3ac96e360672 5113 ptun_data->vl53l1_tuningparm_initial_phase_rtn_histo_long_range =
charlesmn 0:3ac96e360672 5114 pdev->tuning_parms.tp_init_phase_rtn_hist_long;
charlesmn 0:3ac96e360672 5115
charlesmn 0:3ac96e360672 5116 ptun_data->vl53l1_tuningparm_initial_phase_rtn_histo_med_range =
charlesmn 0:3ac96e360672 5117 pdev->tuning_parms.tp_init_phase_rtn_hist_med;
charlesmn 0:3ac96e360672 5118
charlesmn 0:3ac96e360672 5119 ptun_data->vl53l1_tuningparm_initial_phase_rtn_histo_short_range =
charlesmn 0:3ac96e360672 5120 pdev->tuning_parms.tp_init_phase_rtn_hist_short;
charlesmn 0:3ac96e360672 5121
charlesmn 0:3ac96e360672 5122 ptun_data->vl53l1_tuningparm_initial_phase_ref_histo_long_range =
charlesmn 0:3ac96e360672 5123 pdev->tuning_parms.tp_init_phase_ref_hist_long;
charlesmn 0:3ac96e360672 5124
charlesmn 0:3ac96e360672 5125 ptun_data->vl53l1_tuningparm_initial_phase_ref_histo_med_range =
charlesmn 0:3ac96e360672 5126 pdev->tuning_parms.tp_init_phase_ref_hist_med;
charlesmn 0:3ac96e360672 5127
charlesmn 0:3ac96e360672 5128 ptun_data->vl53l1_tuningparm_initial_phase_ref_histo_short_range =
charlesmn 0:3ac96e360672 5129 pdev->tuning_parms.tp_init_phase_ref_hist_short;
charlesmn 0:3ac96e360672 5130
charlesmn 0:3ac96e360672 5131 ptun_data->vl53l1_tuningparm_xtalk_detect_min_valid_range_mm =
charlesmn 0:3ac96e360672 5132 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm;
charlesmn 0:3ac96e360672 5133
charlesmn 0:3ac96e360672 5134 ptun_data->vl53l1_tuningparm_xtalk_detect_max_valid_range_mm =
charlesmn 0:3ac96e360672 5135 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm;
charlesmn 0:3ac96e360672 5136
charlesmn 0:3ac96e360672 5137 ptun_data->vl53l1_tuningparm_xtalk_detect_max_sigma_mm =
charlesmn 0:3ac96e360672 5138 pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm;
charlesmn 0:3ac96e360672 5139
charlesmn 0:3ac96e360672 5140 ptun_data->vl53l1_tuningparm_xtalk_detect_min_max_tolerance =
charlesmn 0:3ac96e360672 5141 pHP->algo__crosstalk_detect_min_max_tolerance;
charlesmn 0:3ac96e360672 5142
charlesmn 0:3ac96e360672 5143 ptun_data->vl53l1_tuningparm_xtalk_detect_max_valid_rate_kcps =
charlesmn 0:3ac96e360672 5144 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps;
charlesmn 0:3ac96e360672 5145
charlesmn 0:3ac96e360672 5146 ptun_data->vl53l1_tuningparm_xtalk_detect_event_sigma =
charlesmn 0:3ac96e360672 5147 pHP->algo__crosstalk_detect_event_sigma;
charlesmn 0:3ac96e360672 5148
charlesmn 0:3ac96e360672 5149 ptun_data->vl53l1_tuningparm_hist_xtalk_margin_kcps =
charlesmn 0:3ac96e360672 5150 pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps;
charlesmn 0:3ac96e360672 5151
charlesmn 0:3ac96e360672 5152 ptun_data->vl53l1_tuningparm_consistency_lite_phase_tolerance =
charlesmn 0:3ac96e360672 5153 pdev->tuning_parms.tp_consistency_lite_phase_tolerance;
charlesmn 0:3ac96e360672 5154
charlesmn 0:3ac96e360672 5155 ptun_data->vl53l1_tuningparm_phasecal_target =
charlesmn 0:3ac96e360672 5156 pdev->tuning_parms.tp_phasecal_target;
charlesmn 0:3ac96e360672 5157
charlesmn 0:3ac96e360672 5158 ptun_data->vl53l1_tuningparm_lite_cal_repeat_rate =
charlesmn 0:3ac96e360672 5159 pdev->tuning_parms.tp_cal_repeat_rate;
charlesmn 0:3ac96e360672 5160
charlesmn 0:3ac96e360672 5161 ptun_data->vl53l1_tuningparm_lite_ranging_gain_factor =
charlesmn 0:3ac96e360672 5162 pdev->gain_cal.standard_ranging_gain_factor;
charlesmn 0:3ac96e360672 5163
charlesmn 0:3ac96e360672 5164 ptun_data->vl53l1_tuningparm_lite_min_clip_mm =
charlesmn 0:3ac96e360672 5165 pdev->tuning_parms.tp_lite_min_clip;
charlesmn 0:3ac96e360672 5166
charlesmn 0:3ac96e360672 5167 ptun_data->vl53l1_tuningparm_lite_long_sigma_thresh_mm =
charlesmn 0:3ac96e360672 5168 pdev->tuning_parms.tp_lite_long_sigma_thresh_mm;
charlesmn 0:3ac96e360672 5169
charlesmn 0:3ac96e360672 5170 ptun_data->vl53l1_tuningparm_lite_med_sigma_thresh_mm =
charlesmn 0:3ac96e360672 5171 pdev->tuning_parms.tp_lite_med_sigma_thresh_mm;
charlesmn 0:3ac96e360672 5172
charlesmn 0:3ac96e360672 5173 ptun_data->vl53l1_tuningparm_lite_short_sigma_thresh_mm =
charlesmn 0:3ac96e360672 5174 pdev->tuning_parms.tp_lite_short_sigma_thresh_mm;
charlesmn 0:3ac96e360672 5175
charlesmn 0:3ac96e360672 5176 ptun_data->vl53l1_tuningparm_lite_long_min_count_rate_rtn_mcps =
charlesmn 0:3ac96e360672 5177 pdev->tuning_parms.tp_lite_long_min_count_rate_rtn_mcps;
charlesmn 0:3ac96e360672 5178
charlesmn 0:3ac96e360672 5179 ptun_data->vl53l1_tuningparm_lite_med_min_count_rate_rtn_mcps =
charlesmn 0:3ac96e360672 5180 pdev->tuning_parms.tp_lite_med_min_count_rate_rtn_mcps;
charlesmn 0:3ac96e360672 5181
charlesmn 0:3ac96e360672 5182 ptun_data->vl53l1_tuningparm_lite_short_min_count_rate_rtn_mcps =
charlesmn 0:3ac96e360672 5183 pdev->tuning_parms.tp_lite_short_min_count_rate_rtn_mcps;
charlesmn 0:3ac96e360672 5184
charlesmn 0:3ac96e360672 5185 ptun_data->vl53l1_tuningparm_lite_sigma_est_pulse_width =
charlesmn 0:3ac96e360672 5186 pdev->tuning_parms.tp_lite_sigma_est_pulse_width_ns;
charlesmn 0:3ac96e360672 5187
charlesmn 0:3ac96e360672 5188 ptun_data->vl53l1_tuningparm_lite_sigma_est_amb_width_ns =
charlesmn 0:3ac96e360672 5189 pdev->tuning_parms.tp_lite_sigma_est_amb_width_ns;
charlesmn 0:3ac96e360672 5190
charlesmn 0:3ac96e360672 5191 ptun_data->vl53l1_tuningparm_lite_sigma_ref_mm =
charlesmn 0:3ac96e360672 5192 pdev->tuning_parms.tp_lite_sigma_ref_mm;
charlesmn 0:3ac96e360672 5193
charlesmn 0:3ac96e360672 5194 ptun_data->vl53l1_tuningparm_lite_rit_mult =
charlesmn 0:3ac96e360672 5195 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult;
charlesmn 0:3ac96e360672 5196
charlesmn 0:3ac96e360672 5197 ptun_data->vl53l1_tuningparm_lite_seed_config =
charlesmn 0:3ac96e360672 5198 pdev->tuning_parms.tp_lite_seed_cfg;
charlesmn 0:3ac96e360672 5199
charlesmn 0:3ac96e360672 5200 ptun_data->vl53l1_tuningparm_lite_quantifier =
charlesmn 0:3ac96e360672 5201 pdev->tuning_parms.tp_lite_quantifier;
charlesmn 0:3ac96e360672 5202
charlesmn 0:3ac96e360672 5203 ptun_data->vl53l1_tuningparm_lite_first_order_select =
charlesmn 0:3ac96e360672 5204 pdev->tuning_parms.tp_lite_first_order_select;
charlesmn 0:3ac96e360672 5205
charlesmn 0:3ac96e360672 5206 ptun_data->vl53l1_tuningparm_lite_xtalk_margin_kcps =
charlesmn 0:3ac96e360672 5207 pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps;
charlesmn 0:3ac96e360672 5208
charlesmn 0:3ac96e360672 5209 ptun_data->vl53l1_tuningparm_initial_phase_rtn_lite_long_range =
charlesmn 0:3ac96e360672 5210 pdev->tuning_parms.tp_init_phase_rtn_lite_long;
charlesmn 0:3ac96e360672 5211
charlesmn 0:3ac96e360672 5212 ptun_data->vl53l1_tuningparm_initial_phase_rtn_lite_med_range =
charlesmn 0:3ac96e360672 5213 pdev->tuning_parms.tp_init_phase_rtn_lite_med;
charlesmn 0:3ac96e360672 5214
charlesmn 0:3ac96e360672 5215 ptun_data->vl53l1_tuningparm_initial_phase_rtn_lite_short_range =
charlesmn 0:3ac96e360672 5216 pdev->tuning_parms.tp_init_phase_rtn_lite_short;
charlesmn 0:3ac96e360672 5217
charlesmn 0:3ac96e360672 5218 ptun_data->vl53l1_tuningparm_initial_phase_ref_lite_long_range =
charlesmn 0:3ac96e360672 5219 pdev->tuning_parms.tp_init_phase_ref_lite_long;
charlesmn 0:3ac96e360672 5220
charlesmn 0:3ac96e360672 5221 ptun_data->vl53l1_tuningparm_initial_phase_ref_lite_med_range =
charlesmn 0:3ac96e360672 5222 pdev->tuning_parms.tp_init_phase_ref_lite_med;
charlesmn 0:3ac96e360672 5223
charlesmn 0:3ac96e360672 5224 ptun_data->vl53l1_tuningparm_initial_phase_ref_lite_short_range =
charlesmn 0:3ac96e360672 5225 pdev->tuning_parms.tp_init_phase_ref_lite_short;
charlesmn 0:3ac96e360672 5226
charlesmn 0:3ac96e360672 5227 ptun_data->vl53l1_tuningparm_timed_seed_config =
charlesmn 0:3ac96e360672 5228 pdev->tuning_parms.tp_timed_seed_cfg;
charlesmn 0:3ac96e360672 5229
charlesmn 0:3ac96e360672 5230 ptun_data->vl53l1_tuningparm_dmax_cfg_signal_thresh_sigma =
charlesmn 0:3ac96e360672 5231 pdev->dmax_cfg.signal_thresh_sigma;
charlesmn 0:3ac96e360672 5232
charlesmn 0:3ac96e360672 5233 ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_0 =
charlesmn 0:3ac96e360672 5234 pdev->dmax_cfg.target_reflectance_for_dmax_calc[0];
charlesmn 0:3ac96e360672 5235
charlesmn 0:3ac96e360672 5236 ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_1 =
charlesmn 0:3ac96e360672 5237 pdev->dmax_cfg.target_reflectance_for_dmax_calc[1];
charlesmn 0:3ac96e360672 5238
charlesmn 0:3ac96e360672 5239 ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_2 =
charlesmn 0:3ac96e360672 5240 pdev->dmax_cfg.target_reflectance_for_dmax_calc[2];
charlesmn 0:3ac96e360672 5241
charlesmn 0:3ac96e360672 5242 ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_3 =
charlesmn 0:3ac96e360672 5243 pdev->dmax_cfg.target_reflectance_for_dmax_calc[3];
charlesmn 0:3ac96e360672 5244
charlesmn 0:3ac96e360672 5245 ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_4 =
charlesmn 0:3ac96e360672 5246 pdev->dmax_cfg.target_reflectance_for_dmax_calc[4];
charlesmn 0:3ac96e360672 5247
charlesmn 0:3ac96e360672 5248 ptun_data->vl53l1_tuningparm_vhv_loopbound =
charlesmn 0:3ac96e360672 5249 pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound;
charlesmn 0:3ac96e360672 5250
charlesmn 0:3ac96e360672 5251 ptun_data->vl53l1_tuningparm_refspadchar_device_test_mode =
charlesmn 0:3ac96e360672 5252 pdev->refspadchar.device_test_mode;
charlesmn 0:3ac96e360672 5253
charlesmn 0:3ac96e360672 5254 ptun_data->vl53l1_tuningparm_refspadchar_vcsel_period =
charlesmn 0:3ac96e360672 5255 pdev->refspadchar.VL53L1_p_009;
charlesmn 0:3ac96e360672 5256
charlesmn 0:3ac96e360672 5257 ptun_data->vl53l1_tuningparm_refspadchar_phasecal_timeout_us =
charlesmn 0:3ac96e360672 5258 pdev->refspadchar.timeout_us;
charlesmn 0:3ac96e360672 5259
charlesmn 0:3ac96e360672 5260 ptun_data->vl53l1_tuningparm_refspadchar_target_count_rate_mcps =
charlesmn 0:3ac96e360672 5261 pdev->refspadchar.target_count_rate_mcps;
charlesmn 0:3ac96e360672 5262
charlesmn 0:3ac96e360672 5263 ptun_data->vl53l1_tuningparm_refspadchar_min_countrate_limit_mcps =
charlesmn 0:3ac96e360672 5264 pdev->refspadchar.min_count_rate_limit_mcps;
charlesmn 0:3ac96e360672 5265
charlesmn 0:3ac96e360672 5266 ptun_data->vl53l1_tuningparm_refspadchar_max_countrate_limit_mcps =
charlesmn 0:3ac96e360672 5267 pdev->refspadchar.max_count_rate_limit_mcps;
charlesmn 0:3ac96e360672 5268
charlesmn 0:3ac96e360672 5269 ptun_data->vl53l1_tuningparm_xtalk_extract_num_of_samples =
charlesmn 0:3ac96e360672 5270 pXC->num_of_samples;
charlesmn 0:3ac96e360672 5271
charlesmn 0:3ac96e360672 5272 ptun_data->vl53l1_tuningparm_xtalk_extract_min_filter_thresh_mm =
charlesmn 0:3ac96e360672 5273 pXC->algo__crosstalk_extract_min_valid_range_mm;
charlesmn 0:3ac96e360672 5274
charlesmn 0:3ac96e360672 5275 ptun_data->vl53l1_tuningparm_xtalk_extract_max_filter_thresh_mm =
charlesmn 0:3ac96e360672 5276 pXC->algo__crosstalk_extract_max_valid_range_mm;
charlesmn 0:3ac96e360672 5277
charlesmn 0:3ac96e360672 5278 ptun_data->vl53l1_tuningparm_xtalk_extract_dss_rate_mcps =
charlesmn 0:3ac96e360672 5279 pXC->dss_config__target_total_rate_mcps;
charlesmn 0:3ac96e360672 5280
charlesmn 0:3ac96e360672 5281 ptun_data->vl53l1_tuningparm_xtalk_extract_phasecal_timeout_us =
charlesmn 0:3ac96e360672 5282 pXC->phasecal_config_timeout_us;
charlesmn 0:3ac96e360672 5283
charlesmn 0:3ac96e360672 5284 ptun_data->vl53l1_tuningparm_xtalk_extract_max_valid_rate_kcps =
charlesmn 0:3ac96e360672 5285 pXC->algo__crosstalk_extract_max_valid_rate_kcps;
charlesmn 0:3ac96e360672 5286
charlesmn 0:3ac96e360672 5287 ptun_data->vl53l1_tuningparm_xtalk_extract_sigma_threshold_mm =
charlesmn 0:3ac96e360672 5288 pXC->algo__crosstalk_extract_max_sigma_mm;
charlesmn 0:3ac96e360672 5289
charlesmn 0:3ac96e360672 5290 ptun_data->vl53l1_tuningparm_xtalk_extract_dss_timeout_us =
charlesmn 0:3ac96e360672 5291 pXC->mm_config_timeout_us;
charlesmn 0:3ac96e360672 5292
charlesmn 0:3ac96e360672 5293 ptun_data->vl53l1_tuningparm_xtalk_extract_bin_timeout_us =
charlesmn 0:3ac96e360672 5294 pXC->range_config_timeout_us;
charlesmn 0:3ac96e360672 5295
charlesmn 0:3ac96e360672 5296 ptun_data->vl53l1_tuningparm_offset_cal_dss_rate_mcps =
charlesmn 0:3ac96e360672 5297 pdev->offsetcal_cfg.dss_config__target_total_rate_mcps;
charlesmn 0:3ac96e360672 5298
charlesmn 0:3ac96e360672 5299 ptun_data->vl53l1_tuningparm_offset_cal_phasecal_timeout_us =
charlesmn 0:3ac96e360672 5300 pdev->offsetcal_cfg.phasecal_config_timeout_us;
charlesmn 0:3ac96e360672 5301
charlesmn 0:3ac96e360672 5302 ptun_data->vl53l1_tuningparm_offset_cal_mm_timeout_us =
charlesmn 0:3ac96e360672 5303 pdev->offsetcal_cfg.mm_config_timeout_us;
charlesmn 0:3ac96e360672 5304
charlesmn 0:3ac96e360672 5305 ptun_data->vl53l1_tuningparm_offset_cal_range_timeout_us =
charlesmn 0:3ac96e360672 5306 pdev->offsetcal_cfg.range_config_timeout_us;
charlesmn 0:3ac96e360672 5307
charlesmn 0:3ac96e360672 5308 ptun_data->vl53l1_tuningparm_offset_cal_pre_samples =
charlesmn 0:3ac96e360672 5309 pdev->offsetcal_cfg.pre_num_of_samples;
charlesmn 0:3ac96e360672 5310
charlesmn 0:3ac96e360672 5311 ptun_data->vl53l1_tuningparm_offset_cal_mm1_samples =
charlesmn 0:3ac96e360672 5312 pdev->offsetcal_cfg.mm1_num_of_samples;
charlesmn 0:3ac96e360672 5313
charlesmn 0:3ac96e360672 5314 ptun_data->vl53l1_tuningparm_offset_cal_mm2_samples =
charlesmn 0:3ac96e360672 5315 pdev->offsetcal_cfg.mm2_num_of_samples;
charlesmn 0:3ac96e360672 5316
charlesmn 0:3ac96e360672 5317 ptun_data->vl53l1_tuningparm_zone_cal_dss_rate_mcps =
charlesmn 0:3ac96e360672 5318 pdev->zonecal_cfg.dss_config__target_total_rate_mcps;
charlesmn 0:3ac96e360672 5319
charlesmn 0:3ac96e360672 5320 ptun_data->vl53l1_tuningparm_zone_cal_phasecal_timeout_us =
charlesmn 0:3ac96e360672 5321 pdev->zonecal_cfg.phasecal_config_timeout_us;
charlesmn 0:3ac96e360672 5322
charlesmn 0:3ac96e360672 5323 ptun_data->vl53l1_tuningparm_zone_cal_dss_timeout_us =
charlesmn 0:3ac96e360672 5324 pdev->zonecal_cfg.mm_config_timeout_us;
charlesmn 0:3ac96e360672 5325
charlesmn 0:3ac96e360672 5326 ptun_data->vl53l1_tuningparm_zone_cal_phasecal_num_samples =
charlesmn 0:3ac96e360672 5327 pdev->zonecal_cfg.phasecal_num_of_samples;
charlesmn 0:3ac96e360672 5328
charlesmn 0:3ac96e360672 5329 ptun_data->vl53l1_tuningparm_zone_cal_range_timeout_us =
charlesmn 0:3ac96e360672 5330 pdev->zonecal_cfg.range_config_timeout_us;
charlesmn 0:3ac96e360672 5331
charlesmn 0:3ac96e360672 5332 ptun_data->vl53l1_tuningparm_zone_cal_zone_num_samples =
charlesmn 0:3ac96e360672 5333 pdev->zonecal_cfg.zone_num_of_samples;
charlesmn 0:3ac96e360672 5334
charlesmn 0:3ac96e360672 5335 ptun_data->vl53l1_tuningparm_spadmap_vcsel_period =
charlesmn 0:3ac96e360672 5336 pdev->ssc_cfg.VL53L1_p_009;
charlesmn 0:3ac96e360672 5337
charlesmn 0:3ac96e360672 5338 ptun_data->vl53l1_tuningparm_spadmap_vcsel_start =
charlesmn 0:3ac96e360672 5339 pdev->ssc_cfg.vcsel_start;
charlesmn 0:3ac96e360672 5340
charlesmn 0:3ac96e360672 5341 ptun_data->vl53l1_tuningparm_spadmap_rate_limit_mcps =
charlesmn 0:3ac96e360672 5342 pdev->ssc_cfg.rate_limit_mcps;
charlesmn 0:3ac96e360672 5343
charlesmn 0:3ac96e360672 5344 ptun_data->vl53l1_tuningparm_lite_dss_config_target_total_rate_mcps =
charlesmn 0:3ac96e360672 5345 pdev->tuning_parms.tp_dss_target_lite_mcps;
charlesmn 0:3ac96e360672 5346
charlesmn 0:3ac96e360672 5347 ptun_data->vl53l1_tuningparm_ranging_dss_config_target_total_rate_mcps =
charlesmn 0:3ac96e360672 5348 pdev->tuning_parms.tp_dss_target_histo_mcps;
charlesmn 0:3ac96e360672 5349
charlesmn 0:3ac96e360672 5350 ptun_data->vl53l1_tuningparm_mz_dss_config_target_total_rate_mcps =
charlesmn 0:3ac96e360672 5351 pdev->tuning_parms.tp_dss_target_histo_mz_mcps;
charlesmn 0:3ac96e360672 5352
charlesmn 0:3ac96e360672 5353 ptun_data->vl53l1_tuningparm_timed_dss_config_target_total_rate_mcps =
charlesmn 0:3ac96e360672 5354 pdev->tuning_parms.tp_dss_target_timed_mcps;
charlesmn 0:3ac96e360672 5355
charlesmn 0:3ac96e360672 5356 ptun_data->vl53l1_tuningparm_lite_phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 5357 pdev->tuning_parms.tp_phasecal_timeout_lite_us;
charlesmn 0:3ac96e360672 5358
charlesmn 0:3ac96e360672 5359 ptun_data->vl53l1_tuningparm_ranging_long_phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 5360 pdev->tuning_parms.tp_phasecal_timeout_hist_long_us;
charlesmn 0:3ac96e360672 5361
charlesmn 0:3ac96e360672 5362 ptun_data->vl53l1_tuningparm_ranging_med_phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 5363 pdev->tuning_parms.tp_phasecal_timeout_hist_med_us;
charlesmn 0:3ac96e360672 5364
charlesmn 0:3ac96e360672 5365 ptun_data->vl53l1_tuningparm_ranging_short_phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 5366 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us;
charlesmn 0:3ac96e360672 5367
charlesmn 0:3ac96e360672 5368 ptun_data->vl53l1_tuningparm_mz_long_phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 5369 pdev->tuning_parms.tp_phasecal_timeout_mz_long_us;
charlesmn 0:3ac96e360672 5370
charlesmn 0:3ac96e360672 5371 ptun_data->vl53l1_tuningparm_mz_med_phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 5372 pdev->tuning_parms.tp_phasecal_timeout_mz_med_us;
charlesmn 0:3ac96e360672 5373
charlesmn 0:3ac96e360672 5374 ptun_data->vl53l1_tuningparm_mz_short_phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 5375 pdev->tuning_parms.tp_phasecal_timeout_mz_short_us;
charlesmn 0:3ac96e360672 5376
charlesmn 0:3ac96e360672 5377 ptun_data->vl53l1_tuningparm_timed_phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 5378 pdev->tuning_parms.tp_phasecal_timeout_timed_us;
charlesmn 0:3ac96e360672 5379
charlesmn 0:3ac96e360672 5380 ptun_data->vl53l1_tuningparm_lite_mm_config_timeout_us =
charlesmn 0:3ac96e360672 5381 pdev->tuning_parms.tp_mm_timeout_lite_us;
charlesmn 0:3ac96e360672 5382
charlesmn 0:3ac96e360672 5383 ptun_data->vl53l1_tuningparm_ranging_mm_config_timeout_us =
charlesmn 0:3ac96e360672 5384 pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn 0:3ac96e360672 5385
charlesmn 0:3ac96e360672 5386 ptun_data->vl53l1_tuningparm_mz_mm_config_timeout_us =
charlesmn 0:3ac96e360672 5387 pdev->tuning_parms.tp_mm_timeout_mz_us;
charlesmn 0:3ac96e360672 5388
charlesmn 0:3ac96e360672 5389 ptun_data->vl53l1_tuningparm_timed_mm_config_timeout_us =
charlesmn 0:3ac96e360672 5390 pdev->tuning_parms.tp_mm_timeout_timed_us;
charlesmn 0:3ac96e360672 5391
charlesmn 0:3ac96e360672 5392 ptun_data->vl53l1_tuningparm_lite_range_config_timeout_us =
charlesmn 0:3ac96e360672 5393 pdev->tuning_parms.tp_range_timeout_lite_us;
charlesmn 0:3ac96e360672 5394
charlesmn 0:3ac96e360672 5395 ptun_data->vl53l1_tuningparm_ranging_range_config_timeout_us =
charlesmn 0:3ac96e360672 5396 pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn 0:3ac96e360672 5397
charlesmn 0:3ac96e360672 5398 ptun_data->vl53l1_tuningparm_mz_range_config_timeout_us =
charlesmn 0:3ac96e360672 5399 pdev->tuning_parms.tp_range_timeout_mz_us;
charlesmn 0:3ac96e360672 5400
charlesmn 0:3ac96e360672 5401 ptun_data->vl53l1_tuningparm_timed_range_config_timeout_us =
charlesmn 0:3ac96e360672 5402 pdev->tuning_parms.tp_range_timeout_timed_us;
charlesmn 0:3ac96e360672 5403
charlesmn 0:3ac96e360672 5404 ptun_data->vl53l1_tuningparm_dynxtalk_smudge_margin =
charlesmn 0:3ac96e360672 5405 pdev->smudge_correct_config.smudge_margin;
charlesmn 0:3ac96e360672 5406
charlesmn 0:3ac96e360672 5407 ptun_data->vl53l1_tuningparm_dynxtalk_noise_margin =
charlesmn 0:3ac96e360672 5408 pdev->smudge_correct_config.noise_margin;
charlesmn 0:3ac96e360672 5409
charlesmn 0:3ac96e360672 5410 ptun_data->vl53l1_tuningparm_dynxtalk_xtalk_offset_limit =
charlesmn 0:3ac96e360672 5411 pdev->smudge_correct_config.user_xtalk_offset_limit;
charlesmn 0:3ac96e360672 5412
charlesmn 0:3ac96e360672 5413 ptun_data->vl53l1_tuningparm_dynxtalk_xtalk_offset_limit_hi =
charlesmn 0:3ac96e360672 5414 pdev->smudge_correct_config.user_xtalk_offset_limit_hi;
charlesmn 0:3ac96e360672 5415
charlesmn 0:3ac96e360672 5416 ptun_data->vl53l1_tuningparm_dynxtalk_sample_limit =
charlesmn 0:3ac96e360672 5417 pdev->smudge_correct_config.sample_limit;
charlesmn 0:3ac96e360672 5418
charlesmn 0:3ac96e360672 5419 ptun_data->vl53l1_tuningparm_dynxtalk_single_xtalk_delta =
charlesmn 0:3ac96e360672 5420 pdev->smudge_correct_config.single_xtalk_delta;
charlesmn 0:3ac96e360672 5421
charlesmn 0:3ac96e360672 5422 ptun_data->vl53l1_tuningparm_dynxtalk_averaged_xtalk_delta =
charlesmn 0:3ac96e360672 5423 pdev->smudge_correct_config.averaged_xtalk_delta;
charlesmn 0:3ac96e360672 5424
charlesmn 0:3ac96e360672 5425 ptun_data->vl53l1_tuningparm_dynxtalk_clip_limit =
charlesmn 0:3ac96e360672 5426 pdev->smudge_correct_config.smudge_corr_clip_limit;
charlesmn 0:3ac96e360672 5427
charlesmn 0:3ac96e360672 5428 ptun_data->vl53l1_tuningparm_dynxtalk_scaler_calc_method =
charlesmn 0:3ac96e360672 5429 pdev->smudge_correct_config.scaler_calc_method;
charlesmn 0:3ac96e360672 5430
charlesmn 0:3ac96e360672 5431 ptun_data->vl53l1_tuningparm_dynxtalk_xgradient_scaler =
charlesmn 0:3ac96e360672 5432 pdev->smudge_correct_config.x_gradient_scaler;
charlesmn 0:3ac96e360672 5433
charlesmn 0:3ac96e360672 5434 ptun_data->vl53l1_tuningparm_dynxtalk_ygradient_scaler =
charlesmn 0:3ac96e360672 5435 pdev->smudge_correct_config.y_gradient_scaler;
charlesmn 0:3ac96e360672 5436
charlesmn 0:3ac96e360672 5437 ptun_data->vl53l1_tuningparm_dynxtalk_user_scaler_set =
charlesmn 0:3ac96e360672 5438 pdev->smudge_correct_config.user_scaler_set;
charlesmn 0:3ac96e360672 5439
charlesmn 0:3ac96e360672 5440 ptun_data->vl53l1_tuningparm_dynxtalk_smudge_cor_single_apply =
charlesmn 0:3ac96e360672 5441 pdev->smudge_correct_config.smudge_corr_single_apply;
charlesmn 0:3ac96e360672 5442
charlesmn 0:3ac96e360672 5443 ptun_data->vl53l1_tuningparm_dynxtalk_xtalk_amb_threshold =
charlesmn 0:3ac96e360672 5444 pdev->smudge_correct_config.smudge_corr_ambient_threshold;
charlesmn 0:3ac96e360672 5445
charlesmn 0:3ac96e360672 5446 ptun_data->vl53l1_tuningparm_dynxtalk_nodetect_amb_threshold_kcps =
charlesmn 0:3ac96e360672 5447 pdev->smudge_correct_config.nodetect_ambient_threshold;
charlesmn 0:3ac96e360672 5448
charlesmn 0:3ac96e360672 5449 ptun_data->vl53l1_tuningparm_dynxtalk_nodetect_sample_limit =
charlesmn 0:3ac96e360672 5450 pdev->smudge_correct_config.nodetect_sample_limit;
charlesmn 0:3ac96e360672 5451
charlesmn 0:3ac96e360672 5452 ptun_data->vl53l1_tuningparm_dynxtalk_nodetect_xtalk_offset_kcps =
charlesmn 0:3ac96e360672 5453 pdev->smudge_correct_config.nodetect_xtalk_offset;
charlesmn 0:3ac96e360672 5454
charlesmn 0:3ac96e360672 5455 ptun_data->vl53l1_tuningparm_dynxtalk_nodetect_min_range_mm =
charlesmn 0:3ac96e360672 5456 pdev->smudge_correct_config.nodetect_min_range_mm;
charlesmn 0:3ac96e360672 5457
charlesmn 0:3ac96e360672 5458 ptun_data->vl53l1_tuningparm_lowpowerauto_vhv_loop_bound =
charlesmn 0:3ac96e360672 5459 pdev->low_power_auto_data.vhv_loop_bound;
charlesmn 0:3ac96e360672 5460
charlesmn 0:3ac96e360672 5461 ptun_data->vl53l1_tuningparm_lowpowerauto_mm_config_timeout_us =
charlesmn 0:3ac96e360672 5462 pdev->tuning_parms.tp_mm_timeout_lpa_us;
charlesmn 0:3ac96e360672 5463
charlesmn 0:3ac96e360672 5464 ptun_data->vl53l1_tuningparm_lowpowerauto_range_config_timeout_us =
charlesmn 0:3ac96e360672 5465 pdev->tuning_parms.tp_range_timeout_lpa_us;
charlesmn 0:3ac96e360672 5466
charlesmn 0:3ac96e360672 5467 ptun_data->vl53l1_tuningparm_very_short_dss_rate_mcps =
charlesmn 0:3ac96e360672 5468 pdev->tuning_parms.tp_dss_target_very_short_mcps;
charlesmn 0:3ac96e360672 5469
charlesmn 0:3ac96e360672 5470 ptun_data->vl53l1_tuningparm_phasecal_patch_power =
charlesmn 0:3ac96e360672 5471 pdev->tuning_parms.tp_phasecal_patch_power;
charlesmn 0:3ac96e360672 5472
charlesmn 0:3ac96e360672 5473 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 5474
charlesmn 0:3ac96e360672 5475 return status;
charlesmn 0:3ac96e360672 5476 }
charlesmn 0:3ac96e360672 5477
charlesmn 0:3ac96e360672 5478
charlesmn 0:3ac96e360672 5479
charlesmn 0:3ac96e360672 5480
charlesmn 0:3ac96e360672 5481
charlesmn 0:3ac96e360672 5482 VL53L1_Error VL53L1_get_tuning_parm(
charlesmn 0:3ac96e360672 5483 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 5484 VL53L1_TuningParms tuning_parm_key,
charlesmn 0:3ac96e360672 5485 int32_t *ptuning_parm_value)
charlesmn 0:3ac96e360672 5486 {
charlesmn 0:3ac96e360672 5487
charlesmn 0:3ac96e360672 5488
charlesmn 0:3ac96e360672 5489
charlesmn 0:3ac96e360672 5490 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 5491
charlesmn 0:3ac96e360672 5492 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 5493 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn 0:3ac96e360672 5494 VL53L1_xtalkextract_config_t *pXC = &(pdev->xtalk_extract_cfg);
charlesmn 0:3ac96e360672 5495
charlesmn 0:3ac96e360672 5496 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 5497
charlesmn 0:3ac96e360672 5498 switch (tuning_parm_key) {
charlesmn 0:3ac96e360672 5499
charlesmn 0:3ac96e360672 5500 case VL53L1_TUNINGPARM_VERSION:
charlesmn 0:3ac96e360672 5501 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5502 (int32_t)pdev->tuning_parms.tp_tuning_parm_version;
charlesmn 0:3ac96e360672 5503 break;
charlesmn 0:3ac96e360672 5504 case VL53L1_TUNINGPARM_KEY_TABLE_VERSION:
charlesmn 0:3ac96e360672 5505 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5506 (int32_t)pdev->tuning_parms.tp_tuning_parm_key_table_version;
charlesmn 0:3ac96e360672 5507 break;
charlesmn 0:3ac96e360672 5508 case VL53L1_TUNINGPARM_LLD_VERSION:
charlesmn 0:3ac96e360672 5509 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5510 (int32_t)pdev->tuning_parms.tp_tuning_parm_lld_version;
charlesmn 0:3ac96e360672 5511 break;
charlesmn 0:3ac96e360672 5512 case VL53L1_TUNINGPARM_HIST_ALGO_SELECT:
charlesmn 0:3ac96e360672 5513 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5514 (int32_t)pHP->hist_algo_select;
charlesmn 0:3ac96e360672 5515 break;
charlesmn 0:3ac96e360672 5516 case VL53L1_TUNINGPARM_HIST_TARGET_ORDER:
charlesmn 0:3ac96e360672 5517 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5518 (int32_t)pHP->hist_target_order;
charlesmn 0:3ac96e360672 5519 break;
charlesmn 0:3ac96e360672 5520 case VL53L1_TUNINGPARM_HIST_FILTER_WOI_0:
charlesmn 0:3ac96e360672 5521 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5522 (int32_t)pHP->filter_woi0;
charlesmn 0:3ac96e360672 5523 break;
charlesmn 0:3ac96e360672 5524 case VL53L1_TUNINGPARM_HIST_FILTER_WOI_1:
charlesmn 0:3ac96e360672 5525 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5526 (int32_t)pHP->filter_woi1;
charlesmn 0:3ac96e360672 5527 break;
charlesmn 0:3ac96e360672 5528 case VL53L1_TUNINGPARM_HIST_AMB_EST_METHOD:
charlesmn 0:3ac96e360672 5529 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5530 (int32_t)pHP->hist_amb_est_method;
charlesmn 0:3ac96e360672 5531 break;
charlesmn 0:3ac96e360672 5532 case VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_0:
charlesmn 0:3ac96e360672 5533 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5534 (int32_t)pHP->ambient_thresh_sigma0;
charlesmn 0:3ac96e360672 5535 break;
charlesmn 0:3ac96e360672 5536 case VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_1:
charlesmn 0:3ac96e360672 5537 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5538 (int32_t)pHP->ambient_thresh_sigma1;
charlesmn 0:3ac96e360672 5539 break;
charlesmn 0:3ac96e360672 5540 case VL53L1_TUNINGPARM_HIST_MIN_AMB_THRESH_EVENTS:
charlesmn 0:3ac96e360672 5541 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5542 (int32_t)pHP->min_ambient_thresh_events;
charlesmn 0:3ac96e360672 5543 break;
charlesmn 0:3ac96e360672 5544 case VL53L1_TUNINGPARM_HIST_AMB_EVENTS_SCALER:
charlesmn 0:3ac96e360672 5545 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5546 (int32_t)pHP->ambient_thresh_events_scaler;
charlesmn 0:3ac96e360672 5547 break;
charlesmn 0:3ac96e360672 5548 case VL53L1_TUNINGPARM_HIST_NOISE_THRESHOLD:
charlesmn 0:3ac96e360672 5549 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5550 (int32_t)pHP->noise_threshold;
charlesmn 0:3ac96e360672 5551 break;
charlesmn 0:3ac96e360672 5552 case VL53L1_TUNINGPARM_HIST_SIGNAL_TOTAL_EVENTS_LIMIT:
charlesmn 0:3ac96e360672 5553 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5554 (int32_t)pHP->signal_total_events_limit;
charlesmn 0:3ac96e360672 5555 break;
charlesmn 0:3ac96e360672 5556 case VL53L1_TUNINGPARM_HIST_SIGMA_EST_REF_MM:
charlesmn 0:3ac96e360672 5557 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5558 (int32_t)pHP->sigma_estimator__sigma_ref_mm;
charlesmn 0:3ac96e360672 5559 break;
charlesmn 0:3ac96e360672 5560 case VL53L1_TUNINGPARM_HIST_SIGMA_THRESH_MM:
charlesmn 0:3ac96e360672 5561 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5562 (int32_t)pHP->sigma_thresh;
charlesmn 0:3ac96e360672 5563 break;
charlesmn 0:3ac96e360672 5564 case VL53L1_TUNINGPARM_HIST_GAIN_FACTOR:
charlesmn 0:3ac96e360672 5565 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5566 (int32_t)pdev->gain_cal.histogram_ranging_gain_factor;
charlesmn 0:3ac96e360672 5567 break;
charlesmn 0:3ac96e360672 5568 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_PHASE_TOLERANCE:
charlesmn 0:3ac96e360672 5569 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5570 (int32_t)pHP->algo__consistency_check__phase_tolerance;
charlesmn 0:3ac96e360672 5571 break;
charlesmn 0:3ac96e360672 5572 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_MIN_MAX_TOLERANCE_MM:
charlesmn 0:3ac96e360672 5573 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5574 (int32_t)pHP->algo__consistency_check__min_max_tolerance;
charlesmn 0:3ac96e360672 5575 break;
charlesmn 0:3ac96e360672 5576 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA:
charlesmn 0:3ac96e360672 5577 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5578 (int32_t)pHP->algo__consistency_check__event_sigma;
charlesmn 0:3ac96e360672 5579 break;
charlesmn 0:3ac96e360672 5580 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_MIN_SPAD_LIMIT:
charlesmn 0:3ac96e360672 5581 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5582 (int32_t)pHP->algo__consistency_check__event_min_spad_count;
charlesmn 0:3ac96e360672 5583 break;
charlesmn 0:3ac96e360672 5584 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_LONG_RANGE:
charlesmn 0:3ac96e360672 5585 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5586 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_hist_long;
charlesmn 0:3ac96e360672 5587 break;
charlesmn 0:3ac96e360672 5588 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_MED_RANGE:
charlesmn 0:3ac96e360672 5589 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5590 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_hist_med;
charlesmn 0:3ac96e360672 5591 break;
charlesmn 0:3ac96e360672 5592 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_SHORT_RANGE:
charlesmn 0:3ac96e360672 5593 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5594 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_hist_short;
charlesmn 0:3ac96e360672 5595 break;
charlesmn 0:3ac96e360672 5596 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_LONG_RANGE:
charlesmn 0:3ac96e360672 5597 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5598 (int32_t)pdev->tuning_parms.tp_init_phase_ref_hist_long;
charlesmn 0:3ac96e360672 5599 break;
charlesmn 0:3ac96e360672 5600 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_MED_RANGE:
charlesmn 0:3ac96e360672 5601 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5602 (int32_t)pdev->tuning_parms.tp_init_phase_ref_hist_med;
charlesmn 0:3ac96e360672 5603 break;
charlesmn 0:3ac96e360672 5604 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_SHORT_RANGE:
charlesmn 0:3ac96e360672 5605 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5606 (int32_t)pdev->tuning_parms.tp_init_phase_ref_hist_short;
charlesmn 0:3ac96e360672 5607 break;
charlesmn 0:3ac96e360672 5608 case VL53L1_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM:
charlesmn 0:3ac96e360672 5609 *ptuning_parm_value = (int32_t)(
charlesmn 0:3ac96e360672 5610 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm);
charlesmn 0:3ac96e360672 5611 break;
charlesmn 0:3ac96e360672 5612 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM:
charlesmn 0:3ac96e360672 5613 *ptuning_parm_value = (int32_t)(
charlesmn 0:3ac96e360672 5614 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm);
charlesmn 0:3ac96e360672 5615 break;
charlesmn 0:3ac96e360672 5616 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM:
charlesmn 0:3ac96e360672 5617 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5618 (int32_t)pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm;
charlesmn 0:3ac96e360672 5619 break;
charlesmn 0:3ac96e360672 5620 case VL53L1_TUNINGPARM_XTALK_DETECT_MIN_MAX_TOLERANCE:
charlesmn 0:3ac96e360672 5621 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5622 (int32_t)pHP->algo__crosstalk_detect_min_max_tolerance;
charlesmn 0:3ac96e360672 5623 break;
charlesmn 0:3ac96e360672 5624 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS:
charlesmn 0:3ac96e360672 5625 *ptuning_parm_value = (int32_t)(
charlesmn 0:3ac96e360672 5626 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps);
charlesmn 0:3ac96e360672 5627 break;
charlesmn 0:3ac96e360672 5628 case VL53L1_TUNINGPARM_XTALK_DETECT_EVENT_SIGMA:
charlesmn 0:3ac96e360672 5629 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5630 (int32_t)pHP->algo__crosstalk_detect_event_sigma;
charlesmn 0:3ac96e360672 5631 break;
charlesmn 0:3ac96e360672 5632 case VL53L1_TUNINGPARM_HIST_XTALK_MARGIN_KCPS:
charlesmn 0:3ac96e360672 5633 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5634 (int32_t)pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps;
charlesmn 0:3ac96e360672 5635 break;
charlesmn 0:3ac96e360672 5636 case VL53L1_TUNINGPARM_CONSISTENCY_LITE_PHASE_TOLERANCE:
charlesmn 0:3ac96e360672 5637 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5638 (int32_t)pdev->tuning_parms.tp_consistency_lite_phase_tolerance;
charlesmn 0:3ac96e360672 5639 break;
charlesmn 0:3ac96e360672 5640 case VL53L1_TUNINGPARM_PHASECAL_TARGET:
charlesmn 0:3ac96e360672 5641 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5642 (int32_t)pdev->tuning_parms.tp_phasecal_target;
charlesmn 0:3ac96e360672 5643 break;
charlesmn 0:3ac96e360672 5644 case VL53L1_TUNINGPARM_LITE_CAL_REPEAT_RATE:
charlesmn 0:3ac96e360672 5645 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5646 (int32_t)pdev->tuning_parms.tp_cal_repeat_rate;
charlesmn 0:3ac96e360672 5647 break;
charlesmn 0:3ac96e360672 5648 case VL53L1_TUNINGPARM_LITE_RANGING_GAIN_FACTOR:
charlesmn 0:3ac96e360672 5649 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5650 (int32_t)pdev->gain_cal.standard_ranging_gain_factor;
charlesmn 0:3ac96e360672 5651 break;
charlesmn 0:3ac96e360672 5652 case VL53L1_TUNINGPARM_LITE_MIN_CLIP_MM:
charlesmn 0:3ac96e360672 5653 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5654 (int32_t)pdev->tuning_parms.tp_lite_min_clip;
charlesmn 0:3ac96e360672 5655 break;
charlesmn 0:3ac96e360672 5656 case VL53L1_TUNINGPARM_LITE_LONG_SIGMA_THRESH_MM:
charlesmn 0:3ac96e360672 5657 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5658 (int32_t)pdev->tuning_parms.tp_lite_long_sigma_thresh_mm;
charlesmn 0:3ac96e360672 5659 break;
charlesmn 0:3ac96e360672 5660 case VL53L1_TUNINGPARM_LITE_MED_SIGMA_THRESH_MM:
charlesmn 0:3ac96e360672 5661 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5662 (int32_t)pdev->tuning_parms.tp_lite_med_sigma_thresh_mm;
charlesmn 0:3ac96e360672 5663 break;
charlesmn 0:3ac96e360672 5664 case VL53L1_TUNINGPARM_LITE_SHORT_SIGMA_THRESH_MM:
charlesmn 0:3ac96e360672 5665 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5666 (int32_t)pdev->tuning_parms.tp_lite_short_sigma_thresh_mm;
charlesmn 0:3ac96e360672 5667 break;
charlesmn 0:3ac96e360672 5668 case VL53L1_TUNINGPARM_LITE_LONG_MIN_COUNT_RATE_RTN_MCPS:
charlesmn 0:3ac96e360672 5669 *ptuning_parm_value = (int32_t)(
charlesmn 0:3ac96e360672 5670 pdev->tuning_parms.tp_lite_long_min_count_rate_rtn_mcps);
charlesmn 0:3ac96e360672 5671 break;
charlesmn 0:3ac96e360672 5672 case VL53L1_TUNINGPARM_LITE_MED_MIN_COUNT_RATE_RTN_MCPS:
charlesmn 0:3ac96e360672 5673 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5674 (int32_t)pdev->tuning_parms.tp_lite_med_min_count_rate_rtn_mcps;
charlesmn 0:3ac96e360672 5675 break;
charlesmn 0:3ac96e360672 5676 case VL53L1_TUNINGPARM_LITE_SHORT_MIN_COUNT_RATE_RTN_MCPS:
charlesmn 0:3ac96e360672 5677 *ptuning_parm_value = (int32_t)(
charlesmn 0:3ac96e360672 5678 pdev->tuning_parms.tp_lite_short_min_count_rate_rtn_mcps);
charlesmn 0:3ac96e360672 5679 break;
charlesmn 0:3ac96e360672 5680 case VL53L1_TUNINGPARM_LITE_SIGMA_EST_PULSE_WIDTH:
charlesmn 0:3ac96e360672 5681 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5682 (int32_t)pdev->tuning_parms.tp_lite_sigma_est_pulse_width_ns;
charlesmn 0:3ac96e360672 5683 break;
charlesmn 0:3ac96e360672 5684 case VL53L1_TUNINGPARM_LITE_SIGMA_EST_AMB_WIDTH_NS:
charlesmn 0:3ac96e360672 5685 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5686 (int32_t)pdev->tuning_parms.tp_lite_sigma_est_amb_width_ns;
charlesmn 0:3ac96e360672 5687 break;
charlesmn 0:3ac96e360672 5688 case VL53L1_TUNINGPARM_LITE_SIGMA_REF_MM:
charlesmn 0:3ac96e360672 5689 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5690 (int32_t)pdev->tuning_parms.tp_lite_sigma_ref_mm;
charlesmn 0:3ac96e360672 5691 break;
charlesmn 0:3ac96e360672 5692 case VL53L1_TUNINGPARM_LITE_RIT_MULT:
charlesmn 0:3ac96e360672 5693 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5694 (int32_t)pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult;
charlesmn 0:3ac96e360672 5695 break;
charlesmn 0:3ac96e360672 5696 case VL53L1_TUNINGPARM_LITE_SEED_CONFIG:
charlesmn 0:3ac96e360672 5697 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5698 (int32_t)pdev->tuning_parms.tp_lite_seed_cfg;
charlesmn 0:3ac96e360672 5699 break;
charlesmn 0:3ac96e360672 5700 case VL53L1_TUNINGPARM_LITE_QUANTIFIER:
charlesmn 0:3ac96e360672 5701 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5702 (int32_t)pdev->tuning_parms.tp_lite_quantifier;
charlesmn 0:3ac96e360672 5703 break;
charlesmn 0:3ac96e360672 5704 case VL53L1_TUNINGPARM_LITE_FIRST_ORDER_SELECT:
charlesmn 0:3ac96e360672 5705 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5706 (int32_t)pdev->tuning_parms.tp_lite_first_order_select;
charlesmn 0:3ac96e360672 5707 break;
charlesmn 0:3ac96e360672 5708 case VL53L1_TUNINGPARM_LITE_XTALK_MARGIN_KCPS:
charlesmn 0:3ac96e360672 5709 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5710 (int32_t)pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps;
charlesmn 0:3ac96e360672 5711 break;
charlesmn 0:3ac96e360672 5712 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_LONG_RANGE:
charlesmn 0:3ac96e360672 5713 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5714 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_lite_long;
charlesmn 0:3ac96e360672 5715 break;
charlesmn 0:3ac96e360672 5716 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_MED_RANGE:
charlesmn 0:3ac96e360672 5717 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5718 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_lite_med;
charlesmn 0:3ac96e360672 5719 break;
charlesmn 0:3ac96e360672 5720 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_SHORT_RANGE:
charlesmn 0:3ac96e360672 5721 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5722 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_lite_short;
charlesmn 0:3ac96e360672 5723 break;
charlesmn 0:3ac96e360672 5724 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_LONG_RANGE:
charlesmn 0:3ac96e360672 5725 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5726 (int32_t)pdev->tuning_parms.tp_init_phase_ref_lite_long;
charlesmn 0:3ac96e360672 5727 break;
charlesmn 0:3ac96e360672 5728 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_MED_RANGE:
charlesmn 0:3ac96e360672 5729 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5730 (int32_t)pdev->tuning_parms.tp_init_phase_ref_lite_med;
charlesmn 0:3ac96e360672 5731 break;
charlesmn 0:3ac96e360672 5732 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_SHORT_RANGE:
charlesmn 0:3ac96e360672 5733 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5734 (int32_t)pdev->tuning_parms.tp_init_phase_ref_lite_short;
charlesmn 0:3ac96e360672 5735 break;
charlesmn 0:3ac96e360672 5736 case VL53L1_TUNINGPARM_TIMED_SEED_CONFIG:
charlesmn 0:3ac96e360672 5737 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5738 (int32_t)pdev->tuning_parms.tp_timed_seed_cfg;
charlesmn 0:3ac96e360672 5739 break;
charlesmn 0:3ac96e360672 5740 case VL53L1_TUNINGPARM_DMAX_CFG_SIGNAL_THRESH_SIGMA:
charlesmn 0:3ac96e360672 5741 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5742 (int32_t)pdev->dmax_cfg.signal_thresh_sigma;
charlesmn 0:3ac96e360672 5743 break;
charlesmn 0:3ac96e360672 5744 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_0:
charlesmn 0:3ac96e360672 5745 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5746 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[0];
charlesmn 0:3ac96e360672 5747 break;
charlesmn 0:3ac96e360672 5748 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_1:
charlesmn 0:3ac96e360672 5749 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5750 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[1];
charlesmn 0:3ac96e360672 5751 break;
charlesmn 0:3ac96e360672 5752 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_2:
charlesmn 0:3ac96e360672 5753 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5754 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[2];
charlesmn 0:3ac96e360672 5755 break;
charlesmn 0:3ac96e360672 5756 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_3:
charlesmn 0:3ac96e360672 5757 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5758 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[3];
charlesmn 0:3ac96e360672 5759 break;
charlesmn 0:3ac96e360672 5760 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_4:
charlesmn 0:3ac96e360672 5761 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5762 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[4];
charlesmn 0:3ac96e360672 5763 break;
charlesmn 0:3ac96e360672 5764 case VL53L1_TUNINGPARM_VHV_LOOPBOUND:
charlesmn 0:3ac96e360672 5765 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5766 (int32_t)pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound;
charlesmn 0:3ac96e360672 5767 break;
charlesmn 0:3ac96e360672 5768 case VL53L1_TUNINGPARM_REFSPADCHAR_DEVICE_TEST_MODE:
charlesmn 0:3ac96e360672 5769 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5770 (int32_t)pdev->refspadchar.device_test_mode;
charlesmn 0:3ac96e360672 5771 break;
charlesmn 0:3ac96e360672 5772 case VL53L1_TUNINGPARM_REFSPADCHAR_VCSEL_PERIOD:
charlesmn 0:3ac96e360672 5773 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5774 (int32_t)pdev->refspadchar.VL53L1_p_009;
charlesmn 0:3ac96e360672 5775 break;
charlesmn 0:3ac96e360672 5776 case VL53L1_TUNINGPARM_REFSPADCHAR_PHASECAL_TIMEOUT_US:
charlesmn 0:3ac96e360672 5777 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5778 (int32_t)pdev->refspadchar.timeout_us;
charlesmn 0:3ac96e360672 5779 break;
charlesmn 0:3ac96e360672 5780 case VL53L1_TUNINGPARM_REFSPADCHAR_TARGET_COUNT_RATE_MCPS:
charlesmn 0:3ac96e360672 5781 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5782 (int32_t)pdev->refspadchar.target_count_rate_mcps;
charlesmn 0:3ac96e360672 5783 break;
charlesmn 0:3ac96e360672 5784 case VL53L1_TUNINGPARM_REFSPADCHAR_MIN_COUNTRATE_LIMIT_MCPS:
charlesmn 0:3ac96e360672 5785 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5786 (int32_t)pdev->refspadchar.min_count_rate_limit_mcps;
charlesmn 0:3ac96e360672 5787 break;
charlesmn 0:3ac96e360672 5788 case VL53L1_TUNINGPARM_REFSPADCHAR_MAX_COUNTRATE_LIMIT_MCPS:
charlesmn 0:3ac96e360672 5789 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5790 (int32_t)pdev->refspadchar.max_count_rate_limit_mcps;
charlesmn 0:3ac96e360672 5791 break;
charlesmn 0:3ac96e360672 5792 case VL53L1_TUNINGPARM_XTALK_EXTRACT_NUM_OF_SAMPLES:
charlesmn 0:3ac96e360672 5793 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5794 (int32_t)pXC->num_of_samples;
charlesmn 0:3ac96e360672 5795 break;
charlesmn 0:3ac96e360672 5796 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MIN_FILTER_THRESH_MM:
charlesmn 0:3ac96e360672 5797 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5798 (int32_t)pXC->algo__crosstalk_extract_min_valid_range_mm;
charlesmn 0:3ac96e360672 5799 break;
charlesmn 0:3ac96e360672 5800 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_FILTER_THRESH_MM:
charlesmn 0:3ac96e360672 5801 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5802 (int32_t)pXC->algo__crosstalk_extract_max_valid_range_mm;
charlesmn 0:3ac96e360672 5803 break;
charlesmn 0:3ac96e360672 5804 case VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_RATE_MCPS:
charlesmn 0:3ac96e360672 5805 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5806 (int32_t)pXC->dss_config__target_total_rate_mcps;
charlesmn 0:3ac96e360672 5807 break;
charlesmn 0:3ac96e360672 5808 case VL53L1_TUNINGPARM_XTALK_EXTRACT_PHASECAL_TIMEOUT_US:
charlesmn 0:3ac96e360672 5809 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5810 (int32_t)pXC->phasecal_config_timeout_us;
charlesmn 0:3ac96e360672 5811 break;
charlesmn 0:3ac96e360672 5812 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_VALID_RATE_KCPS:
charlesmn 0:3ac96e360672 5813 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5814 (int32_t)pXC->algo__crosstalk_extract_max_valid_rate_kcps;
charlesmn 0:3ac96e360672 5815 break;
charlesmn 0:3ac96e360672 5816 case VL53L1_TUNINGPARM_XTALK_EXTRACT_SIGMA_THRESHOLD_MM:
charlesmn 0:3ac96e360672 5817 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5818 (int32_t)pXC->algo__crosstalk_extract_max_sigma_mm;
charlesmn 0:3ac96e360672 5819 break;
charlesmn 0:3ac96e360672 5820 case VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_TIMEOUT_US:
charlesmn 0:3ac96e360672 5821 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5822 (int32_t)pXC->mm_config_timeout_us;
charlesmn 0:3ac96e360672 5823 break;
charlesmn 0:3ac96e360672 5824 case VL53L1_TUNINGPARM_XTALK_EXTRACT_BIN_TIMEOUT_US:
charlesmn 0:3ac96e360672 5825 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5826 (int32_t)pXC->range_config_timeout_us;
charlesmn 0:3ac96e360672 5827 break;
charlesmn 0:3ac96e360672 5828 case VL53L1_TUNINGPARM_OFFSET_CAL_DSS_RATE_MCPS:
charlesmn 0:3ac96e360672 5829 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5830 (int32_t)pdev->offsetcal_cfg.dss_config__target_total_rate_mcps;
charlesmn 0:3ac96e360672 5831 break;
charlesmn 0:3ac96e360672 5832 case VL53L1_TUNINGPARM_OFFSET_CAL_PHASECAL_TIMEOUT_US:
charlesmn 0:3ac96e360672 5833 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5834 (int32_t)pdev->offsetcal_cfg.phasecal_config_timeout_us;
charlesmn 0:3ac96e360672 5835 break;
charlesmn 0:3ac96e360672 5836 case VL53L1_TUNINGPARM_OFFSET_CAL_MM_TIMEOUT_US:
charlesmn 0:3ac96e360672 5837 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5838 (int32_t)pdev->offsetcal_cfg.mm_config_timeout_us;
charlesmn 0:3ac96e360672 5839 break;
charlesmn 0:3ac96e360672 5840 case VL53L1_TUNINGPARM_OFFSET_CAL_RANGE_TIMEOUT_US:
charlesmn 0:3ac96e360672 5841 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5842 (int32_t)pdev->offsetcal_cfg.range_config_timeout_us;
charlesmn 0:3ac96e360672 5843 break;
charlesmn 0:3ac96e360672 5844 case VL53L1_TUNINGPARM_OFFSET_CAL_PRE_SAMPLES:
charlesmn 0:3ac96e360672 5845 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5846 (int32_t)pdev->offsetcal_cfg.pre_num_of_samples;
charlesmn 0:3ac96e360672 5847 break;
charlesmn 0:3ac96e360672 5848 case VL53L1_TUNINGPARM_OFFSET_CAL_MM1_SAMPLES:
charlesmn 0:3ac96e360672 5849 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5850 (int32_t)pdev->offsetcal_cfg.mm1_num_of_samples;
charlesmn 0:3ac96e360672 5851 break;
charlesmn 0:3ac96e360672 5852 case VL53L1_TUNINGPARM_OFFSET_CAL_MM2_SAMPLES:
charlesmn 0:3ac96e360672 5853 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5854 (int32_t)pdev->offsetcal_cfg.mm2_num_of_samples;
charlesmn 0:3ac96e360672 5855 break;
charlesmn 0:3ac96e360672 5856 case VL53L1_TUNINGPARM_ZONE_CAL_DSS_RATE_MCPS:
charlesmn 0:3ac96e360672 5857 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5858 (int32_t)pdev->zonecal_cfg.dss_config__target_total_rate_mcps;
charlesmn 0:3ac96e360672 5859 break;
charlesmn 0:3ac96e360672 5860 case VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_TIMEOUT_US:
charlesmn 0:3ac96e360672 5861 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5862 (int32_t)pdev->zonecal_cfg.phasecal_config_timeout_us;
charlesmn 0:3ac96e360672 5863 break;
charlesmn 0:3ac96e360672 5864 case VL53L1_TUNINGPARM_ZONE_CAL_DSS_TIMEOUT_US:
charlesmn 0:3ac96e360672 5865 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5866 (int32_t)pdev->zonecal_cfg.mm_config_timeout_us;
charlesmn 0:3ac96e360672 5867 break;
charlesmn 0:3ac96e360672 5868 case VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_NUM_SAMPLES:
charlesmn 0:3ac96e360672 5869 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5870 (int32_t)pdev->zonecal_cfg.phasecal_num_of_samples;
charlesmn 0:3ac96e360672 5871 break;
charlesmn 0:3ac96e360672 5872 case VL53L1_TUNINGPARM_ZONE_CAL_RANGE_TIMEOUT_US:
charlesmn 0:3ac96e360672 5873 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5874 (int32_t)pdev->zonecal_cfg.range_config_timeout_us;
charlesmn 0:3ac96e360672 5875 break;
charlesmn 0:3ac96e360672 5876 case VL53L1_TUNINGPARM_ZONE_CAL_ZONE_NUM_SAMPLES:
charlesmn 0:3ac96e360672 5877 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5878 (int32_t)pdev->zonecal_cfg.zone_num_of_samples;
charlesmn 0:3ac96e360672 5879 break;
charlesmn 0:3ac96e360672 5880 case VL53L1_TUNINGPARM_SPADMAP_VCSEL_PERIOD:
charlesmn 0:3ac96e360672 5881 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5882 (int32_t)pdev->ssc_cfg.VL53L1_p_009;
charlesmn 0:3ac96e360672 5883 break;
charlesmn 0:3ac96e360672 5884 case VL53L1_TUNINGPARM_SPADMAP_VCSEL_START:
charlesmn 0:3ac96e360672 5885 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5886 (int32_t)pdev->ssc_cfg.vcsel_start;
charlesmn 0:3ac96e360672 5887 break;
charlesmn 0:3ac96e360672 5888 case VL53L1_TUNINGPARM_SPADMAP_RATE_LIMIT_MCPS:
charlesmn 0:3ac96e360672 5889 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5890 (int32_t)pdev->ssc_cfg.rate_limit_mcps;
charlesmn 0:3ac96e360672 5891 break;
charlesmn 0:3ac96e360672 5892 case VL53L1_TUNINGPARM_LITE_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn 0:3ac96e360672 5893 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5894 (int32_t)pdev->tuning_parms.tp_dss_target_lite_mcps;
charlesmn 0:3ac96e360672 5895 break;
charlesmn 0:3ac96e360672 5896 case VL53L1_TUNINGPARM_RANGING_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn 0:3ac96e360672 5897 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5898 (int32_t)pdev->tuning_parms.tp_dss_target_histo_mcps;
charlesmn 0:3ac96e360672 5899 break;
charlesmn 0:3ac96e360672 5900 case VL53L1_TUNINGPARM_MZ_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn 0:3ac96e360672 5901 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5902 (int32_t)pdev->tuning_parms.tp_dss_target_histo_mz_mcps;
charlesmn 0:3ac96e360672 5903 break;
charlesmn 0:3ac96e360672 5904 case VL53L1_TUNINGPARM_TIMED_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn 0:3ac96e360672 5905 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5906 (int32_t)pdev->tuning_parms.tp_dss_target_timed_mcps;
charlesmn 0:3ac96e360672 5907 break;
charlesmn 0:3ac96e360672 5908 case VL53L1_TUNINGPARM_LITE_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5909 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5910 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_lite_us;
charlesmn 0:3ac96e360672 5911 break;
charlesmn 0:3ac96e360672 5912 case VL53L1_TUNINGPARM_RANGING_LONG_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5913 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5914 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_hist_long_us;
charlesmn 0:3ac96e360672 5915 break;
charlesmn 0:3ac96e360672 5916 case VL53L1_TUNINGPARM_RANGING_MED_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5917 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5918 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_hist_med_us;
charlesmn 0:3ac96e360672 5919 break;
charlesmn 0:3ac96e360672 5920 case VL53L1_TUNINGPARM_RANGING_SHORT_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5921 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5922 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_hist_short_us;
charlesmn 0:3ac96e360672 5923 break;
charlesmn 0:3ac96e360672 5924 case VL53L1_TUNINGPARM_MZ_LONG_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5925 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5926 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_mz_long_us;
charlesmn 0:3ac96e360672 5927 break;
charlesmn 0:3ac96e360672 5928 case VL53L1_TUNINGPARM_MZ_MED_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5929 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5930 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_mz_med_us;
charlesmn 0:3ac96e360672 5931 break;
charlesmn 0:3ac96e360672 5932 case VL53L1_TUNINGPARM_MZ_SHORT_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5933 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5934 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_mz_short_us;
charlesmn 0:3ac96e360672 5935 break;
charlesmn 0:3ac96e360672 5936 case VL53L1_TUNINGPARM_TIMED_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5937 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5938 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_timed_us;
charlesmn 0:3ac96e360672 5939 break;
charlesmn 0:3ac96e360672 5940 case VL53L1_TUNINGPARM_LITE_MM_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5941 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5942 (int32_t)pdev->tuning_parms.tp_mm_timeout_lite_us;
charlesmn 0:3ac96e360672 5943 break;
charlesmn 0:3ac96e360672 5944 case VL53L1_TUNINGPARM_RANGING_MM_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5945 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5946 (int32_t)pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn 0:3ac96e360672 5947 break;
charlesmn 0:3ac96e360672 5948 case VL53L1_TUNINGPARM_MZ_MM_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5949 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5950 (int32_t)pdev->tuning_parms.tp_mm_timeout_mz_us;
charlesmn 0:3ac96e360672 5951 break;
charlesmn 0:3ac96e360672 5952 case VL53L1_TUNINGPARM_TIMED_MM_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5953 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5954 (int32_t)pdev->tuning_parms.tp_mm_timeout_timed_us;
charlesmn 0:3ac96e360672 5955 break;
charlesmn 0:3ac96e360672 5956 case VL53L1_TUNINGPARM_LITE_RANGE_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5957 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5958 (int32_t)pdev->tuning_parms.tp_range_timeout_lite_us;
charlesmn 0:3ac96e360672 5959 break;
charlesmn 0:3ac96e360672 5960 case VL53L1_TUNINGPARM_RANGING_RANGE_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5961 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5962 (int32_t)pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn 0:3ac96e360672 5963 break;
charlesmn 0:3ac96e360672 5964 case VL53L1_TUNINGPARM_MZ_RANGE_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5965 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5966 (int32_t)pdev->tuning_parms.tp_range_timeout_mz_us;
charlesmn 0:3ac96e360672 5967 break;
charlesmn 0:3ac96e360672 5968 case VL53L1_TUNINGPARM_TIMED_RANGE_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 5969 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5970 (int32_t)pdev->tuning_parms.tp_range_timeout_timed_us;
charlesmn 0:3ac96e360672 5971 break;
charlesmn 0:3ac96e360672 5972 case VL53L1_TUNINGPARM_DYNXTALK_SMUDGE_MARGIN:
charlesmn 0:3ac96e360672 5973 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5974 (int32_t)pdev->smudge_correct_config.smudge_margin;
charlesmn 0:3ac96e360672 5975 break;
charlesmn 0:3ac96e360672 5976 case VL53L1_TUNINGPARM_DYNXTALK_NOISE_MARGIN:
charlesmn 0:3ac96e360672 5977 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5978 (int32_t)pdev->smudge_correct_config.noise_margin;
charlesmn 0:3ac96e360672 5979 break;
charlesmn 0:3ac96e360672 5980 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT:
charlesmn 0:3ac96e360672 5981 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5982 (int32_t)pdev->smudge_correct_config.user_xtalk_offset_limit;
charlesmn 0:3ac96e360672 5983 break;
charlesmn 0:3ac96e360672 5984 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT_HI:
charlesmn 0:3ac96e360672 5985 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5986 (int32_t)pdev->smudge_correct_config.user_xtalk_offset_limit_hi;
charlesmn 0:3ac96e360672 5987 break;
charlesmn 0:3ac96e360672 5988 case VL53L1_TUNINGPARM_DYNXTALK_SAMPLE_LIMIT:
charlesmn 0:3ac96e360672 5989 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5990 (int32_t)pdev->smudge_correct_config.sample_limit;
charlesmn 0:3ac96e360672 5991 break;
charlesmn 0:3ac96e360672 5992 case VL53L1_TUNINGPARM_DYNXTALK_SINGLE_XTALK_DELTA:
charlesmn 0:3ac96e360672 5993 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5994 (int32_t)pdev->smudge_correct_config.single_xtalk_delta;
charlesmn 0:3ac96e360672 5995 break;
charlesmn 0:3ac96e360672 5996 case VL53L1_TUNINGPARM_DYNXTALK_AVERAGED_XTALK_DELTA:
charlesmn 0:3ac96e360672 5997 *ptuning_parm_value =
charlesmn 0:3ac96e360672 5998 (int32_t)pdev->smudge_correct_config.averaged_xtalk_delta;
charlesmn 0:3ac96e360672 5999 break;
charlesmn 0:3ac96e360672 6000 case VL53L1_TUNINGPARM_DYNXTALK_CLIP_LIMIT:
charlesmn 0:3ac96e360672 6001 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6002 (int32_t)pdev->smudge_correct_config.smudge_corr_clip_limit;
charlesmn 0:3ac96e360672 6003 break;
charlesmn 0:3ac96e360672 6004 case VL53L1_TUNINGPARM_DYNXTALK_SCALER_CALC_METHOD:
charlesmn 0:3ac96e360672 6005 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6006 (int32_t)pdev->smudge_correct_config.scaler_calc_method;
charlesmn 0:3ac96e360672 6007 break;
charlesmn 0:3ac96e360672 6008 case VL53L1_TUNINGPARM_DYNXTALK_XGRADIENT_SCALER:
charlesmn 0:3ac96e360672 6009 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6010 (int32_t)pdev->smudge_correct_config.x_gradient_scaler;
charlesmn 0:3ac96e360672 6011 break;
charlesmn 0:3ac96e360672 6012 case VL53L1_TUNINGPARM_DYNXTALK_YGRADIENT_SCALER:
charlesmn 0:3ac96e360672 6013 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6014 (int32_t)pdev->smudge_correct_config.y_gradient_scaler;
charlesmn 0:3ac96e360672 6015 break;
charlesmn 0:3ac96e360672 6016 case VL53L1_TUNINGPARM_DYNXTALK_USER_SCALER_SET:
charlesmn 0:3ac96e360672 6017 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6018 (int32_t)pdev->smudge_correct_config.user_scaler_set;
charlesmn 0:3ac96e360672 6019 break;
charlesmn 0:3ac96e360672 6020 case VL53L1_TUNINGPARM_DYNXTALK_SMUDGE_COR_SINGLE_APPLY:
charlesmn 0:3ac96e360672 6021 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6022 (int32_t)pdev->smudge_correct_config.smudge_corr_single_apply;
charlesmn 0:3ac96e360672 6023 break;
charlesmn 0:3ac96e360672 6024 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_AMB_THRESHOLD:
charlesmn 0:3ac96e360672 6025 *ptuning_parm_value = (int32_t)(
charlesmn 0:3ac96e360672 6026 pdev->smudge_correct_config.smudge_corr_ambient_threshold);
charlesmn 0:3ac96e360672 6027 break;
charlesmn 0:3ac96e360672 6028 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_AMB_THRESHOLD_KCPS:
charlesmn 0:3ac96e360672 6029 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6030 (int32_t)pdev->smudge_correct_config.nodetect_ambient_threshold;
charlesmn 0:3ac96e360672 6031 break;
charlesmn 0:3ac96e360672 6032 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_SAMPLE_LIMIT:
charlesmn 0:3ac96e360672 6033 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6034 (int32_t)pdev->smudge_correct_config.nodetect_sample_limit;
charlesmn 0:3ac96e360672 6035 break;
charlesmn 0:3ac96e360672 6036 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_XTALK_OFFSET_KCPS:
charlesmn 0:3ac96e360672 6037 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6038 (int32_t)pdev->smudge_correct_config.nodetect_xtalk_offset;
charlesmn 0:3ac96e360672 6039 break;
charlesmn 0:3ac96e360672 6040 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_MIN_RANGE_MM:
charlesmn 0:3ac96e360672 6041 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6042 (int32_t)pdev->smudge_correct_config.nodetect_min_range_mm;
charlesmn 0:3ac96e360672 6043 break;
charlesmn 0:3ac96e360672 6044 case VL53L1_TUNINGPARM_LOWPOWERAUTO_VHV_LOOP_BOUND:
charlesmn 0:3ac96e360672 6045 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6046 (int32_t)pdev->low_power_auto_data.vhv_loop_bound;
charlesmn 0:3ac96e360672 6047 break;
charlesmn 0:3ac96e360672 6048 case VL53L1_TUNINGPARM_LOWPOWERAUTO_MM_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6049 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6050 (int32_t)pdev->tuning_parms.tp_mm_timeout_lpa_us;
charlesmn 0:3ac96e360672 6051 break;
charlesmn 0:3ac96e360672 6052 case VL53L1_TUNINGPARM_LOWPOWERAUTO_RANGE_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6053 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6054 (int32_t)pdev->tuning_parms.tp_range_timeout_lpa_us;
charlesmn 0:3ac96e360672 6055 break;
charlesmn 0:3ac96e360672 6056 case VL53L1_TUNINGPARM_VERY_SHORT_DSS_RATE_MCPS:
charlesmn 0:3ac96e360672 6057 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6058 (int32_t)pdev->tuning_parms.tp_dss_target_very_short_mcps;
charlesmn 0:3ac96e360672 6059 break;
charlesmn 0:3ac96e360672 6060 case VL53L1_TUNINGPARM_PHASECAL_PATCH_POWER:
charlesmn 0:3ac96e360672 6061 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6062 (int32_t) pdev->tuning_parms.tp_phasecal_patch_power;
charlesmn 0:3ac96e360672 6063 break;
charlesmn 0:3ac96e360672 6064 case VL53L1_TUNINGPARM_HIST_MERGE:
charlesmn 0:3ac96e360672 6065 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6066 (int32_t) pdev->tuning_parms.tp_hist_merge;
charlesmn 0:3ac96e360672 6067 break;
charlesmn 0:3ac96e360672 6068 case VL53L1_TUNINGPARM_RESET_MERGE_THRESHOLD:
charlesmn 0:3ac96e360672 6069 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6070 (int32_t) pdev->tuning_parms.tp_reset_merge_threshold;
charlesmn 0:3ac96e360672 6071 break;
charlesmn 0:3ac96e360672 6072 case VL53L1_TUNINGPARM_HIST_MERGE_MAX_SIZE:
charlesmn 0:3ac96e360672 6073 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6074 (int32_t) pdev->tuning_parms.tp_hist_merge_max_size;
charlesmn 0:3ac96e360672 6075 break;
charlesmn 0:3ac96e360672 6076 case VL53L1_TUNINGPARM_DYNXTALK_MAX_SMUDGE_FACTOR:
charlesmn 0:3ac96e360672 6077 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6078 pdev->smudge_correct_config.max_smudge_factor;
charlesmn 0:3ac96e360672 6079 break;
charlesmn 0:3ac96e360672 6080
charlesmn 0:3ac96e360672 6081 case VL53L1_TUNINGPARM_UWR_ENABLE:
charlesmn 0:3ac96e360672 6082 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6083 pdev->tuning_parms.tp_uwr_enable;
charlesmn 0:3ac96e360672 6084 break;
charlesmn 0:3ac96e360672 6085 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MIN:
charlesmn 0:3ac96e360672 6086 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6087 pdev->tuning_parms.tp_uwr_med_z_1_min;
charlesmn 0:3ac96e360672 6088 break;
charlesmn 0:3ac96e360672 6089 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MAX:
charlesmn 0:3ac96e360672 6090 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6091 pdev->tuning_parms.tp_uwr_med_z_1_max;
charlesmn 0:3ac96e360672 6092 break;
charlesmn 0:3ac96e360672 6093 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MIN:
charlesmn 0:3ac96e360672 6094 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6095 pdev->tuning_parms.tp_uwr_med_z_2_min;
charlesmn 0:3ac96e360672 6096 break;
charlesmn 0:3ac96e360672 6097 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MAX:
charlesmn 0:3ac96e360672 6098 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6099 pdev->tuning_parms.tp_uwr_med_z_2_max;
charlesmn 0:3ac96e360672 6100 break;
charlesmn 0:3ac96e360672 6101 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MIN:
charlesmn 0:3ac96e360672 6102 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6103 pdev->tuning_parms.tp_uwr_med_z_3_min;
charlesmn 0:3ac96e360672 6104 break;
charlesmn 0:3ac96e360672 6105 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MAX:
charlesmn 0:3ac96e360672 6106 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6107 pdev->tuning_parms.tp_uwr_med_z_3_max;
charlesmn 0:3ac96e360672 6108 break;
charlesmn 0:3ac96e360672 6109 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MIN:
charlesmn 0:3ac96e360672 6110 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6111 pdev->tuning_parms.tp_uwr_med_z_4_min;
charlesmn 0:3ac96e360672 6112 break;
charlesmn 0:3ac96e360672 6113 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MAX:
charlesmn 0:3ac96e360672 6114 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6115 pdev->tuning_parms.tp_uwr_med_z_4_max;
charlesmn 0:3ac96e360672 6116 break;
charlesmn 0:3ac96e360672 6117 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MIN:
charlesmn 0:3ac96e360672 6118 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6119 pdev->tuning_parms.tp_uwr_med_z_5_min;
charlesmn 0:3ac96e360672 6120 break;
charlesmn 0:3ac96e360672 6121 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MAX:
charlesmn 0:3ac96e360672 6122 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6123 pdev->tuning_parms.tp_uwr_med_z_5_max;
charlesmn 0:3ac96e360672 6124 break;
charlesmn 0:3ac96e360672 6125 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MIN:
charlesmn 0:3ac96e360672 6126 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6127 pdev->tuning_parms.tp_uwr_med_z_6_min;
charlesmn 0:3ac96e360672 6128 break;
charlesmn 0:3ac96e360672 6129 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MAX:
charlesmn 0:3ac96e360672 6130 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6131 pdev->tuning_parms.tp_uwr_med_z_6_max;
charlesmn 0:3ac96e360672 6132 break;
charlesmn 0:3ac96e360672 6133 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEA:
charlesmn 0:3ac96e360672 6134 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6135 pdev->tuning_parms.tp_uwr_med_corr_z_1_rangea;
charlesmn 0:3ac96e360672 6136 break;
charlesmn 0:3ac96e360672 6137 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEB:
charlesmn 0:3ac96e360672 6138 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6139 pdev->tuning_parms.tp_uwr_med_corr_z_1_rangeb;
charlesmn 0:3ac96e360672 6140 break;
charlesmn 0:3ac96e360672 6141 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEA:
charlesmn 0:3ac96e360672 6142 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6143 pdev->tuning_parms.tp_uwr_med_corr_z_2_rangea;
charlesmn 0:3ac96e360672 6144 break;
charlesmn 0:3ac96e360672 6145 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEB:
charlesmn 0:3ac96e360672 6146 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6147 pdev->tuning_parms.tp_uwr_med_corr_z_2_rangeb;
charlesmn 0:3ac96e360672 6148 break;
charlesmn 0:3ac96e360672 6149 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEA:
charlesmn 0:3ac96e360672 6150 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6151 pdev->tuning_parms.tp_uwr_med_corr_z_3_rangea;
charlesmn 0:3ac96e360672 6152 break;
charlesmn 0:3ac96e360672 6153 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEB:
charlesmn 0:3ac96e360672 6154 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6155 pdev->tuning_parms.tp_uwr_med_corr_z_3_rangeb;
charlesmn 0:3ac96e360672 6156 break;
charlesmn 0:3ac96e360672 6157 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEA:
charlesmn 0:3ac96e360672 6158 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6159 pdev->tuning_parms.tp_uwr_med_corr_z_4_rangea;
charlesmn 0:3ac96e360672 6160 break;
charlesmn 0:3ac96e360672 6161 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEB:
charlesmn 0:3ac96e360672 6162 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6163 pdev->tuning_parms.tp_uwr_med_corr_z_4_rangeb;
charlesmn 0:3ac96e360672 6164 break;
charlesmn 0:3ac96e360672 6165 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEA:
charlesmn 0:3ac96e360672 6166 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6167 pdev->tuning_parms.tp_uwr_med_corr_z_5_rangea;
charlesmn 0:3ac96e360672 6168 break;
charlesmn 0:3ac96e360672 6169 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEB:
charlesmn 0:3ac96e360672 6170 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6171 pdev->tuning_parms.tp_uwr_med_corr_z_5_rangeb;
charlesmn 0:3ac96e360672 6172 break;
charlesmn 0:3ac96e360672 6173 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEA:
charlesmn 0:3ac96e360672 6174 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6175 pdev->tuning_parms.tp_uwr_med_corr_z_6_rangea;
charlesmn 0:3ac96e360672 6176 break;
charlesmn 0:3ac96e360672 6177 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEB:
charlesmn 0:3ac96e360672 6178 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6179 pdev->tuning_parms.tp_uwr_med_corr_z_6_rangeb;
charlesmn 0:3ac96e360672 6180 break;
charlesmn 0:3ac96e360672 6181 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MIN:
charlesmn 0:3ac96e360672 6182 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6183 pdev->tuning_parms.tp_uwr_lng_z_1_min;
charlesmn 0:3ac96e360672 6184 break;
charlesmn 0:3ac96e360672 6185 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MAX:
charlesmn 0:3ac96e360672 6186 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6187 pdev->tuning_parms.tp_uwr_lng_z_1_max;
charlesmn 0:3ac96e360672 6188 break;
charlesmn 0:3ac96e360672 6189 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MIN:
charlesmn 0:3ac96e360672 6190 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6191 pdev->tuning_parms.tp_uwr_lng_z_2_min;
charlesmn 0:3ac96e360672 6192 break;
charlesmn 0:3ac96e360672 6193 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MAX:
charlesmn 0:3ac96e360672 6194 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6195 pdev->tuning_parms.tp_uwr_lng_z_2_max;
charlesmn 0:3ac96e360672 6196 break;
charlesmn 0:3ac96e360672 6197 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MIN:
charlesmn 0:3ac96e360672 6198 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6199 pdev->tuning_parms.tp_uwr_lng_z_3_min;
charlesmn 0:3ac96e360672 6200 break;
charlesmn 0:3ac96e360672 6201 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MAX:
charlesmn 0:3ac96e360672 6202 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6203 pdev->tuning_parms.tp_uwr_lng_z_3_max;
charlesmn 0:3ac96e360672 6204 break;
charlesmn 0:3ac96e360672 6205 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MIN:
charlesmn 0:3ac96e360672 6206 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6207 pdev->tuning_parms.tp_uwr_lng_z_4_min;
charlesmn 0:3ac96e360672 6208 break;
charlesmn 0:3ac96e360672 6209 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MAX:
charlesmn 0:3ac96e360672 6210 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6211 pdev->tuning_parms.tp_uwr_lng_z_4_max;
charlesmn 0:3ac96e360672 6212 break;
charlesmn 0:3ac96e360672 6213 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MIN:
charlesmn 0:3ac96e360672 6214 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6215 pdev->tuning_parms.tp_uwr_lng_z_5_min;
charlesmn 0:3ac96e360672 6216 break;
charlesmn 0:3ac96e360672 6217 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MAX:
charlesmn 0:3ac96e360672 6218 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6219 pdev->tuning_parms.tp_uwr_lng_z_5_max;
charlesmn 0:3ac96e360672 6220 break;
charlesmn 0:3ac96e360672 6221 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEA:
charlesmn 0:3ac96e360672 6222 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6223 pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangea;
charlesmn 0:3ac96e360672 6224 break;
charlesmn 0:3ac96e360672 6225 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEB:
charlesmn 0:3ac96e360672 6226 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6227 pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangeb;
charlesmn 0:3ac96e360672 6228 break;
charlesmn 0:3ac96e360672 6229 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEA:
charlesmn 0:3ac96e360672 6230 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6231 pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangea;
charlesmn 0:3ac96e360672 6232 break;
charlesmn 0:3ac96e360672 6233 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEB:
charlesmn 0:3ac96e360672 6234 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6235 pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangeb;
charlesmn 0:3ac96e360672 6236 break;
charlesmn 0:3ac96e360672 6237 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEA:
charlesmn 0:3ac96e360672 6238 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6239 pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangea;
charlesmn 0:3ac96e360672 6240 break;
charlesmn 0:3ac96e360672 6241 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEB:
charlesmn 0:3ac96e360672 6242 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6243 pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangeb;
charlesmn 0:3ac96e360672 6244 break;
charlesmn 0:3ac96e360672 6245 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEA:
charlesmn 0:3ac96e360672 6246 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6247 pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangea;
charlesmn 0:3ac96e360672 6248 break;
charlesmn 0:3ac96e360672 6249 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEB:
charlesmn 0:3ac96e360672 6250 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6251 pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangeb;
charlesmn 0:3ac96e360672 6252 break;
charlesmn 0:3ac96e360672 6253 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEA:
charlesmn 0:3ac96e360672 6254 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6255 pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangea;
charlesmn 0:3ac96e360672 6256 break;
charlesmn 0:3ac96e360672 6257 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEB:
charlesmn 0:3ac96e360672 6258 *ptuning_parm_value =
charlesmn 0:3ac96e360672 6259 pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangeb;
charlesmn 0:3ac96e360672 6260 break;
charlesmn 0:3ac96e360672 6261
charlesmn 0:3ac96e360672 6262 default:
charlesmn 0:3ac96e360672 6263 *ptuning_parm_value = 0x7FFFFFFF;
charlesmn 0:3ac96e360672 6264 status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn 0:3ac96e360672 6265 break;
charlesmn 0:3ac96e360672 6266
charlesmn 0:3ac96e360672 6267 }
charlesmn 0:3ac96e360672 6268
charlesmn 0:3ac96e360672 6269 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 6270
charlesmn 0:3ac96e360672 6271 return status;
charlesmn 0:3ac96e360672 6272 }
charlesmn 0:3ac96e360672 6273
charlesmn 0:3ac96e360672 6274 VL53L1_Error VL53L1_set_tuning_parm(
charlesmn 0:3ac96e360672 6275 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 6276 VL53L1_TuningParms tuning_parm_key,
charlesmn 0:3ac96e360672 6277 int32_t tuning_parm_value)
charlesmn 0:3ac96e360672 6278 {
charlesmn 0:3ac96e360672 6279
charlesmn 0:3ac96e360672 6280
charlesmn 0:3ac96e360672 6281
charlesmn 0:3ac96e360672 6282 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 6283
charlesmn 0:3ac96e360672 6284 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 6285 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn 0:3ac96e360672 6286 VL53L1_xtalkextract_config_t *pXC = &(pdev->xtalk_extract_cfg);
charlesmn 0:3ac96e360672 6287
charlesmn 0:3ac96e360672 6288 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 6289
charlesmn 0:3ac96e360672 6290 switch (tuning_parm_key) {
charlesmn 0:3ac96e360672 6291
charlesmn 0:3ac96e360672 6292 case VL53L1_TUNINGPARM_VERSION:
charlesmn 0:3ac96e360672 6293 pdev->tuning_parms.tp_tuning_parm_version =
charlesmn 0:3ac96e360672 6294 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6295 break;
charlesmn 0:3ac96e360672 6296 case VL53L1_TUNINGPARM_KEY_TABLE_VERSION:
charlesmn 0:3ac96e360672 6297 pdev->tuning_parms.tp_tuning_parm_key_table_version =
charlesmn 0:3ac96e360672 6298 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6299
charlesmn 0:3ac96e360672 6300
charlesmn 0:3ac96e360672 6301
charlesmn 0:3ac96e360672 6302 if ((uint16_t)tuning_parm_value
charlesmn 0:3ac96e360672 6303 != VL53L1_TUNINGPARM_KEY_TABLE_VERSION_DEFAULT)
charlesmn 0:3ac96e360672 6304 status = VL53L1_ERROR_TUNING_PARM_KEY_MISMATCH;
charlesmn 0:3ac96e360672 6305
charlesmn 0:3ac96e360672 6306 break;
charlesmn 0:3ac96e360672 6307 case VL53L1_TUNINGPARM_LLD_VERSION:
charlesmn 0:3ac96e360672 6308 pdev->tuning_parms.tp_tuning_parm_lld_version =
charlesmn 0:3ac96e360672 6309 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6310 break;
charlesmn 0:3ac96e360672 6311 case VL53L1_TUNINGPARM_HIST_ALGO_SELECT:
charlesmn 0:3ac96e360672 6312 pHP->hist_algo_select =
charlesmn 0:3ac96e360672 6313 (VL53L1_HistAlgoSelect)tuning_parm_value;
charlesmn 0:3ac96e360672 6314 break;
charlesmn 0:3ac96e360672 6315 case VL53L1_TUNINGPARM_HIST_TARGET_ORDER:
charlesmn 0:3ac96e360672 6316 pHP->hist_target_order =
charlesmn 0:3ac96e360672 6317 (VL53L1_HistTargetOrder)tuning_parm_value;
charlesmn 0:3ac96e360672 6318 break;
charlesmn 0:3ac96e360672 6319 case VL53L1_TUNINGPARM_HIST_FILTER_WOI_0:
charlesmn 0:3ac96e360672 6320 pHP->filter_woi0 =
charlesmn 0:3ac96e360672 6321 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6322 break;
charlesmn 0:3ac96e360672 6323 case VL53L1_TUNINGPARM_HIST_FILTER_WOI_1:
charlesmn 0:3ac96e360672 6324 pHP->filter_woi1 =
charlesmn 0:3ac96e360672 6325 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6326 break;
charlesmn 0:3ac96e360672 6327 case VL53L1_TUNINGPARM_HIST_AMB_EST_METHOD:
charlesmn 0:3ac96e360672 6328 pHP->hist_amb_est_method =
charlesmn 0:3ac96e360672 6329 (VL53L1_HistAmbEstMethod)tuning_parm_value;
charlesmn 0:3ac96e360672 6330 break;
charlesmn 0:3ac96e360672 6331 case VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_0:
charlesmn 0:3ac96e360672 6332 pHP->ambient_thresh_sigma0 =
charlesmn 0:3ac96e360672 6333 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6334 break;
charlesmn 0:3ac96e360672 6335 case VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_1:
charlesmn 0:3ac96e360672 6336 pHP->ambient_thresh_sigma1 =
charlesmn 0:3ac96e360672 6337 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6338 break;
charlesmn 0:3ac96e360672 6339 case VL53L1_TUNINGPARM_HIST_MIN_AMB_THRESH_EVENTS:
charlesmn 0:3ac96e360672 6340 pHP->min_ambient_thresh_events =
charlesmn 0:3ac96e360672 6341 (int32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6342 break;
charlesmn 0:3ac96e360672 6343 case VL53L1_TUNINGPARM_HIST_AMB_EVENTS_SCALER:
charlesmn 0:3ac96e360672 6344 pHP->ambient_thresh_events_scaler =
charlesmn 0:3ac96e360672 6345 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6346 break;
charlesmn 0:3ac96e360672 6347 case VL53L1_TUNINGPARM_HIST_NOISE_THRESHOLD:
charlesmn 0:3ac96e360672 6348 pHP->noise_threshold =
charlesmn 0:3ac96e360672 6349 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6350 break;
charlesmn 0:3ac96e360672 6351 case VL53L1_TUNINGPARM_HIST_SIGNAL_TOTAL_EVENTS_LIMIT:
charlesmn 0:3ac96e360672 6352 pHP->signal_total_events_limit =
charlesmn 0:3ac96e360672 6353 (int32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6354 break;
charlesmn 0:3ac96e360672 6355 case VL53L1_TUNINGPARM_HIST_SIGMA_EST_REF_MM:
charlesmn 0:3ac96e360672 6356 pHP->sigma_estimator__sigma_ref_mm =
charlesmn 0:3ac96e360672 6357 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6358 break;
charlesmn 0:3ac96e360672 6359 case VL53L1_TUNINGPARM_HIST_SIGMA_THRESH_MM:
charlesmn 0:3ac96e360672 6360 pHP->sigma_thresh =
charlesmn 0:3ac96e360672 6361 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6362 break;
charlesmn 0:3ac96e360672 6363 case VL53L1_TUNINGPARM_HIST_GAIN_FACTOR:
charlesmn 0:3ac96e360672 6364 pdev->gain_cal.histogram_ranging_gain_factor =
charlesmn 0:3ac96e360672 6365 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6366 break;
charlesmn 0:3ac96e360672 6367 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_PHASE_TOLERANCE:
charlesmn 0:3ac96e360672 6368 pHP->algo__consistency_check__phase_tolerance =
charlesmn 0:3ac96e360672 6369 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6370 break;
charlesmn 0:3ac96e360672 6371 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_MIN_MAX_TOLERANCE_MM:
charlesmn 0:3ac96e360672 6372 pHP->algo__consistency_check__min_max_tolerance =
charlesmn 0:3ac96e360672 6373 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6374 break;
charlesmn 0:3ac96e360672 6375 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA:
charlesmn 0:3ac96e360672 6376 pHP->algo__consistency_check__event_sigma =
charlesmn 0:3ac96e360672 6377 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6378 break;
charlesmn 0:3ac96e360672 6379 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_MIN_SPAD_LIMIT:
charlesmn 0:3ac96e360672 6380 pHP->algo__consistency_check__event_min_spad_count =
charlesmn 0:3ac96e360672 6381 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6382 break;
charlesmn 0:3ac96e360672 6383 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_LONG_RANGE:
charlesmn 0:3ac96e360672 6384 pdev->tuning_parms.tp_init_phase_rtn_hist_long =
charlesmn 0:3ac96e360672 6385 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6386 break;
charlesmn 0:3ac96e360672 6387 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_MED_RANGE:
charlesmn 0:3ac96e360672 6388 pdev->tuning_parms.tp_init_phase_rtn_hist_med =
charlesmn 0:3ac96e360672 6389 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6390 break;
charlesmn 0:3ac96e360672 6391 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_SHORT_RANGE:
charlesmn 0:3ac96e360672 6392 pdev->tuning_parms.tp_init_phase_rtn_hist_short =
charlesmn 0:3ac96e360672 6393 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6394 break;
charlesmn 0:3ac96e360672 6395 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_LONG_RANGE:
charlesmn 0:3ac96e360672 6396 pdev->tuning_parms.tp_init_phase_ref_hist_long =
charlesmn 0:3ac96e360672 6397 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6398 break;
charlesmn 0:3ac96e360672 6399 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_MED_RANGE:
charlesmn 0:3ac96e360672 6400 pdev->tuning_parms.tp_init_phase_ref_hist_med =
charlesmn 0:3ac96e360672 6401 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6402 break;
charlesmn 0:3ac96e360672 6403 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_SHORT_RANGE:
charlesmn 0:3ac96e360672 6404 pdev->tuning_parms.tp_init_phase_ref_hist_short =
charlesmn 0:3ac96e360672 6405 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6406 break;
charlesmn 0:3ac96e360672 6407 case VL53L1_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM:
charlesmn 0:3ac96e360672 6408 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm =
charlesmn 0:3ac96e360672 6409 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6410 break;
charlesmn 0:3ac96e360672 6411 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM:
charlesmn 0:3ac96e360672 6412 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm =
charlesmn 0:3ac96e360672 6413 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6414 break;
charlesmn 0:3ac96e360672 6415 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM:
charlesmn 0:3ac96e360672 6416 pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm =
charlesmn 0:3ac96e360672 6417 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6418 break;
charlesmn 0:3ac96e360672 6419 case VL53L1_TUNINGPARM_XTALK_DETECT_MIN_MAX_TOLERANCE:
charlesmn 0:3ac96e360672 6420 pHP->algo__crosstalk_detect_min_max_tolerance =
charlesmn 0:3ac96e360672 6421 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6422 break;
charlesmn 0:3ac96e360672 6423 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS:
charlesmn 0:3ac96e360672 6424 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps =
charlesmn 0:3ac96e360672 6425 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6426 break;
charlesmn 0:3ac96e360672 6427 case VL53L1_TUNINGPARM_XTALK_DETECT_EVENT_SIGMA:
charlesmn 0:3ac96e360672 6428 pHP->algo__crosstalk_detect_event_sigma =
charlesmn 0:3ac96e360672 6429 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6430 break;
charlesmn 0:3ac96e360672 6431 case VL53L1_TUNINGPARM_HIST_XTALK_MARGIN_KCPS:
charlesmn 0:3ac96e360672 6432 pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps =
charlesmn 0:3ac96e360672 6433 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6434 break;
charlesmn 0:3ac96e360672 6435 case VL53L1_TUNINGPARM_CONSISTENCY_LITE_PHASE_TOLERANCE:
charlesmn 0:3ac96e360672 6436 pdev->tuning_parms.tp_consistency_lite_phase_tolerance =
charlesmn 0:3ac96e360672 6437 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6438 break;
charlesmn 0:3ac96e360672 6439 case VL53L1_TUNINGPARM_PHASECAL_TARGET:
charlesmn 0:3ac96e360672 6440 pdev->tuning_parms.tp_phasecal_target =
charlesmn 0:3ac96e360672 6441 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6442 break;
charlesmn 0:3ac96e360672 6443 case VL53L1_TUNINGPARM_LITE_CAL_REPEAT_RATE:
charlesmn 0:3ac96e360672 6444 pdev->tuning_parms.tp_cal_repeat_rate =
charlesmn 0:3ac96e360672 6445 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6446 break;
charlesmn 0:3ac96e360672 6447 case VL53L1_TUNINGPARM_LITE_RANGING_GAIN_FACTOR:
charlesmn 0:3ac96e360672 6448 pdev->gain_cal.standard_ranging_gain_factor =
charlesmn 0:3ac96e360672 6449 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6450 break;
charlesmn 0:3ac96e360672 6451 case VL53L1_TUNINGPARM_LITE_MIN_CLIP_MM:
charlesmn 0:3ac96e360672 6452 pdev->tuning_parms.tp_lite_min_clip =
charlesmn 0:3ac96e360672 6453 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6454 break;
charlesmn 0:3ac96e360672 6455 case VL53L1_TUNINGPARM_LITE_LONG_SIGMA_THRESH_MM:
charlesmn 0:3ac96e360672 6456 pdev->tuning_parms.tp_lite_long_sigma_thresh_mm =
charlesmn 0:3ac96e360672 6457 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6458 break;
charlesmn 0:3ac96e360672 6459 case VL53L1_TUNINGPARM_LITE_MED_SIGMA_THRESH_MM:
charlesmn 0:3ac96e360672 6460 pdev->tuning_parms.tp_lite_med_sigma_thresh_mm =
charlesmn 0:3ac96e360672 6461 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6462 break;
charlesmn 0:3ac96e360672 6463 case VL53L1_TUNINGPARM_LITE_SHORT_SIGMA_THRESH_MM:
charlesmn 0:3ac96e360672 6464 pdev->tuning_parms.tp_lite_short_sigma_thresh_mm =
charlesmn 0:3ac96e360672 6465 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6466 break;
charlesmn 0:3ac96e360672 6467 case VL53L1_TUNINGPARM_LITE_LONG_MIN_COUNT_RATE_RTN_MCPS:
charlesmn 0:3ac96e360672 6468 pdev->tuning_parms.tp_lite_long_min_count_rate_rtn_mcps =
charlesmn 0:3ac96e360672 6469 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6470 break;
charlesmn 0:3ac96e360672 6471 case VL53L1_TUNINGPARM_LITE_MED_MIN_COUNT_RATE_RTN_MCPS:
charlesmn 0:3ac96e360672 6472 pdev->tuning_parms.tp_lite_med_min_count_rate_rtn_mcps =
charlesmn 0:3ac96e360672 6473 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6474 break;
charlesmn 0:3ac96e360672 6475 case VL53L1_TUNINGPARM_LITE_SHORT_MIN_COUNT_RATE_RTN_MCPS:
charlesmn 0:3ac96e360672 6476 pdev->tuning_parms.tp_lite_short_min_count_rate_rtn_mcps =
charlesmn 0:3ac96e360672 6477 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6478 break;
charlesmn 0:3ac96e360672 6479 case VL53L1_TUNINGPARM_LITE_SIGMA_EST_PULSE_WIDTH:
charlesmn 0:3ac96e360672 6480 pdev->tuning_parms.tp_lite_sigma_est_pulse_width_ns =
charlesmn 0:3ac96e360672 6481 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6482 break;
charlesmn 0:3ac96e360672 6483 case VL53L1_TUNINGPARM_LITE_SIGMA_EST_AMB_WIDTH_NS:
charlesmn 0:3ac96e360672 6484 pdev->tuning_parms.tp_lite_sigma_est_amb_width_ns =
charlesmn 0:3ac96e360672 6485 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6486 break;
charlesmn 0:3ac96e360672 6487 case VL53L1_TUNINGPARM_LITE_SIGMA_REF_MM:
charlesmn 0:3ac96e360672 6488 pdev->tuning_parms.tp_lite_sigma_ref_mm =
charlesmn 0:3ac96e360672 6489 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6490 break;
charlesmn 0:3ac96e360672 6491 case VL53L1_TUNINGPARM_LITE_RIT_MULT:
charlesmn 0:3ac96e360672 6492 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult =
charlesmn 0:3ac96e360672 6493 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6494 break;
charlesmn 0:3ac96e360672 6495 case VL53L1_TUNINGPARM_LITE_SEED_CONFIG:
charlesmn 0:3ac96e360672 6496 pdev->tuning_parms.tp_lite_seed_cfg =
charlesmn 0:3ac96e360672 6497 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6498 break;
charlesmn 0:3ac96e360672 6499 case VL53L1_TUNINGPARM_LITE_QUANTIFIER:
charlesmn 0:3ac96e360672 6500 pdev->tuning_parms.tp_lite_quantifier =
charlesmn 0:3ac96e360672 6501 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6502 break;
charlesmn 0:3ac96e360672 6503 case VL53L1_TUNINGPARM_LITE_FIRST_ORDER_SELECT:
charlesmn 0:3ac96e360672 6504 pdev->tuning_parms.tp_lite_first_order_select =
charlesmn 0:3ac96e360672 6505 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6506 break;
charlesmn 0:3ac96e360672 6507 case VL53L1_TUNINGPARM_LITE_XTALK_MARGIN_KCPS:
charlesmn 0:3ac96e360672 6508 pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps =
charlesmn 0:3ac96e360672 6509 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6510 break;
charlesmn 0:3ac96e360672 6511 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_LONG_RANGE:
charlesmn 0:3ac96e360672 6512 pdev->tuning_parms.tp_init_phase_rtn_lite_long =
charlesmn 0:3ac96e360672 6513 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6514 break;
charlesmn 0:3ac96e360672 6515 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_MED_RANGE:
charlesmn 0:3ac96e360672 6516 pdev->tuning_parms.tp_init_phase_rtn_lite_med =
charlesmn 0:3ac96e360672 6517 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6518 break;
charlesmn 0:3ac96e360672 6519 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_SHORT_RANGE:
charlesmn 0:3ac96e360672 6520 pdev->tuning_parms.tp_init_phase_rtn_lite_short =
charlesmn 0:3ac96e360672 6521 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6522 break;
charlesmn 0:3ac96e360672 6523 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_LONG_RANGE:
charlesmn 0:3ac96e360672 6524 pdev->tuning_parms.tp_init_phase_ref_lite_long =
charlesmn 0:3ac96e360672 6525 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6526 break;
charlesmn 0:3ac96e360672 6527 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_MED_RANGE:
charlesmn 0:3ac96e360672 6528 pdev->tuning_parms.tp_init_phase_ref_lite_med =
charlesmn 0:3ac96e360672 6529 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6530 break;
charlesmn 0:3ac96e360672 6531 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_SHORT_RANGE:
charlesmn 0:3ac96e360672 6532 pdev->tuning_parms.tp_init_phase_ref_lite_short =
charlesmn 0:3ac96e360672 6533 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6534 break;
charlesmn 0:3ac96e360672 6535 case VL53L1_TUNINGPARM_TIMED_SEED_CONFIG:
charlesmn 0:3ac96e360672 6536 pdev->tuning_parms.tp_timed_seed_cfg =
charlesmn 0:3ac96e360672 6537 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6538 break;
charlesmn 0:3ac96e360672 6539 case VL53L1_TUNINGPARM_DMAX_CFG_SIGNAL_THRESH_SIGMA:
charlesmn 0:3ac96e360672 6540 pdev->dmax_cfg.signal_thresh_sigma =
charlesmn 0:3ac96e360672 6541 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6542 break;
charlesmn 0:3ac96e360672 6543 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_0:
charlesmn 0:3ac96e360672 6544 pdev->dmax_cfg.target_reflectance_for_dmax_calc[0] =
charlesmn 0:3ac96e360672 6545 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6546 break;
charlesmn 0:3ac96e360672 6547 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_1:
charlesmn 0:3ac96e360672 6548 pdev->dmax_cfg.target_reflectance_for_dmax_calc[1] =
charlesmn 0:3ac96e360672 6549 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6550 break;
charlesmn 0:3ac96e360672 6551 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_2:
charlesmn 0:3ac96e360672 6552 pdev->dmax_cfg.target_reflectance_for_dmax_calc[2] =
charlesmn 0:3ac96e360672 6553 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6554 break;
charlesmn 0:3ac96e360672 6555 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_3:
charlesmn 0:3ac96e360672 6556 pdev->dmax_cfg.target_reflectance_for_dmax_calc[3] =
charlesmn 0:3ac96e360672 6557 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6558 break;
charlesmn 0:3ac96e360672 6559 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_4:
charlesmn 0:3ac96e360672 6560 pdev->dmax_cfg.target_reflectance_for_dmax_calc[4] =
charlesmn 0:3ac96e360672 6561 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6562 break;
charlesmn 0:3ac96e360672 6563 case VL53L1_TUNINGPARM_VHV_LOOPBOUND:
charlesmn 0:3ac96e360672 6564 pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound =
charlesmn 0:3ac96e360672 6565 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6566 break;
charlesmn 0:3ac96e360672 6567 case VL53L1_TUNINGPARM_REFSPADCHAR_DEVICE_TEST_MODE:
charlesmn 0:3ac96e360672 6568 pdev->refspadchar.device_test_mode =
charlesmn 0:3ac96e360672 6569 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6570 break;
charlesmn 0:3ac96e360672 6571 case VL53L1_TUNINGPARM_REFSPADCHAR_VCSEL_PERIOD:
charlesmn 0:3ac96e360672 6572 pdev->refspadchar.VL53L1_p_009 =
charlesmn 0:3ac96e360672 6573 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6574 break;
charlesmn 0:3ac96e360672 6575 case VL53L1_TUNINGPARM_REFSPADCHAR_PHASECAL_TIMEOUT_US:
charlesmn 0:3ac96e360672 6576 pdev->refspadchar.timeout_us =
charlesmn 0:3ac96e360672 6577 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6578 break;
charlesmn 0:3ac96e360672 6579 case VL53L1_TUNINGPARM_REFSPADCHAR_TARGET_COUNT_RATE_MCPS:
charlesmn 0:3ac96e360672 6580 pdev->refspadchar.target_count_rate_mcps =
charlesmn 0:3ac96e360672 6581 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6582 break;
charlesmn 0:3ac96e360672 6583 case VL53L1_TUNINGPARM_REFSPADCHAR_MIN_COUNTRATE_LIMIT_MCPS:
charlesmn 0:3ac96e360672 6584 pdev->refspadchar.min_count_rate_limit_mcps =
charlesmn 0:3ac96e360672 6585 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6586 break;
charlesmn 0:3ac96e360672 6587 case VL53L1_TUNINGPARM_REFSPADCHAR_MAX_COUNTRATE_LIMIT_MCPS:
charlesmn 0:3ac96e360672 6588 pdev->refspadchar.max_count_rate_limit_mcps =
charlesmn 0:3ac96e360672 6589 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6590 break;
charlesmn 0:3ac96e360672 6591 case VL53L1_TUNINGPARM_XTALK_EXTRACT_NUM_OF_SAMPLES:
charlesmn 0:3ac96e360672 6592 pXC->num_of_samples =
charlesmn 0:3ac96e360672 6593 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6594 break;
charlesmn 0:3ac96e360672 6595 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MIN_FILTER_THRESH_MM:
charlesmn 0:3ac96e360672 6596 pXC->algo__crosstalk_extract_min_valid_range_mm =
charlesmn 0:3ac96e360672 6597 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6598 break;
charlesmn 0:3ac96e360672 6599 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_FILTER_THRESH_MM:
charlesmn 0:3ac96e360672 6600 pXC->algo__crosstalk_extract_max_valid_range_mm =
charlesmn 0:3ac96e360672 6601 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6602 break;
charlesmn 0:3ac96e360672 6603 case VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_RATE_MCPS:
charlesmn 0:3ac96e360672 6604 pXC->dss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 6605 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6606 break;
charlesmn 0:3ac96e360672 6607 case VL53L1_TUNINGPARM_XTALK_EXTRACT_PHASECAL_TIMEOUT_US:
charlesmn 0:3ac96e360672 6608 pXC->phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 6609 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6610 break;
charlesmn 0:3ac96e360672 6611 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_VALID_RATE_KCPS:
charlesmn 0:3ac96e360672 6612 pXC->algo__crosstalk_extract_max_valid_rate_kcps =
charlesmn 0:3ac96e360672 6613 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6614 break;
charlesmn 0:3ac96e360672 6615 case VL53L1_TUNINGPARM_XTALK_EXTRACT_SIGMA_THRESHOLD_MM:
charlesmn 0:3ac96e360672 6616 pXC->algo__crosstalk_extract_max_sigma_mm =
charlesmn 0:3ac96e360672 6617 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6618 break;
charlesmn 0:3ac96e360672 6619 case VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_TIMEOUT_US:
charlesmn 0:3ac96e360672 6620 pXC->mm_config_timeout_us =
charlesmn 0:3ac96e360672 6621 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6622 break;
charlesmn 0:3ac96e360672 6623 case VL53L1_TUNINGPARM_XTALK_EXTRACT_BIN_TIMEOUT_US:
charlesmn 0:3ac96e360672 6624 pXC->range_config_timeout_us =
charlesmn 0:3ac96e360672 6625 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6626 break;
charlesmn 0:3ac96e360672 6627 case VL53L1_TUNINGPARM_OFFSET_CAL_DSS_RATE_MCPS:
charlesmn 0:3ac96e360672 6628 pdev->offsetcal_cfg.dss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 6629 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6630 break;
charlesmn 0:3ac96e360672 6631 case VL53L1_TUNINGPARM_OFFSET_CAL_PHASECAL_TIMEOUT_US:
charlesmn 0:3ac96e360672 6632 pdev->offsetcal_cfg.phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 6633 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6634 break;
charlesmn 0:3ac96e360672 6635 case VL53L1_TUNINGPARM_OFFSET_CAL_MM_TIMEOUT_US:
charlesmn 0:3ac96e360672 6636 pdev->offsetcal_cfg.mm_config_timeout_us =
charlesmn 0:3ac96e360672 6637 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6638 break;
charlesmn 0:3ac96e360672 6639 case VL53L1_TUNINGPARM_OFFSET_CAL_RANGE_TIMEOUT_US:
charlesmn 0:3ac96e360672 6640 pdev->offsetcal_cfg.range_config_timeout_us =
charlesmn 0:3ac96e360672 6641 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6642 break;
charlesmn 0:3ac96e360672 6643 case VL53L1_TUNINGPARM_OFFSET_CAL_PRE_SAMPLES:
charlesmn 0:3ac96e360672 6644 pdev->offsetcal_cfg.pre_num_of_samples =
charlesmn 0:3ac96e360672 6645 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6646 break;
charlesmn 0:3ac96e360672 6647 case VL53L1_TUNINGPARM_OFFSET_CAL_MM1_SAMPLES:
charlesmn 0:3ac96e360672 6648 pdev->offsetcal_cfg.mm1_num_of_samples =
charlesmn 0:3ac96e360672 6649 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6650 break;
charlesmn 0:3ac96e360672 6651 case VL53L1_TUNINGPARM_OFFSET_CAL_MM2_SAMPLES:
charlesmn 0:3ac96e360672 6652 pdev->offsetcal_cfg.mm2_num_of_samples =
charlesmn 0:3ac96e360672 6653 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6654 break;
charlesmn 0:3ac96e360672 6655 case VL53L1_TUNINGPARM_ZONE_CAL_DSS_RATE_MCPS:
charlesmn 0:3ac96e360672 6656 pdev->zonecal_cfg.dss_config__target_total_rate_mcps =
charlesmn 0:3ac96e360672 6657 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6658 break;
charlesmn 0:3ac96e360672 6659 case VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_TIMEOUT_US:
charlesmn 0:3ac96e360672 6660 pdev->zonecal_cfg.phasecal_config_timeout_us =
charlesmn 0:3ac96e360672 6661 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6662 break;
charlesmn 0:3ac96e360672 6663 case VL53L1_TUNINGPARM_ZONE_CAL_DSS_TIMEOUT_US:
charlesmn 0:3ac96e360672 6664 pdev->zonecal_cfg.mm_config_timeout_us =
charlesmn 0:3ac96e360672 6665 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6666 break;
charlesmn 0:3ac96e360672 6667 case VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_NUM_SAMPLES:
charlesmn 0:3ac96e360672 6668 pdev->zonecal_cfg.phasecal_num_of_samples =
charlesmn 0:3ac96e360672 6669 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6670 break;
charlesmn 0:3ac96e360672 6671 case VL53L1_TUNINGPARM_ZONE_CAL_RANGE_TIMEOUT_US:
charlesmn 0:3ac96e360672 6672 pdev->zonecal_cfg.range_config_timeout_us =
charlesmn 0:3ac96e360672 6673 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6674 break;
charlesmn 0:3ac96e360672 6675 case VL53L1_TUNINGPARM_ZONE_CAL_ZONE_NUM_SAMPLES:
charlesmn 0:3ac96e360672 6676 pdev->zonecal_cfg.zone_num_of_samples =
charlesmn 0:3ac96e360672 6677 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6678 break;
charlesmn 0:3ac96e360672 6679 case VL53L1_TUNINGPARM_SPADMAP_VCSEL_PERIOD:
charlesmn 0:3ac96e360672 6680 pdev->ssc_cfg.VL53L1_p_009 =
charlesmn 0:3ac96e360672 6681 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6682 break;
charlesmn 0:3ac96e360672 6683 case VL53L1_TUNINGPARM_SPADMAP_VCSEL_START:
charlesmn 0:3ac96e360672 6684 pdev->ssc_cfg.vcsel_start =
charlesmn 0:3ac96e360672 6685 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6686 break;
charlesmn 0:3ac96e360672 6687 case VL53L1_TUNINGPARM_SPADMAP_RATE_LIMIT_MCPS:
charlesmn 0:3ac96e360672 6688 pdev->ssc_cfg.rate_limit_mcps =
charlesmn 0:3ac96e360672 6689 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6690 break;
charlesmn 0:3ac96e360672 6691 case VL53L1_TUNINGPARM_LITE_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn 0:3ac96e360672 6692 pdev->tuning_parms.tp_dss_target_lite_mcps =
charlesmn 0:3ac96e360672 6693 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6694 break;
charlesmn 0:3ac96e360672 6695 case VL53L1_TUNINGPARM_RANGING_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn 0:3ac96e360672 6696 pdev->tuning_parms.tp_dss_target_histo_mcps =
charlesmn 0:3ac96e360672 6697 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6698 break;
charlesmn 0:3ac96e360672 6699 case VL53L1_TUNINGPARM_MZ_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn 0:3ac96e360672 6700 pdev->tuning_parms.tp_dss_target_histo_mz_mcps =
charlesmn 0:3ac96e360672 6701 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6702 break;
charlesmn 0:3ac96e360672 6703 case VL53L1_TUNINGPARM_TIMED_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn 0:3ac96e360672 6704 pdev->tuning_parms.tp_dss_target_timed_mcps =
charlesmn 0:3ac96e360672 6705 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6706 break;
charlesmn 0:3ac96e360672 6707 case VL53L1_TUNINGPARM_LITE_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6708 pdev->tuning_parms.tp_phasecal_timeout_lite_us =
charlesmn 0:3ac96e360672 6709 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6710 break;
charlesmn 0:3ac96e360672 6711 case VL53L1_TUNINGPARM_RANGING_LONG_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6712 pdev->tuning_parms.tp_phasecal_timeout_hist_long_us =
charlesmn 0:3ac96e360672 6713 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6714 break;
charlesmn 0:3ac96e360672 6715 case VL53L1_TUNINGPARM_RANGING_MED_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6716 pdev->tuning_parms.tp_phasecal_timeout_hist_med_us =
charlesmn 0:3ac96e360672 6717 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6718 break;
charlesmn 0:3ac96e360672 6719 case VL53L1_TUNINGPARM_RANGING_SHORT_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6720 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us =
charlesmn 0:3ac96e360672 6721 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6722 break;
charlesmn 0:3ac96e360672 6723 case VL53L1_TUNINGPARM_MZ_LONG_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6724 pdev->tuning_parms.tp_phasecal_timeout_mz_long_us =
charlesmn 0:3ac96e360672 6725 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6726 break;
charlesmn 0:3ac96e360672 6727 case VL53L1_TUNINGPARM_MZ_MED_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6728 pdev->tuning_parms.tp_phasecal_timeout_mz_med_us =
charlesmn 0:3ac96e360672 6729 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6730 break;
charlesmn 0:3ac96e360672 6731 case VL53L1_TUNINGPARM_MZ_SHORT_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6732 pdev->tuning_parms.tp_phasecal_timeout_mz_short_us =
charlesmn 0:3ac96e360672 6733 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6734 break;
charlesmn 0:3ac96e360672 6735 case VL53L1_TUNINGPARM_TIMED_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6736 pdev->tuning_parms.tp_phasecal_timeout_timed_us =
charlesmn 0:3ac96e360672 6737 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6738 break;
charlesmn 0:3ac96e360672 6739 case VL53L1_TUNINGPARM_LITE_MM_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6740 pdev->tuning_parms.tp_mm_timeout_lite_us =
charlesmn 0:3ac96e360672 6741 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6742 break;
charlesmn 0:3ac96e360672 6743 case VL53L1_TUNINGPARM_RANGING_MM_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6744 pdev->tuning_parms.tp_mm_timeout_histo_us =
charlesmn 0:3ac96e360672 6745 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6746 break;
charlesmn 0:3ac96e360672 6747 case VL53L1_TUNINGPARM_MZ_MM_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6748 pdev->tuning_parms.tp_mm_timeout_mz_us =
charlesmn 0:3ac96e360672 6749 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6750 break;
charlesmn 0:3ac96e360672 6751 case VL53L1_TUNINGPARM_TIMED_MM_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6752 pdev->tuning_parms.tp_mm_timeout_timed_us =
charlesmn 0:3ac96e360672 6753 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6754 break;
charlesmn 0:3ac96e360672 6755 case VL53L1_TUNINGPARM_LITE_RANGE_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6756 pdev->tuning_parms.tp_range_timeout_lite_us =
charlesmn 0:3ac96e360672 6757 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6758 break;
charlesmn 0:3ac96e360672 6759 case VL53L1_TUNINGPARM_RANGING_RANGE_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6760 pdev->tuning_parms.tp_range_timeout_histo_us =
charlesmn 0:3ac96e360672 6761 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6762 break;
charlesmn 0:3ac96e360672 6763 case VL53L1_TUNINGPARM_MZ_RANGE_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6764 pdev->tuning_parms.tp_range_timeout_mz_us =
charlesmn 0:3ac96e360672 6765 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6766 break;
charlesmn 0:3ac96e360672 6767 case VL53L1_TUNINGPARM_TIMED_RANGE_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6768 pdev->tuning_parms.tp_range_timeout_timed_us =
charlesmn 0:3ac96e360672 6769 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6770 break;
charlesmn 0:3ac96e360672 6771 case VL53L1_TUNINGPARM_DYNXTALK_SMUDGE_MARGIN:
charlesmn 0:3ac96e360672 6772 pdev->smudge_correct_config.smudge_margin =
charlesmn 0:3ac96e360672 6773 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6774 break;
charlesmn 0:3ac96e360672 6775 case VL53L1_TUNINGPARM_DYNXTALK_NOISE_MARGIN:
charlesmn 0:3ac96e360672 6776 pdev->smudge_correct_config.noise_margin =
charlesmn 0:3ac96e360672 6777 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6778 break;
charlesmn 0:3ac96e360672 6779 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT:
charlesmn 0:3ac96e360672 6780 pdev->smudge_correct_config.user_xtalk_offset_limit =
charlesmn 0:3ac96e360672 6781 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6782 break;
charlesmn 0:3ac96e360672 6783 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT_HI:
charlesmn 0:3ac96e360672 6784 pdev->smudge_correct_config.user_xtalk_offset_limit_hi =
charlesmn 0:3ac96e360672 6785 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6786 break;
charlesmn 0:3ac96e360672 6787 case VL53L1_TUNINGPARM_DYNXTALK_SAMPLE_LIMIT:
charlesmn 0:3ac96e360672 6788 pdev->smudge_correct_config.sample_limit =
charlesmn 0:3ac96e360672 6789 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6790 break;
charlesmn 0:3ac96e360672 6791 case VL53L1_TUNINGPARM_DYNXTALK_SINGLE_XTALK_DELTA:
charlesmn 0:3ac96e360672 6792 pdev->smudge_correct_config.single_xtalk_delta =
charlesmn 0:3ac96e360672 6793 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6794 break;
charlesmn 0:3ac96e360672 6795 case VL53L1_TUNINGPARM_DYNXTALK_AVERAGED_XTALK_DELTA:
charlesmn 0:3ac96e360672 6796 pdev->smudge_correct_config.averaged_xtalk_delta =
charlesmn 0:3ac96e360672 6797 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6798 break;
charlesmn 0:3ac96e360672 6799 case VL53L1_TUNINGPARM_DYNXTALK_CLIP_LIMIT:
charlesmn 0:3ac96e360672 6800 pdev->smudge_correct_config.smudge_corr_clip_limit =
charlesmn 0:3ac96e360672 6801 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6802 break;
charlesmn 0:3ac96e360672 6803 case VL53L1_TUNINGPARM_DYNXTALK_SCALER_CALC_METHOD:
charlesmn 0:3ac96e360672 6804 pdev->smudge_correct_config.scaler_calc_method =
charlesmn 0:3ac96e360672 6805 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6806 break;
charlesmn 0:3ac96e360672 6807 case VL53L1_TUNINGPARM_DYNXTALK_XGRADIENT_SCALER:
charlesmn 0:3ac96e360672 6808 pdev->smudge_correct_config.x_gradient_scaler =
charlesmn 0:3ac96e360672 6809 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6810 break;
charlesmn 0:3ac96e360672 6811 case VL53L1_TUNINGPARM_DYNXTALK_YGRADIENT_SCALER:
charlesmn 0:3ac96e360672 6812 pdev->smudge_correct_config.y_gradient_scaler =
charlesmn 0:3ac96e360672 6813 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6814 break;
charlesmn 0:3ac96e360672 6815 case VL53L1_TUNINGPARM_DYNXTALK_USER_SCALER_SET:
charlesmn 0:3ac96e360672 6816 pdev->smudge_correct_config.user_scaler_set =
charlesmn 0:3ac96e360672 6817 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6818 break;
charlesmn 0:3ac96e360672 6819
charlesmn 0:3ac96e360672 6820 case VL53L1_TUNINGPARM_DYNXTALK_SMUDGE_COR_SINGLE_APPLY:
charlesmn 0:3ac96e360672 6821 pdev->smudge_correct_config.smudge_corr_single_apply =
charlesmn 0:3ac96e360672 6822 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6823 break;
charlesmn 0:3ac96e360672 6824 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_AMB_THRESHOLD:
charlesmn 0:3ac96e360672 6825 pdev->smudge_correct_config.smudge_corr_ambient_threshold =
charlesmn 0:3ac96e360672 6826 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6827 break;
charlesmn 0:3ac96e360672 6828 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_AMB_THRESHOLD_KCPS:
charlesmn 0:3ac96e360672 6829 pdev->smudge_correct_config.nodetect_ambient_threshold =
charlesmn 0:3ac96e360672 6830 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6831 break;
charlesmn 0:3ac96e360672 6832 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_SAMPLE_LIMIT:
charlesmn 0:3ac96e360672 6833 pdev->smudge_correct_config.nodetect_sample_limit =
charlesmn 0:3ac96e360672 6834 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6835 break;
charlesmn 0:3ac96e360672 6836 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_XTALK_OFFSET_KCPS:
charlesmn 0:3ac96e360672 6837 pdev->smudge_correct_config.nodetect_xtalk_offset =
charlesmn 0:3ac96e360672 6838 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6839 break;
charlesmn 0:3ac96e360672 6840 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_MIN_RANGE_MM:
charlesmn 0:3ac96e360672 6841 pdev->smudge_correct_config.nodetect_min_range_mm =
charlesmn 0:3ac96e360672 6842 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6843 break;
charlesmn 0:3ac96e360672 6844 case VL53L1_TUNINGPARM_LOWPOWERAUTO_VHV_LOOP_BOUND:
charlesmn 0:3ac96e360672 6845 pdev->low_power_auto_data.vhv_loop_bound =
charlesmn 0:3ac96e360672 6846 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6847 break;
charlesmn 0:3ac96e360672 6848 case VL53L1_TUNINGPARM_LOWPOWERAUTO_MM_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6849 pdev->tuning_parms.tp_mm_timeout_lpa_us =
charlesmn 0:3ac96e360672 6850 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6851 break;
charlesmn 0:3ac96e360672 6852 case VL53L1_TUNINGPARM_LOWPOWERAUTO_RANGE_CONFIG_TIMEOUT_US:
charlesmn 0:3ac96e360672 6853 pdev->tuning_parms.tp_range_timeout_lpa_us =
charlesmn 0:3ac96e360672 6854 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6855 break;
charlesmn 0:3ac96e360672 6856 case VL53L1_TUNINGPARM_VERY_SHORT_DSS_RATE_MCPS:
charlesmn 0:3ac96e360672 6857 pdev->tuning_parms.tp_dss_target_very_short_mcps =
charlesmn 0:3ac96e360672 6858 (uint16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6859 break;
charlesmn 0:3ac96e360672 6860 case VL53L1_TUNINGPARM_PHASECAL_PATCH_POWER:
charlesmn 0:3ac96e360672 6861 pdev->tuning_parms.tp_phasecal_patch_power =
charlesmn 0:3ac96e360672 6862 (uint16_t) tuning_parm_value;
charlesmn 0:3ac96e360672 6863 break;
charlesmn 0:3ac96e360672 6864 case VL53L1_TUNINGPARM_HIST_MERGE:
charlesmn 0:3ac96e360672 6865 pdev->tuning_parms.tp_hist_merge =
charlesmn 0:3ac96e360672 6866 (uint16_t) tuning_parm_value;
charlesmn 0:3ac96e360672 6867 break;
charlesmn 0:3ac96e360672 6868 case VL53L1_TUNINGPARM_RESET_MERGE_THRESHOLD:
charlesmn 0:3ac96e360672 6869 pdev->tuning_parms.tp_reset_merge_threshold =
charlesmn 0:3ac96e360672 6870 (uint16_t) tuning_parm_value;
charlesmn 0:3ac96e360672 6871 break;
charlesmn 0:3ac96e360672 6872 case VL53L1_TUNINGPARM_HIST_MERGE_MAX_SIZE:
charlesmn 0:3ac96e360672 6873 pdev->tuning_parms.tp_hist_merge_max_size =
charlesmn 0:3ac96e360672 6874 (uint16_t) tuning_parm_value;
charlesmn 0:3ac96e360672 6875 break;
charlesmn 0:3ac96e360672 6876 case VL53L1_TUNINGPARM_DYNXTALK_MAX_SMUDGE_FACTOR:
charlesmn 0:3ac96e360672 6877 pdev->smudge_correct_config.max_smudge_factor =
charlesmn 0:3ac96e360672 6878 (uint32_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6879 break;
charlesmn 0:3ac96e360672 6880
charlesmn 0:3ac96e360672 6881 case VL53L1_TUNINGPARM_UWR_ENABLE:
charlesmn 0:3ac96e360672 6882 pdev->tuning_parms.tp_uwr_enable =
charlesmn 0:3ac96e360672 6883 (uint8_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6884 break;
charlesmn 0:3ac96e360672 6885 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MIN:
charlesmn 0:3ac96e360672 6886 pdev->tuning_parms.tp_uwr_med_z_1_min =
charlesmn 0:3ac96e360672 6887 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6888 break;
charlesmn 0:3ac96e360672 6889 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MAX:
charlesmn 0:3ac96e360672 6890 pdev->tuning_parms.tp_uwr_med_z_1_max =
charlesmn 0:3ac96e360672 6891 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6892 break;
charlesmn 0:3ac96e360672 6893 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MIN:
charlesmn 0:3ac96e360672 6894 pdev->tuning_parms.tp_uwr_med_z_2_min =
charlesmn 0:3ac96e360672 6895 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6896 break;
charlesmn 0:3ac96e360672 6897 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MAX:
charlesmn 0:3ac96e360672 6898 pdev->tuning_parms.tp_uwr_med_z_2_max =
charlesmn 0:3ac96e360672 6899 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6900 break;
charlesmn 0:3ac96e360672 6901 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MIN:
charlesmn 0:3ac96e360672 6902 pdev->tuning_parms.tp_uwr_med_z_3_min =
charlesmn 0:3ac96e360672 6903 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6904 break;
charlesmn 0:3ac96e360672 6905 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MAX:
charlesmn 0:3ac96e360672 6906 pdev->tuning_parms.tp_uwr_med_z_3_max =
charlesmn 0:3ac96e360672 6907 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6908 break;
charlesmn 0:3ac96e360672 6909 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MIN:
charlesmn 0:3ac96e360672 6910 pdev->tuning_parms.tp_uwr_med_z_4_min =
charlesmn 0:3ac96e360672 6911 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6912 break;
charlesmn 0:3ac96e360672 6913 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MAX:
charlesmn 0:3ac96e360672 6914 pdev->tuning_parms.tp_uwr_med_z_4_max =
charlesmn 0:3ac96e360672 6915 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6916 break;
charlesmn 0:3ac96e360672 6917 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MIN:
charlesmn 0:3ac96e360672 6918 pdev->tuning_parms.tp_uwr_med_z_5_min =
charlesmn 0:3ac96e360672 6919 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6920 break;
charlesmn 0:3ac96e360672 6921 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MAX:
charlesmn 0:3ac96e360672 6922 pdev->tuning_parms.tp_uwr_med_z_5_max =
charlesmn 0:3ac96e360672 6923 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6924 break;
charlesmn 0:3ac96e360672 6925 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MIN:
charlesmn 0:3ac96e360672 6926 pdev->tuning_parms.tp_uwr_med_z_6_min =
charlesmn 0:3ac96e360672 6927 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6928 break;
charlesmn 0:3ac96e360672 6929 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MAX:
charlesmn 0:3ac96e360672 6930 pdev->tuning_parms.tp_uwr_med_z_6_max =
charlesmn 0:3ac96e360672 6931 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6932 break;
charlesmn 0:3ac96e360672 6933 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEA:
charlesmn 0:3ac96e360672 6934 pdev->tuning_parms.tp_uwr_med_corr_z_1_rangea =
charlesmn 0:3ac96e360672 6935 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6936 break;
charlesmn 0:3ac96e360672 6937 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEB:
charlesmn 0:3ac96e360672 6938 pdev->tuning_parms.tp_uwr_med_corr_z_1_rangeb =
charlesmn 0:3ac96e360672 6939 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6940 break;
charlesmn 0:3ac96e360672 6941 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEA:
charlesmn 0:3ac96e360672 6942 pdev->tuning_parms.tp_uwr_med_corr_z_2_rangea =
charlesmn 0:3ac96e360672 6943 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6944 break;
charlesmn 0:3ac96e360672 6945 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEB:
charlesmn 0:3ac96e360672 6946 pdev->tuning_parms.tp_uwr_med_corr_z_2_rangeb =
charlesmn 0:3ac96e360672 6947 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6948 break;
charlesmn 0:3ac96e360672 6949 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEA:
charlesmn 0:3ac96e360672 6950 pdev->tuning_parms.tp_uwr_med_corr_z_3_rangea =
charlesmn 0:3ac96e360672 6951 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6952 break;
charlesmn 0:3ac96e360672 6953 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEB:
charlesmn 0:3ac96e360672 6954 pdev->tuning_parms.tp_uwr_med_corr_z_3_rangeb =
charlesmn 0:3ac96e360672 6955 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6956 break;
charlesmn 0:3ac96e360672 6957 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEA:
charlesmn 0:3ac96e360672 6958 pdev->tuning_parms.tp_uwr_med_corr_z_4_rangea =
charlesmn 0:3ac96e360672 6959 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6960 break;
charlesmn 0:3ac96e360672 6961 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEB:
charlesmn 0:3ac96e360672 6962 pdev->tuning_parms.tp_uwr_med_corr_z_4_rangeb =
charlesmn 0:3ac96e360672 6963 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6964 break;
charlesmn 0:3ac96e360672 6965 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEA:
charlesmn 0:3ac96e360672 6966 pdev->tuning_parms.tp_uwr_med_corr_z_5_rangea =
charlesmn 0:3ac96e360672 6967 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6968 break;
charlesmn 0:3ac96e360672 6969 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEB:
charlesmn 0:3ac96e360672 6970 pdev->tuning_parms.tp_uwr_med_corr_z_5_rangeb =
charlesmn 0:3ac96e360672 6971 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6972 break;
charlesmn 0:3ac96e360672 6973 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEA:
charlesmn 0:3ac96e360672 6974 pdev->tuning_parms.tp_uwr_med_corr_z_6_rangea =
charlesmn 0:3ac96e360672 6975 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6976 break;
charlesmn 0:3ac96e360672 6977 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEB:
charlesmn 0:3ac96e360672 6978 pdev->tuning_parms.tp_uwr_med_corr_z_6_rangeb =
charlesmn 0:3ac96e360672 6979 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6980 break;
charlesmn 0:3ac96e360672 6981 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MIN:
charlesmn 0:3ac96e360672 6982 pdev->tuning_parms.tp_uwr_lng_z_1_min =
charlesmn 0:3ac96e360672 6983 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6984 break;
charlesmn 0:3ac96e360672 6985 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MAX:
charlesmn 0:3ac96e360672 6986 pdev->tuning_parms.tp_uwr_lng_z_1_max =
charlesmn 0:3ac96e360672 6987 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6988 break;
charlesmn 0:3ac96e360672 6989 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MIN:
charlesmn 0:3ac96e360672 6990 pdev->tuning_parms.tp_uwr_lng_z_2_min =
charlesmn 0:3ac96e360672 6991 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6992 break;
charlesmn 0:3ac96e360672 6993 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MAX:
charlesmn 0:3ac96e360672 6994 pdev->tuning_parms.tp_uwr_lng_z_2_max =
charlesmn 0:3ac96e360672 6995 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 6996 break;
charlesmn 0:3ac96e360672 6997 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MIN:
charlesmn 0:3ac96e360672 6998 pdev->tuning_parms.tp_uwr_lng_z_3_min =
charlesmn 0:3ac96e360672 6999 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7000 break;
charlesmn 0:3ac96e360672 7001 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MAX:
charlesmn 0:3ac96e360672 7002 pdev->tuning_parms.tp_uwr_lng_z_3_max =
charlesmn 0:3ac96e360672 7003 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7004 break;
charlesmn 0:3ac96e360672 7005 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MIN:
charlesmn 0:3ac96e360672 7006 pdev->tuning_parms.tp_uwr_lng_z_4_min =
charlesmn 0:3ac96e360672 7007 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7008 break;
charlesmn 0:3ac96e360672 7009 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MAX:
charlesmn 0:3ac96e360672 7010 pdev->tuning_parms.tp_uwr_lng_z_4_max =
charlesmn 0:3ac96e360672 7011 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7012 break;
charlesmn 0:3ac96e360672 7013 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MIN:
charlesmn 0:3ac96e360672 7014 pdev->tuning_parms.tp_uwr_lng_z_5_min =
charlesmn 0:3ac96e360672 7015 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7016 break;
charlesmn 0:3ac96e360672 7017 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MAX:
charlesmn 0:3ac96e360672 7018 pdev->tuning_parms.tp_uwr_lng_z_5_max =
charlesmn 0:3ac96e360672 7019 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7020 break;
charlesmn 0:3ac96e360672 7021 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEA:
charlesmn 0:3ac96e360672 7022 pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangea =
charlesmn 0:3ac96e360672 7023 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7024 break;
charlesmn 0:3ac96e360672 7025 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEB:
charlesmn 0:3ac96e360672 7026 pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangeb =
charlesmn 0:3ac96e360672 7027 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7028 break;
charlesmn 0:3ac96e360672 7029 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEA:
charlesmn 0:3ac96e360672 7030 pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangea =
charlesmn 0:3ac96e360672 7031 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7032 break;
charlesmn 0:3ac96e360672 7033 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEB:
charlesmn 0:3ac96e360672 7034 pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangeb =
charlesmn 0:3ac96e360672 7035 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7036 break;
charlesmn 0:3ac96e360672 7037 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEA:
charlesmn 0:3ac96e360672 7038 pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangea =
charlesmn 0:3ac96e360672 7039 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7040 break;
charlesmn 0:3ac96e360672 7041 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEB:
charlesmn 0:3ac96e360672 7042 pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangeb =
charlesmn 0:3ac96e360672 7043 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7044 break;
charlesmn 0:3ac96e360672 7045 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEA:
charlesmn 0:3ac96e360672 7046 pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangea =
charlesmn 0:3ac96e360672 7047 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7048 break;
charlesmn 0:3ac96e360672 7049 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEB:
charlesmn 0:3ac96e360672 7050 pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangeb =
charlesmn 0:3ac96e360672 7051 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7052 break;
charlesmn 0:3ac96e360672 7053 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEA:
charlesmn 0:3ac96e360672 7054 pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangea =
charlesmn 0:3ac96e360672 7055 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7056 break;
charlesmn 0:3ac96e360672 7057 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEB:
charlesmn 0:3ac96e360672 7058 pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangeb =
charlesmn 0:3ac96e360672 7059 (int16_t)tuning_parm_value;
charlesmn 0:3ac96e360672 7060 break;
charlesmn 0:3ac96e360672 7061
charlesmn 0:3ac96e360672 7062
charlesmn 0:3ac96e360672 7063 default:
charlesmn 0:3ac96e360672 7064 status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn 0:3ac96e360672 7065 break;
charlesmn 0:3ac96e360672 7066
charlesmn 0:3ac96e360672 7067 }
charlesmn 0:3ac96e360672 7068
charlesmn 0:3ac96e360672 7069 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 7070
charlesmn 0:3ac96e360672 7071 return status;
charlesmn 0:3ac96e360672 7072 }
charlesmn 0:3ac96e360672 7073
charlesmn 0:3ac96e360672 7074
charlesmn 0:3ac96e360672 7075
charlesmn 0:3ac96e360672 7076
charlesmn 0:3ac96e360672 7077
charlesmn 0:3ac96e360672 7078 VL53L1_Error VL53L1_dynamic_xtalk_correction_enable(
charlesmn 0:3ac96e360672 7079 VL53L1_DEV Dev
charlesmn 0:3ac96e360672 7080 )
charlesmn 0:3ac96e360672 7081 {
charlesmn 0:3ac96e360672 7082
charlesmn 0:3ac96e360672 7083
charlesmn 0:3ac96e360672 7084
charlesmn 0:3ac96e360672 7085 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 7086
charlesmn 0:3ac96e360672 7087 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 7088
charlesmn 0:3ac96e360672 7089 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 7090
charlesmn 0:3ac96e360672 7091 pdev->smudge_correct_config.smudge_corr_enabled = 1;
charlesmn 0:3ac96e360672 7092
charlesmn 0:3ac96e360672 7093 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 7094
charlesmn 0:3ac96e360672 7095 return status;
charlesmn 0:3ac96e360672 7096 }
charlesmn 0:3ac96e360672 7097
charlesmn 0:3ac96e360672 7098 VL53L1_Error VL53L1_dynamic_xtalk_correction_disable(
charlesmn 0:3ac96e360672 7099 VL53L1_DEV Dev
charlesmn 0:3ac96e360672 7100 )
charlesmn 0:3ac96e360672 7101 {
charlesmn 0:3ac96e360672 7102
charlesmn 0:3ac96e360672 7103
charlesmn 0:3ac96e360672 7104
charlesmn 0:3ac96e360672 7105 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 7106
charlesmn 0:3ac96e360672 7107 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 7108
charlesmn 0:3ac96e360672 7109 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 7110
charlesmn 0:3ac96e360672 7111 pdev->smudge_correct_config.smudge_corr_enabled = 0;
charlesmn 0:3ac96e360672 7112
charlesmn 0:3ac96e360672 7113 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 7114
charlesmn 0:3ac96e360672 7115 return status;
charlesmn 0:3ac96e360672 7116 }
charlesmn 0:3ac96e360672 7117
charlesmn 0:3ac96e360672 7118 VL53L1_Error VL53L1_dynamic_xtalk_correction_apply_enable(
charlesmn 0:3ac96e360672 7119 VL53L1_DEV Dev
charlesmn 0:3ac96e360672 7120 )
charlesmn 0:3ac96e360672 7121 {
charlesmn 0:3ac96e360672 7122
charlesmn 0:3ac96e360672 7123
charlesmn 0:3ac96e360672 7124
charlesmn 0:3ac96e360672 7125 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 7126
charlesmn 0:3ac96e360672 7127 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 7128
charlesmn 0:3ac96e360672 7129 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 7130
charlesmn 0:3ac96e360672 7131 pdev->smudge_correct_config.smudge_corr_apply_enabled = 1;
charlesmn 0:3ac96e360672 7132
charlesmn 0:3ac96e360672 7133 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 7134
charlesmn 0:3ac96e360672 7135 return status;
charlesmn 0:3ac96e360672 7136 }
charlesmn 0:3ac96e360672 7137
charlesmn 0:3ac96e360672 7138 VL53L1_Error VL53L1_dynamic_xtalk_correction_apply_disable(
charlesmn 0:3ac96e360672 7139 VL53L1_DEV Dev
charlesmn 0:3ac96e360672 7140 )
charlesmn 0:3ac96e360672 7141 {
charlesmn 0:3ac96e360672 7142
charlesmn 0:3ac96e360672 7143
charlesmn 0:3ac96e360672 7144
charlesmn 0:3ac96e360672 7145 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 7146
charlesmn 0:3ac96e360672 7147 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 7148
charlesmn 0:3ac96e360672 7149 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 7150
charlesmn 0:3ac96e360672 7151 pdev->smudge_correct_config.smudge_corr_apply_enabled = 0;
charlesmn 0:3ac96e360672 7152
charlesmn 0:3ac96e360672 7153 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 7154
charlesmn 0:3ac96e360672 7155 return status;
charlesmn 0:3ac96e360672 7156 }
charlesmn 0:3ac96e360672 7157
charlesmn 0:3ac96e360672 7158 VL53L1_Error VL53L1_dynamic_xtalk_correction_single_apply_enable(
charlesmn 0:3ac96e360672 7159 VL53L1_DEV Dev
charlesmn 0:3ac96e360672 7160 )
charlesmn 0:3ac96e360672 7161 {
charlesmn 0:3ac96e360672 7162
charlesmn 0:3ac96e360672 7163
charlesmn 0:3ac96e360672 7164
charlesmn 0:3ac96e360672 7165 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 7166
charlesmn 0:3ac96e360672 7167 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 7168
charlesmn 0:3ac96e360672 7169 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 7170
charlesmn 0:3ac96e360672 7171 pdev->smudge_correct_config.smudge_corr_single_apply = 1;
charlesmn 0:3ac96e360672 7172
charlesmn 0:3ac96e360672 7173 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 7174
charlesmn 0:3ac96e360672 7175 return status;
charlesmn 0:3ac96e360672 7176 }
charlesmn 0:3ac96e360672 7177
charlesmn 0:3ac96e360672 7178 VL53L1_Error VL53L1_dynamic_xtalk_correction_single_apply_disable(
charlesmn 0:3ac96e360672 7179 VL53L1_DEV Dev
charlesmn 0:3ac96e360672 7180 )
charlesmn 0:3ac96e360672 7181 {
charlesmn 0:3ac96e360672 7182
charlesmn 0:3ac96e360672 7183
charlesmn 0:3ac96e360672 7184
charlesmn 0:3ac96e360672 7185 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 7186
charlesmn 0:3ac96e360672 7187 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 7188
charlesmn 0:3ac96e360672 7189 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 7190
charlesmn 0:3ac96e360672 7191 pdev->smudge_correct_config.smudge_corr_single_apply = 0;
charlesmn 0:3ac96e360672 7192
charlesmn 0:3ac96e360672 7193 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 7194
charlesmn 0:3ac96e360672 7195 return status;
charlesmn 0:3ac96e360672 7196 }
charlesmn 0:3ac96e360672 7197
charlesmn 0:3ac96e360672 7198
charlesmn 0:3ac96e360672 7199 VL53L1_Error VL53L1_dynamic_xtalk_correction_set_scalers(
charlesmn 0:3ac96e360672 7200 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 7201 int16_t x_scaler_in,
charlesmn 0:3ac96e360672 7202 int16_t y_scaler_in,
charlesmn 0:3ac96e360672 7203 uint8_t user_scaler_set_in
charlesmn 0:3ac96e360672 7204 )
charlesmn 0:3ac96e360672 7205 {
charlesmn 0:3ac96e360672 7206
charlesmn 0:3ac96e360672 7207
charlesmn 0:3ac96e360672 7208
charlesmn 0:3ac96e360672 7209 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 7210
charlesmn 0:3ac96e360672 7211 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 7212
charlesmn 0:3ac96e360672 7213 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 7214
charlesmn 0:3ac96e360672 7215 pdev->smudge_correct_config.x_gradient_scaler = x_scaler_in;
charlesmn 0:3ac96e360672 7216 pdev->smudge_correct_config.y_gradient_scaler = y_scaler_in;
charlesmn 0:3ac96e360672 7217 pdev->smudge_correct_config.user_scaler_set = user_scaler_set_in;
charlesmn 0:3ac96e360672 7218
charlesmn 0:3ac96e360672 7219 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 7220
charlesmn 0:3ac96e360672 7221 return status;
charlesmn 0:3ac96e360672 7222 }
charlesmn 0:3ac96e360672 7223
charlesmn 0:3ac96e360672 7224
charlesmn 0:3ac96e360672 7225
charlesmn 0:3ac96e360672 7226
charlesmn 0:3ac96e360672 7227
charlesmn 0:3ac96e360672 7228
charlesmn 0:3ac96e360672 7229 VL53L1_Error VL53L1_get_current_xtalk_settings(
charlesmn 0:3ac96e360672 7230 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 7231 VL53L1_xtalk_calibration_results_t *pxtalk
charlesmn 0:3ac96e360672 7232 )
charlesmn 0:3ac96e360672 7233 {
charlesmn 0:3ac96e360672 7234
charlesmn 0:3ac96e360672 7235
charlesmn 0:3ac96e360672 7236 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 7237 uint8_t i;
charlesmn 0:3ac96e360672 7238
charlesmn 0:3ac96e360672 7239 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 7240
charlesmn 0:3ac96e360672 7241 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 7242
charlesmn 0:3ac96e360672 7243 pxtalk->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 7244 pdev->xtalk_cfg.algo__crosstalk_compensation_plane_offset_kcps;
charlesmn 0:3ac96e360672 7245 pxtalk->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 7246 pdev->xtalk_cfg.algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 7247 pxtalk->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 7248 pdev->xtalk_cfg.algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 7249 for (i = 0; i < VL53L1_BIN_REC_SIZE; i++)
charlesmn 0:3ac96e360672 7250 pxtalk->algo__xtalk_cpo_HistoMerge_kcps[i] =
charlesmn 0:3ac96e360672 7251 pdev->xtalk_cal.algo__xtalk_cpo_HistoMerge_kcps[i];
charlesmn 0:3ac96e360672 7252
charlesmn 0:3ac96e360672 7253 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 7254
charlesmn 0:3ac96e360672 7255 return status;
charlesmn 0:3ac96e360672 7256
charlesmn 0:3ac96e360672 7257 }
charlesmn 0:3ac96e360672 7258
charlesmn 0:3ac96e360672 7259
charlesmn 0:3ac96e360672 7260
charlesmn 0:3ac96e360672 7261
charlesmn 0:3ac96e360672 7262
charlesmn 0:3ac96e360672 7263 VL53L1_Error VL53L1_set_current_xtalk_settings(
charlesmn 0:3ac96e360672 7264 VL53L1_DEV Dev,
charlesmn 0:3ac96e360672 7265 VL53L1_xtalk_calibration_results_t *pxtalk
charlesmn 0:3ac96e360672 7266 )
charlesmn 0:3ac96e360672 7267 {
charlesmn 0:3ac96e360672 7268
charlesmn 0:3ac96e360672 7269
charlesmn 0:3ac96e360672 7270 VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn 0:3ac96e360672 7271 uint8_t i;
charlesmn 0:3ac96e360672 7272
charlesmn 0:3ac96e360672 7273 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn 0:3ac96e360672 7274
charlesmn 0:3ac96e360672 7275 LOG_FUNCTION_START("");
charlesmn 0:3ac96e360672 7276
charlesmn 0:3ac96e360672 7277 pdev->xtalk_cfg.algo__crosstalk_compensation_plane_offset_kcps =
charlesmn 0:3ac96e360672 7278 pxtalk->algo__crosstalk_compensation_plane_offset_kcps;
charlesmn 0:3ac96e360672 7279 pdev->xtalk_cfg.algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn 0:3ac96e360672 7280 pxtalk->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 7281 pdev->xtalk_cfg.algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn 0:3ac96e360672 7282 pxtalk->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 7283 for (i = 0; i < VL53L1_BIN_REC_SIZE; i++)
charlesmn 0:3ac96e360672 7284 pdev->xtalk_cal.algo__xtalk_cpo_HistoMerge_kcps[i] =
charlesmn 0:3ac96e360672 7285 pxtalk->algo__xtalk_cpo_HistoMerge_kcps[i];
charlesmn 0:3ac96e360672 7286
charlesmn 0:3ac96e360672 7287 LOG_FUNCTION_END(status);
charlesmn 0:3ac96e360672 7288
charlesmn 0:3ac96e360672 7289 return status;
charlesmn 0:3ac96e360672 7290
charlesmn 0:3ac96e360672 7291 }
charlesmn 0:3ac96e360672 7292
charlesmn 0:3ac96e360672 7293
charlesmn 0:3ac96e360672 7294